onenand_base.c 59 KB

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  1. /*
  2. * linux/drivers/mtd/onenand/onenand_base.c
  3. *
  4. * Copyright (C) 2005-2007 Samsung Electronics
  5. * Kyungmin Park <kyungmin.park@samsung.com>
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * published by the Free Software Foundation.
  10. */
  11. #include <linux/kernel.h>
  12. #include <linux/module.h>
  13. #include <linux/init.h>
  14. #include <linux/sched.h>
  15. #include <linux/interrupt.h>
  16. #include <linux/jiffies.h>
  17. #include <linux/mtd/mtd.h>
  18. #include <linux/mtd/onenand.h>
  19. #include <linux/mtd/partitions.h>
  20. #include <asm/io.h>
  21. /**
  22. * onenand_oob_64 - oob info for large (2KB) page
  23. */
  24. static struct nand_ecclayout onenand_oob_64 = {
  25. .eccbytes = 20,
  26. .eccpos = {
  27. 8, 9, 10, 11, 12,
  28. 24, 25, 26, 27, 28,
  29. 40, 41, 42, 43, 44,
  30. 56, 57, 58, 59, 60,
  31. },
  32. .oobfree = {
  33. {2, 3}, {14, 2}, {18, 3}, {30, 2},
  34. {34, 3}, {46, 2}, {50, 3}, {62, 2}
  35. }
  36. };
  37. /**
  38. * onenand_oob_32 - oob info for middle (1KB) page
  39. */
  40. static struct nand_ecclayout onenand_oob_32 = {
  41. .eccbytes = 10,
  42. .eccpos = {
  43. 8, 9, 10, 11, 12,
  44. 24, 25, 26, 27, 28,
  45. },
  46. .oobfree = { {2, 3}, {14, 2}, {18, 3}, {30, 2} }
  47. };
  48. static const unsigned char ffchars[] = {
  49. 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
  50. 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 16 */
  51. 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
  52. 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 32 */
  53. 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
  54. 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 48 */
  55. 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
  56. 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 64 */
  57. };
  58. /**
  59. * onenand_readw - [OneNAND Interface] Read OneNAND register
  60. * @param addr address to read
  61. *
  62. * Read OneNAND register
  63. */
  64. static unsigned short onenand_readw(void __iomem *addr)
  65. {
  66. return readw(addr);
  67. }
  68. /**
  69. * onenand_writew - [OneNAND Interface] Write OneNAND register with value
  70. * @param value value to write
  71. * @param addr address to write
  72. *
  73. * Write OneNAND register with value
  74. */
  75. static void onenand_writew(unsigned short value, void __iomem *addr)
  76. {
  77. writew(value, addr);
  78. }
  79. /**
  80. * onenand_block_address - [DEFAULT] Get block address
  81. * @param this onenand chip data structure
  82. * @param block the block
  83. * @return translated block address if DDP, otherwise same
  84. *
  85. * Setup Start Address 1 Register (F100h)
  86. */
  87. static int onenand_block_address(struct onenand_chip *this, int block)
  88. {
  89. /* Device Flash Core select, NAND Flash Block Address */
  90. if (block & this->density_mask)
  91. return ONENAND_DDP_CHIP1 | (block ^ this->density_mask);
  92. return block;
  93. }
  94. /**
  95. * onenand_bufferram_address - [DEFAULT] Get bufferram address
  96. * @param this onenand chip data structure
  97. * @param block the block
  98. * @return set DBS value if DDP, otherwise 0
  99. *
  100. * Setup Start Address 2 Register (F101h) for DDP
  101. */
  102. static int onenand_bufferram_address(struct onenand_chip *this, int block)
  103. {
  104. /* Device BufferRAM Select */
  105. if (block & this->density_mask)
  106. return ONENAND_DDP_CHIP1;
  107. return ONENAND_DDP_CHIP0;
  108. }
  109. /**
  110. * onenand_page_address - [DEFAULT] Get page address
  111. * @param page the page address
  112. * @param sector the sector address
  113. * @return combined page and sector address
  114. *
  115. * Setup Start Address 8 Register (F107h)
  116. */
  117. static int onenand_page_address(int page, int sector)
  118. {
  119. /* Flash Page Address, Flash Sector Address */
  120. int fpa, fsa;
  121. fpa = page & ONENAND_FPA_MASK;
  122. fsa = sector & ONENAND_FSA_MASK;
  123. return ((fpa << ONENAND_FPA_SHIFT) | fsa);
  124. }
  125. /**
  126. * onenand_buffer_address - [DEFAULT] Get buffer address
  127. * @param dataram1 DataRAM index
  128. * @param sectors the sector address
  129. * @param count the number of sectors
  130. * @return the start buffer value
  131. *
  132. * Setup Start Buffer Register (F200h)
  133. */
  134. static int onenand_buffer_address(int dataram1, int sectors, int count)
  135. {
  136. int bsa, bsc;
  137. /* BufferRAM Sector Address */
  138. bsa = sectors & ONENAND_BSA_MASK;
  139. if (dataram1)
  140. bsa |= ONENAND_BSA_DATARAM1; /* DataRAM1 */
  141. else
  142. bsa |= ONENAND_BSA_DATARAM0; /* DataRAM0 */
  143. /* BufferRAM Sector Count */
  144. bsc = count & ONENAND_BSC_MASK;
  145. return ((bsa << ONENAND_BSA_SHIFT) | bsc);
  146. }
  147. /**
  148. * onenand_command - [DEFAULT] Send command to OneNAND device
  149. * @param mtd MTD device structure
  150. * @param cmd the command to be sent
  151. * @param addr offset to read from or write to
  152. * @param len number of bytes to read or write
  153. *
  154. * Send command to OneNAND device. This function is used for middle/large page
  155. * devices (1KB/2KB Bytes per page)
  156. */
  157. static int onenand_command(struct mtd_info *mtd, int cmd, loff_t addr, size_t len)
  158. {
  159. struct onenand_chip *this = mtd->priv;
  160. int value, readcmd = 0, block_cmd = 0;
  161. int block, page;
  162. /* Address translation */
  163. switch (cmd) {
  164. case ONENAND_CMD_UNLOCK:
  165. case ONENAND_CMD_LOCK:
  166. case ONENAND_CMD_LOCK_TIGHT:
  167. case ONENAND_CMD_UNLOCK_ALL:
  168. block = -1;
  169. page = -1;
  170. break;
  171. case ONENAND_CMD_ERASE:
  172. case ONENAND_CMD_BUFFERRAM:
  173. case ONENAND_CMD_OTP_ACCESS:
  174. block_cmd = 1;
  175. block = (int) (addr >> this->erase_shift);
  176. page = -1;
  177. break;
  178. default:
  179. block = (int) (addr >> this->erase_shift);
  180. page = (int) (addr >> this->page_shift);
  181. page &= this->page_mask;
  182. break;
  183. }
  184. /* NOTE: The setting order of the registers is very important! */
  185. if (cmd == ONENAND_CMD_BUFFERRAM) {
  186. /* Select DataRAM for DDP */
  187. value = onenand_bufferram_address(this, block);
  188. this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
  189. /* Switch to the next data buffer */
  190. ONENAND_SET_NEXT_BUFFERRAM(this);
  191. return 0;
  192. }
  193. if (block != -1) {
  194. /* Write 'DFS, FBA' of Flash */
  195. value = onenand_block_address(this, block);
  196. this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
  197. if (block_cmd) {
  198. /* Select DataRAM for DDP */
  199. value = onenand_bufferram_address(this, block);
  200. this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
  201. }
  202. }
  203. if (page != -1) {
  204. /* Now we use page size operation */
  205. int sectors = 4, count = 4;
  206. int dataram;
  207. switch (cmd) {
  208. case ONENAND_CMD_READ:
  209. case ONENAND_CMD_READOOB:
  210. dataram = ONENAND_SET_NEXT_BUFFERRAM(this);
  211. readcmd = 1;
  212. break;
  213. default:
  214. dataram = ONENAND_CURRENT_BUFFERRAM(this);
  215. break;
  216. }
  217. /* Write 'FPA, FSA' of Flash */
  218. value = onenand_page_address(page, sectors);
  219. this->write_word(value, this->base + ONENAND_REG_START_ADDRESS8);
  220. /* Write 'BSA, BSC' of DataRAM */
  221. value = onenand_buffer_address(dataram, sectors, count);
  222. this->write_word(value, this->base + ONENAND_REG_START_BUFFER);
  223. if (readcmd) {
  224. /* Select DataRAM for DDP */
  225. value = onenand_bufferram_address(this, block);
  226. this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
  227. }
  228. }
  229. /* Interrupt clear */
  230. this->write_word(ONENAND_INT_CLEAR, this->base + ONENAND_REG_INTERRUPT);
  231. /* Write command */
  232. this->write_word(cmd, this->base + ONENAND_REG_COMMAND);
  233. return 0;
  234. }
  235. /**
  236. * onenand_wait - [DEFAULT] wait until the command is done
  237. * @param mtd MTD device structure
  238. * @param state state to select the max. timeout value
  239. *
  240. * Wait for command done. This applies to all OneNAND command
  241. * Read can take up to 30us, erase up to 2ms and program up to 350us
  242. * according to general OneNAND specs
  243. */
  244. static int onenand_wait(struct mtd_info *mtd, int state)
  245. {
  246. struct onenand_chip * this = mtd->priv;
  247. unsigned long timeout;
  248. unsigned int flags = ONENAND_INT_MASTER;
  249. unsigned int interrupt = 0;
  250. unsigned int ctrl;
  251. /* The 20 msec is enough */
  252. timeout = jiffies + msecs_to_jiffies(20);
  253. while (time_before(jiffies, timeout)) {
  254. interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
  255. if (interrupt & flags)
  256. break;
  257. if (state != FL_READING)
  258. cond_resched();
  259. }
  260. /* To get correct interrupt status in timeout case */
  261. interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
  262. ctrl = this->read_word(this->base + ONENAND_REG_CTRL_STATUS);
  263. if (ctrl & ONENAND_CTRL_ERROR) {
  264. DEBUG(MTD_DEBUG_LEVEL0, "onenand_wait: controller error = 0x%04x\n", ctrl);
  265. if (ctrl & ONENAND_CTRL_LOCK)
  266. DEBUG(MTD_DEBUG_LEVEL0, "onenand_wait: it's locked error.\n");
  267. return ctrl;
  268. }
  269. if (interrupt & ONENAND_INT_READ) {
  270. int ecc = this->read_word(this->base + ONENAND_REG_ECC_STATUS);
  271. if (ecc) {
  272. DEBUG(MTD_DEBUG_LEVEL0, "onenand_wait: ECC error = 0x%04x\n", ecc);
  273. if (ecc & ONENAND_ECC_2BIT_ALL) {
  274. mtd->ecc_stats.failed++;
  275. return ecc;
  276. } else if (ecc & ONENAND_ECC_1BIT_ALL)
  277. mtd->ecc_stats.corrected++;
  278. }
  279. } else if (state == FL_READING) {
  280. printk(KERN_ERR "onenand_wait: read timeout! ctrl=0x%04x intr=0x%04x\n", ctrl, interrupt);
  281. return -EIO;
  282. }
  283. return 0;
  284. }
  285. /*
  286. * onenand_interrupt - [DEFAULT] onenand interrupt handler
  287. * @param irq onenand interrupt number
  288. * @param dev_id interrupt data
  289. *
  290. * complete the work
  291. */
  292. static irqreturn_t onenand_interrupt(int irq, void *data)
  293. {
  294. struct onenand_chip *this = (struct onenand_chip *) data;
  295. /* To handle shared interrupt */
  296. if (!this->complete.done)
  297. complete(&this->complete);
  298. return IRQ_HANDLED;
  299. }
  300. /*
  301. * onenand_interrupt_wait - [DEFAULT] wait until the command is done
  302. * @param mtd MTD device structure
  303. * @param state state to select the max. timeout value
  304. *
  305. * Wait for command done.
  306. */
  307. static int onenand_interrupt_wait(struct mtd_info *mtd, int state)
  308. {
  309. struct onenand_chip *this = mtd->priv;
  310. wait_for_completion(&this->complete);
  311. return onenand_wait(mtd, state);
  312. }
  313. /*
  314. * onenand_try_interrupt_wait - [DEFAULT] try interrupt wait
  315. * @param mtd MTD device structure
  316. * @param state state to select the max. timeout value
  317. *
  318. * Try interrupt based wait (It is used one-time)
  319. */
  320. static int onenand_try_interrupt_wait(struct mtd_info *mtd, int state)
  321. {
  322. struct onenand_chip *this = mtd->priv;
  323. unsigned long remain, timeout;
  324. /* We use interrupt wait first */
  325. this->wait = onenand_interrupt_wait;
  326. timeout = msecs_to_jiffies(100);
  327. remain = wait_for_completion_timeout(&this->complete, timeout);
  328. if (!remain) {
  329. printk(KERN_INFO "OneNAND: There's no interrupt. "
  330. "We use the normal wait\n");
  331. /* Release the irq */
  332. free_irq(this->irq, this);
  333. this->wait = onenand_wait;
  334. }
  335. return onenand_wait(mtd, state);
  336. }
  337. /*
  338. * onenand_setup_wait - [OneNAND Interface] setup onenand wait method
  339. * @param mtd MTD device structure
  340. *
  341. * There's two method to wait onenand work
  342. * 1. polling - read interrupt status register
  343. * 2. interrupt - use the kernel interrupt method
  344. */
  345. static void onenand_setup_wait(struct mtd_info *mtd)
  346. {
  347. struct onenand_chip *this = mtd->priv;
  348. int syscfg;
  349. init_completion(&this->complete);
  350. if (this->irq <= 0) {
  351. this->wait = onenand_wait;
  352. return;
  353. }
  354. if (request_irq(this->irq, &onenand_interrupt,
  355. IRQF_SHARED, "onenand", this)) {
  356. /* If we can't get irq, use the normal wait */
  357. this->wait = onenand_wait;
  358. return;
  359. }
  360. /* Enable interrupt */
  361. syscfg = this->read_word(this->base + ONENAND_REG_SYS_CFG1);
  362. syscfg |= ONENAND_SYS_CFG1_IOBE;
  363. this->write_word(syscfg, this->base + ONENAND_REG_SYS_CFG1);
  364. this->wait = onenand_try_interrupt_wait;
  365. }
  366. /**
  367. * onenand_bufferram_offset - [DEFAULT] BufferRAM offset
  368. * @param mtd MTD data structure
  369. * @param area BufferRAM area
  370. * @return offset given area
  371. *
  372. * Return BufferRAM offset given area
  373. */
  374. static inline int onenand_bufferram_offset(struct mtd_info *mtd, int area)
  375. {
  376. struct onenand_chip *this = mtd->priv;
  377. if (ONENAND_CURRENT_BUFFERRAM(this)) {
  378. if (area == ONENAND_DATARAM)
  379. return mtd->writesize;
  380. if (area == ONENAND_SPARERAM)
  381. return mtd->oobsize;
  382. }
  383. return 0;
  384. }
  385. /**
  386. * onenand_read_bufferram - [OneNAND Interface] Read the bufferram area
  387. * @param mtd MTD data structure
  388. * @param area BufferRAM area
  389. * @param buffer the databuffer to put/get data
  390. * @param offset offset to read from or write to
  391. * @param count number of bytes to read/write
  392. *
  393. * Read the BufferRAM area
  394. */
  395. static int onenand_read_bufferram(struct mtd_info *mtd, int area,
  396. unsigned char *buffer, int offset, size_t count)
  397. {
  398. struct onenand_chip *this = mtd->priv;
  399. void __iomem *bufferram;
  400. bufferram = this->base + area;
  401. bufferram += onenand_bufferram_offset(mtd, area);
  402. if (ONENAND_CHECK_BYTE_ACCESS(count)) {
  403. unsigned short word;
  404. /* Align with word(16-bit) size */
  405. count--;
  406. /* Read word and save byte */
  407. word = this->read_word(bufferram + offset + count);
  408. buffer[count] = (word & 0xff);
  409. }
  410. memcpy(buffer, bufferram + offset, count);
  411. return 0;
  412. }
  413. /**
  414. * onenand_sync_read_bufferram - [OneNAND Interface] Read the bufferram area with Sync. Burst mode
  415. * @param mtd MTD data structure
  416. * @param area BufferRAM area
  417. * @param buffer the databuffer to put/get data
  418. * @param offset offset to read from or write to
  419. * @param count number of bytes to read/write
  420. *
  421. * Read the BufferRAM area with Sync. Burst Mode
  422. */
  423. static int onenand_sync_read_bufferram(struct mtd_info *mtd, int area,
  424. unsigned char *buffer, int offset, size_t count)
  425. {
  426. struct onenand_chip *this = mtd->priv;
  427. void __iomem *bufferram;
  428. bufferram = this->base + area;
  429. bufferram += onenand_bufferram_offset(mtd, area);
  430. this->mmcontrol(mtd, ONENAND_SYS_CFG1_SYNC_READ);
  431. if (ONENAND_CHECK_BYTE_ACCESS(count)) {
  432. unsigned short word;
  433. /* Align with word(16-bit) size */
  434. count--;
  435. /* Read word and save byte */
  436. word = this->read_word(bufferram + offset + count);
  437. buffer[count] = (word & 0xff);
  438. }
  439. memcpy(buffer, bufferram + offset, count);
  440. this->mmcontrol(mtd, 0);
  441. return 0;
  442. }
  443. /**
  444. * onenand_write_bufferram - [OneNAND Interface] Write the bufferram area
  445. * @param mtd MTD data structure
  446. * @param area BufferRAM area
  447. * @param buffer the databuffer to put/get data
  448. * @param offset offset to read from or write to
  449. * @param count number of bytes to read/write
  450. *
  451. * Write the BufferRAM area
  452. */
  453. static int onenand_write_bufferram(struct mtd_info *mtd, int area,
  454. const unsigned char *buffer, int offset, size_t count)
  455. {
  456. struct onenand_chip *this = mtd->priv;
  457. void __iomem *bufferram;
  458. bufferram = this->base + area;
  459. bufferram += onenand_bufferram_offset(mtd, area);
  460. if (ONENAND_CHECK_BYTE_ACCESS(count)) {
  461. unsigned short word;
  462. int byte_offset;
  463. /* Align with word(16-bit) size */
  464. count--;
  465. /* Calculate byte access offset */
  466. byte_offset = offset + count;
  467. /* Read word and save byte */
  468. word = this->read_word(bufferram + byte_offset);
  469. word = (word & ~0xff) | buffer[count];
  470. this->write_word(word, bufferram + byte_offset);
  471. }
  472. memcpy(bufferram + offset, buffer, count);
  473. return 0;
  474. }
  475. /**
  476. * onenand_check_bufferram - [GENERIC] Check BufferRAM information
  477. * @param mtd MTD data structure
  478. * @param addr address to check
  479. * @return 1 if there are valid data, otherwise 0
  480. *
  481. * Check bufferram if there is data we required
  482. */
  483. static int onenand_check_bufferram(struct mtd_info *mtd, loff_t addr)
  484. {
  485. struct onenand_chip *this = mtd->priv;
  486. int blockpage;
  487. unsigned int i;
  488. blockpage = (int) (addr >> this->page_shift);
  489. /* Is there valid data? */
  490. i = ONENAND_CURRENT_BUFFERRAM(this);
  491. if (this->bufferram[i].blockpage == blockpage)
  492. return 1;
  493. /* Check another BufferRAM */
  494. i = ONENAND_NEXT_BUFFERRAM(this);
  495. if (this->bufferram[i].blockpage == blockpage) {
  496. ONENAND_SET_NEXT_BUFFERRAM(this);
  497. return 1;
  498. }
  499. return 0;
  500. }
  501. /**
  502. * onenand_update_bufferram - [GENERIC] Update BufferRAM information
  503. * @param mtd MTD data structure
  504. * @param addr address to update
  505. * @param valid valid flag
  506. *
  507. * Update BufferRAM information
  508. */
  509. static void onenand_update_bufferram(struct mtd_info *mtd, loff_t addr,
  510. int valid)
  511. {
  512. struct onenand_chip *this = mtd->priv;
  513. int blockpage;
  514. unsigned int i;
  515. blockpage = (int) (addr >> this->page_shift);
  516. /* Invalidate another BufferRAM */
  517. i = ONENAND_NEXT_BUFFERRAM(this);
  518. if (this->bufferram[i].blockpage == blockpage) {
  519. this->bufferram[i].blockpage = -1;
  520. /* Update BufferRAM */
  521. i = ONENAND_CURRENT_BUFFERRAM(this);
  522. if (valid)
  523. this->bufferram[i].blockpage = blockpage;
  524. else
  525. this->bufferram[i].blockpage = -1;
  526. }
  527. /**
  528. * onenand_get_device - [GENERIC] Get chip for selected access
  529. * @param mtd MTD device structure
  530. * @param new_state the state which is requested
  531. *
  532. * Get the device and lock it for exclusive access
  533. */
  534. static int onenand_get_device(struct mtd_info *mtd, int new_state)
  535. {
  536. struct onenand_chip *this = mtd->priv;
  537. DECLARE_WAITQUEUE(wait, current);
  538. /*
  539. * Grab the lock and see if the device is available
  540. */
  541. while (1) {
  542. spin_lock(&this->chip_lock);
  543. if (this->state == FL_READY) {
  544. this->state = new_state;
  545. spin_unlock(&this->chip_lock);
  546. break;
  547. }
  548. if (new_state == FL_PM_SUSPENDED) {
  549. spin_unlock(&this->chip_lock);
  550. return (this->state == FL_PM_SUSPENDED) ? 0 : -EAGAIN;
  551. }
  552. set_current_state(TASK_UNINTERRUPTIBLE);
  553. add_wait_queue(&this->wq, &wait);
  554. spin_unlock(&this->chip_lock);
  555. schedule();
  556. remove_wait_queue(&this->wq, &wait);
  557. }
  558. return 0;
  559. }
  560. /**
  561. * onenand_release_device - [GENERIC] release chip
  562. * @param mtd MTD device structure
  563. *
  564. * Deselect, release chip lock and wake up anyone waiting on the device
  565. */
  566. static void onenand_release_device(struct mtd_info *mtd)
  567. {
  568. struct onenand_chip *this = mtd->priv;
  569. /* Release the chip */
  570. spin_lock(&this->chip_lock);
  571. this->state = FL_READY;
  572. wake_up(&this->wq);
  573. spin_unlock(&this->chip_lock);
  574. }
  575. /**
  576. * onenand_read - [MTD Interface] Read data from flash
  577. * @param mtd MTD device structure
  578. * @param from offset to read from
  579. * @param len number of bytes to read
  580. * @param retlen pointer to variable to store the number of read bytes
  581. * @param buf the databuffer to put data
  582. *
  583. * Read with ecc
  584. */
  585. static int onenand_read(struct mtd_info *mtd, loff_t from, size_t len,
  586. size_t *retlen, u_char *buf)
  587. {
  588. struct onenand_chip *this = mtd->priv;
  589. struct mtd_ecc_stats stats;
  590. int read = 0, column;
  591. int thislen;
  592. int ret = 0, boundary = 0;
  593. DEBUG(MTD_DEBUG_LEVEL3, "onenand_read: from = 0x%08x, len = %i\n", (unsigned int) from, (int) len);
  594. /* Do not allow reads past end of device */
  595. if ((from + len) > mtd->size) {
  596. DEBUG(MTD_DEBUG_LEVEL0, "onenand_read: Attempt read beyond end of device\n");
  597. *retlen = 0;
  598. return -EINVAL;
  599. }
  600. /* Grab the lock and see if the device is available */
  601. onenand_get_device(mtd, FL_READING);
  602. stats = mtd->ecc_stats;
  603. /* Read-while-load method */
  604. /* Do first load to bufferRAM */
  605. if (read < len) {
  606. if (!onenand_check_bufferram(mtd, from)) {
  607. this->command(mtd, ONENAND_CMD_READ, from, mtd->writesize);
  608. ret = this->wait(mtd, FL_READING);
  609. onenand_update_bufferram(mtd, from, !ret);
  610. }
  611. }
  612. thislen = min_t(int, mtd->writesize, len - read);
  613. column = from & (mtd->writesize - 1);
  614. if (column + thislen > mtd->writesize)
  615. thislen = mtd->writesize - column;
  616. while (!ret) {
  617. /* If there is more to load then start next load */
  618. from += thislen;
  619. if (read + thislen < len) {
  620. this->command(mtd, ONENAND_CMD_READ, from, mtd->writesize);
  621. /*
  622. * Chip boundary handling in DDP
  623. * Now we issued chip 1 read and pointed chip 1
  624. * bufferam so we have to point chip 0 bufferam.
  625. */
  626. if (ONENAND_IS_DDP(this) &&
  627. unlikely(from == (this->chipsize >> 1))) {
  628. this->write_word(ONENAND_DDP_CHIP0, this->base + ONENAND_REG_START_ADDRESS2);
  629. boundary = 1;
  630. } else
  631. boundary = 0;
  632. ONENAND_SET_PREV_BUFFERRAM(this);
  633. }
  634. /* While load is going, read from last bufferRAM */
  635. this->read_bufferram(mtd, ONENAND_DATARAM, buf, column, thislen);
  636. /* See if we are done */
  637. read += thislen;
  638. if (read == len)
  639. break;
  640. /* Set up for next read from bufferRAM */
  641. if (unlikely(boundary))
  642. this->write_word(ONENAND_DDP_CHIP1, this->base + ONENAND_REG_START_ADDRESS2);
  643. ONENAND_SET_NEXT_BUFFERRAM(this);
  644. buf += thislen;
  645. thislen = min_t(int, mtd->writesize, len - read);
  646. column = 0;
  647. cond_resched();
  648. /* Now wait for load */
  649. ret = this->wait(mtd, FL_READING);
  650. onenand_update_bufferram(mtd, from, !ret);
  651. }
  652. /* Deselect and wake up anyone waiting on the device */
  653. onenand_release_device(mtd);
  654. /*
  655. * Return success, if no ECC failures, else -EBADMSG
  656. * fs driver will take care of that, because
  657. * retlen == desired len and result == -EBADMSG
  658. */
  659. *retlen = read;
  660. if (mtd->ecc_stats.failed - stats.failed)
  661. return -EBADMSG;
  662. if (ret)
  663. return ret;
  664. return mtd->ecc_stats.corrected - stats.corrected ? -EUCLEAN : 0;
  665. }
  666. /**
  667. * onenand_transfer_auto_oob - [Internal] oob auto-placement transfer
  668. * @param mtd MTD device structure
  669. * @param buf destination address
  670. * @param column oob offset to read from
  671. * @param thislen oob length to read
  672. */
  673. static int onenand_transfer_auto_oob(struct mtd_info *mtd, uint8_t *buf, int column,
  674. int thislen)
  675. {
  676. struct onenand_chip *this = mtd->priv;
  677. struct nand_oobfree *free;
  678. int readcol = column;
  679. int readend = column + thislen;
  680. int lastgap = 0;
  681. uint8_t *oob_buf = this->page_buf + mtd->writesize;
  682. for (free = this->ecclayout->oobfree; free->length; ++free) {
  683. if (readcol >= lastgap)
  684. readcol += free->offset - lastgap;
  685. if (readend >= lastgap)
  686. readend += free->offset - lastgap;
  687. lastgap = free->offset + free->length;
  688. }
  689. this->read_bufferram(mtd, ONENAND_SPARERAM, oob_buf, 0, mtd->oobsize);
  690. for (free = this->ecclayout->oobfree; free->length; ++free) {
  691. int free_end = free->offset + free->length;
  692. if (free->offset < readend && free_end > readcol) {
  693. int st = max_t(int,free->offset,readcol);
  694. int ed = min_t(int,free_end,readend);
  695. int n = ed - st;
  696. memcpy(buf, oob_buf + st, n);
  697. buf += n;
  698. }
  699. }
  700. return 0;
  701. }
  702. /**
  703. * onenand_do_read_oob - [MTD Interface] OneNAND read out-of-band
  704. * @param mtd MTD device structure
  705. * @param from offset to read from
  706. * @param len number of bytes to read
  707. * @param retlen pointer to variable to store the number of read bytes
  708. * @param buf the databuffer to put data
  709. * @param mode operation mode
  710. *
  711. * OneNAND read out-of-band data from the spare area
  712. */
  713. int onenand_do_read_oob(struct mtd_info *mtd, loff_t from, size_t len,
  714. size_t *retlen, u_char *buf, mtd_oob_mode_t mode)
  715. {
  716. struct onenand_chip *this = mtd->priv;
  717. int read = 0, thislen, column, oobsize;
  718. int ret = 0;
  719. DEBUG(MTD_DEBUG_LEVEL3, "onenand_read_oob: from = 0x%08x, len = %i\n", (unsigned int) from, (int) len);
  720. /* Initialize return length value */
  721. *retlen = 0;
  722. if (mode == MTD_OOB_AUTO)
  723. oobsize = this->ecclayout->oobavail;
  724. else
  725. oobsize = mtd->oobsize;
  726. column = from & (mtd->oobsize - 1);
  727. if (unlikely(column >= oobsize)) {
  728. DEBUG(MTD_DEBUG_LEVEL0, "onenand_read_oob: Attempted to start read outside oob\n");
  729. return -EINVAL;
  730. }
  731. /* Do not allow reads past end of device */
  732. if (unlikely(from >= mtd->size ||
  733. column + len > ((mtd->size >> this->page_shift) -
  734. (from >> this->page_shift)) * oobsize)) {
  735. DEBUG(MTD_DEBUG_LEVEL0, "onenand_read_oob: Attempted to read beyond end of device\n");
  736. return -EINVAL;
  737. }
  738. /* Grab the lock and see if the device is available */
  739. onenand_get_device(mtd, FL_READING);
  740. while (read < len) {
  741. cond_resched();
  742. thislen = oobsize - column;
  743. thislen = min_t(int, thislen, len);
  744. this->command(mtd, ONENAND_CMD_READOOB, from, mtd->oobsize);
  745. onenand_update_bufferram(mtd, from, 0);
  746. ret = this->wait(mtd, FL_READING);
  747. /* First copy data and check return value for ECC handling */
  748. if (mode == MTD_OOB_AUTO)
  749. onenand_transfer_auto_oob(mtd, buf, column, thislen);
  750. else
  751. this->read_bufferram(mtd, ONENAND_SPARERAM, buf, column, thislen);
  752. if (ret) {
  753. DEBUG(MTD_DEBUG_LEVEL0, "onenand_read_oob: read failed = 0x%x\n", ret);
  754. goto out;
  755. }
  756. read += thislen;
  757. if (read == len)
  758. break;
  759. buf += thislen;
  760. /* Read more? */
  761. if (read < len) {
  762. /* Page size */
  763. from += mtd->writesize;
  764. column = 0;
  765. }
  766. }
  767. out:
  768. /* Deselect and wake up anyone waiting on the device */
  769. onenand_release_device(mtd);
  770. *retlen = read;
  771. return ret;
  772. }
  773. /**
  774. * onenand_read_oob - [MTD Interface] NAND write data and/or out-of-band
  775. * @mtd: MTD device structure
  776. * @from: offset to read from
  777. * @ops: oob operation description structure
  778. */
  779. static int onenand_read_oob(struct mtd_info *mtd, loff_t from,
  780. struct mtd_oob_ops *ops)
  781. {
  782. switch (ops->mode) {
  783. case MTD_OOB_PLACE:
  784. case MTD_OOB_AUTO:
  785. break;
  786. case MTD_OOB_RAW:
  787. /* Not implemented yet */
  788. default:
  789. return -EINVAL;
  790. }
  791. return onenand_do_read_oob(mtd, from + ops->ooboffs, ops->ooblen,
  792. &ops->oobretlen, ops->oobbuf, ops->mode);
  793. }
  794. #ifdef CONFIG_MTD_ONENAND_VERIFY_WRITE
  795. /**
  796. * onenand_verify_oob - [GENERIC] verify the oob contents after a write
  797. * @param mtd MTD device structure
  798. * @param buf the databuffer to verify
  799. * @param to offset to read from
  800. *
  801. */
  802. static int onenand_verify_oob(struct mtd_info *mtd, const u_char *buf, loff_t to)
  803. {
  804. struct onenand_chip *this = mtd->priv;
  805. char *readp = this->page_buf + mtd->writesize;
  806. int status, i;
  807. this->command(mtd, ONENAND_CMD_READOOB, to, mtd->oobsize);
  808. onenand_update_bufferram(mtd, to, 0);
  809. status = this->wait(mtd, FL_READING);
  810. if (status)
  811. return status;
  812. this->read_bufferram(mtd, ONENAND_SPARERAM, readp, 0, mtd->oobsize);
  813. for(i = 0; i < mtd->oobsize; i++)
  814. if (buf[i] != 0xFF && buf[i] != readp[i])
  815. return -EBADMSG;
  816. return 0;
  817. }
  818. /**
  819. * onenand_verify - [GENERIC] verify the chip contents after a write
  820. * @param mtd MTD device structure
  821. * @param buf the databuffer to verify
  822. * @param addr offset to read from
  823. * @param len number of bytes to read and compare
  824. *
  825. */
  826. static int onenand_verify(struct mtd_info *mtd, const u_char *buf, loff_t addr, size_t len)
  827. {
  828. struct onenand_chip *this = mtd->priv;
  829. void __iomem *dataram;
  830. int ret = 0;
  831. int thislen, column;
  832. while (len != 0) {
  833. thislen = min_t(int, mtd->writesize, len);
  834. column = addr & (mtd->writesize - 1);
  835. if (column + thislen > mtd->writesize)
  836. thislen = mtd->writesize - column;
  837. this->command(mtd, ONENAND_CMD_READ, addr, mtd->writesize);
  838. onenand_update_bufferram(mtd, addr, 0);
  839. ret = this->wait(mtd, FL_READING);
  840. if (ret)
  841. return ret;
  842. onenand_update_bufferram(mtd, addr, 1);
  843. dataram = this->base + ONENAND_DATARAM;
  844. dataram += onenand_bufferram_offset(mtd, ONENAND_DATARAM);
  845. if (memcmp(buf, dataram + column, thislen))
  846. return -EBADMSG;
  847. len -= thislen;
  848. buf += thislen;
  849. addr += thislen;
  850. }
  851. return 0;
  852. }
  853. #else
  854. #define onenand_verify(...) (0)
  855. #define onenand_verify_oob(...) (0)
  856. #endif
  857. #define NOTALIGNED(x) ((x & (this->subpagesize - 1)) != 0)
  858. /**
  859. * onenand_write - [MTD Interface] write buffer to FLASH
  860. * @param mtd MTD device structure
  861. * @param to offset to write to
  862. * @param len number of bytes to write
  863. * @param retlen pointer to variable to store the number of written bytes
  864. * @param buf the data to write
  865. *
  866. * Write with ECC
  867. */
  868. static int onenand_write(struct mtd_info *mtd, loff_t to, size_t len,
  869. size_t *retlen, const u_char *buf)
  870. {
  871. struct onenand_chip *this = mtd->priv;
  872. int written = 0;
  873. int ret = 0;
  874. int column, subpage;
  875. DEBUG(MTD_DEBUG_LEVEL3, "onenand_write: to = 0x%08x, len = %i\n", (unsigned int) to, (int) len);
  876. /* Initialize retlen, in case of early exit */
  877. *retlen = 0;
  878. /* Do not allow writes past end of device */
  879. if (unlikely((to + len) > mtd->size)) {
  880. DEBUG(MTD_DEBUG_LEVEL0, "onenand_write: Attempt write to past end of device\n");
  881. return -EINVAL;
  882. }
  883. /* Reject writes, which are not page aligned */
  884. if (unlikely(NOTALIGNED(to)) || unlikely(NOTALIGNED(len))) {
  885. DEBUG(MTD_DEBUG_LEVEL0, "onenand_write: Attempt to write not page aligned data\n");
  886. return -EINVAL;
  887. }
  888. column = to & (mtd->writesize - 1);
  889. subpage = column || (len & (mtd->writesize - 1));
  890. /* Grab the lock and see if the device is available */
  891. onenand_get_device(mtd, FL_WRITING);
  892. /* Loop until all data write */
  893. while (written < len) {
  894. int bytes = mtd->writesize;
  895. int thislen = min_t(int, bytes, len - written);
  896. u_char *wbuf = (u_char *) buf;
  897. cond_resched();
  898. this->command(mtd, ONENAND_CMD_BUFFERRAM, to, bytes);
  899. /* Partial page write */
  900. if (subpage) {
  901. bytes = min_t(int, bytes - column, (int) len);
  902. memset(this->page_buf, 0xff, mtd->writesize);
  903. memcpy(this->page_buf + column, buf, bytes);
  904. wbuf = this->page_buf;
  905. /* Even though partial write, we need page size */
  906. thislen = mtd->writesize;
  907. }
  908. this->write_bufferram(mtd, ONENAND_DATARAM, wbuf, 0, thislen);
  909. this->write_bufferram(mtd, ONENAND_SPARERAM, ffchars, 0, mtd->oobsize);
  910. this->command(mtd, ONENAND_CMD_PROG, to, mtd->writesize);
  911. /* In partial page write we don't update bufferram */
  912. onenand_update_bufferram(mtd, to, !subpage);
  913. ret = this->wait(mtd, FL_WRITING);
  914. if (ret) {
  915. DEBUG(MTD_DEBUG_LEVEL0, "onenand_write: write filaed %d\n", ret);
  916. break;
  917. }
  918. /* Only check verify write turn on */
  919. ret = onenand_verify(mtd, (u_char *) wbuf, to, thislen);
  920. if (ret) {
  921. DEBUG(MTD_DEBUG_LEVEL0, "onenand_write: verify failed %d\n", ret);
  922. break;
  923. }
  924. written += thislen;
  925. if (written == len)
  926. break;
  927. column = 0;
  928. to += thislen;
  929. buf += thislen;
  930. }
  931. /* Deselect and wake up anyone waiting on the device */
  932. onenand_release_device(mtd);
  933. *retlen = written;
  934. return ret;
  935. }
  936. /**
  937. * onenand_fill_auto_oob - [Internal] oob auto-placement transfer
  938. * @param mtd MTD device structure
  939. * @param oob_buf oob buffer
  940. * @param buf source address
  941. * @param column oob offset to write to
  942. * @param thislen oob length to write
  943. */
  944. static int onenand_fill_auto_oob(struct mtd_info *mtd, u_char *oob_buf,
  945. const u_char *buf, int column, int thislen)
  946. {
  947. struct onenand_chip *this = mtd->priv;
  948. struct nand_oobfree *free;
  949. int writecol = column;
  950. int writeend = column + thislen;
  951. int lastgap = 0;
  952. for (free = this->ecclayout->oobfree; free->length; ++free) {
  953. if (writecol >= lastgap)
  954. writecol += free->offset - lastgap;
  955. if (writeend >= lastgap)
  956. writeend += free->offset - lastgap;
  957. lastgap = free->offset + free->length;
  958. }
  959. for (free = this->ecclayout->oobfree; free->length; ++free) {
  960. int free_end = free->offset + free->length;
  961. if (free->offset < writeend && free_end > writecol) {
  962. int st = max_t(int,free->offset,writecol);
  963. int ed = min_t(int,free_end,writeend);
  964. int n = ed - st;
  965. memcpy(oob_buf + st, buf, n);
  966. buf += n;
  967. }
  968. }
  969. return 0;
  970. }
  971. /**
  972. * onenand_do_write_oob - [Internal] OneNAND write out-of-band
  973. * @param mtd MTD device structure
  974. * @param to offset to write to
  975. * @param len number of bytes to write
  976. * @param retlen pointer to variable to store the number of written bytes
  977. * @param buf the data to write
  978. * @param mode operation mode
  979. *
  980. * OneNAND write out-of-band
  981. */
  982. static int onenand_do_write_oob(struct mtd_info *mtd, loff_t to, size_t len,
  983. size_t *retlen, const u_char *buf, mtd_oob_mode_t mode)
  984. {
  985. struct onenand_chip *this = mtd->priv;
  986. int column, ret = 0, oobsize;
  987. int written = 0;
  988. DEBUG(MTD_DEBUG_LEVEL3, "onenand_write_oob: to = 0x%08x, len = %i\n", (unsigned int) to, (int) len);
  989. /* Initialize retlen, in case of early exit */
  990. *retlen = 0;
  991. if (mode == MTD_OOB_AUTO)
  992. oobsize = this->ecclayout->oobavail;
  993. else
  994. oobsize = mtd->oobsize;
  995. column = to & (mtd->oobsize - 1);
  996. if (unlikely(column >= oobsize)) {
  997. DEBUG(MTD_DEBUG_LEVEL0, "onenand_write_oob: Attempted to start write outside oob\n");
  998. return -EINVAL;
  999. }
  1000. /* Do not allow reads past end of device */
  1001. if (unlikely(to >= mtd->size ||
  1002. column + len > ((mtd->size >> this->page_shift) -
  1003. (to >> this->page_shift)) * oobsize)) {
  1004. DEBUG(MTD_DEBUG_LEVEL0, "onenand_write_oob: Attempted to write past end of device\n");
  1005. return -EINVAL;
  1006. }
  1007. /* Grab the lock and see if the device is available */
  1008. onenand_get_device(mtd, FL_WRITING);
  1009. /* Loop until all data write */
  1010. while (written < len) {
  1011. int thislen = min_t(int, oobsize, len - written);
  1012. cond_resched();
  1013. this->command(mtd, ONENAND_CMD_BUFFERRAM, to, mtd->oobsize);
  1014. /* We send data to spare ram with oobsize
  1015. * to prevent byte access */
  1016. memset(this->page_buf, 0xff, mtd->oobsize);
  1017. if (mode == MTD_OOB_AUTO)
  1018. onenand_fill_auto_oob(mtd, this->page_buf, buf, column, thislen);
  1019. else
  1020. memcpy(this->page_buf + column, buf, thislen);
  1021. this->write_bufferram(mtd, ONENAND_SPARERAM, this->page_buf, 0, mtd->oobsize);
  1022. this->command(mtd, ONENAND_CMD_PROGOOB, to, mtd->oobsize);
  1023. onenand_update_bufferram(mtd, to, 0);
  1024. ret = this->wait(mtd, FL_WRITING);
  1025. if (ret) {
  1026. DEBUG(MTD_DEBUG_LEVEL0, "onenand_write_oob: write failed %d\n", ret);
  1027. goto out;
  1028. }
  1029. ret = onenand_verify_oob(mtd, this->page_buf, to);
  1030. if (ret) {
  1031. DEBUG(MTD_DEBUG_LEVEL0, "onenand_write_oob: verify failed %d\n", ret);
  1032. goto out;
  1033. }
  1034. written += thislen;
  1035. if (written == len)
  1036. break;
  1037. to += mtd->writesize;
  1038. buf += thislen;
  1039. column = 0;
  1040. }
  1041. out:
  1042. /* Deselect and wake up anyone waiting on the device */
  1043. onenand_release_device(mtd);
  1044. *retlen = written;
  1045. return ret;
  1046. }
  1047. /**
  1048. * onenand_write_oob - [MTD Interface] NAND write data and/or out-of-band
  1049. * @mtd: MTD device structure
  1050. * @from: offset to read from
  1051. * @ops: oob operation description structure
  1052. */
  1053. static int onenand_write_oob(struct mtd_info *mtd, loff_t to,
  1054. struct mtd_oob_ops *ops)
  1055. {
  1056. switch (ops->mode) {
  1057. case MTD_OOB_PLACE:
  1058. case MTD_OOB_AUTO:
  1059. break;
  1060. case MTD_OOB_RAW:
  1061. /* Not implemented yet */
  1062. default:
  1063. return -EINVAL;
  1064. }
  1065. return onenand_do_write_oob(mtd, to + ops->ooboffs, ops->ooblen,
  1066. &ops->oobretlen, ops->oobbuf, ops->mode);
  1067. }
  1068. /**
  1069. * onenand_block_checkbad - [GENERIC] Check if a block is marked bad
  1070. * @param mtd MTD device structure
  1071. * @param ofs offset from device start
  1072. * @param getchip 0, if the chip is already selected
  1073. * @param allowbbt 1, if its allowed to access the bbt area
  1074. *
  1075. * Check, if the block is bad. Either by reading the bad block table or
  1076. * calling of the scan function.
  1077. */
  1078. static int onenand_block_checkbad(struct mtd_info *mtd, loff_t ofs, int getchip, int allowbbt)
  1079. {
  1080. struct onenand_chip *this = mtd->priv;
  1081. struct bbm_info *bbm = this->bbm;
  1082. /* Return info from the table */
  1083. return bbm->isbad_bbt(mtd, ofs, allowbbt);
  1084. }
  1085. /**
  1086. * onenand_erase - [MTD Interface] erase block(s)
  1087. * @param mtd MTD device structure
  1088. * @param instr erase instruction
  1089. *
  1090. * Erase one ore more blocks
  1091. */
  1092. static int onenand_erase(struct mtd_info *mtd, struct erase_info *instr)
  1093. {
  1094. struct onenand_chip *this = mtd->priv;
  1095. unsigned int block_size;
  1096. loff_t addr;
  1097. int len;
  1098. int ret = 0;
  1099. DEBUG(MTD_DEBUG_LEVEL3, "onenand_erase: start = 0x%08x, len = %i\n", (unsigned int) instr->addr, (unsigned int) instr->len);
  1100. block_size = (1 << this->erase_shift);
  1101. /* Start address must align on block boundary */
  1102. if (unlikely(instr->addr & (block_size - 1))) {
  1103. DEBUG(MTD_DEBUG_LEVEL0, "onenand_erase: Unaligned address\n");
  1104. return -EINVAL;
  1105. }
  1106. /* Length must align on block boundary */
  1107. if (unlikely(instr->len & (block_size - 1))) {
  1108. DEBUG(MTD_DEBUG_LEVEL0, "onenand_erase: Length not block aligned\n");
  1109. return -EINVAL;
  1110. }
  1111. /* Do not allow erase past end of device */
  1112. if (unlikely((instr->len + instr->addr) > mtd->size)) {
  1113. DEBUG(MTD_DEBUG_LEVEL0, "onenand_erase: Erase past end of device\n");
  1114. return -EINVAL;
  1115. }
  1116. instr->fail_addr = 0xffffffff;
  1117. /* Grab the lock and see if the device is available */
  1118. onenand_get_device(mtd, FL_ERASING);
  1119. /* Loop throught the pages */
  1120. len = instr->len;
  1121. addr = instr->addr;
  1122. instr->state = MTD_ERASING;
  1123. while (len) {
  1124. cond_resched();
  1125. /* Check if we have a bad block, we do not erase bad blocks */
  1126. if (onenand_block_checkbad(mtd, addr, 0, 0)) {
  1127. printk (KERN_WARNING "onenand_erase: attempt to erase a bad block at addr 0x%08x\n", (unsigned int) addr);
  1128. instr->state = MTD_ERASE_FAILED;
  1129. goto erase_exit;
  1130. }
  1131. this->command(mtd, ONENAND_CMD_ERASE, addr, block_size);
  1132. ret = this->wait(mtd, FL_ERASING);
  1133. /* Check, if it is write protected */
  1134. if (ret) {
  1135. DEBUG(MTD_DEBUG_LEVEL0, "onenand_erase: Failed erase, block %d\n", (unsigned) (addr >> this->erase_shift));
  1136. instr->state = MTD_ERASE_FAILED;
  1137. instr->fail_addr = addr;
  1138. goto erase_exit;
  1139. }
  1140. len -= block_size;
  1141. addr += block_size;
  1142. }
  1143. instr->state = MTD_ERASE_DONE;
  1144. erase_exit:
  1145. ret = instr->state == MTD_ERASE_DONE ? 0 : -EIO;
  1146. /* Do call back function */
  1147. if (!ret)
  1148. mtd_erase_callback(instr);
  1149. /* Deselect and wake up anyone waiting on the device */
  1150. onenand_release_device(mtd);
  1151. return ret;
  1152. }
  1153. /**
  1154. * onenand_sync - [MTD Interface] sync
  1155. * @param mtd MTD device structure
  1156. *
  1157. * Sync is actually a wait for chip ready function
  1158. */
  1159. static void onenand_sync(struct mtd_info *mtd)
  1160. {
  1161. DEBUG(MTD_DEBUG_LEVEL3, "onenand_sync: called\n");
  1162. /* Grab the lock and see if the device is available */
  1163. onenand_get_device(mtd, FL_SYNCING);
  1164. /* Release it and go back */
  1165. onenand_release_device(mtd);
  1166. }
  1167. /**
  1168. * onenand_block_isbad - [MTD Interface] Check whether the block at the given offset is bad
  1169. * @param mtd MTD device structure
  1170. * @param ofs offset relative to mtd start
  1171. *
  1172. * Check whether the block is bad
  1173. */
  1174. static int onenand_block_isbad(struct mtd_info *mtd, loff_t ofs)
  1175. {
  1176. /* Check for invalid offset */
  1177. if (ofs > mtd->size)
  1178. return -EINVAL;
  1179. return onenand_block_checkbad(mtd, ofs, 1, 0);
  1180. }
  1181. /**
  1182. * onenand_default_block_markbad - [DEFAULT] mark a block bad
  1183. * @param mtd MTD device structure
  1184. * @param ofs offset from device start
  1185. *
  1186. * This is the default implementation, which can be overridden by
  1187. * a hardware specific driver.
  1188. */
  1189. static int onenand_default_block_markbad(struct mtd_info *mtd, loff_t ofs)
  1190. {
  1191. struct onenand_chip *this = mtd->priv;
  1192. struct bbm_info *bbm = this->bbm;
  1193. u_char buf[2] = {0, 0};
  1194. size_t retlen;
  1195. int block;
  1196. /* Get block number */
  1197. block = ((int) ofs) >> bbm->bbt_erase_shift;
  1198. if (bbm->bbt)
  1199. bbm->bbt[block >> 2] |= 0x01 << ((block & 0x03) << 1);
  1200. /* We write two bytes, so we dont have to mess with 16 bit access */
  1201. ofs += mtd->oobsize + (bbm->badblockpos & ~0x01);
  1202. return onenand_do_write_oob(mtd, ofs , 2, &retlen, buf, MTD_OOB_PLACE);
  1203. }
  1204. /**
  1205. * onenand_block_markbad - [MTD Interface] Mark the block at the given offset as bad
  1206. * @param mtd MTD device structure
  1207. * @param ofs offset relative to mtd start
  1208. *
  1209. * Mark the block as bad
  1210. */
  1211. static int onenand_block_markbad(struct mtd_info *mtd, loff_t ofs)
  1212. {
  1213. struct onenand_chip *this = mtd->priv;
  1214. int ret;
  1215. ret = onenand_block_isbad(mtd, ofs);
  1216. if (ret) {
  1217. /* If it was bad already, return success and do nothing */
  1218. if (ret > 0)
  1219. return 0;
  1220. return ret;
  1221. }
  1222. return this->block_markbad(mtd, ofs);
  1223. }
  1224. /**
  1225. * onenand_do_lock_cmd - [OneNAND Interface] Lock or unlock block(s)
  1226. * @param mtd MTD device structure
  1227. * @param ofs offset relative to mtd start
  1228. * @param len number of bytes to lock or unlock
  1229. *
  1230. * Lock or unlock one or more blocks
  1231. */
  1232. static int onenand_do_lock_cmd(struct mtd_info *mtd, loff_t ofs, size_t len, int cmd)
  1233. {
  1234. struct onenand_chip *this = mtd->priv;
  1235. int start, end, block, value, status;
  1236. int wp_status_mask;
  1237. start = ofs >> this->erase_shift;
  1238. end = len >> this->erase_shift;
  1239. if (cmd == ONENAND_CMD_LOCK)
  1240. wp_status_mask = ONENAND_WP_LS;
  1241. else
  1242. wp_status_mask = ONENAND_WP_US;
  1243. /* Continuous lock scheme */
  1244. if (this->options & ONENAND_HAS_CONT_LOCK) {
  1245. /* Set start block address */
  1246. this->write_word(start, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
  1247. /* Set end block address */
  1248. this->write_word(start + end - 1, this->base + ONENAND_REG_END_BLOCK_ADDRESS);
  1249. /* Write lock command */
  1250. this->command(mtd, cmd, 0, 0);
  1251. /* There's no return value */
  1252. this->wait(mtd, FL_LOCKING);
  1253. /* Sanity check */
  1254. while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
  1255. & ONENAND_CTRL_ONGO)
  1256. continue;
  1257. /* Check lock status */
  1258. status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
  1259. if (!(status & wp_status_mask))
  1260. printk(KERN_ERR "wp status = 0x%x\n", status);
  1261. return 0;
  1262. }
  1263. /* Block lock scheme */
  1264. for (block = start; block < start + end; block++) {
  1265. /* Set block address */
  1266. value = onenand_block_address(this, block);
  1267. this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
  1268. /* Select DataRAM for DDP */
  1269. value = onenand_bufferram_address(this, block);
  1270. this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
  1271. /* Set start block address */
  1272. this->write_word(block, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
  1273. /* Write lock command */
  1274. this->command(mtd, cmd, 0, 0);
  1275. /* There's no return value */
  1276. this->wait(mtd, FL_LOCKING);
  1277. /* Sanity check */
  1278. while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
  1279. & ONENAND_CTRL_ONGO)
  1280. continue;
  1281. /* Check lock status */
  1282. status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
  1283. if (!(status & wp_status_mask))
  1284. printk(KERN_ERR "block = %d, wp status = 0x%x\n", block, status);
  1285. }
  1286. return 0;
  1287. }
  1288. /**
  1289. * onenand_lock - [MTD Interface] Lock block(s)
  1290. * @param mtd MTD device structure
  1291. * @param ofs offset relative to mtd start
  1292. * @param len number of bytes to unlock
  1293. *
  1294. * Lock one or more blocks
  1295. */
  1296. static int onenand_lock(struct mtd_info *mtd, loff_t ofs, size_t len)
  1297. {
  1298. return onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_LOCK);
  1299. }
  1300. /**
  1301. * onenand_unlock - [MTD Interface] Unlock block(s)
  1302. * @param mtd MTD device structure
  1303. * @param ofs offset relative to mtd start
  1304. * @param len number of bytes to unlock
  1305. *
  1306. * Unlock one or more blocks
  1307. */
  1308. static int onenand_unlock(struct mtd_info *mtd, loff_t ofs, size_t len)
  1309. {
  1310. return onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_UNLOCK);
  1311. }
  1312. /**
  1313. * onenand_check_lock_status - [OneNAND Interface] Check lock status
  1314. * @param this onenand chip data structure
  1315. *
  1316. * Check lock status
  1317. */
  1318. static void onenand_check_lock_status(struct onenand_chip *this)
  1319. {
  1320. unsigned int value, block, status;
  1321. unsigned int end;
  1322. end = this->chipsize >> this->erase_shift;
  1323. for (block = 0; block < end; block++) {
  1324. /* Set block address */
  1325. value = onenand_block_address(this, block);
  1326. this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
  1327. /* Select DataRAM for DDP */
  1328. value = onenand_bufferram_address(this, block);
  1329. this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
  1330. /* Set start block address */
  1331. this->write_word(block, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
  1332. /* Check lock status */
  1333. status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
  1334. if (!(status & ONENAND_WP_US))
  1335. printk(KERN_ERR "block = %d, wp status = 0x%x\n", block, status);
  1336. }
  1337. }
  1338. /**
  1339. * onenand_unlock_all - [OneNAND Interface] unlock all blocks
  1340. * @param mtd MTD device structure
  1341. *
  1342. * Unlock all blocks
  1343. */
  1344. static int onenand_unlock_all(struct mtd_info *mtd)
  1345. {
  1346. struct onenand_chip *this = mtd->priv;
  1347. if (this->options & ONENAND_HAS_UNLOCK_ALL) {
  1348. /* Set start block address */
  1349. this->write_word(0, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
  1350. /* Write unlock command */
  1351. this->command(mtd, ONENAND_CMD_UNLOCK_ALL, 0, 0);
  1352. /* There's no return value */
  1353. this->wait(mtd, FL_LOCKING);
  1354. /* Sanity check */
  1355. while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
  1356. & ONENAND_CTRL_ONGO)
  1357. continue;
  1358. /* Workaround for all block unlock in DDP */
  1359. if (ONENAND_IS_DDP(this)) {
  1360. /* 1st block on another chip */
  1361. loff_t ofs = this->chipsize >> 1;
  1362. size_t len = mtd->erasesize;
  1363. onenand_unlock(mtd, ofs, len);
  1364. }
  1365. onenand_check_lock_status(this);
  1366. return 0;
  1367. }
  1368. onenand_unlock(mtd, 0x0, this->chipsize);
  1369. return 0;
  1370. }
  1371. #ifdef CONFIG_MTD_ONENAND_OTP
  1372. /* Interal OTP operation */
  1373. typedef int (*otp_op_t)(struct mtd_info *mtd, loff_t form, size_t len,
  1374. size_t *retlen, u_char *buf);
  1375. /**
  1376. * do_otp_read - [DEFAULT] Read OTP block area
  1377. * @param mtd MTD device structure
  1378. * @param from The offset to read
  1379. * @param len number of bytes to read
  1380. * @param retlen pointer to variable to store the number of readbytes
  1381. * @param buf the databuffer to put/get data
  1382. *
  1383. * Read OTP block area.
  1384. */
  1385. static int do_otp_read(struct mtd_info *mtd, loff_t from, size_t len,
  1386. size_t *retlen, u_char *buf)
  1387. {
  1388. struct onenand_chip *this = mtd->priv;
  1389. int ret;
  1390. /* Enter OTP access mode */
  1391. this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
  1392. this->wait(mtd, FL_OTPING);
  1393. ret = mtd->read(mtd, from, len, retlen, buf);
  1394. /* Exit OTP access mode */
  1395. this->command(mtd, ONENAND_CMD_RESET, 0, 0);
  1396. this->wait(mtd, FL_RESETING);
  1397. return ret;
  1398. }
  1399. /**
  1400. * do_otp_write - [DEFAULT] Write OTP block area
  1401. * @param mtd MTD device structure
  1402. * @param from The offset to write
  1403. * @param len number of bytes to write
  1404. * @param retlen pointer to variable to store the number of write bytes
  1405. * @param buf the databuffer to put/get data
  1406. *
  1407. * Write OTP block area.
  1408. */
  1409. static int do_otp_write(struct mtd_info *mtd, loff_t from, size_t len,
  1410. size_t *retlen, u_char *buf)
  1411. {
  1412. struct onenand_chip *this = mtd->priv;
  1413. unsigned char *pbuf = buf;
  1414. int ret;
  1415. /* Force buffer page aligned */
  1416. if (len < mtd->writesize) {
  1417. memcpy(this->page_buf, buf, len);
  1418. memset(this->page_buf + len, 0xff, mtd->writesize - len);
  1419. pbuf = this->page_buf;
  1420. len = mtd->writesize;
  1421. }
  1422. /* Enter OTP access mode */
  1423. this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
  1424. this->wait(mtd, FL_OTPING);
  1425. ret = mtd->write(mtd, from, len, retlen, pbuf);
  1426. /* Exit OTP access mode */
  1427. this->command(mtd, ONENAND_CMD_RESET, 0, 0);
  1428. this->wait(mtd, FL_RESETING);
  1429. return ret;
  1430. }
  1431. /**
  1432. * do_otp_lock - [DEFAULT] Lock OTP block area
  1433. * @param mtd MTD device structure
  1434. * @param from The offset to lock
  1435. * @param len number of bytes to lock
  1436. * @param retlen pointer to variable to store the number of lock bytes
  1437. * @param buf the databuffer to put/get data
  1438. *
  1439. * Lock OTP block area.
  1440. */
  1441. static int do_otp_lock(struct mtd_info *mtd, loff_t from, size_t len,
  1442. size_t *retlen, u_char *buf)
  1443. {
  1444. struct onenand_chip *this = mtd->priv;
  1445. int ret;
  1446. /* Enter OTP access mode */
  1447. this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
  1448. this->wait(mtd, FL_OTPING);
  1449. ret = onenand_do_write_oob(mtd, from, len, retlen, buf, MTD_OOB_PLACE);
  1450. /* Exit OTP access mode */
  1451. this->command(mtd, ONENAND_CMD_RESET, 0, 0);
  1452. this->wait(mtd, FL_RESETING);
  1453. return ret;
  1454. }
  1455. /**
  1456. * onenand_otp_walk - [DEFAULT] Handle OTP operation
  1457. * @param mtd MTD device structure
  1458. * @param from The offset to read/write
  1459. * @param len number of bytes to read/write
  1460. * @param retlen pointer to variable to store the number of read bytes
  1461. * @param buf the databuffer to put/get data
  1462. * @param action do given action
  1463. * @param mode specify user and factory
  1464. *
  1465. * Handle OTP operation.
  1466. */
  1467. static int onenand_otp_walk(struct mtd_info *mtd, loff_t from, size_t len,
  1468. size_t *retlen, u_char *buf,
  1469. otp_op_t action, int mode)
  1470. {
  1471. struct onenand_chip *this = mtd->priv;
  1472. int otp_pages;
  1473. int density;
  1474. int ret = 0;
  1475. *retlen = 0;
  1476. density = this->device_id >> ONENAND_DEVICE_DENSITY_SHIFT;
  1477. if (density < ONENAND_DEVICE_DENSITY_512Mb)
  1478. otp_pages = 20;
  1479. else
  1480. otp_pages = 10;
  1481. if (mode == MTD_OTP_FACTORY) {
  1482. from += mtd->writesize * otp_pages;
  1483. otp_pages = 64 - otp_pages;
  1484. }
  1485. /* Check User/Factory boundary */
  1486. if (((mtd->writesize * otp_pages) - (from + len)) < 0)
  1487. return 0;
  1488. while (len > 0 && otp_pages > 0) {
  1489. if (!action) { /* OTP Info functions */
  1490. struct otp_info *otpinfo;
  1491. len -= sizeof(struct otp_info);
  1492. if (len <= 0)
  1493. return -ENOSPC;
  1494. otpinfo = (struct otp_info *) buf;
  1495. otpinfo->start = from;
  1496. otpinfo->length = mtd->writesize;
  1497. otpinfo->locked = 0;
  1498. from += mtd->writesize;
  1499. buf += sizeof(struct otp_info);
  1500. *retlen += sizeof(struct otp_info);
  1501. } else {
  1502. size_t tmp_retlen;
  1503. int size = len;
  1504. ret = action(mtd, from, len, &tmp_retlen, buf);
  1505. buf += size;
  1506. len -= size;
  1507. *retlen += size;
  1508. if (ret < 0)
  1509. return ret;
  1510. }
  1511. otp_pages--;
  1512. }
  1513. return 0;
  1514. }
  1515. /**
  1516. * onenand_get_fact_prot_info - [MTD Interface] Read factory OTP info
  1517. * @param mtd MTD device structure
  1518. * @param buf the databuffer to put/get data
  1519. * @param len number of bytes to read
  1520. *
  1521. * Read factory OTP info.
  1522. */
  1523. static int onenand_get_fact_prot_info(struct mtd_info *mtd,
  1524. struct otp_info *buf, size_t len)
  1525. {
  1526. size_t retlen;
  1527. int ret;
  1528. ret = onenand_otp_walk(mtd, 0, len, &retlen, (u_char *) buf, NULL, MTD_OTP_FACTORY);
  1529. return ret ? : retlen;
  1530. }
  1531. /**
  1532. * onenand_read_fact_prot_reg - [MTD Interface] Read factory OTP area
  1533. * @param mtd MTD device structure
  1534. * @param from The offset to read
  1535. * @param len number of bytes to read
  1536. * @param retlen pointer to variable to store the number of read bytes
  1537. * @param buf the databuffer to put/get data
  1538. *
  1539. * Read factory OTP area.
  1540. */
  1541. static int onenand_read_fact_prot_reg(struct mtd_info *mtd, loff_t from,
  1542. size_t len, size_t *retlen, u_char *buf)
  1543. {
  1544. return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_read, MTD_OTP_FACTORY);
  1545. }
  1546. /**
  1547. * onenand_get_user_prot_info - [MTD Interface] Read user OTP info
  1548. * @param mtd MTD device structure
  1549. * @param buf the databuffer to put/get data
  1550. * @param len number of bytes to read
  1551. *
  1552. * Read user OTP info.
  1553. */
  1554. static int onenand_get_user_prot_info(struct mtd_info *mtd,
  1555. struct otp_info *buf, size_t len)
  1556. {
  1557. size_t retlen;
  1558. int ret;
  1559. ret = onenand_otp_walk(mtd, 0, len, &retlen, (u_char *) buf, NULL, MTD_OTP_USER);
  1560. return ret ? : retlen;
  1561. }
  1562. /**
  1563. * onenand_read_user_prot_reg - [MTD Interface] Read user OTP area
  1564. * @param mtd MTD device structure
  1565. * @param from The offset to read
  1566. * @param len number of bytes to read
  1567. * @param retlen pointer to variable to store the number of read bytes
  1568. * @param buf the databuffer to put/get data
  1569. *
  1570. * Read user OTP area.
  1571. */
  1572. static int onenand_read_user_prot_reg(struct mtd_info *mtd, loff_t from,
  1573. size_t len, size_t *retlen, u_char *buf)
  1574. {
  1575. return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_read, MTD_OTP_USER);
  1576. }
  1577. /**
  1578. * onenand_write_user_prot_reg - [MTD Interface] Write user OTP area
  1579. * @param mtd MTD device structure
  1580. * @param from The offset to write
  1581. * @param len number of bytes to write
  1582. * @param retlen pointer to variable to store the number of write bytes
  1583. * @param buf the databuffer to put/get data
  1584. *
  1585. * Write user OTP area.
  1586. */
  1587. static int onenand_write_user_prot_reg(struct mtd_info *mtd, loff_t from,
  1588. size_t len, size_t *retlen, u_char *buf)
  1589. {
  1590. return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_write, MTD_OTP_USER);
  1591. }
  1592. /**
  1593. * onenand_lock_user_prot_reg - [MTD Interface] Lock user OTP area
  1594. * @param mtd MTD device structure
  1595. * @param from The offset to lock
  1596. * @param len number of bytes to unlock
  1597. *
  1598. * Write lock mark on spare area in page 0 in OTP block
  1599. */
  1600. static int onenand_lock_user_prot_reg(struct mtd_info *mtd, loff_t from,
  1601. size_t len)
  1602. {
  1603. unsigned char oob_buf[64];
  1604. size_t retlen;
  1605. int ret;
  1606. memset(oob_buf, 0xff, mtd->oobsize);
  1607. /*
  1608. * Note: OTP lock operation
  1609. * OTP block : 0xXXFC
  1610. * 1st block : 0xXXF3 (If chip support)
  1611. * Both : 0xXXF0 (If chip support)
  1612. */
  1613. oob_buf[ONENAND_OTP_LOCK_OFFSET] = 0xFC;
  1614. /*
  1615. * Write lock mark to 8th word of sector0 of page0 of the spare0.
  1616. * We write 16 bytes spare area instead of 2 bytes.
  1617. */
  1618. from = 0;
  1619. len = 16;
  1620. ret = onenand_otp_walk(mtd, from, len, &retlen, oob_buf, do_otp_lock, MTD_OTP_USER);
  1621. return ret ? : retlen;
  1622. }
  1623. #endif /* CONFIG_MTD_ONENAND_OTP */
  1624. /**
  1625. * onenand_check_features - Check and set OneNAND features
  1626. * @param mtd MTD data structure
  1627. *
  1628. * Check and set OneNAND features
  1629. * - lock scheme
  1630. */
  1631. static void onenand_check_features(struct mtd_info *mtd)
  1632. {
  1633. struct onenand_chip *this = mtd->priv;
  1634. unsigned int density, process;
  1635. /* Lock scheme depends on density and process */
  1636. density = this->device_id >> ONENAND_DEVICE_DENSITY_SHIFT;
  1637. process = this->version_id >> ONENAND_VERSION_PROCESS_SHIFT;
  1638. /* Lock scheme */
  1639. if (density >= ONENAND_DEVICE_DENSITY_1Gb) {
  1640. /* A-Die has all block unlock */
  1641. if (process) {
  1642. printk(KERN_DEBUG "Chip support all block unlock\n");
  1643. this->options |= ONENAND_HAS_UNLOCK_ALL;
  1644. }
  1645. } else {
  1646. /* Some OneNAND has continues lock scheme */
  1647. if (!process) {
  1648. printk(KERN_DEBUG "Lock scheme is Continues Lock\n");
  1649. this->options |= ONENAND_HAS_CONT_LOCK;
  1650. }
  1651. }
  1652. }
  1653. /**
  1654. * onenand_print_device_info - Print device ID
  1655. * @param device device ID
  1656. *
  1657. * Print device ID
  1658. */
  1659. static void onenand_print_device_info(int device, int version)
  1660. {
  1661. int vcc, demuxed, ddp, density;
  1662. vcc = device & ONENAND_DEVICE_VCC_MASK;
  1663. demuxed = device & ONENAND_DEVICE_IS_DEMUX;
  1664. ddp = device & ONENAND_DEVICE_IS_DDP;
  1665. density = device >> ONENAND_DEVICE_DENSITY_SHIFT;
  1666. printk(KERN_INFO "%sOneNAND%s %dMB %sV 16-bit (0x%02x)\n",
  1667. demuxed ? "" : "Muxed ",
  1668. ddp ? "(DDP)" : "",
  1669. (16 << density),
  1670. vcc ? "2.65/3.3" : "1.8",
  1671. device);
  1672. printk(KERN_DEBUG "OneNAND version = 0x%04x\n", version);
  1673. }
  1674. static const struct onenand_manufacturers onenand_manuf_ids[] = {
  1675. {ONENAND_MFR_SAMSUNG, "Samsung"},
  1676. };
  1677. /**
  1678. * onenand_check_maf - Check manufacturer ID
  1679. * @param manuf manufacturer ID
  1680. *
  1681. * Check manufacturer ID
  1682. */
  1683. static int onenand_check_maf(int manuf)
  1684. {
  1685. int size = ARRAY_SIZE(onenand_manuf_ids);
  1686. char *name;
  1687. int i;
  1688. for (i = 0; i < size; i++)
  1689. if (manuf == onenand_manuf_ids[i].id)
  1690. break;
  1691. if (i < size)
  1692. name = onenand_manuf_ids[i].name;
  1693. else
  1694. name = "Unknown";
  1695. printk(KERN_DEBUG "OneNAND Manufacturer: %s (0x%0x)\n", name, manuf);
  1696. return (i == size);
  1697. }
  1698. /**
  1699. * onenand_probe - [OneNAND Interface] Probe the OneNAND device
  1700. * @param mtd MTD device structure
  1701. *
  1702. * OneNAND detection method:
  1703. * Compare the the values from command with ones from register
  1704. */
  1705. static int onenand_probe(struct mtd_info *mtd)
  1706. {
  1707. struct onenand_chip *this = mtd->priv;
  1708. int bram_maf_id, bram_dev_id, maf_id, dev_id, ver_id;
  1709. int density;
  1710. int syscfg;
  1711. /* Save system configuration 1 */
  1712. syscfg = this->read_word(this->base + ONENAND_REG_SYS_CFG1);
  1713. /* Clear Sync. Burst Read mode to read BootRAM */
  1714. this->write_word((syscfg & ~ONENAND_SYS_CFG1_SYNC_READ), this->base + ONENAND_REG_SYS_CFG1);
  1715. /* Send the command for reading device ID from BootRAM */
  1716. this->write_word(ONENAND_CMD_READID, this->base + ONENAND_BOOTRAM);
  1717. /* Read manufacturer and device IDs from BootRAM */
  1718. bram_maf_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x0);
  1719. bram_dev_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x2);
  1720. /* Reset OneNAND to read default register values */
  1721. this->write_word(ONENAND_CMD_RESET, this->base + ONENAND_BOOTRAM);
  1722. /* Wait reset */
  1723. this->wait(mtd, FL_RESETING);
  1724. /* Restore system configuration 1 */
  1725. this->write_word(syscfg, this->base + ONENAND_REG_SYS_CFG1);
  1726. /* Check manufacturer ID */
  1727. if (onenand_check_maf(bram_maf_id))
  1728. return -ENXIO;
  1729. /* Read manufacturer and device IDs from Register */
  1730. maf_id = this->read_word(this->base + ONENAND_REG_MANUFACTURER_ID);
  1731. dev_id = this->read_word(this->base + ONENAND_REG_DEVICE_ID);
  1732. ver_id = this->read_word(this->base + ONENAND_REG_VERSION_ID);
  1733. /* Check OneNAND device */
  1734. if (maf_id != bram_maf_id || dev_id != bram_dev_id)
  1735. return -ENXIO;
  1736. /* Flash device information */
  1737. onenand_print_device_info(dev_id, ver_id);
  1738. this->device_id = dev_id;
  1739. this->version_id = ver_id;
  1740. density = dev_id >> ONENAND_DEVICE_DENSITY_SHIFT;
  1741. this->chipsize = (16 << density) << 20;
  1742. /* Set density mask. it is used for DDP */
  1743. if (ONENAND_IS_DDP(this))
  1744. this->density_mask = (1 << (density + 6));
  1745. else
  1746. this->density_mask = 0;
  1747. /* OneNAND page size & block size */
  1748. /* The data buffer size is equal to page size */
  1749. mtd->writesize = this->read_word(this->base + ONENAND_REG_DATA_BUFFER_SIZE);
  1750. mtd->oobsize = mtd->writesize >> 5;
  1751. /* Pages per a block are always 64 in OneNAND */
  1752. mtd->erasesize = mtd->writesize << 6;
  1753. this->erase_shift = ffs(mtd->erasesize) - 1;
  1754. this->page_shift = ffs(mtd->writesize) - 1;
  1755. this->page_mask = (1 << (this->erase_shift - this->page_shift)) - 1;
  1756. /* REVIST: Multichip handling */
  1757. mtd->size = this->chipsize;
  1758. /* Check OneNAND features */
  1759. onenand_check_features(mtd);
  1760. return 0;
  1761. }
  1762. /**
  1763. * onenand_suspend - [MTD Interface] Suspend the OneNAND flash
  1764. * @param mtd MTD device structure
  1765. */
  1766. static int onenand_suspend(struct mtd_info *mtd)
  1767. {
  1768. return onenand_get_device(mtd, FL_PM_SUSPENDED);
  1769. }
  1770. /**
  1771. * onenand_resume - [MTD Interface] Resume the OneNAND flash
  1772. * @param mtd MTD device structure
  1773. */
  1774. static void onenand_resume(struct mtd_info *mtd)
  1775. {
  1776. struct onenand_chip *this = mtd->priv;
  1777. if (this->state == FL_PM_SUSPENDED)
  1778. onenand_release_device(mtd);
  1779. else
  1780. printk(KERN_ERR "resume() called for the chip which is not"
  1781. "in suspended state\n");
  1782. }
  1783. /**
  1784. * onenand_scan - [OneNAND Interface] Scan for the OneNAND device
  1785. * @param mtd MTD device structure
  1786. * @param maxchips Number of chips to scan for
  1787. *
  1788. * This fills out all the not initialized function pointers
  1789. * with the defaults.
  1790. * The flash ID is read and the mtd/chip structures are
  1791. * filled with the appropriate values.
  1792. */
  1793. int onenand_scan(struct mtd_info *mtd, int maxchips)
  1794. {
  1795. int i;
  1796. struct onenand_chip *this = mtd->priv;
  1797. if (!this->read_word)
  1798. this->read_word = onenand_readw;
  1799. if (!this->write_word)
  1800. this->write_word = onenand_writew;
  1801. if (!this->command)
  1802. this->command = onenand_command;
  1803. if (!this->wait)
  1804. onenand_setup_wait(mtd);
  1805. if (!this->read_bufferram)
  1806. this->read_bufferram = onenand_read_bufferram;
  1807. if (!this->write_bufferram)
  1808. this->write_bufferram = onenand_write_bufferram;
  1809. if (!this->block_markbad)
  1810. this->block_markbad = onenand_default_block_markbad;
  1811. if (!this->scan_bbt)
  1812. this->scan_bbt = onenand_default_bbt;
  1813. if (onenand_probe(mtd))
  1814. return -ENXIO;
  1815. /* Set Sync. Burst Read after probing */
  1816. if (this->mmcontrol) {
  1817. printk(KERN_INFO "OneNAND Sync. Burst Read support\n");
  1818. this->read_bufferram = onenand_sync_read_bufferram;
  1819. }
  1820. /* Allocate buffers, if necessary */
  1821. if (!this->page_buf) {
  1822. size_t len;
  1823. len = mtd->writesize + mtd->oobsize;
  1824. this->page_buf = kmalloc(len, GFP_KERNEL);
  1825. if (!this->page_buf) {
  1826. printk(KERN_ERR "onenand_scan(): Can't allocate page_buf\n");
  1827. return -ENOMEM;
  1828. }
  1829. this->options |= ONENAND_PAGEBUF_ALLOC;
  1830. }
  1831. this->state = FL_READY;
  1832. init_waitqueue_head(&this->wq);
  1833. spin_lock_init(&this->chip_lock);
  1834. /*
  1835. * Allow subpage writes up to oobsize.
  1836. */
  1837. switch (mtd->oobsize) {
  1838. case 64:
  1839. this->ecclayout = &onenand_oob_64;
  1840. mtd->subpage_sft = 2;
  1841. break;
  1842. case 32:
  1843. this->ecclayout = &onenand_oob_32;
  1844. mtd->subpage_sft = 1;
  1845. break;
  1846. default:
  1847. printk(KERN_WARNING "No OOB scheme defined for oobsize %d\n",
  1848. mtd->oobsize);
  1849. mtd->subpage_sft = 0;
  1850. /* To prevent kernel oops */
  1851. this->ecclayout = &onenand_oob_32;
  1852. break;
  1853. }
  1854. this->subpagesize = mtd->writesize >> mtd->subpage_sft;
  1855. /*
  1856. * The number of bytes available for a client to place data into
  1857. * the out of band area
  1858. */
  1859. this->ecclayout->oobavail = 0;
  1860. for (i = 0; this->ecclayout->oobfree[i].length; i++)
  1861. this->ecclayout->oobavail +=
  1862. this->ecclayout->oobfree[i].length;
  1863. mtd->ecclayout = this->ecclayout;
  1864. /* Fill in remaining MTD driver data */
  1865. mtd->type = MTD_NANDFLASH;
  1866. mtd->flags = MTD_CAP_NANDFLASH;
  1867. mtd->ecctype = MTD_ECC_SW;
  1868. mtd->erase = onenand_erase;
  1869. mtd->point = NULL;
  1870. mtd->unpoint = NULL;
  1871. mtd->read = onenand_read;
  1872. mtd->write = onenand_write;
  1873. mtd->read_oob = onenand_read_oob;
  1874. mtd->write_oob = onenand_write_oob;
  1875. #ifdef CONFIG_MTD_ONENAND_OTP
  1876. mtd->get_fact_prot_info = onenand_get_fact_prot_info;
  1877. mtd->read_fact_prot_reg = onenand_read_fact_prot_reg;
  1878. mtd->get_user_prot_info = onenand_get_user_prot_info;
  1879. mtd->read_user_prot_reg = onenand_read_user_prot_reg;
  1880. mtd->write_user_prot_reg = onenand_write_user_prot_reg;
  1881. mtd->lock_user_prot_reg = onenand_lock_user_prot_reg;
  1882. #endif
  1883. mtd->sync = onenand_sync;
  1884. mtd->lock = onenand_lock;
  1885. mtd->unlock = onenand_unlock;
  1886. mtd->suspend = onenand_suspend;
  1887. mtd->resume = onenand_resume;
  1888. mtd->block_isbad = onenand_block_isbad;
  1889. mtd->block_markbad = onenand_block_markbad;
  1890. mtd->owner = THIS_MODULE;
  1891. /* Unlock whole block */
  1892. onenand_unlock_all(mtd);
  1893. return this->scan_bbt(mtd);
  1894. }
  1895. /**
  1896. * onenand_release - [OneNAND Interface] Free resources held by the OneNAND device
  1897. * @param mtd MTD device structure
  1898. */
  1899. void onenand_release(struct mtd_info *mtd)
  1900. {
  1901. struct onenand_chip *this = mtd->priv;
  1902. #ifdef CONFIG_MTD_PARTITIONS
  1903. /* Deregister partitions */
  1904. del_mtd_partitions (mtd);
  1905. #endif
  1906. /* Deregister the device */
  1907. del_mtd_device (mtd);
  1908. /* Free bad block table memory, if allocated */
  1909. if (this->bbm) {
  1910. struct bbm_info *bbm = this->bbm;
  1911. kfree(bbm->bbt);
  1912. kfree(this->bbm);
  1913. }
  1914. /* Buffer allocated by onenand_scan */
  1915. if (this->options & ONENAND_PAGEBUF_ALLOC)
  1916. kfree(this->page_buf);
  1917. }
  1918. EXPORT_SYMBOL_GPL(onenand_scan);
  1919. EXPORT_SYMBOL_GPL(onenand_release);
  1920. MODULE_LICENSE("GPL");
  1921. MODULE_AUTHOR("Kyungmin Park <kyungmin.park@samsung.com>");
  1922. MODULE_DESCRIPTION("Generic OneNAND flash driver code");