irqinit.c 6.9 KB

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  1. #include <linux/linkage.h>
  2. #include <linux/errno.h>
  3. #include <linux/signal.h>
  4. #include <linux/sched.h>
  5. #include <linux/ioport.h>
  6. #include <linux/interrupt.h>
  7. #include <linux/timex.h>
  8. #include <linux/slab.h>
  9. #include <linux/random.h>
  10. #include <linux/init.h>
  11. #include <linux/kernel_stat.h>
  12. #include <linux/sysdev.h>
  13. #include <linux/bitops.h>
  14. #include <linux/acpi.h>
  15. #include <linux/io.h>
  16. #include <linux/delay.h>
  17. #include <asm/atomic.h>
  18. #include <asm/system.h>
  19. #include <asm/timer.h>
  20. #include <asm/hw_irq.h>
  21. #include <asm/pgtable.h>
  22. #include <asm/desc.h>
  23. #include <asm/apic.h>
  24. #include <asm/setup.h>
  25. #include <asm/i8259.h>
  26. #include <asm/traps.h>
  27. /*
  28. * ISA PIC or low IO-APIC triggered (INTA-cycle or APIC) interrupts:
  29. * (these are usually mapped to vectors 0x30-0x3f)
  30. */
  31. /*
  32. * The IO-APIC gives us many more interrupt sources. Most of these
  33. * are unused but an SMP system is supposed to have enough memory ...
  34. * sometimes (mostly wrt. hw bugs) we get corrupted vectors all
  35. * across the spectrum, so we really want to be prepared to get all
  36. * of these. Plus, more powerful systems might have more than 64
  37. * IO-APIC registers.
  38. *
  39. * (these are usually mapped into the 0x30-0xff vector range)
  40. */
  41. #ifdef CONFIG_X86_32
  42. /*
  43. * Note that on a 486, we don't want to do a SIGFPE on an irq13
  44. * as the irq is unreliable, and exception 16 works correctly
  45. * (ie as explained in the intel literature). On a 386, you
  46. * can't use exception 16 due to bad IBM design, so we have to
  47. * rely on the less exact irq13.
  48. *
  49. * Careful.. Not only is IRQ13 unreliable, but it is also
  50. * leads to races. IBM designers who came up with it should
  51. * be shot.
  52. */
  53. static irqreturn_t math_error_irq(int cpl, void *dev_id)
  54. {
  55. outb(0, 0xF0);
  56. if (ignore_fpu_irq || !boot_cpu_data.hard_math)
  57. return IRQ_NONE;
  58. math_error((void __user *)get_irq_regs()->ip);
  59. return IRQ_HANDLED;
  60. }
  61. /*
  62. * New motherboards sometimes make IRQ 13 be a PCI interrupt,
  63. * so allow interrupt sharing.
  64. */
  65. static struct irqaction fpu_irq = {
  66. .handler = math_error_irq,
  67. .name = "fpu",
  68. };
  69. #endif
  70. /*
  71. * IRQ2 is cascade interrupt to second interrupt controller
  72. */
  73. static struct irqaction irq2 = {
  74. .handler = no_action,
  75. .name = "cascade",
  76. };
  77. DEFINE_PER_CPU(vector_irq_t, vector_irq) = {
  78. [0 ... IRQ0_VECTOR - 1] = -1,
  79. [IRQ0_VECTOR] = 0,
  80. [IRQ1_VECTOR] = 1,
  81. [IRQ2_VECTOR] = 2,
  82. [IRQ3_VECTOR] = 3,
  83. [IRQ4_VECTOR] = 4,
  84. [IRQ5_VECTOR] = 5,
  85. [IRQ6_VECTOR] = 6,
  86. [IRQ7_VECTOR] = 7,
  87. [IRQ8_VECTOR] = 8,
  88. [IRQ9_VECTOR] = 9,
  89. [IRQ10_VECTOR] = 10,
  90. [IRQ11_VECTOR] = 11,
  91. [IRQ12_VECTOR] = 12,
  92. [IRQ13_VECTOR] = 13,
  93. [IRQ14_VECTOR] = 14,
  94. [IRQ15_VECTOR] = 15,
  95. [IRQ15_VECTOR + 1 ... NR_VECTORS - 1] = -1
  96. };
  97. int vector_used_by_percpu_irq(unsigned int vector)
  98. {
  99. int cpu;
  100. for_each_online_cpu(cpu) {
  101. if (per_cpu(vector_irq, cpu)[vector] != -1)
  102. return 1;
  103. }
  104. return 0;
  105. }
  106. static void __init init_ISA_irqs(void)
  107. {
  108. int i;
  109. #if defined(CONFIG_X86_64) || defined(CONFIG_X86_LOCAL_APIC)
  110. init_bsp_APIC();
  111. #endif
  112. init_8259A(0);
  113. /*
  114. * 16 old-style INTA-cycle interrupts:
  115. */
  116. for (i = 0; i < NR_IRQS_LEGACY; i++) {
  117. struct irq_desc *desc = irq_to_desc(i);
  118. desc->status = IRQ_DISABLED;
  119. desc->action = NULL;
  120. desc->depth = 1;
  121. set_irq_chip_and_handler_name(i, &i8259A_chip,
  122. handle_level_irq, "XT");
  123. }
  124. }
  125. /* Overridden in paravirt.c */
  126. void init_IRQ(void) __attribute__((weak, alias("native_init_IRQ")));
  127. static void __init smp_intr_init(void)
  128. {
  129. #ifdef CONFIG_SMP
  130. #if defined(CONFIG_X86_64) || defined(CONFIG_X86_LOCAL_APIC)
  131. /*
  132. * The reschedule interrupt is a CPU-to-CPU reschedule-helper
  133. * IPI, driven by wakeup.
  134. */
  135. alloc_intr_gate(RESCHEDULE_VECTOR, reschedule_interrupt);
  136. /* IPIs for invalidation */
  137. alloc_intr_gate(INVALIDATE_TLB_VECTOR_START+0, invalidate_interrupt0);
  138. alloc_intr_gate(INVALIDATE_TLB_VECTOR_START+1, invalidate_interrupt1);
  139. alloc_intr_gate(INVALIDATE_TLB_VECTOR_START+2, invalidate_interrupt2);
  140. alloc_intr_gate(INVALIDATE_TLB_VECTOR_START+3, invalidate_interrupt3);
  141. alloc_intr_gate(INVALIDATE_TLB_VECTOR_START+4, invalidate_interrupt4);
  142. alloc_intr_gate(INVALIDATE_TLB_VECTOR_START+5, invalidate_interrupt5);
  143. alloc_intr_gate(INVALIDATE_TLB_VECTOR_START+6, invalidate_interrupt6);
  144. alloc_intr_gate(INVALIDATE_TLB_VECTOR_START+7, invalidate_interrupt7);
  145. /* IPI for generic function call */
  146. alloc_intr_gate(CALL_FUNCTION_VECTOR, call_function_interrupt);
  147. /* IPI for generic single function call */
  148. alloc_intr_gate(CALL_FUNCTION_SINGLE_VECTOR,
  149. call_function_single_interrupt);
  150. /* Low priority IPI to cleanup after moving an irq */
  151. set_intr_gate(IRQ_MOVE_CLEANUP_VECTOR, irq_move_cleanup_interrupt);
  152. set_bit(IRQ_MOVE_CLEANUP_VECTOR, used_vectors);
  153. #endif
  154. #endif /* CONFIG_SMP */
  155. }
  156. static void __init apic_intr_init(void)
  157. {
  158. smp_intr_init();
  159. #ifdef CONFIG_X86_64
  160. alloc_intr_gate(THERMAL_APIC_VECTOR, thermal_interrupt);
  161. alloc_intr_gate(THRESHOLD_APIC_VECTOR, threshold_interrupt);
  162. #endif
  163. #if defined(CONFIG_X86_64) || defined(CONFIG_X86_LOCAL_APIC)
  164. /* self generated IPI for local APIC timer */
  165. alloc_intr_gate(LOCAL_TIMER_VECTOR, apic_timer_interrupt);
  166. /* generic IPI for platform specific use */
  167. alloc_intr_gate(GENERIC_INTERRUPT_VECTOR, generic_interrupt);
  168. /* IPI vectors for APIC spurious and error interrupts */
  169. alloc_intr_gate(SPURIOUS_APIC_VECTOR, spurious_interrupt);
  170. alloc_intr_gate(ERROR_APIC_VECTOR, error_interrupt);
  171. #endif
  172. #ifdef CONFIG_X86_32
  173. #if defined(CONFIG_X86_LOCAL_APIC) && defined(CONFIG_X86_MCE_P4THERMAL)
  174. /* thermal monitor LVT interrupt */
  175. alloc_intr_gate(THERMAL_APIC_VECTOR, thermal_interrupt);
  176. #endif
  177. #endif
  178. }
  179. /**
  180. * x86_quirk_pre_intr_init - initialisation prior to setting up interrupt vectors
  181. *
  182. * Description:
  183. * Perform any necessary interrupt initialisation prior to setting up
  184. * the "ordinary" interrupt call gates. For legacy reasons, the ISA
  185. * interrupts should be initialised here if the machine emulates a PC
  186. * in any way.
  187. **/
  188. static void __init x86_quirk_pre_intr_init(void)
  189. {
  190. #ifdef CONFIG_X86_32
  191. if (x86_quirks->arch_pre_intr_init) {
  192. if (x86_quirks->arch_pre_intr_init())
  193. return;
  194. }
  195. #endif
  196. init_ISA_irqs();
  197. }
  198. void __init native_init_IRQ(void)
  199. {
  200. int i;
  201. /* Execute any quirks before the call gates are initialised: */
  202. x86_quirk_pre_intr_init();
  203. /*
  204. * Cover the whole vector space, no vector can escape
  205. * us. (some of these will be overridden and become
  206. * 'special' SMP interrupts)
  207. */
  208. for (i = FIRST_EXTERNAL_VECTOR; i < NR_VECTORS; i++) {
  209. /* IA32_SYSCALL_VECTOR was reserved in trap_init. */
  210. if (i != IA32_SYSCALL_VECTOR)
  211. set_intr_gate(i, interrupt[i-FIRST_EXTERNAL_VECTOR]);
  212. }
  213. apic_intr_init();
  214. if (!acpi_ioapic)
  215. setup_irq(2, &irq2);
  216. #ifdef CONFIG_X86_32
  217. /*
  218. * Call quirks after call gates are initialised (usually add in
  219. * the architecture specific gates):
  220. */
  221. x86_quirk_intr_init();
  222. /*
  223. * External FPU? Set up irq13 if so, for
  224. * original braindamaged IBM FERR coupling.
  225. */
  226. if (boot_cpu_data.hard_math && !cpu_has_fpu)
  227. setup_irq(FPU_IRQ, &fpu_irq);
  228. irq_ctx_init(smp_processor_id());
  229. #endif
  230. }