pci200syn.c 13 KB

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  1. /*
  2. * Goramo PCI200SYN synchronous serial card driver for Linux
  3. *
  4. * Copyright (C) 2002-2003 Krzysztof Halasa <khc@pm.waw.pl>
  5. *
  6. * This program is free software; you can redistribute it and/or modify it
  7. * under the terms of version 2 of the GNU General Public License
  8. * as published by the Free Software Foundation.
  9. *
  10. * For information see <http://www.kernel.org/pub/linux/utils/net/hdlc/>
  11. *
  12. * Sources of information:
  13. * Hitachi HD64572 SCA-II User's Manual
  14. * PLX Technology Inc. PCI9052 Data Book
  15. */
  16. #include <linux/module.h>
  17. #include <linux/kernel.h>
  18. #include <linux/slab.h>
  19. #include <linux/types.h>
  20. #include <linux/fcntl.h>
  21. #include <linux/in.h>
  22. #include <linux/string.h>
  23. #include <linux/errno.h>
  24. #include <linux/init.h>
  25. #include <linux/ioport.h>
  26. #include <linux/moduleparam.h>
  27. #include <linux/netdevice.h>
  28. #include <linux/hdlc.h>
  29. #include <linux/pci.h>
  30. #include <linux/delay.h>
  31. #include <asm/io.h>
  32. #include "hd64572.h"
  33. static const char* version = "Goramo PCI200SYN driver version: 1.16";
  34. static const char* devname = "PCI200SYN";
  35. #undef DEBUG_PKT
  36. #define DEBUG_RINGS
  37. #define PCI200SYN_PLX_SIZE 0x80 /* PLX control window size (128b) */
  38. #define PCI200SYN_SCA_SIZE 0x400 /* SCA window size (1Kb) */
  39. #define MAX_TX_BUFFERS 10
  40. static int pci_clock_freq = 33000000;
  41. #define CLOCK_BASE pci_clock_freq
  42. /*
  43. * PLX PCI9052 local configuration and shared runtime registers.
  44. * This structure can be used to access 9052 registers (memory mapped).
  45. */
  46. typedef struct {
  47. u32 loc_addr_range[4]; /* 00-0Ch : Local Address Ranges */
  48. u32 loc_rom_range; /* 10h : Local ROM Range */
  49. u32 loc_addr_base[4]; /* 14-20h : Local Address Base Addrs */
  50. u32 loc_rom_base; /* 24h : Local ROM Base */
  51. u32 loc_bus_descr[4]; /* 28-34h : Local Bus Descriptors */
  52. u32 rom_bus_descr; /* 38h : ROM Bus Descriptor */
  53. u32 cs_base[4]; /* 3C-48h : Chip Select Base Addrs */
  54. u32 intr_ctrl_stat; /* 4Ch : Interrupt Control/Status */
  55. u32 init_ctrl; /* 50h : EEPROM ctrl, Init Ctrl, etc */
  56. }plx9052;
  57. typedef struct port_s {
  58. struct napi_struct napi;
  59. struct net_device *dev;
  60. struct card_s *card;
  61. spinlock_t lock; /* TX lock */
  62. sync_serial_settings settings;
  63. int rxpart; /* partial frame received, next frame invalid*/
  64. unsigned short encoding;
  65. unsigned short parity;
  66. u16 rxin; /* rx ring buffer 'in' pointer */
  67. u16 txin; /* tx ring buffer 'in' and 'last' pointers */
  68. u16 txlast;
  69. u8 rxs, txs, tmc; /* SCA registers */
  70. u8 phy_node; /* physical port # - 0 or 1 */
  71. }port_t;
  72. typedef struct card_s {
  73. u8 __iomem *rambase; /* buffer memory base (virtual) */
  74. u8 __iomem *scabase; /* SCA memory base (virtual) */
  75. plx9052 __iomem *plxbase;/* PLX registers memory base (virtual) */
  76. u16 rx_ring_buffers; /* number of buffers in a ring */
  77. u16 tx_ring_buffers;
  78. u16 buff_offset; /* offset of first buffer of first channel */
  79. u8 irq; /* interrupt request level */
  80. port_t ports[2];
  81. }card_t;
  82. #define sca_in(reg, card) readb(card->scabase + (reg))
  83. #define sca_out(value, reg, card) writeb(value, card->scabase + (reg))
  84. #define sca_inw(reg, card) readw(card->scabase + (reg))
  85. #define sca_outw(value, reg, card) writew(value, card->scabase + (reg))
  86. #define sca_inl(reg, card) readl(card->scabase + (reg))
  87. #define sca_outl(value, reg, card) writel(value, card->scabase + (reg))
  88. #define port_to_card(port) (port->card)
  89. #define log_node(port) (port->phy_node)
  90. #define phy_node(port) (port->phy_node)
  91. #define winbase(card) (card->rambase)
  92. #define get_port(card, port) (&card->ports[port])
  93. #define sca_flush(card) (sca_in(IER0, card));
  94. static inline void new_memcpy_toio(char __iomem *dest, char *src, int length)
  95. {
  96. int len;
  97. do {
  98. len = length > 256 ? 256 : length;
  99. memcpy_toio(dest, src, len);
  100. dest += len;
  101. src += len;
  102. length -= len;
  103. readb(dest);
  104. } while (len);
  105. }
  106. #undef memcpy_toio
  107. #define memcpy_toio new_memcpy_toio
  108. #include "hd64572.c"
  109. static void pci200_set_iface(port_t *port)
  110. {
  111. card_t *card = port->card;
  112. u16 msci = get_msci(port);
  113. u8 rxs = port->rxs & CLK_BRG_MASK;
  114. u8 txs = port->txs & CLK_BRG_MASK;
  115. sca_out(EXS_TES1, (phy_node(port) ? MSCI1_OFFSET : MSCI0_OFFSET) + EXS,
  116. port_to_card(port));
  117. switch(port->settings.clock_type) {
  118. case CLOCK_INT:
  119. rxs |= CLK_BRG; /* BRG output */
  120. txs |= CLK_PIN_OUT | CLK_TX_RXCLK; /* RX clock */
  121. break;
  122. case CLOCK_TXINT:
  123. rxs |= CLK_LINE; /* RXC input */
  124. txs |= CLK_PIN_OUT | CLK_BRG; /* BRG output */
  125. break;
  126. case CLOCK_TXFROMRX:
  127. rxs |= CLK_LINE; /* RXC input */
  128. txs |= CLK_PIN_OUT | CLK_TX_RXCLK; /* RX clock */
  129. break;
  130. default: /* EXTernal clock */
  131. rxs |= CLK_LINE; /* RXC input */
  132. txs |= CLK_PIN_OUT | CLK_LINE; /* TXC input */
  133. break;
  134. }
  135. port->rxs = rxs;
  136. port->txs = txs;
  137. sca_out(rxs, msci + RXS, card);
  138. sca_out(txs, msci + TXS, card);
  139. sca_set_port(port);
  140. }
  141. static int pci200_open(struct net_device *dev)
  142. {
  143. port_t *port = dev_to_port(dev);
  144. int result = hdlc_open(dev);
  145. if (result)
  146. return result;
  147. sca_open(dev);
  148. pci200_set_iface(port);
  149. sca_flush(port_to_card(port));
  150. return 0;
  151. }
  152. static int pci200_close(struct net_device *dev)
  153. {
  154. sca_close(dev);
  155. sca_flush(port_to_card(dev_to_port(dev)));
  156. hdlc_close(dev);
  157. return 0;
  158. }
  159. static int pci200_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
  160. {
  161. const size_t size = sizeof(sync_serial_settings);
  162. sync_serial_settings new_line;
  163. sync_serial_settings __user *line = ifr->ifr_settings.ifs_ifsu.sync;
  164. port_t *port = dev_to_port(dev);
  165. #ifdef DEBUG_RINGS
  166. if (cmd == SIOCDEVPRIVATE) {
  167. sca_dump_rings(dev);
  168. return 0;
  169. }
  170. #endif
  171. if (cmd != SIOCWANDEV)
  172. return hdlc_ioctl(dev, ifr, cmd);
  173. switch(ifr->ifr_settings.type) {
  174. case IF_GET_IFACE:
  175. ifr->ifr_settings.type = IF_IFACE_V35;
  176. if (ifr->ifr_settings.size < size) {
  177. ifr->ifr_settings.size = size; /* data size wanted */
  178. return -ENOBUFS;
  179. }
  180. if (copy_to_user(line, &port->settings, size))
  181. return -EFAULT;
  182. return 0;
  183. case IF_IFACE_V35:
  184. case IF_IFACE_SYNC_SERIAL:
  185. if (!capable(CAP_NET_ADMIN))
  186. return -EPERM;
  187. if (copy_from_user(&new_line, line, size))
  188. return -EFAULT;
  189. if (new_line.clock_type != CLOCK_EXT &&
  190. new_line.clock_type != CLOCK_TXFROMRX &&
  191. new_line.clock_type != CLOCK_INT &&
  192. new_line.clock_type != CLOCK_TXINT)
  193. return -EINVAL; /* No such clock setting */
  194. if (new_line.loopback != 0 && new_line.loopback != 1)
  195. return -EINVAL;
  196. memcpy(&port->settings, &new_line, size); /* Update settings */
  197. pci200_set_iface(port);
  198. sca_flush(port_to_card(port));
  199. return 0;
  200. default:
  201. return hdlc_ioctl(dev, ifr, cmd);
  202. }
  203. }
  204. static void pci200_pci_remove_one(struct pci_dev *pdev)
  205. {
  206. int i;
  207. card_t *card = pci_get_drvdata(pdev);
  208. for (i = 0; i < 2; i++)
  209. if (card->ports[i].card) {
  210. struct net_device *dev = port_to_dev(&card->ports[i]);
  211. unregister_hdlc_device(dev);
  212. }
  213. if (card->irq)
  214. free_irq(card->irq, card);
  215. if (card->rambase)
  216. iounmap(card->rambase);
  217. if (card->scabase)
  218. iounmap(card->scabase);
  219. if (card->plxbase)
  220. iounmap(card->plxbase);
  221. pci_release_regions(pdev);
  222. pci_disable_device(pdev);
  223. pci_set_drvdata(pdev, NULL);
  224. if (card->ports[0].dev)
  225. free_netdev(card->ports[0].dev);
  226. if (card->ports[1].dev)
  227. free_netdev(card->ports[1].dev);
  228. kfree(card);
  229. }
  230. static int __devinit pci200_pci_init_one(struct pci_dev *pdev,
  231. const struct pci_device_id *ent)
  232. {
  233. card_t *card;
  234. u32 __iomem *p;
  235. int i;
  236. u32 ramsize;
  237. u32 ramphys; /* buffer memory base */
  238. u32 scaphys; /* SCA memory base */
  239. u32 plxphys; /* PLX registers memory base */
  240. #ifndef MODULE
  241. static int printed_version;
  242. if (!printed_version++)
  243. printk(KERN_INFO "%s\n", version);
  244. #endif
  245. i = pci_enable_device(pdev);
  246. if (i)
  247. return i;
  248. i = pci_request_regions(pdev, "PCI200SYN");
  249. if (i) {
  250. pci_disable_device(pdev);
  251. return i;
  252. }
  253. card = kzalloc(sizeof(card_t), GFP_KERNEL);
  254. if (card == NULL) {
  255. printk(KERN_ERR "pci200syn: unable to allocate memory\n");
  256. pci_release_regions(pdev);
  257. pci_disable_device(pdev);
  258. return -ENOBUFS;
  259. }
  260. pci_set_drvdata(pdev, card);
  261. card->ports[0].dev = alloc_hdlcdev(&card->ports[0]);
  262. card->ports[1].dev = alloc_hdlcdev(&card->ports[1]);
  263. if (!card->ports[0].dev || !card->ports[1].dev) {
  264. printk(KERN_ERR "pci200syn: unable to allocate memory\n");
  265. pci200_pci_remove_one(pdev);
  266. return -ENOMEM;
  267. }
  268. if (pci_resource_len(pdev, 0) != PCI200SYN_PLX_SIZE ||
  269. pci_resource_len(pdev, 2) != PCI200SYN_SCA_SIZE ||
  270. pci_resource_len(pdev, 3) < 16384) {
  271. printk(KERN_ERR "pci200syn: invalid card EEPROM parameters\n");
  272. pci200_pci_remove_one(pdev);
  273. return -EFAULT;
  274. }
  275. plxphys = pci_resource_start(pdev,0) & PCI_BASE_ADDRESS_MEM_MASK;
  276. card->plxbase = ioremap(plxphys, PCI200SYN_PLX_SIZE);
  277. scaphys = pci_resource_start(pdev,2) & PCI_BASE_ADDRESS_MEM_MASK;
  278. card->scabase = ioremap(scaphys, PCI200SYN_SCA_SIZE);
  279. ramphys = pci_resource_start(pdev,3) & PCI_BASE_ADDRESS_MEM_MASK;
  280. card->rambase = pci_ioremap_bar(pdev, 3);
  281. if (card->plxbase == NULL ||
  282. card->scabase == NULL ||
  283. card->rambase == NULL) {
  284. printk(KERN_ERR "pci200syn: ioremap() failed\n");
  285. pci200_pci_remove_one(pdev);
  286. return -EFAULT;
  287. }
  288. /* Reset PLX */
  289. p = &card->plxbase->init_ctrl;
  290. writel(readl(p) | 0x40000000, p);
  291. readl(p); /* Flush the write - do not use sca_flush */
  292. udelay(1);
  293. writel(readl(p) & ~0x40000000, p);
  294. readl(p); /* Flush the write - do not use sca_flush */
  295. udelay(1);
  296. ramsize = sca_detect_ram(card, card->rambase,
  297. pci_resource_len(pdev, 3));
  298. /* number of TX + RX buffers for one port - this is dual port card */
  299. i = ramsize / (2 * (sizeof(pkt_desc) + HDLC_MAX_MRU));
  300. card->tx_ring_buffers = min(i / 2, MAX_TX_BUFFERS);
  301. card->rx_ring_buffers = i - card->tx_ring_buffers;
  302. card->buff_offset = 2 * sizeof(pkt_desc) * (card->tx_ring_buffers +
  303. card->rx_ring_buffers);
  304. printk(KERN_INFO "pci200syn: %u KB RAM at 0x%x, IRQ%u, using %u TX +"
  305. " %u RX packets rings\n", ramsize / 1024, ramphys,
  306. pdev->irq, card->tx_ring_buffers, card->rx_ring_buffers);
  307. if (pdev->subsystem_device == PCI_DEVICE_ID_PLX_9050) {
  308. printk(KERN_ERR "Detected PCI200SYN card with old "
  309. "configuration data.\n");
  310. printk(KERN_ERR "See <http://www.kernel.org/pub/"
  311. "linux/utils/net/hdlc/pci200syn/> for update.\n");
  312. printk(KERN_ERR "The card will stop working with"
  313. " future versions of Linux if not updated.\n");
  314. }
  315. if (card->tx_ring_buffers < 1) {
  316. printk(KERN_ERR "pci200syn: RAM test failed\n");
  317. pci200_pci_remove_one(pdev);
  318. return -EFAULT;
  319. }
  320. /* Enable interrupts on the PCI bridge */
  321. p = &card->plxbase->intr_ctrl_stat;
  322. writew(readw(p) | 0x0040, p);
  323. /* Allocate IRQ */
  324. if (request_irq(pdev->irq, sca_intr, IRQF_SHARED, devname, card)) {
  325. printk(KERN_WARNING "pci200syn: could not allocate IRQ%d.\n",
  326. pdev->irq);
  327. pci200_pci_remove_one(pdev);
  328. return -EBUSY;
  329. }
  330. card->irq = pdev->irq;
  331. sca_init(card, 0);
  332. for (i = 0; i < 2; i++) {
  333. port_t *port = &card->ports[i];
  334. struct net_device *dev = port_to_dev(port);
  335. hdlc_device *hdlc = dev_to_hdlc(dev);
  336. port->phy_node = i;
  337. spin_lock_init(&port->lock);
  338. dev->irq = card->irq;
  339. dev->mem_start = ramphys;
  340. dev->mem_end = ramphys + ramsize - 1;
  341. dev->tx_queue_len = 50;
  342. dev->do_ioctl = pci200_ioctl;
  343. dev->open = pci200_open;
  344. dev->stop = pci200_close;
  345. hdlc->attach = sca_attach;
  346. hdlc->xmit = sca_xmit;
  347. port->settings.clock_type = CLOCK_EXT;
  348. port->card = card;
  349. sca_init_port(port);
  350. if (register_hdlc_device(dev)) {
  351. printk(KERN_ERR "pci200syn: unable to register hdlc "
  352. "device\n");
  353. port->card = NULL;
  354. pci200_pci_remove_one(pdev);
  355. return -ENOBUFS;
  356. }
  357. printk(KERN_INFO "%s: PCI200SYN node %d\n",
  358. dev->name, port->phy_node);
  359. }
  360. sca_flush(card);
  361. return 0;
  362. }
  363. static struct pci_device_id pci200_pci_tbl[] __devinitdata = {
  364. { PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_9050, PCI_VENDOR_ID_PLX,
  365. PCI_DEVICE_ID_PLX_9050, 0, 0, 0 },
  366. { PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_9050, PCI_VENDOR_ID_PLX,
  367. PCI_DEVICE_ID_PLX_PCI200SYN, 0, 0, 0 },
  368. { 0, }
  369. };
  370. static struct pci_driver pci200_pci_driver = {
  371. .name = "PCI200SYN",
  372. .id_table = pci200_pci_tbl,
  373. .probe = pci200_pci_init_one,
  374. .remove = pci200_pci_remove_one,
  375. };
  376. static int __init pci200_init_module(void)
  377. {
  378. #ifdef MODULE
  379. printk(KERN_INFO "%s\n", version);
  380. #endif
  381. if (pci_clock_freq < 1000000 || pci_clock_freq > 80000000) {
  382. printk(KERN_ERR "pci200syn: Invalid PCI clock frequency\n");
  383. return -EINVAL;
  384. }
  385. return pci_register_driver(&pci200_pci_driver);
  386. }
  387. static void __exit pci200_cleanup_module(void)
  388. {
  389. pci_unregister_driver(&pci200_pci_driver);
  390. }
  391. MODULE_AUTHOR("Krzysztof Halasa <khc@pm.waw.pl>");
  392. MODULE_DESCRIPTION("Goramo PCI200SYN serial port driver");
  393. MODULE_LICENSE("GPL v2");
  394. MODULE_DEVICE_TABLE(pci, pci200_pci_tbl);
  395. module_param(pci_clock_freq, int, 0444);
  396. MODULE_PARM_DESC(pci_clock_freq, "System PCI clock frequency in Hz");
  397. module_init(pci200_init_module);
  398. module_exit(pci200_cleanup_module);