s1d13xxxfb.c 21 KB

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  1. /* drivers/video/s1d13xxxfb.c
  2. *
  3. * (c) 2004 Simtec Electronics
  4. * (c) 2005 Thibaut VARENE <varenet@parisc-linux.org>
  5. *
  6. * Driver for Epson S1D13xxx series framebuffer chips
  7. *
  8. * Adapted from
  9. * linux/drivers/video/skeletonfb.c
  10. * linux/drivers/video/epson1355fb.c
  11. * linux/drivers/video/epson/s1d13xxxfb.c (2.4 driver by Epson)
  12. *
  13. * Note, currently only tested on S1D13806 with 16bit CRT.
  14. * As such, this driver might still contain some hardcoded bits relating to
  15. * S1D13806.
  16. * Making it work on other S1D13XXX chips should merely be a matter of adding
  17. * a few switch()s, some missing glue here and there maybe, and split header
  18. * files.
  19. *
  20. * TODO: - handle dual screen display (CRT and LCD at the same time).
  21. * - check_var(), mode change, etc.
  22. * - PM untested.
  23. * - Accelerated interfaces.
  24. * - Probably not SMP safe :)
  25. *
  26. * This file is subject to the terms and conditions of the GNU General Public
  27. * License. See the file COPYING in the main directory of this archive for
  28. * more details.
  29. */
  30. #include <linux/module.h>
  31. #include <linux/platform_device.h>
  32. #include <linux/delay.h>
  33. #include <linux/types.h>
  34. #include <linux/errno.h>
  35. #include <linux/mm.h>
  36. #include <linux/mman.h>
  37. #include <linux/fb.h>
  38. #include <asm/io.h>
  39. #include <video/s1d13xxxfb.h>
  40. #define PFX "s1d13xxxfb: "
  41. #if 0
  42. #define dbg(fmt, args...) do { printk(KERN_INFO fmt, ## args); } while(0)
  43. #else
  44. #define dbg(fmt, args...) do { } while (0)
  45. #endif
  46. /*
  47. * List of card production ids
  48. */
  49. static const int s1d13xxxfb_prod_ids[] = {
  50. S1D13505_PROD_ID,
  51. S1D13506_PROD_ID,
  52. S1D13806_PROD_ID,
  53. };
  54. /*
  55. * List of card strings
  56. */
  57. static const char *s1d13xxxfb_prod_names[] = {
  58. "S1D13505",
  59. "S1D13506",
  60. "S1D13806",
  61. };
  62. /*
  63. * Here we define the default struct fb_fix_screeninfo
  64. */
  65. static struct fb_fix_screeninfo __devinitdata s1d13xxxfb_fix = {
  66. .id = S1D_FBID,
  67. .type = FB_TYPE_PACKED_PIXELS,
  68. .visual = FB_VISUAL_PSEUDOCOLOR,
  69. .xpanstep = 0,
  70. .ypanstep = 1,
  71. .ywrapstep = 0,
  72. .accel = FB_ACCEL_NONE,
  73. };
  74. static inline u8
  75. s1d13xxxfb_readreg(struct s1d13xxxfb_par *par, u16 regno)
  76. {
  77. #if defined(CONFIG_PLAT_M32700UT) || defined(CONFIG_PLAT_OPSPUT) || defined(CONFIG_PLAT_MAPPI3)
  78. regno=((regno & 1) ? (regno & ~1L) : (regno + 1));
  79. #endif
  80. return readb(par->regs + regno);
  81. }
  82. static inline void
  83. s1d13xxxfb_writereg(struct s1d13xxxfb_par *par, u16 regno, u8 value)
  84. {
  85. #if defined(CONFIG_PLAT_M32700UT) || defined(CONFIG_PLAT_OPSPUT) || defined(CONFIG_PLAT_MAPPI3)
  86. regno=((regno & 1) ? (regno & ~1L) : (regno + 1));
  87. #endif
  88. writeb(value, par->regs + regno);
  89. }
  90. static inline void
  91. s1d13xxxfb_runinit(struct s1d13xxxfb_par *par,
  92. const struct s1d13xxxfb_regval *initregs,
  93. const unsigned int size)
  94. {
  95. int i;
  96. for (i = 0; i < size; i++) {
  97. if ((initregs[i].addr == S1DREG_DELAYOFF) ||
  98. (initregs[i].addr == S1DREG_DELAYON))
  99. mdelay((int)initregs[i].value);
  100. else {
  101. s1d13xxxfb_writereg(par, initregs[i].addr, initregs[i].value);
  102. }
  103. }
  104. /* make sure the hardware can cope with us */
  105. mdelay(1);
  106. }
  107. static inline void
  108. lcd_enable(struct s1d13xxxfb_par *par, int enable)
  109. {
  110. u8 mode = s1d13xxxfb_readreg(par, S1DREG_COM_DISP_MODE);
  111. if (enable)
  112. mode |= 0x01;
  113. else
  114. mode &= ~0x01;
  115. s1d13xxxfb_writereg(par, S1DREG_COM_DISP_MODE, mode);
  116. }
  117. static inline void
  118. crt_enable(struct s1d13xxxfb_par *par, int enable)
  119. {
  120. u8 mode = s1d13xxxfb_readreg(par, S1DREG_COM_DISP_MODE);
  121. if (enable)
  122. mode |= 0x02;
  123. else
  124. mode &= ~0x02;
  125. s1d13xxxfb_writereg(par, S1DREG_COM_DISP_MODE, mode);
  126. }
  127. /* framebuffer control routines */
  128. static inline void
  129. s1d13xxxfb_setup_pseudocolour(struct fb_info *info)
  130. {
  131. info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
  132. info->var.red.length = 4;
  133. info->var.green.length = 4;
  134. info->var.blue.length = 4;
  135. }
  136. static inline void
  137. s1d13xxxfb_setup_truecolour(struct fb_info *info)
  138. {
  139. info->fix.visual = FB_VISUAL_TRUECOLOR;
  140. info->var.bits_per_pixel = 16;
  141. info->var.red.length = 5;
  142. info->var.red.offset = 11;
  143. info->var.green.length = 6;
  144. info->var.green.offset = 5;
  145. info->var.blue.length = 5;
  146. info->var.blue.offset = 0;
  147. }
  148. /**
  149. * s1d13xxxfb_set_par - Alters the hardware state.
  150. * @info: frame buffer structure
  151. *
  152. * Using the fb_var_screeninfo in fb_info we set the depth of the
  153. * framebuffer. This function alters the par AND the
  154. * fb_fix_screeninfo stored in fb_info. It doesn't not alter var in
  155. * fb_info since we are using that data. This means we depend on the
  156. * data in var inside fb_info to be supported by the hardware.
  157. * xxxfb_check_var is always called before xxxfb_set_par to ensure this.
  158. *
  159. * XXX TODO: write proper s1d13xxxfb_check_var(), without which that
  160. * function is quite useless.
  161. */
  162. static int
  163. s1d13xxxfb_set_par(struct fb_info *info)
  164. {
  165. struct s1d13xxxfb_par *s1dfb = info->par;
  166. unsigned int val;
  167. dbg("s1d13xxxfb_set_par: bpp=%d\n", info->var.bits_per_pixel);
  168. if ((s1dfb->display & 0x01)) /* LCD */
  169. val = s1d13xxxfb_readreg(s1dfb, S1DREG_LCD_DISP_MODE); /* read colour control */
  170. else /* CRT */
  171. val = s1d13xxxfb_readreg(s1dfb, S1DREG_CRT_DISP_MODE); /* read colour control */
  172. val &= ~0x07;
  173. switch (info->var.bits_per_pixel) {
  174. case 4:
  175. dbg("pseudo colour 4\n");
  176. s1d13xxxfb_setup_pseudocolour(info);
  177. val |= 2;
  178. break;
  179. case 8:
  180. dbg("pseudo colour 8\n");
  181. s1d13xxxfb_setup_pseudocolour(info);
  182. val |= 3;
  183. break;
  184. case 16:
  185. dbg("true colour\n");
  186. s1d13xxxfb_setup_truecolour(info);
  187. val |= 5;
  188. break;
  189. default:
  190. dbg("bpp not supported!\n");
  191. return -EINVAL;
  192. }
  193. dbg("writing %02x to display mode register\n", val);
  194. if ((s1dfb->display & 0x01)) /* LCD */
  195. s1d13xxxfb_writereg(s1dfb, S1DREG_LCD_DISP_MODE, val);
  196. else /* CRT */
  197. s1d13xxxfb_writereg(s1dfb, S1DREG_CRT_DISP_MODE, val);
  198. info->fix.line_length = info->var.xres * info->var.bits_per_pixel;
  199. info->fix.line_length /= 8;
  200. dbg("setting line_length to %d\n", info->fix.line_length);
  201. dbg("done setup\n");
  202. return 0;
  203. }
  204. /**
  205. * s1d13xxxfb_setcolreg - sets a color register.
  206. * @regno: Which register in the CLUT we are programming
  207. * @red: The red value which can be up to 16 bits wide
  208. * @green: The green value which can be up to 16 bits wide
  209. * @blue: The blue value which can be up to 16 bits wide.
  210. * @transp: If supported the alpha value which can be up to 16 bits wide.
  211. * @info: frame buffer info structure
  212. *
  213. * Returns negative errno on error, or zero on success.
  214. */
  215. static int
  216. s1d13xxxfb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
  217. u_int transp, struct fb_info *info)
  218. {
  219. struct s1d13xxxfb_par *s1dfb = info->par;
  220. unsigned int pseudo_val;
  221. if (regno >= S1D_PALETTE_SIZE)
  222. return -EINVAL;
  223. dbg("s1d13xxxfb_setcolreg: %d: rgb=%d,%d,%d, tr=%d\n",
  224. regno, red, green, blue, transp);
  225. if (info->var.grayscale)
  226. red = green = blue = (19595*red + 38470*green + 7471*blue) >> 16;
  227. switch (info->fix.visual) {
  228. case FB_VISUAL_TRUECOLOR:
  229. if (regno >= 16)
  230. return -EINVAL;
  231. /* deal with creating pseudo-palette entries */
  232. pseudo_val = (red >> 11) << info->var.red.offset;
  233. pseudo_val |= (green >> 10) << info->var.green.offset;
  234. pseudo_val |= (blue >> 11) << info->var.blue.offset;
  235. dbg("s1d13xxxfb_setcolreg: pseudo %d, val %08x\n",
  236. regno, pseudo_val);
  237. #if defined(CONFIG_PLAT_MAPPI)
  238. ((u32 *)info->pseudo_palette)[regno] = cpu_to_le16(pseudo_val);
  239. #else
  240. ((u32 *)info->pseudo_palette)[regno] = pseudo_val;
  241. #endif
  242. break;
  243. case FB_VISUAL_PSEUDOCOLOR:
  244. s1d13xxxfb_writereg(s1dfb, S1DREG_LKUP_ADDR, regno);
  245. s1d13xxxfb_writereg(s1dfb, S1DREG_LKUP_DATA, red);
  246. s1d13xxxfb_writereg(s1dfb, S1DREG_LKUP_DATA, green);
  247. s1d13xxxfb_writereg(s1dfb, S1DREG_LKUP_DATA, blue);
  248. break;
  249. default:
  250. return -ENOSYS;
  251. }
  252. dbg("s1d13xxxfb_setcolreg: done\n");
  253. return 0;
  254. }
  255. /**
  256. * s1d13xxxfb_blank - blanks the display.
  257. * @blank_mode: the blank mode we want.
  258. * @info: frame buffer structure that represents a single frame buffer
  259. *
  260. * Blank the screen if blank_mode != 0, else unblank. Return 0 if
  261. * blanking succeeded, != 0 if un-/blanking failed due to e.g. a
  262. * video mode which doesn't support it. Implements VESA suspend
  263. * and powerdown modes on hardware that supports disabling hsync/vsync:
  264. * blank_mode == 2: suspend vsync
  265. * blank_mode == 3: suspend hsync
  266. * blank_mode == 4: powerdown
  267. *
  268. * Returns negative errno on error, or zero on success.
  269. */
  270. static int
  271. s1d13xxxfb_blank(int blank_mode, struct fb_info *info)
  272. {
  273. struct s1d13xxxfb_par *par = info->par;
  274. dbg("s1d13xxxfb_blank: blank=%d, info=%p\n", blank_mode, info);
  275. switch (blank_mode) {
  276. case FB_BLANK_UNBLANK:
  277. case FB_BLANK_NORMAL:
  278. if ((par->display & 0x01) != 0)
  279. lcd_enable(par, 1);
  280. if ((par->display & 0x02) != 0)
  281. crt_enable(par, 1);
  282. break;
  283. case FB_BLANK_VSYNC_SUSPEND:
  284. case FB_BLANK_HSYNC_SUSPEND:
  285. break;
  286. case FB_BLANK_POWERDOWN:
  287. lcd_enable(par, 0);
  288. crt_enable(par, 0);
  289. break;
  290. default:
  291. return -EINVAL;
  292. }
  293. /* let fbcon do a soft blank for us */
  294. return ((blank_mode == FB_BLANK_NORMAL) ? 1 : 0);
  295. }
  296. /**
  297. * s1d13xxxfb_pan_display - Pans the display.
  298. * @var: frame buffer variable screen structure
  299. * @info: frame buffer structure that represents a single frame buffer
  300. *
  301. * Pan (or wrap, depending on the `vmode' field) the display using the
  302. * `yoffset' field of the `var' structure (`xoffset' not yet supported).
  303. * If the values don't fit, return -EINVAL.
  304. *
  305. * Returns negative errno on error, or zero on success.
  306. */
  307. static int
  308. s1d13xxxfb_pan_display(struct fb_var_screeninfo *var, struct fb_info *info)
  309. {
  310. struct s1d13xxxfb_par *par = info->par;
  311. u32 start;
  312. if (var->xoffset != 0) /* not yet ... */
  313. return -EINVAL;
  314. if (var->yoffset + info->var.yres > info->var.yres_virtual)
  315. return -EINVAL;
  316. start = (info->fix.line_length >> 1) * var->yoffset;
  317. if ((par->display & 0x01)) {
  318. /* LCD */
  319. s1d13xxxfb_writereg(par, S1DREG_LCD_DISP_START0, (start & 0xff));
  320. s1d13xxxfb_writereg(par, S1DREG_LCD_DISP_START1, ((start >> 8) & 0xff));
  321. s1d13xxxfb_writereg(par, S1DREG_LCD_DISP_START2, ((start >> 16) & 0x0f));
  322. } else {
  323. /* CRT */
  324. s1d13xxxfb_writereg(par, S1DREG_CRT_DISP_START0, (start & 0xff));
  325. s1d13xxxfb_writereg(par, S1DREG_CRT_DISP_START1, ((start >> 8) & 0xff));
  326. s1d13xxxfb_writereg(par, S1DREG_CRT_DISP_START2, ((start >> 16) & 0x0f));
  327. }
  328. return 0;
  329. }
  330. /* framebuffer information structures */
  331. static struct fb_ops s1d13xxxfb_fbops = {
  332. .owner = THIS_MODULE,
  333. .fb_set_par = s1d13xxxfb_set_par,
  334. .fb_setcolreg = s1d13xxxfb_setcolreg,
  335. .fb_blank = s1d13xxxfb_blank,
  336. .fb_pan_display = s1d13xxxfb_pan_display,
  337. /* to be replaced by any acceleration we can */
  338. .fb_fillrect = cfb_fillrect,
  339. .fb_copyarea = cfb_copyarea,
  340. .fb_imageblit = cfb_imageblit,
  341. };
  342. static int s1d13xxxfb_width_tab[2][4] __devinitdata = {
  343. {4, 8, 16, -1},
  344. {9, 12, 18, -1},
  345. };
  346. /**
  347. * s1d13xxxfb_fetch_hw_state - Configure the framebuffer according to
  348. * hardware setup.
  349. * @info: frame buffer structure
  350. *
  351. * We setup the framebuffer structures according to the current
  352. * hardware setup. On some machines, the BIOS will have filled
  353. * the chip registers with such info, on others, these values will
  354. * have been written in some init procedure. In any case, the
  355. * software values needs to match the hardware ones. This is what
  356. * this function ensures.
  357. *
  358. * Note: some of the hardcoded values here might need some love to
  359. * work on various chips, and might need to no longer be hardcoded.
  360. */
  361. static void __devinit
  362. s1d13xxxfb_fetch_hw_state(struct fb_info *info)
  363. {
  364. struct fb_var_screeninfo *var = &info->var;
  365. struct fb_fix_screeninfo *fix = &info->fix;
  366. struct s1d13xxxfb_par *par = info->par;
  367. u8 panel, display;
  368. u16 offset;
  369. u32 xres, yres;
  370. u32 xres_virtual, yres_virtual;
  371. int bpp, lcd_bpp;
  372. int is_color, is_dual, is_tft;
  373. int lcd_enabled, crt_enabled;
  374. fix->type = FB_TYPE_PACKED_PIXELS;
  375. /* general info */
  376. par->display = s1d13xxxfb_readreg(par, S1DREG_COM_DISP_MODE);
  377. crt_enabled = (par->display & 0x02) != 0;
  378. lcd_enabled = (par->display & 0x01) != 0;
  379. if (lcd_enabled && crt_enabled)
  380. printk(KERN_WARNING PFX "Warning: LCD and CRT detected, using LCD\n");
  381. if (lcd_enabled)
  382. display = s1d13xxxfb_readreg(par, S1DREG_LCD_DISP_MODE);
  383. else /* CRT */
  384. display = s1d13xxxfb_readreg(par, S1DREG_CRT_DISP_MODE);
  385. bpp = display & 0x07;
  386. switch (bpp) {
  387. case 2: /* 4 bpp */
  388. case 3: /* 8 bpp */
  389. var->bits_per_pixel = 8;
  390. var->red.offset = var->green.offset = var->blue.offset = 0;
  391. var->red.length = var->green.length = var->blue.length = 8;
  392. break;
  393. case 5: /* 16 bpp */
  394. s1d13xxxfb_setup_truecolour(info);
  395. break;
  396. default:
  397. dbg("bpp: %i\n", bpp);
  398. }
  399. fb_alloc_cmap(&info->cmap, 256, 0);
  400. /* LCD info */
  401. panel = s1d13xxxfb_readreg(par, S1DREG_PANEL_TYPE);
  402. is_color = (panel & 0x04) != 0;
  403. is_dual = (panel & 0x02) != 0;
  404. is_tft = (panel & 0x01) != 0;
  405. lcd_bpp = s1d13xxxfb_width_tab[is_tft][(panel >> 4) & 3];
  406. if (lcd_enabled) {
  407. xres = (s1d13xxxfb_readreg(par, S1DREG_LCD_DISP_HWIDTH) + 1) * 8;
  408. yres = (s1d13xxxfb_readreg(par, S1DREG_LCD_DISP_VHEIGHT0) +
  409. ((s1d13xxxfb_readreg(par, S1DREG_LCD_DISP_VHEIGHT1) & 0x03) << 8) + 1);
  410. offset = (s1d13xxxfb_readreg(par, S1DREG_LCD_MEM_OFF0) +
  411. ((s1d13xxxfb_readreg(par, S1DREG_LCD_MEM_OFF1) & 0x7) << 8));
  412. } else { /* crt */
  413. xres = (s1d13xxxfb_readreg(par, S1DREG_CRT_DISP_HWIDTH) + 1) * 8;
  414. yres = (s1d13xxxfb_readreg(par, S1DREG_CRT_DISP_VHEIGHT0) +
  415. ((s1d13xxxfb_readreg(par, S1DREG_CRT_DISP_VHEIGHT1) & 0x03) << 8) + 1);
  416. offset = (s1d13xxxfb_readreg(par, S1DREG_CRT_MEM_OFF0) +
  417. ((s1d13xxxfb_readreg(par, S1DREG_CRT_MEM_OFF1) & 0x7) << 8));
  418. }
  419. xres_virtual = offset * 16 / var->bits_per_pixel;
  420. yres_virtual = fix->smem_len / (offset * 2);
  421. var->xres = xres;
  422. var->yres = yres;
  423. var->xres_virtual = xres_virtual;
  424. var->yres_virtual = yres_virtual;
  425. var->xoffset = var->yoffset = 0;
  426. fix->line_length = offset * 2;
  427. var->grayscale = !is_color;
  428. var->activate = FB_ACTIVATE_NOW;
  429. dbg(PFX "bpp=%d, lcd_bpp=%d, "
  430. "crt_enabled=%d, lcd_enabled=%d\n",
  431. var->bits_per_pixel, lcd_bpp, crt_enabled, lcd_enabled);
  432. dbg(PFX "xres=%d, yres=%d, vxres=%d, vyres=%d "
  433. "is_color=%d, is_dual=%d, is_tft=%d\n",
  434. xres, yres, xres_virtual, yres_virtual, is_color, is_dual, is_tft);
  435. }
  436. static int
  437. s1d13xxxfb_remove(struct platform_device *pdev)
  438. {
  439. struct fb_info *info = platform_get_drvdata(pdev);
  440. struct s1d13xxxfb_par *par = NULL;
  441. if (info) {
  442. par = info->par;
  443. if (par && par->regs) {
  444. /* disable output & enable powersave */
  445. s1d13xxxfb_writereg(par, S1DREG_COM_DISP_MODE, 0x00);
  446. s1d13xxxfb_writereg(par, S1DREG_PS_CNF, 0x11);
  447. iounmap(par->regs);
  448. }
  449. fb_dealloc_cmap(&info->cmap);
  450. if (info->screen_base)
  451. iounmap(info->screen_base);
  452. framebuffer_release(info);
  453. }
  454. release_mem_region(pdev->resource[0].start,
  455. pdev->resource[0].end - pdev->resource[0].start +1);
  456. release_mem_region(pdev->resource[1].start,
  457. pdev->resource[1].end - pdev->resource[1].start +1);
  458. return 0;
  459. }
  460. static int __devinit
  461. s1d13xxxfb_probe(struct platform_device *pdev)
  462. {
  463. struct s1d13xxxfb_par *default_par;
  464. struct fb_info *info;
  465. struct s1d13xxxfb_pdata *pdata = NULL;
  466. int ret = 0;
  467. int i;
  468. u8 revision, prod_id;
  469. dbg("probe called: device is %p\n", pdev);
  470. printk(KERN_INFO "Epson S1D13XXX FB Driver\n");
  471. /* enable platform-dependent hardware glue, if any */
  472. if (pdev->dev.platform_data)
  473. pdata = pdev->dev.platform_data;
  474. if (pdata && pdata->platform_init_video)
  475. pdata->platform_init_video();
  476. if (pdev->num_resources != 2) {
  477. dev_err(&pdev->dev, "invalid num_resources: %i\n",
  478. pdev->num_resources);
  479. ret = -ENODEV;
  480. goto bail;
  481. }
  482. /* resource[0] is VRAM, resource[1] is registers */
  483. if (pdev->resource[0].flags != IORESOURCE_MEM
  484. || pdev->resource[1].flags != IORESOURCE_MEM) {
  485. dev_err(&pdev->dev, "invalid resource type\n");
  486. ret = -ENODEV;
  487. goto bail;
  488. }
  489. if (!request_mem_region(pdev->resource[0].start,
  490. pdev->resource[0].end - pdev->resource[0].start +1, "s1d13xxxfb mem")) {
  491. dev_dbg(&pdev->dev, "request_mem_region failed\n");
  492. ret = -EBUSY;
  493. goto bail;
  494. }
  495. if (!request_mem_region(pdev->resource[1].start,
  496. pdev->resource[1].end - pdev->resource[1].start +1, "s1d13xxxfb regs")) {
  497. dev_dbg(&pdev->dev, "request_mem_region failed\n");
  498. ret = -EBUSY;
  499. goto bail;
  500. }
  501. info = framebuffer_alloc(sizeof(struct s1d13xxxfb_par) + sizeof(u32) * 256, &pdev->dev);
  502. if (!info) {
  503. ret = -ENOMEM;
  504. goto bail;
  505. }
  506. platform_set_drvdata(pdev, info);
  507. default_par = info->par;
  508. default_par->regs = ioremap_nocache(pdev->resource[1].start,
  509. pdev->resource[1].end - pdev->resource[1].start +1);
  510. if (!default_par->regs) {
  511. printk(KERN_ERR PFX "unable to map registers\n");
  512. ret = -ENOMEM;
  513. goto bail;
  514. }
  515. info->pseudo_palette = default_par->pseudo_palette;
  516. info->screen_base = ioremap_nocache(pdev->resource[0].start,
  517. pdev->resource[0].end - pdev->resource[0].start +1);
  518. if (!info->screen_base) {
  519. printk(KERN_ERR PFX "unable to map framebuffer\n");
  520. ret = -ENOMEM;
  521. goto bail;
  522. }
  523. /* production id is top 6 bits */
  524. prod_id = s1d13xxxfb_readreg(default_par, S1DREG_REV_CODE) >> 2;
  525. /* revision id is lower 2 bits */
  526. revision = s1d13xxxfb_readreg(default_par, S1DREG_REV_CODE) & 0x3;
  527. ret = -ENODEV;
  528. for (i = 0; i < ARRAY_SIZE(s1d13xxxfb_prod_ids); i++) {
  529. if (prod_id == s1d13xxxfb_prod_ids[i]) {
  530. /* looks like we got it in our list */
  531. default_par->prod_id = prod_id;
  532. default_par->revision = revision;
  533. ret = 0;
  534. break;
  535. }
  536. }
  537. if (!ret) {
  538. printk(KERN_INFO PFX "chip production id %i = %s\n",
  539. prod_id, s1d13xxxfb_prod_names[i]);
  540. printk(KERN_INFO PFX "chip revision %i\n", revision);
  541. } else {
  542. printk(KERN_INFO PFX
  543. "unknown chip production id %i, revision %i\n",
  544. prod_id, revision);
  545. printk(KERN_INFO PFX "please contant maintainer\n");
  546. goto bail;
  547. }
  548. info->fix = s1d13xxxfb_fix;
  549. info->fix.mmio_start = pdev->resource[1].start;
  550. info->fix.mmio_len = pdev->resource[1].end - pdev->resource[1].start +1;
  551. info->fix.smem_start = pdev->resource[0].start;
  552. info->fix.smem_len = pdev->resource[0].end - pdev->resource[0].start +1;
  553. printk(KERN_INFO PFX "regs mapped at 0x%p, fb %d KiB mapped at 0x%p\n",
  554. default_par->regs, info->fix.smem_len / 1024, info->screen_base);
  555. info->par = default_par;
  556. info->fbops = &s1d13xxxfb_fbops;
  557. info->flags = FBINFO_DEFAULT | FBINFO_HWACCEL_YPAN;
  558. /* perform "manual" chip initialization, if needed */
  559. if (pdata && pdata->initregs)
  560. s1d13xxxfb_runinit(info->par, pdata->initregs, pdata->initregssize);
  561. s1d13xxxfb_fetch_hw_state(info);
  562. if (register_framebuffer(info) < 0) {
  563. ret = -EINVAL;
  564. goto bail;
  565. }
  566. printk(KERN_INFO "fb%d: %s frame buffer device\n",
  567. info->node, info->fix.id);
  568. return 0;
  569. bail:
  570. s1d13xxxfb_remove(pdev);
  571. return ret;
  572. }
  573. #ifdef CONFIG_PM
  574. static int s1d13xxxfb_suspend(struct platform_device *dev, pm_message_t state)
  575. {
  576. struct fb_info *info = platform_get_drvdata(dev);
  577. struct s1d13xxxfb_par *s1dfb = info->par;
  578. struct s1d13xxxfb_pdata *pdata = NULL;
  579. /* disable display */
  580. lcd_enable(s1dfb, 0);
  581. crt_enable(s1dfb, 0);
  582. if (dev->dev.platform_data)
  583. pdata = dev->dev.platform_data;
  584. #if 0
  585. if (!s1dfb->disp_save)
  586. s1dfb->disp_save = kmalloc(info->fix.smem_len, GFP_KERNEL);
  587. if (!s1dfb->disp_save) {
  588. printk(KERN_ERR PFX "no memory to save screen");
  589. return -ENOMEM;
  590. }
  591. memcpy_fromio(s1dfb->disp_save, info->screen_base, info->fix.smem_len);
  592. #else
  593. s1dfb->disp_save = NULL;
  594. #endif
  595. if (!s1dfb->regs_save)
  596. s1dfb->regs_save = kmalloc(info->fix.mmio_len, GFP_KERNEL);
  597. if (!s1dfb->regs_save) {
  598. printk(KERN_ERR PFX "no memory to save registers");
  599. return -ENOMEM;
  600. }
  601. /* backup all registers */
  602. memcpy_fromio(s1dfb->regs_save, s1dfb->regs, info->fix.mmio_len);
  603. /* now activate power save mode */
  604. s1d13xxxfb_writereg(s1dfb, S1DREG_PS_CNF, 0x11);
  605. if (pdata && pdata->platform_suspend_video)
  606. return pdata->platform_suspend_video();
  607. else
  608. return 0;
  609. }
  610. static int s1d13xxxfb_resume(struct platform_device *dev)
  611. {
  612. struct fb_info *info = platform_get_drvdata(dev);
  613. struct s1d13xxxfb_par *s1dfb = info->par;
  614. struct s1d13xxxfb_pdata *pdata = NULL;
  615. /* awaken the chip */
  616. s1d13xxxfb_writereg(s1dfb, S1DREG_PS_CNF, 0x10);
  617. /* do not let go until SDRAM "wakes up" */
  618. while ((s1d13xxxfb_readreg(s1dfb, S1DREG_PS_STATUS) & 0x01))
  619. udelay(10);
  620. if (dev->dev.platform_data)
  621. pdata = dev->dev.platform_data;
  622. if (s1dfb->regs_save) {
  623. /* will write RO regs, *should* get away with it :) */
  624. memcpy_toio(s1dfb->regs, s1dfb->regs_save, info->fix.mmio_len);
  625. kfree(s1dfb->regs_save);
  626. }
  627. if (s1dfb->disp_save) {
  628. memcpy_toio(info->screen_base, s1dfb->disp_save,
  629. info->fix.smem_len);
  630. kfree(s1dfb->disp_save); /* XXX kmalloc()'d when? */
  631. }
  632. if ((s1dfb->display & 0x01) != 0)
  633. lcd_enable(s1dfb, 1);
  634. if ((s1dfb->display & 0x02) != 0)
  635. crt_enable(s1dfb, 1);
  636. if (pdata && pdata->platform_resume_video)
  637. return pdata->platform_resume_video();
  638. else
  639. return 0;
  640. }
  641. #endif /* CONFIG_PM */
  642. static struct platform_driver s1d13xxxfb_driver = {
  643. .probe = s1d13xxxfb_probe,
  644. .remove = s1d13xxxfb_remove,
  645. #ifdef CONFIG_PM
  646. .suspend = s1d13xxxfb_suspend,
  647. .resume = s1d13xxxfb_resume,
  648. #endif
  649. .driver = {
  650. .name = S1D_DEVICENAME,
  651. },
  652. };
  653. static int __init
  654. s1d13xxxfb_init(void)
  655. {
  656. #ifndef MODULE
  657. if (fb_get_options("s1d13xxxfb", NULL))
  658. return -ENODEV;
  659. #endif
  660. return platform_driver_register(&s1d13xxxfb_driver);
  661. }
  662. static void __exit
  663. s1d13xxxfb_exit(void)
  664. {
  665. platform_driver_unregister(&s1d13xxxfb_driver);
  666. }
  667. module_init(s1d13xxxfb_init);
  668. module_exit(s1d13xxxfb_exit);
  669. MODULE_LICENSE("GPL");
  670. MODULE_DESCRIPTION("Framebuffer driver for S1D13xxx devices");
  671. MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>, Thibaut VARENE <varenet@parisc-linux.org>");