fsl-diu-fb.c 44 KB

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  1. /*
  2. * Copyright 2008 Freescale Semiconductor, Inc. All Rights Reserved.
  3. *
  4. * Freescale DIU Frame Buffer device driver
  5. *
  6. * Authors: Hongjun Chen <hong-jun.chen@freescale.com>
  7. * Paul Widmer <paul.widmer@freescale.com>
  8. * Srikanth Srinivasan <srikanth.srinivasan@freescale.com>
  9. * York Sun <yorksun@freescale.com>
  10. *
  11. * Based on imxfb.c Copyright (C) 2004 S.Hauer, Pengutronix
  12. *
  13. * This program is free software; you can redistribute it and/or modify it
  14. * under the terms of the GNU General Public License as published by the
  15. * Free Software Foundation; either version 2 of the License, or (at your
  16. * option) any later version.
  17. *
  18. */
  19. #include <linux/module.h>
  20. #include <linux/kernel.h>
  21. #include <linux/errno.h>
  22. #include <linux/string.h>
  23. #include <linux/slab.h>
  24. #include <linux/fb.h>
  25. #include <linux/init.h>
  26. #include <linux/dma-mapping.h>
  27. #include <linux/platform_device.h>
  28. #include <linux/interrupt.h>
  29. #include <linux/clk.h>
  30. #include <linux/uaccess.h>
  31. #include <linux/vmalloc.h>
  32. #include <linux/of_platform.h>
  33. #include <sysdev/fsl_soc.h>
  34. #include "fsl-diu-fb.h"
  35. /*
  36. * These parameters give default parameters
  37. * for video output 1024x768,
  38. * FIXME - change timing to proper amounts
  39. * hsync 31.5kHz, vsync 60Hz
  40. */
  41. static struct fb_videomode __devinitdata fsl_diu_default_mode = {
  42. .refresh = 60,
  43. .xres = 1024,
  44. .yres = 768,
  45. .pixclock = 15385,
  46. .left_margin = 160,
  47. .right_margin = 24,
  48. .upper_margin = 29,
  49. .lower_margin = 3,
  50. .hsync_len = 136,
  51. .vsync_len = 6,
  52. .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
  53. .vmode = FB_VMODE_NONINTERLACED
  54. };
  55. static struct fb_videomode __devinitdata fsl_diu_mode_db[] = {
  56. {
  57. .name = "1024x768-60",
  58. .refresh = 60,
  59. .xres = 1024,
  60. .yres = 768,
  61. .pixclock = 15385,
  62. .left_margin = 160,
  63. .right_margin = 24,
  64. .upper_margin = 29,
  65. .lower_margin = 3,
  66. .hsync_len = 136,
  67. .vsync_len = 6,
  68. .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
  69. .vmode = FB_VMODE_NONINTERLACED
  70. },
  71. {
  72. .name = "1024x768-70",
  73. .refresh = 70,
  74. .xres = 1024,
  75. .yres = 768,
  76. .pixclock = 16886,
  77. .left_margin = 3,
  78. .right_margin = 3,
  79. .upper_margin = 2,
  80. .lower_margin = 2,
  81. .hsync_len = 40,
  82. .vsync_len = 18,
  83. .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
  84. .vmode = FB_VMODE_NONINTERLACED
  85. },
  86. {
  87. .name = "1024x768-75",
  88. .refresh = 75,
  89. .xres = 1024,
  90. .yres = 768,
  91. .pixclock = 15009,
  92. .left_margin = 3,
  93. .right_margin = 3,
  94. .upper_margin = 2,
  95. .lower_margin = 2,
  96. .hsync_len = 80,
  97. .vsync_len = 32,
  98. .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
  99. .vmode = FB_VMODE_NONINTERLACED
  100. },
  101. {
  102. .name = "1280x1024-60",
  103. .refresh = 60,
  104. .xres = 1280,
  105. .yres = 1024,
  106. .pixclock = 9375,
  107. .left_margin = 38,
  108. .right_margin = 128,
  109. .upper_margin = 2,
  110. .lower_margin = 7,
  111. .hsync_len = 216,
  112. .vsync_len = 37,
  113. .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
  114. .vmode = FB_VMODE_NONINTERLACED
  115. },
  116. {
  117. .name = "1280x1024-70",
  118. .refresh = 70,
  119. .xres = 1280,
  120. .yres = 1024,
  121. .pixclock = 9380,
  122. .left_margin = 6,
  123. .right_margin = 6,
  124. .upper_margin = 4,
  125. .lower_margin = 4,
  126. .hsync_len = 60,
  127. .vsync_len = 94,
  128. .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
  129. .vmode = FB_VMODE_NONINTERLACED
  130. },
  131. {
  132. .name = "1280x1024-75",
  133. .refresh = 75,
  134. .xres = 1280,
  135. .yres = 1024,
  136. .pixclock = 9380,
  137. .left_margin = 6,
  138. .right_margin = 6,
  139. .upper_margin = 4,
  140. .lower_margin = 4,
  141. .hsync_len = 60,
  142. .vsync_len = 15,
  143. .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
  144. .vmode = FB_VMODE_NONINTERLACED
  145. },
  146. {
  147. .name = "320x240", /* for AOI only */
  148. .refresh = 60,
  149. .xres = 320,
  150. .yres = 240,
  151. .pixclock = 15385,
  152. .left_margin = 0,
  153. .right_margin = 0,
  154. .upper_margin = 0,
  155. .lower_margin = 0,
  156. .hsync_len = 0,
  157. .vsync_len = 0,
  158. .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
  159. .vmode = FB_VMODE_NONINTERLACED
  160. },
  161. {
  162. .name = "1280x480-60",
  163. .refresh = 60,
  164. .xres = 1280,
  165. .yres = 480,
  166. .pixclock = 18939,
  167. .left_margin = 353,
  168. .right_margin = 47,
  169. .upper_margin = 39,
  170. .lower_margin = 4,
  171. .hsync_len = 8,
  172. .vsync_len = 2,
  173. .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
  174. .vmode = FB_VMODE_NONINTERLACED
  175. },
  176. };
  177. static char *fb_mode = "1024x768-32@60";
  178. static unsigned long default_bpp = 32;
  179. static int monitor_port;
  180. #if defined(CONFIG_NOT_COHERENT_CACHE)
  181. static u8 *coherence_data;
  182. static size_t coherence_data_size;
  183. static unsigned int d_cache_line_size;
  184. #endif
  185. static DEFINE_SPINLOCK(diu_lock);
  186. struct fsl_diu_data {
  187. struct fb_info *fsl_diu_info[FSL_AOI_NUM - 1];
  188. /*FSL_AOI_NUM has one dummy AOI */
  189. struct device_attribute dev_attr;
  190. struct diu_ad *dummy_ad;
  191. void *dummy_aoi_virt;
  192. unsigned int irq;
  193. int fb_enabled;
  194. int monitor_port;
  195. };
  196. struct mfb_info {
  197. int index;
  198. int type;
  199. char *id;
  200. int registered;
  201. int blank;
  202. unsigned long pseudo_palette[16];
  203. struct diu_ad *ad;
  204. int cursor_reset;
  205. unsigned char g_alpha;
  206. unsigned int count;
  207. int x_aoi_d; /* aoi display x offset to physical screen */
  208. int y_aoi_d; /* aoi display y offset to physical screen */
  209. struct fsl_diu_data *parent;
  210. };
  211. static struct mfb_info mfb_template[] = {
  212. { /* AOI 0 for plane 0 */
  213. .index = 0,
  214. .type = MFB_TYPE_OUTPUT,
  215. .id = "Panel0",
  216. .registered = 0,
  217. .count = 0,
  218. .x_aoi_d = 0,
  219. .y_aoi_d = 0,
  220. },
  221. { /* AOI 0 for plane 1 */
  222. .index = 1,
  223. .type = MFB_TYPE_OUTPUT,
  224. .id = "Panel1 AOI0",
  225. .registered = 0,
  226. .g_alpha = 0xff,
  227. .count = 0,
  228. .x_aoi_d = 0,
  229. .y_aoi_d = 0,
  230. },
  231. { /* AOI 1 for plane 1 */
  232. .index = 2,
  233. .type = MFB_TYPE_OUTPUT,
  234. .id = "Panel1 AOI1",
  235. .registered = 0,
  236. .g_alpha = 0xff,
  237. .count = 0,
  238. .x_aoi_d = 0,
  239. .y_aoi_d = 480,
  240. },
  241. { /* AOI 0 for plane 2 */
  242. .index = 3,
  243. .type = MFB_TYPE_OUTPUT,
  244. .id = "Panel2 AOI0",
  245. .registered = 0,
  246. .g_alpha = 0xff,
  247. .count = 0,
  248. .x_aoi_d = 640,
  249. .y_aoi_d = 0,
  250. },
  251. { /* AOI 1 for plane 2 */
  252. .index = 4,
  253. .type = MFB_TYPE_OUTPUT,
  254. .id = "Panel2 AOI1",
  255. .registered = 0,
  256. .g_alpha = 0xff,
  257. .count = 0,
  258. .x_aoi_d = 640,
  259. .y_aoi_d = 480,
  260. },
  261. };
  262. static struct diu_hw dr = {
  263. .mode = MFB_MODE1,
  264. .reg_lock = __SPIN_LOCK_UNLOCKED(diu_hw.reg_lock),
  265. };
  266. static struct diu_pool pool;
  267. /**
  268. * fsl_diu_alloc - allocate memory for the DIU
  269. * @size: number of bytes to allocate
  270. * @param: returned physical address of memory
  271. *
  272. * This function allocates a physically-contiguous block of memory.
  273. */
  274. static void *fsl_diu_alloc(size_t size, phys_addr_t *phys)
  275. {
  276. void *virt;
  277. pr_debug("size=%zu\n", size);
  278. virt = alloc_pages_exact(size, GFP_DMA | __GFP_ZERO);
  279. if (virt) {
  280. *phys = virt_to_phys(virt);
  281. pr_debug("virt=%p phys=%llx\n", virt,
  282. (unsigned long long)*phys);
  283. }
  284. return virt;
  285. }
  286. /**
  287. * fsl_diu_free - release DIU memory
  288. * @virt: pointer returned by fsl_diu_alloc()
  289. * @size: number of bytes allocated by fsl_diu_alloc()
  290. *
  291. * This function releases memory allocated by fsl_diu_alloc().
  292. */
  293. static void fsl_diu_free(void *virt, size_t size)
  294. {
  295. pr_debug("virt=%p size=%zu\n", virt, size);
  296. if (virt && size)
  297. free_pages_exact(virt, size);
  298. }
  299. static int fsl_diu_enable_panel(struct fb_info *info)
  300. {
  301. struct mfb_info *pmfbi, *cmfbi, *mfbi = info->par;
  302. struct diu *hw = dr.diu_reg;
  303. struct diu_ad *ad = mfbi->ad;
  304. struct fsl_diu_data *machine_data = mfbi->parent;
  305. int res = 0;
  306. pr_debug("enable_panel index %d\n", mfbi->index);
  307. if (mfbi->type != MFB_TYPE_OFF) {
  308. switch (mfbi->index) {
  309. case 0: /* plane 0 */
  310. if (hw->desc[0] != ad->paddr)
  311. out_be32(&hw->desc[0], ad->paddr);
  312. break;
  313. case 1: /* plane 1 AOI 0 */
  314. cmfbi = machine_data->fsl_diu_info[2]->par;
  315. if (hw->desc[1] != ad->paddr) { /* AOI0 closed */
  316. if (cmfbi->count > 0) /* AOI1 open */
  317. ad->next_ad =
  318. cpu_to_le32(cmfbi->ad->paddr);
  319. else
  320. ad->next_ad = 0;
  321. out_be32(&hw->desc[1], ad->paddr);
  322. }
  323. break;
  324. case 3: /* plane 2 AOI 0 */
  325. cmfbi = machine_data->fsl_diu_info[4]->par;
  326. if (hw->desc[2] != ad->paddr) { /* AOI0 closed */
  327. if (cmfbi->count > 0) /* AOI1 open */
  328. ad->next_ad =
  329. cpu_to_le32(cmfbi->ad->paddr);
  330. else
  331. ad->next_ad = 0;
  332. out_be32(&hw->desc[2], ad->paddr);
  333. }
  334. break;
  335. case 2: /* plane 1 AOI 1 */
  336. pmfbi = machine_data->fsl_diu_info[1]->par;
  337. ad->next_ad = 0;
  338. if (hw->desc[1] == machine_data->dummy_ad->paddr)
  339. out_be32(&hw->desc[1], ad->paddr);
  340. else /* AOI0 open */
  341. pmfbi->ad->next_ad = cpu_to_le32(ad->paddr);
  342. break;
  343. case 4: /* plane 2 AOI 1 */
  344. pmfbi = machine_data->fsl_diu_info[3]->par;
  345. ad->next_ad = 0;
  346. if (hw->desc[2] == machine_data->dummy_ad->paddr)
  347. out_be32(&hw->desc[2], ad->paddr);
  348. else /* AOI0 was open */
  349. pmfbi->ad->next_ad = cpu_to_le32(ad->paddr);
  350. break;
  351. default:
  352. res = -EINVAL;
  353. break;
  354. }
  355. } else
  356. res = -EINVAL;
  357. return res;
  358. }
  359. static int fsl_diu_disable_panel(struct fb_info *info)
  360. {
  361. struct mfb_info *pmfbi, *cmfbi, *mfbi = info->par;
  362. struct diu *hw = dr.diu_reg;
  363. struct diu_ad *ad = mfbi->ad;
  364. struct fsl_diu_data *machine_data = mfbi->parent;
  365. int res = 0;
  366. switch (mfbi->index) {
  367. case 0: /* plane 0 */
  368. if (hw->desc[0] != machine_data->dummy_ad->paddr)
  369. out_be32(&hw->desc[0],
  370. machine_data->dummy_ad->paddr);
  371. break;
  372. case 1: /* plane 1 AOI 0 */
  373. cmfbi = machine_data->fsl_diu_info[2]->par;
  374. if (cmfbi->count > 0) /* AOI1 is open */
  375. out_be32(&hw->desc[1], cmfbi->ad->paddr);
  376. /* move AOI1 to the first */
  377. else /* AOI1 was closed */
  378. out_be32(&hw->desc[1],
  379. machine_data->dummy_ad->paddr);
  380. /* close AOI 0 */
  381. break;
  382. case 3: /* plane 2 AOI 0 */
  383. cmfbi = machine_data->fsl_diu_info[4]->par;
  384. if (cmfbi->count > 0) /* AOI1 is open */
  385. out_be32(&hw->desc[2], cmfbi->ad->paddr);
  386. /* move AOI1 to the first */
  387. else /* AOI1 was closed */
  388. out_be32(&hw->desc[2],
  389. machine_data->dummy_ad->paddr);
  390. /* close AOI 0 */
  391. break;
  392. case 2: /* plane 1 AOI 1 */
  393. pmfbi = machine_data->fsl_diu_info[1]->par;
  394. if (hw->desc[1] != ad->paddr) {
  395. /* AOI1 is not the first in the chain */
  396. if (pmfbi->count > 0)
  397. /* AOI0 is open, must be the first */
  398. pmfbi->ad->next_ad = 0;
  399. } else /* AOI1 is the first in the chain */
  400. out_be32(&hw->desc[1], machine_data->dummy_ad->paddr);
  401. /* close AOI 1 */
  402. break;
  403. case 4: /* plane 2 AOI 1 */
  404. pmfbi = machine_data->fsl_diu_info[3]->par;
  405. if (hw->desc[2] != ad->paddr) {
  406. /* AOI1 is not the first in the chain */
  407. if (pmfbi->count > 0)
  408. /* AOI0 is open, must be the first */
  409. pmfbi->ad->next_ad = 0;
  410. } else /* AOI1 is the first in the chain */
  411. out_be32(&hw->desc[2], machine_data->dummy_ad->paddr);
  412. /* close AOI 1 */
  413. break;
  414. default:
  415. res = -EINVAL;
  416. break;
  417. }
  418. return res;
  419. }
  420. static void enable_lcdc(struct fb_info *info)
  421. {
  422. struct diu *hw = dr.diu_reg;
  423. struct mfb_info *mfbi = info->par;
  424. struct fsl_diu_data *machine_data = mfbi->parent;
  425. if (!machine_data->fb_enabled) {
  426. out_be32(&hw->diu_mode, dr.mode);
  427. machine_data->fb_enabled++;
  428. }
  429. }
  430. static void disable_lcdc(struct fb_info *info)
  431. {
  432. struct diu *hw = dr.diu_reg;
  433. struct mfb_info *mfbi = info->par;
  434. struct fsl_diu_data *machine_data = mfbi->parent;
  435. if (machine_data->fb_enabled) {
  436. out_be32(&hw->diu_mode, 0);
  437. machine_data->fb_enabled = 0;
  438. }
  439. }
  440. static void adjust_aoi_size_position(struct fb_var_screeninfo *var,
  441. struct fb_info *info)
  442. {
  443. struct mfb_info *lower_aoi_mfbi, *upper_aoi_mfbi, *mfbi = info->par;
  444. struct fsl_diu_data *machine_data = mfbi->parent;
  445. int available_height, upper_aoi_bottom, index = mfbi->index;
  446. int lower_aoi_is_open, upper_aoi_is_open;
  447. __u32 base_plane_width, base_plane_height, upper_aoi_height;
  448. base_plane_width = machine_data->fsl_diu_info[0]->var.xres;
  449. base_plane_height = machine_data->fsl_diu_info[0]->var.yres;
  450. if (mfbi->x_aoi_d < 0)
  451. mfbi->x_aoi_d = 0;
  452. if (mfbi->y_aoi_d < 0)
  453. mfbi->y_aoi_d = 0;
  454. switch (index) {
  455. case 0:
  456. if (mfbi->x_aoi_d != 0)
  457. mfbi->x_aoi_d = 0;
  458. if (mfbi->y_aoi_d != 0)
  459. mfbi->y_aoi_d = 0;
  460. break;
  461. case 1: /* AOI 0 */
  462. case 3:
  463. lower_aoi_mfbi = machine_data->fsl_diu_info[index+1]->par;
  464. lower_aoi_is_open = lower_aoi_mfbi->count > 0 ? 1 : 0;
  465. if (var->xres > base_plane_width)
  466. var->xres = base_plane_width;
  467. if ((mfbi->x_aoi_d + var->xres) > base_plane_width)
  468. mfbi->x_aoi_d = base_plane_width - var->xres;
  469. if (lower_aoi_is_open)
  470. available_height = lower_aoi_mfbi->y_aoi_d;
  471. else
  472. available_height = base_plane_height;
  473. if (var->yres > available_height)
  474. var->yres = available_height;
  475. if ((mfbi->y_aoi_d + var->yres) > available_height)
  476. mfbi->y_aoi_d = available_height - var->yres;
  477. break;
  478. case 2: /* AOI 1 */
  479. case 4:
  480. upper_aoi_mfbi = machine_data->fsl_diu_info[index-1]->par;
  481. upper_aoi_height =
  482. machine_data->fsl_diu_info[index-1]->var.yres;
  483. upper_aoi_bottom = upper_aoi_mfbi->y_aoi_d + upper_aoi_height;
  484. upper_aoi_is_open = upper_aoi_mfbi->count > 0 ? 1 : 0;
  485. if (var->xres > base_plane_width)
  486. var->xres = base_plane_width;
  487. if ((mfbi->x_aoi_d + var->xres) > base_plane_width)
  488. mfbi->x_aoi_d = base_plane_width - var->xres;
  489. if (mfbi->y_aoi_d < 0)
  490. mfbi->y_aoi_d = 0;
  491. if (upper_aoi_is_open) {
  492. if (mfbi->y_aoi_d < upper_aoi_bottom)
  493. mfbi->y_aoi_d = upper_aoi_bottom;
  494. available_height = base_plane_height
  495. - upper_aoi_bottom;
  496. } else
  497. available_height = base_plane_height;
  498. if (var->yres > available_height)
  499. var->yres = available_height;
  500. if ((mfbi->y_aoi_d + var->yres) > base_plane_height)
  501. mfbi->y_aoi_d = base_plane_height - var->yres;
  502. break;
  503. }
  504. }
  505. /*
  506. * Checks to see if the hardware supports the state requested by var passed
  507. * in. This function does not alter the hardware state! If the var passed in
  508. * is slightly off by what the hardware can support then we alter the var
  509. * PASSED in to what we can do. If the hardware doesn't support mode change
  510. * a -EINVAL will be returned by the upper layers.
  511. */
  512. static int fsl_diu_check_var(struct fb_var_screeninfo *var,
  513. struct fb_info *info)
  514. {
  515. unsigned long htotal, vtotal;
  516. pr_debug("check_var xres: %d\n", var->xres);
  517. pr_debug("check_var yres: %d\n", var->yres);
  518. if (var->xres_virtual < var->xres)
  519. var->xres_virtual = var->xres;
  520. if (var->yres_virtual < var->yres)
  521. var->yres_virtual = var->yres;
  522. if (var->xoffset < 0)
  523. var->xoffset = 0;
  524. if (var->yoffset < 0)
  525. var->yoffset = 0;
  526. if (var->xoffset + info->var.xres > info->var.xres_virtual)
  527. var->xoffset = info->var.xres_virtual - info->var.xres;
  528. if (var->yoffset + info->var.yres > info->var.yres_virtual)
  529. var->yoffset = info->var.yres_virtual - info->var.yres;
  530. if ((var->bits_per_pixel != 32) && (var->bits_per_pixel != 24) &&
  531. (var->bits_per_pixel != 16))
  532. var->bits_per_pixel = default_bpp;
  533. switch (var->bits_per_pixel) {
  534. case 16:
  535. var->red.length = 5;
  536. var->red.offset = 11;
  537. var->red.msb_right = 0;
  538. var->green.length = 6;
  539. var->green.offset = 5;
  540. var->green.msb_right = 0;
  541. var->blue.length = 5;
  542. var->blue.offset = 0;
  543. var->blue.msb_right = 0;
  544. var->transp.length = 0;
  545. var->transp.offset = 0;
  546. var->transp.msb_right = 0;
  547. break;
  548. case 24:
  549. var->red.length = 8;
  550. var->red.offset = 0;
  551. var->red.msb_right = 0;
  552. var->green.length = 8;
  553. var->green.offset = 8;
  554. var->green.msb_right = 0;
  555. var->blue.length = 8;
  556. var->blue.offset = 16;
  557. var->blue.msb_right = 0;
  558. var->transp.length = 0;
  559. var->transp.offset = 0;
  560. var->transp.msb_right = 0;
  561. break;
  562. case 32:
  563. var->red.length = 8;
  564. var->red.offset = 16;
  565. var->red.msb_right = 0;
  566. var->green.length = 8;
  567. var->green.offset = 8;
  568. var->green.msb_right = 0;
  569. var->blue.length = 8;
  570. var->blue.offset = 0;
  571. var->blue.msb_right = 0;
  572. var->transp.length = 8;
  573. var->transp.offset = 24;
  574. var->transp.msb_right = 0;
  575. break;
  576. }
  577. /* If the pixclock is below the minimum spec'd value then set to
  578. * refresh rate for 60Hz since this is supported by most monitors.
  579. * Refer to Documentation/fb/ for calculations.
  580. */
  581. if ((var->pixclock < MIN_PIX_CLK) || (var->pixclock > MAX_PIX_CLK)) {
  582. htotal = var->xres + var->right_margin + var->hsync_len +
  583. var->left_margin;
  584. vtotal = var->yres + var->lower_margin + var->vsync_len +
  585. var->upper_margin;
  586. var->pixclock = (vtotal * htotal * 6UL) / 100UL;
  587. var->pixclock = KHZ2PICOS(var->pixclock);
  588. pr_debug("pixclock set for 60Hz refresh = %u ps\n",
  589. var->pixclock);
  590. }
  591. var->height = -1;
  592. var->width = -1;
  593. var->grayscale = 0;
  594. /* Copy nonstd field to/from sync for fbset usage */
  595. var->sync |= var->nonstd;
  596. var->nonstd |= var->sync;
  597. adjust_aoi_size_position(var, info);
  598. return 0;
  599. }
  600. static void set_fix(struct fb_info *info)
  601. {
  602. struct fb_fix_screeninfo *fix = &info->fix;
  603. struct fb_var_screeninfo *var = &info->var;
  604. struct mfb_info *mfbi = info->par;
  605. strncpy(fix->id, mfbi->id, strlen(mfbi->id));
  606. fix->line_length = var->xres_virtual * var->bits_per_pixel / 8;
  607. fix->type = FB_TYPE_PACKED_PIXELS;
  608. fix->accel = FB_ACCEL_NONE;
  609. fix->visual = FB_VISUAL_TRUECOLOR;
  610. fix->xpanstep = 1;
  611. fix->ypanstep = 1;
  612. }
  613. static void update_lcdc(struct fb_info *info)
  614. {
  615. struct fb_var_screeninfo *var = &info->var;
  616. struct mfb_info *mfbi = info->par;
  617. struct fsl_diu_data *machine_data = mfbi->parent;
  618. struct diu *hw;
  619. int i, j;
  620. char __iomem *cursor_base, *gamma_table_base;
  621. u32 temp;
  622. hw = dr.diu_reg;
  623. if (mfbi->type == MFB_TYPE_OFF) {
  624. fsl_diu_disable_panel(info);
  625. return;
  626. }
  627. diu_ops.set_monitor_port(machine_data->monitor_port);
  628. gamma_table_base = pool.gamma.vaddr;
  629. cursor_base = pool.cursor.vaddr;
  630. /* Prep for DIU init - gamma table, cursor table */
  631. for (i = 0; i <= 2; i++)
  632. for (j = 0; j <= 255; j++)
  633. *gamma_table_base++ = j;
  634. diu_ops.set_gamma_table(machine_data->monitor_port, pool.gamma.vaddr);
  635. pr_debug("update-lcdc: HW - %p\n Disabling DIU\n", hw);
  636. disable_lcdc(info);
  637. /* Program DIU registers */
  638. out_be32(&hw->gamma, pool.gamma.paddr);
  639. out_be32(&hw->cursor, pool.cursor.paddr);
  640. out_be32(&hw->bgnd, 0x007F7F7F); /* BGND */
  641. out_be32(&hw->bgnd_wb, 0); /* BGND_WB */
  642. out_be32(&hw->disp_size, (var->yres << 16 | var->xres));
  643. /* DISP SIZE */
  644. pr_debug("DIU xres: %d\n", var->xres);
  645. pr_debug("DIU yres: %d\n", var->yres);
  646. out_be32(&hw->wb_size, 0); /* WB SIZE */
  647. out_be32(&hw->wb_mem_addr, 0); /* WB MEM ADDR */
  648. /* Horizontal and vertical configuration register */
  649. temp = var->left_margin << 22 | /* BP_H */
  650. var->hsync_len << 11 | /* PW_H */
  651. var->right_margin; /* FP_H */
  652. out_be32(&hw->hsyn_para, temp);
  653. temp = var->upper_margin << 22 | /* BP_V */
  654. var->vsync_len << 11 | /* PW_V */
  655. var->lower_margin; /* FP_V */
  656. out_be32(&hw->vsyn_para, temp);
  657. pr_debug("DIU right_margin - %d\n", var->right_margin);
  658. pr_debug("DIU left_margin - %d\n", var->left_margin);
  659. pr_debug("DIU hsync_len - %d\n", var->hsync_len);
  660. pr_debug("DIU upper_margin - %d\n", var->upper_margin);
  661. pr_debug("DIU lower_margin - %d\n", var->lower_margin);
  662. pr_debug("DIU vsync_len - %d\n", var->vsync_len);
  663. pr_debug("DIU HSYNC - 0x%08x\n", hw->hsyn_para);
  664. pr_debug("DIU VSYNC - 0x%08x\n", hw->vsyn_para);
  665. diu_ops.set_pixel_clock(var->pixclock);
  666. out_be32(&hw->syn_pol, 0); /* SYNC SIGNALS POLARITY */
  667. out_be32(&hw->thresholds, 0x00037800); /* The Thresholds */
  668. out_be32(&hw->int_status, 0); /* INTERRUPT STATUS */
  669. out_be32(&hw->plut, 0x01F5F666);
  670. /* Enable the DIU */
  671. enable_lcdc(info);
  672. }
  673. static int map_video_memory(struct fb_info *info)
  674. {
  675. phys_addr_t phys;
  676. pr_debug("info->var.xres_virtual = %d\n", info->var.xres_virtual);
  677. pr_debug("info->var.yres_virtual = %d\n", info->var.yres_virtual);
  678. pr_debug("info->fix.line_length = %d\n", info->fix.line_length);
  679. info->fix.smem_len = info->fix.line_length * info->var.yres_virtual;
  680. pr_debug("MAP_VIDEO_MEMORY: smem_len = %d\n", info->fix.smem_len);
  681. info->screen_base = fsl_diu_alloc(info->fix.smem_len, &phys);
  682. if (info->screen_base == NULL) {
  683. printk(KERN_ERR "Unable to allocate fb memory\n");
  684. return -ENOMEM;
  685. }
  686. info->fix.smem_start = (unsigned long) phys;
  687. info->screen_size = info->fix.smem_len;
  688. pr_debug("Allocated fb @ paddr=0x%08lx, size=%d.\n",
  689. info->fix.smem_start,
  690. info->fix.smem_len);
  691. pr_debug("screen base %p\n", info->screen_base);
  692. return 0;
  693. }
  694. static void unmap_video_memory(struct fb_info *info)
  695. {
  696. fsl_diu_free(info->screen_base, info->fix.smem_len);
  697. info->screen_base = NULL;
  698. info->fix.smem_start = 0;
  699. info->fix.smem_len = 0;
  700. }
  701. /*
  702. * Using the fb_var_screeninfo in fb_info we set the aoi of this
  703. * particular framebuffer. It is a light version of fsl_diu_set_par.
  704. */
  705. static int fsl_diu_set_aoi(struct fb_info *info)
  706. {
  707. struct fb_var_screeninfo *var = &info->var;
  708. struct mfb_info *mfbi = info->par;
  709. struct diu_ad *ad = mfbi->ad;
  710. /* AOI should not be greater than display size */
  711. ad->offset_xyi = cpu_to_le32((var->yoffset << 16) | var->xoffset);
  712. ad->offset_xyd = cpu_to_le32((mfbi->y_aoi_d << 16) | mfbi->x_aoi_d);
  713. return 0;
  714. }
  715. /*
  716. * Using the fb_var_screeninfo in fb_info we set the resolution of this
  717. * particular framebuffer. This function alters the fb_fix_screeninfo stored
  718. * in fb_info. It does not alter var in fb_info since we are using that
  719. * data. This means we depend on the data in var inside fb_info to be
  720. * supported by the hardware. fsl_diu_check_var is always called before
  721. * fsl_diu_set_par to ensure this.
  722. */
  723. static int fsl_diu_set_par(struct fb_info *info)
  724. {
  725. unsigned long len;
  726. struct fb_var_screeninfo *var = &info->var;
  727. struct mfb_info *mfbi = info->par;
  728. struct fsl_diu_data *machine_data = mfbi->parent;
  729. struct diu_ad *ad = mfbi->ad;
  730. struct diu *hw;
  731. hw = dr.diu_reg;
  732. set_fix(info);
  733. mfbi->cursor_reset = 1;
  734. len = info->var.yres_virtual * info->fix.line_length;
  735. /* Alloc & dealloc each time resolution/bpp change */
  736. if (len != info->fix.smem_len) {
  737. if (info->fix.smem_start)
  738. unmap_video_memory(info);
  739. pr_debug("SET PAR: smem_len = %d\n", info->fix.smem_len);
  740. /* Memory allocation for framebuffer */
  741. if (map_video_memory(info)) {
  742. printk(KERN_ERR "Unable to allocate fb memory 1\n");
  743. return -ENOMEM;
  744. }
  745. }
  746. ad->pix_fmt =
  747. diu_ops.get_pixel_format(var->bits_per_pixel,
  748. machine_data->monitor_port);
  749. ad->addr = cpu_to_le32(info->fix.smem_start);
  750. ad->src_size_g_alpha = cpu_to_le32((var->yres_virtual << 12) |
  751. var->xres_virtual) | mfbi->g_alpha;
  752. /* AOI should not be greater than display size */
  753. ad->aoi_size = cpu_to_le32((var->yres << 16) | var->xres);
  754. ad->offset_xyi = cpu_to_le32((var->yoffset << 16) | var->xoffset);
  755. ad->offset_xyd = cpu_to_le32((mfbi->y_aoi_d << 16) | mfbi->x_aoi_d);
  756. /* Disable chroma keying function */
  757. ad->ckmax_r = 0;
  758. ad->ckmax_g = 0;
  759. ad->ckmax_b = 0;
  760. ad->ckmin_r = 255;
  761. ad->ckmin_g = 255;
  762. ad->ckmin_b = 255;
  763. if (mfbi->index == 0)
  764. update_lcdc(info);
  765. return 0;
  766. }
  767. static inline __u32 CNVT_TOHW(__u32 val, __u32 width)
  768. {
  769. return ((val<<width) + 0x7FFF - val)>>16;
  770. }
  771. /*
  772. * Set a single color register. The values supplied have a 16 bit magnitude
  773. * which needs to be scaled in this function for the hardware. Things to take
  774. * into consideration are how many color registers, if any, are supported with
  775. * the current color visual. With truecolor mode no color palettes are
  776. * supported. Here a psuedo palette is created which we store the value in
  777. * pseudo_palette in struct fb_info. For pseudocolor mode we have a limited
  778. * color palette.
  779. */
  780. static int fsl_diu_setcolreg(unsigned regno, unsigned red, unsigned green,
  781. unsigned blue, unsigned transp, struct fb_info *info)
  782. {
  783. int ret = 1;
  784. /*
  785. * If greyscale is true, then we convert the RGB value
  786. * to greyscale no matter what visual we are using.
  787. */
  788. if (info->var.grayscale)
  789. red = green = blue = (19595 * red + 38470 * green +
  790. 7471 * blue) >> 16;
  791. switch (info->fix.visual) {
  792. case FB_VISUAL_TRUECOLOR:
  793. /*
  794. * 16-bit True Colour. We encode the RGB value
  795. * according to the RGB bitfield information.
  796. */
  797. if (regno < 16) {
  798. u32 *pal = info->pseudo_palette;
  799. u32 v;
  800. red = CNVT_TOHW(red, info->var.red.length);
  801. green = CNVT_TOHW(green, info->var.green.length);
  802. blue = CNVT_TOHW(blue, info->var.blue.length);
  803. transp = CNVT_TOHW(transp, info->var.transp.length);
  804. v = (red << info->var.red.offset) |
  805. (green << info->var.green.offset) |
  806. (blue << info->var.blue.offset) |
  807. (transp << info->var.transp.offset);
  808. pal[regno] = v;
  809. ret = 0;
  810. }
  811. break;
  812. case FB_VISUAL_STATIC_PSEUDOCOLOR:
  813. case FB_VISUAL_PSEUDOCOLOR:
  814. break;
  815. }
  816. return ret;
  817. }
  818. /*
  819. * Pan (or wrap, depending on the `vmode' field) the display using the
  820. * 'xoffset' and 'yoffset' fields of the 'var' structure. If the values
  821. * don't fit, return -EINVAL.
  822. */
  823. static int fsl_diu_pan_display(struct fb_var_screeninfo *var,
  824. struct fb_info *info)
  825. {
  826. if ((info->var.xoffset == var->xoffset) &&
  827. (info->var.yoffset == var->yoffset))
  828. return 0; /* No change, do nothing */
  829. if (var->xoffset < 0 || var->yoffset < 0
  830. || var->xoffset + info->var.xres > info->var.xres_virtual
  831. || var->yoffset + info->var.yres > info->var.yres_virtual)
  832. return -EINVAL;
  833. info->var.xoffset = var->xoffset;
  834. info->var.yoffset = var->yoffset;
  835. if (var->vmode & FB_VMODE_YWRAP)
  836. info->var.vmode |= FB_VMODE_YWRAP;
  837. else
  838. info->var.vmode &= ~FB_VMODE_YWRAP;
  839. fsl_diu_set_aoi(info);
  840. return 0;
  841. }
  842. /*
  843. * Blank the screen if blank_mode != 0, else unblank. Return 0 if blanking
  844. * succeeded, != 0 if un-/blanking failed.
  845. * blank_mode == 2: suspend vsync
  846. * blank_mode == 3: suspend hsync
  847. * blank_mode == 4: powerdown
  848. */
  849. static int fsl_diu_blank(int blank_mode, struct fb_info *info)
  850. {
  851. struct mfb_info *mfbi = info->par;
  852. mfbi->blank = blank_mode;
  853. switch (blank_mode) {
  854. case FB_BLANK_VSYNC_SUSPEND:
  855. case FB_BLANK_HSYNC_SUSPEND:
  856. /* FIXME: fixes to enable_panel and enable lcdc needed */
  857. case FB_BLANK_NORMAL:
  858. /* fsl_diu_disable_panel(info);*/
  859. break;
  860. case FB_BLANK_POWERDOWN:
  861. /* disable_lcdc(info); */
  862. break;
  863. case FB_BLANK_UNBLANK:
  864. /* fsl_diu_enable_panel(info);*/
  865. break;
  866. }
  867. return 0;
  868. }
  869. static int fsl_diu_ioctl(struct fb_info *info, unsigned int cmd,
  870. unsigned long arg)
  871. {
  872. struct mfb_info *mfbi = info->par;
  873. struct diu_ad *ad = mfbi->ad;
  874. struct mfb_chroma_key ck;
  875. unsigned char global_alpha;
  876. struct aoi_display_offset aoi_d;
  877. __u32 pix_fmt;
  878. void __user *buf = (void __user *)arg;
  879. if (!arg)
  880. return -EINVAL;
  881. switch (cmd) {
  882. case MFB_SET_PIXFMT:
  883. if (copy_from_user(&pix_fmt, buf, sizeof(pix_fmt)))
  884. return -EFAULT;
  885. ad->pix_fmt = pix_fmt;
  886. pr_debug("Set pixel format to 0x%08x\n", ad->pix_fmt);
  887. break;
  888. case MFB_GET_PIXFMT:
  889. pix_fmt = ad->pix_fmt;
  890. if (copy_to_user(buf, &pix_fmt, sizeof(pix_fmt)))
  891. return -EFAULT;
  892. pr_debug("get pixel format 0x%08x\n", ad->pix_fmt);
  893. break;
  894. case MFB_SET_AOID:
  895. if (copy_from_user(&aoi_d, buf, sizeof(aoi_d)))
  896. return -EFAULT;
  897. mfbi->x_aoi_d = aoi_d.x_aoi_d;
  898. mfbi->y_aoi_d = aoi_d.y_aoi_d;
  899. pr_debug("set AOI display offset of index %d to (%d,%d)\n",
  900. mfbi->index, aoi_d.x_aoi_d, aoi_d.y_aoi_d);
  901. fsl_diu_check_var(&info->var, info);
  902. fsl_diu_set_aoi(info);
  903. break;
  904. case MFB_GET_AOID:
  905. aoi_d.x_aoi_d = mfbi->x_aoi_d;
  906. aoi_d.y_aoi_d = mfbi->y_aoi_d;
  907. if (copy_to_user(buf, &aoi_d, sizeof(aoi_d)))
  908. return -EFAULT;
  909. pr_debug("get AOI display offset of index %d (%d,%d)\n",
  910. mfbi->index, aoi_d.x_aoi_d, aoi_d.y_aoi_d);
  911. break;
  912. case MFB_GET_ALPHA:
  913. global_alpha = mfbi->g_alpha;
  914. if (copy_to_user(buf, &global_alpha, sizeof(global_alpha)))
  915. return -EFAULT;
  916. pr_debug("get global alpha of index %d\n", mfbi->index);
  917. break;
  918. case MFB_SET_ALPHA:
  919. /* set panel information */
  920. if (copy_from_user(&global_alpha, buf, sizeof(global_alpha)))
  921. return -EFAULT;
  922. ad->src_size_g_alpha = (ad->src_size_g_alpha & (~0xff)) |
  923. (global_alpha & 0xff);
  924. mfbi->g_alpha = global_alpha;
  925. pr_debug("set global alpha for index %d\n", mfbi->index);
  926. break;
  927. case MFB_SET_CHROMA_KEY:
  928. /* set panel winformation */
  929. if (copy_from_user(&ck, buf, sizeof(ck)))
  930. return -EFAULT;
  931. if (ck.enable &&
  932. (ck.red_max < ck.red_min ||
  933. ck.green_max < ck.green_min ||
  934. ck.blue_max < ck.blue_min))
  935. return -EINVAL;
  936. if (!ck.enable) {
  937. ad->ckmax_r = 0;
  938. ad->ckmax_g = 0;
  939. ad->ckmax_b = 0;
  940. ad->ckmin_r = 255;
  941. ad->ckmin_g = 255;
  942. ad->ckmin_b = 255;
  943. } else {
  944. ad->ckmax_r = ck.red_max;
  945. ad->ckmax_g = ck.green_max;
  946. ad->ckmax_b = ck.blue_max;
  947. ad->ckmin_r = ck.red_min;
  948. ad->ckmin_g = ck.green_min;
  949. ad->ckmin_b = ck.blue_min;
  950. }
  951. pr_debug("set chroma key\n");
  952. break;
  953. case FBIOGET_GWINFO:
  954. if (mfbi->type == MFB_TYPE_OFF)
  955. return -ENODEV;
  956. /* get graphic window information */
  957. if (copy_to_user(buf, ad, sizeof(*ad)))
  958. return -EFAULT;
  959. break;
  960. case FBIOGET_HWCINFO:
  961. pr_debug("FBIOGET_HWCINFO:0x%08x\n", FBIOGET_HWCINFO);
  962. break;
  963. case FBIOPUT_MODEINFO:
  964. pr_debug("FBIOPUT_MODEINFO:0x%08x\n", FBIOPUT_MODEINFO);
  965. break;
  966. case FBIOGET_DISPINFO:
  967. pr_debug("FBIOGET_DISPINFO:0x%08x\n", FBIOGET_DISPINFO);
  968. break;
  969. default:
  970. printk(KERN_ERR "Unknown ioctl command (0x%08X)\n", cmd);
  971. return -ENOIOCTLCMD;
  972. }
  973. return 0;
  974. }
  975. /* turn on fb if count == 1
  976. */
  977. static int fsl_diu_open(struct fb_info *info, int user)
  978. {
  979. struct mfb_info *mfbi = info->par;
  980. int res = 0;
  981. spin_lock(&diu_lock);
  982. mfbi->count++;
  983. if (mfbi->count == 1) {
  984. pr_debug("open plane index %d\n", mfbi->index);
  985. fsl_diu_check_var(&info->var, info);
  986. res = fsl_diu_set_par(info);
  987. if (res < 0)
  988. mfbi->count--;
  989. else {
  990. res = fsl_diu_enable_panel(info);
  991. if (res < 0)
  992. mfbi->count--;
  993. }
  994. }
  995. spin_unlock(&diu_lock);
  996. return res;
  997. }
  998. /* turn off fb if count == 0
  999. */
  1000. static int fsl_diu_release(struct fb_info *info, int user)
  1001. {
  1002. struct mfb_info *mfbi = info->par;
  1003. int res = 0;
  1004. spin_lock(&diu_lock);
  1005. mfbi->count--;
  1006. if (mfbi->count == 0) {
  1007. pr_debug("release plane index %d\n", mfbi->index);
  1008. res = fsl_diu_disable_panel(info);
  1009. if (res < 0)
  1010. mfbi->count++;
  1011. }
  1012. spin_unlock(&diu_lock);
  1013. return res;
  1014. }
  1015. static struct fb_ops fsl_diu_ops = {
  1016. .owner = THIS_MODULE,
  1017. .fb_check_var = fsl_diu_check_var,
  1018. .fb_set_par = fsl_diu_set_par,
  1019. .fb_setcolreg = fsl_diu_setcolreg,
  1020. .fb_blank = fsl_diu_blank,
  1021. .fb_pan_display = fsl_diu_pan_display,
  1022. .fb_fillrect = cfb_fillrect,
  1023. .fb_copyarea = cfb_copyarea,
  1024. .fb_imageblit = cfb_imageblit,
  1025. .fb_ioctl = fsl_diu_ioctl,
  1026. .fb_open = fsl_diu_open,
  1027. .fb_release = fsl_diu_release,
  1028. };
  1029. static int init_fbinfo(struct fb_info *info)
  1030. {
  1031. struct mfb_info *mfbi = info->par;
  1032. info->device = NULL;
  1033. info->var.activate = FB_ACTIVATE_NOW;
  1034. info->fbops = &fsl_diu_ops;
  1035. info->flags = FBINFO_FLAG_DEFAULT;
  1036. info->pseudo_palette = &mfbi->pseudo_palette;
  1037. /* Allocate colormap */
  1038. fb_alloc_cmap(&info->cmap, 16, 0);
  1039. return 0;
  1040. }
  1041. static int __devinit install_fb(struct fb_info *info)
  1042. {
  1043. int rc;
  1044. struct mfb_info *mfbi = info->par;
  1045. const char *aoi_mode, *init_aoi_mode = "320x240";
  1046. if (init_fbinfo(info))
  1047. return -EINVAL;
  1048. if (mfbi->index == 0) /* plane 0 */
  1049. aoi_mode = fb_mode;
  1050. else
  1051. aoi_mode = init_aoi_mode;
  1052. pr_debug("mode used = %s\n", aoi_mode);
  1053. rc = fb_find_mode(&info->var, info, aoi_mode, fsl_diu_mode_db,
  1054. ARRAY_SIZE(fsl_diu_mode_db), &fsl_diu_default_mode, default_bpp);
  1055. switch (rc) {
  1056. case 1:
  1057. pr_debug("using mode specified in @mode\n");
  1058. break;
  1059. case 2:
  1060. pr_debug("using mode specified in @mode "
  1061. "with ignored refresh rate\n");
  1062. break;
  1063. case 3:
  1064. pr_debug("using mode default mode\n");
  1065. break;
  1066. case 4:
  1067. pr_debug("using mode from list\n");
  1068. break;
  1069. default:
  1070. pr_debug("rc = %d\n", rc);
  1071. pr_debug("failed to find mode\n");
  1072. return -EINVAL;
  1073. break;
  1074. }
  1075. pr_debug("xres_virtual %d\n", info->var.xres_virtual);
  1076. pr_debug("bits_per_pixel %d\n", info->var.bits_per_pixel);
  1077. pr_debug("info->var.yres_virtual = %d\n", info->var.yres_virtual);
  1078. pr_debug("info->fix.line_length = %d\n", info->fix.line_length);
  1079. if (mfbi->type == MFB_TYPE_OFF)
  1080. mfbi->blank = FB_BLANK_NORMAL;
  1081. else
  1082. mfbi->blank = FB_BLANK_UNBLANK;
  1083. if (fsl_diu_check_var(&info->var, info)) {
  1084. printk(KERN_ERR "fb_check_var failed");
  1085. fb_dealloc_cmap(&info->cmap);
  1086. return -EINVAL;
  1087. }
  1088. if (fsl_diu_set_par(info)) {
  1089. printk(KERN_ERR "fb_set_par failed");
  1090. fb_dealloc_cmap(&info->cmap);
  1091. return -EINVAL;
  1092. }
  1093. if (register_framebuffer(info) < 0) {
  1094. printk(KERN_ERR "register_framebuffer failed");
  1095. unmap_video_memory(info);
  1096. fb_dealloc_cmap(&info->cmap);
  1097. return -EINVAL;
  1098. }
  1099. mfbi->registered = 1;
  1100. printk(KERN_INFO "fb%d: %s fb device registered successfully.\n",
  1101. info->node, info->fix.id);
  1102. return 0;
  1103. }
  1104. static void uninstall_fb(struct fb_info *info)
  1105. {
  1106. struct mfb_info *mfbi = info->par;
  1107. if (!mfbi->registered)
  1108. return;
  1109. unregister_framebuffer(info);
  1110. unmap_video_memory(info);
  1111. if (&info->cmap)
  1112. fb_dealloc_cmap(&info->cmap);
  1113. mfbi->registered = 0;
  1114. }
  1115. static irqreturn_t fsl_diu_isr(int irq, void *dev_id)
  1116. {
  1117. struct diu *hw = dr.diu_reg;
  1118. unsigned int status = in_be32(&hw->int_status);
  1119. if (status) {
  1120. /* This is the workaround for underrun */
  1121. if (status & INT_UNDRUN) {
  1122. out_be32(&hw->diu_mode, 0);
  1123. pr_debug("Err: DIU occurs underrun!\n");
  1124. udelay(1);
  1125. out_be32(&hw->diu_mode, 1);
  1126. }
  1127. #if defined(CONFIG_NOT_COHERENT_CACHE)
  1128. else if (status & INT_VSYNC) {
  1129. unsigned int i;
  1130. for (i = 0; i < coherence_data_size;
  1131. i += d_cache_line_size)
  1132. __asm__ __volatile__ (
  1133. "dcbz 0, %[input]"
  1134. ::[input]"r"(&coherence_data[i]));
  1135. }
  1136. #endif
  1137. return IRQ_HANDLED;
  1138. }
  1139. return IRQ_NONE;
  1140. }
  1141. static int request_irq_local(int irq)
  1142. {
  1143. unsigned long status, ints;
  1144. struct diu *hw;
  1145. int ret;
  1146. hw = dr.diu_reg;
  1147. /* Read to clear the status */
  1148. status = in_be32(&hw->int_status);
  1149. ret = request_irq(irq, fsl_diu_isr, 0, "diu", NULL);
  1150. if (ret)
  1151. pr_info("Request diu IRQ failed.\n");
  1152. else {
  1153. ints = INT_PARERR | INT_LS_BF_VS;
  1154. #if !defined(CONFIG_NOT_COHERENT_CACHE)
  1155. ints |= INT_VSYNC;
  1156. #endif
  1157. if (dr.mode == MFB_MODE2 || dr.mode == MFB_MODE3)
  1158. ints |= INT_VSYNC_WB;
  1159. /* Read to clear the status */
  1160. status = in_be32(&hw->int_status);
  1161. out_be32(&hw->int_mask, ints);
  1162. }
  1163. return ret;
  1164. }
  1165. static void free_irq_local(int irq)
  1166. {
  1167. struct diu *hw = dr.diu_reg;
  1168. /* Disable all LCDC interrupt */
  1169. out_be32(&hw->int_mask, 0x1f);
  1170. free_irq(irq, NULL);
  1171. }
  1172. #ifdef CONFIG_PM
  1173. /*
  1174. * Power management hooks. Note that we won't be called from IRQ context,
  1175. * unlike the blank functions above, so we may sleep.
  1176. */
  1177. static int fsl_diu_suspend(struct of_device *ofdev, pm_message_t state)
  1178. {
  1179. struct fsl_diu_data *machine_data;
  1180. machine_data = dev_get_drvdata(&ofdev->dev);
  1181. disable_lcdc(machine_data->fsl_diu_info[0]);
  1182. return 0;
  1183. }
  1184. static int fsl_diu_resume(struct of_device *ofdev)
  1185. {
  1186. struct fsl_diu_data *machine_data;
  1187. machine_data = dev_get_drvdata(&ofdev->dev);
  1188. enable_lcdc(machine_data->fsl_diu_info[0]);
  1189. return 0;
  1190. }
  1191. #else
  1192. #define fsl_diu_suspend NULL
  1193. #define fsl_diu_resume NULL
  1194. #endif /* CONFIG_PM */
  1195. /* Align to 64-bit(8-byte), 32-byte, etc. */
  1196. static int allocate_buf(struct device *dev, struct diu_addr *buf, u32 size,
  1197. u32 bytes_align)
  1198. {
  1199. u32 offset, ssize;
  1200. u32 mask;
  1201. dma_addr_t paddr = 0;
  1202. ssize = size + bytes_align;
  1203. buf->vaddr = dma_alloc_coherent(dev, ssize, &paddr, GFP_DMA |
  1204. __GFP_ZERO);
  1205. if (!buf->vaddr)
  1206. return -ENOMEM;
  1207. buf->paddr = (__u32) paddr;
  1208. mask = bytes_align - 1;
  1209. offset = (u32)buf->paddr & mask;
  1210. if (offset) {
  1211. buf->offset = bytes_align - offset;
  1212. buf->paddr = (u32)buf->paddr + offset;
  1213. } else
  1214. buf->offset = 0;
  1215. return 0;
  1216. }
  1217. static void free_buf(struct device *dev, struct diu_addr *buf, u32 size,
  1218. u32 bytes_align)
  1219. {
  1220. dma_free_coherent(dev, size + bytes_align,
  1221. buf->vaddr, (buf->paddr - buf->offset));
  1222. return;
  1223. }
  1224. static ssize_t store_monitor(struct device *device,
  1225. struct device_attribute *attr, const char *buf, size_t count)
  1226. {
  1227. int old_monitor_port;
  1228. unsigned long val;
  1229. struct fsl_diu_data *machine_data =
  1230. container_of(attr, struct fsl_diu_data, dev_attr);
  1231. if (strict_strtoul(buf, 10, &val))
  1232. return 0;
  1233. old_monitor_port = machine_data->monitor_port;
  1234. machine_data->monitor_port = diu_ops.set_sysfs_monitor_port(val);
  1235. if (old_monitor_port != machine_data->monitor_port) {
  1236. /* All AOIs need adjust pixel format
  1237. * fsl_diu_set_par only change the pixsel format here
  1238. * unlikely to fail. */
  1239. fsl_diu_set_par(machine_data->fsl_diu_info[0]);
  1240. fsl_diu_set_par(machine_data->fsl_diu_info[1]);
  1241. fsl_diu_set_par(machine_data->fsl_diu_info[2]);
  1242. fsl_diu_set_par(machine_data->fsl_diu_info[3]);
  1243. fsl_diu_set_par(machine_data->fsl_diu_info[4]);
  1244. }
  1245. return count;
  1246. }
  1247. static ssize_t show_monitor(struct device *device,
  1248. struct device_attribute *attr, char *buf)
  1249. {
  1250. struct fsl_diu_data *machine_data =
  1251. container_of(attr, struct fsl_diu_data, dev_attr);
  1252. return diu_ops.show_monitor_port(machine_data->monitor_port, buf);
  1253. }
  1254. static int __devinit fsl_diu_probe(struct of_device *ofdev,
  1255. const struct of_device_id *match)
  1256. {
  1257. struct device_node *np = ofdev->node;
  1258. struct mfb_info *mfbi;
  1259. phys_addr_t dummy_ad_addr;
  1260. int ret, i, error = 0;
  1261. struct resource res;
  1262. struct fsl_diu_data *machine_data;
  1263. machine_data = kzalloc(sizeof(struct fsl_diu_data), GFP_KERNEL);
  1264. if (!machine_data)
  1265. return -ENOMEM;
  1266. for (i = 0; i < ARRAY_SIZE(machine_data->fsl_diu_info); i++) {
  1267. machine_data->fsl_diu_info[i] =
  1268. framebuffer_alloc(sizeof(struct mfb_info), &ofdev->dev);
  1269. if (!machine_data->fsl_diu_info[i]) {
  1270. dev_err(&ofdev->dev, "cannot allocate memory\n");
  1271. ret = -ENOMEM;
  1272. goto error2;
  1273. }
  1274. mfbi = machine_data->fsl_diu_info[i]->par;
  1275. memcpy(mfbi, &mfb_template[i], sizeof(struct mfb_info));
  1276. mfbi->parent = machine_data;
  1277. }
  1278. ret = of_address_to_resource(np, 0, &res);
  1279. if (ret) {
  1280. dev_err(&ofdev->dev, "could not obtain DIU address\n");
  1281. goto error;
  1282. }
  1283. if (!res.start) {
  1284. dev_err(&ofdev->dev, "invalid DIU address\n");
  1285. goto error;
  1286. }
  1287. dev_dbg(&ofdev->dev, "%s, res.start: 0x%08x\n", __func__, res.start);
  1288. dr.diu_reg = ioremap(res.start, sizeof(struct diu));
  1289. if (!dr.diu_reg) {
  1290. dev_err(&ofdev->dev, "Err: can't map DIU registers!\n");
  1291. ret = -EFAULT;
  1292. goto error2;
  1293. }
  1294. out_be32(&dr.diu_reg->diu_mode, 0); /* disable DIU anyway*/
  1295. /* Get the IRQ of the DIU */
  1296. machine_data->irq = irq_of_parse_and_map(np, 0);
  1297. if (!machine_data->irq) {
  1298. dev_err(&ofdev->dev, "could not get DIU IRQ\n");
  1299. ret = -EINVAL;
  1300. goto error;
  1301. }
  1302. machine_data->monitor_port = monitor_port;
  1303. /* Area descriptor memory pool aligns to 64-bit boundary */
  1304. if (allocate_buf(&ofdev->dev, &pool.ad,
  1305. sizeof(struct diu_ad) * FSL_AOI_NUM, 8))
  1306. return -ENOMEM;
  1307. /* Get memory for Gamma Table - 32-byte aligned memory */
  1308. if (allocate_buf(&ofdev->dev, &pool.gamma, 768, 32)) {
  1309. ret = -ENOMEM;
  1310. goto error;
  1311. }
  1312. /* For performance, cursor bitmap buffer aligns to 32-byte boundary */
  1313. if (allocate_buf(&ofdev->dev, &pool.cursor, MAX_CURS * MAX_CURS * 2,
  1314. 32)) {
  1315. ret = -ENOMEM;
  1316. goto error;
  1317. }
  1318. i = ARRAY_SIZE(machine_data->fsl_diu_info);
  1319. machine_data->dummy_ad = (struct diu_ad *)
  1320. ((u32)pool.ad.vaddr + pool.ad.offset) + i;
  1321. machine_data->dummy_ad->paddr = pool.ad.paddr +
  1322. i * sizeof(struct diu_ad);
  1323. machine_data->dummy_aoi_virt = fsl_diu_alloc(64, &dummy_ad_addr);
  1324. if (!machine_data->dummy_aoi_virt) {
  1325. ret = -ENOMEM;
  1326. goto error;
  1327. }
  1328. machine_data->dummy_ad->addr = cpu_to_le32(dummy_ad_addr);
  1329. machine_data->dummy_ad->pix_fmt = 0x88882317;
  1330. machine_data->dummy_ad->src_size_g_alpha = cpu_to_le32((4 << 12) | 4);
  1331. machine_data->dummy_ad->aoi_size = cpu_to_le32((4 << 16) | 2);
  1332. machine_data->dummy_ad->offset_xyi = 0;
  1333. machine_data->dummy_ad->offset_xyd = 0;
  1334. machine_data->dummy_ad->next_ad = 0;
  1335. out_be32(&dr.diu_reg->desc[0], machine_data->dummy_ad->paddr);
  1336. out_be32(&dr.diu_reg->desc[1], machine_data->dummy_ad->paddr);
  1337. out_be32(&dr.diu_reg->desc[2], machine_data->dummy_ad->paddr);
  1338. for (i = 0; i < ARRAY_SIZE(machine_data->fsl_diu_info); i++) {
  1339. machine_data->fsl_diu_info[i]->fix.smem_start = 0;
  1340. mfbi = machine_data->fsl_diu_info[i]->par;
  1341. mfbi->ad = (struct diu_ad *)((u32)pool.ad.vaddr
  1342. + pool.ad.offset) + i;
  1343. mfbi->ad->paddr = pool.ad.paddr + i * sizeof(struct diu_ad);
  1344. ret = install_fb(machine_data->fsl_diu_info[i]);
  1345. if (ret) {
  1346. dev_err(&ofdev->dev,
  1347. "Failed to register framebuffer %d\n",
  1348. i);
  1349. goto error;
  1350. }
  1351. }
  1352. if (request_irq_local(machine_data->irq)) {
  1353. dev_err(machine_data->fsl_diu_info[0]->dev,
  1354. "could not request irq for diu.");
  1355. goto error;
  1356. }
  1357. machine_data->dev_attr.attr.name = "monitor";
  1358. machine_data->dev_attr.attr.mode = S_IRUGO|S_IWUSR;
  1359. machine_data->dev_attr.show = show_monitor;
  1360. machine_data->dev_attr.store = store_monitor;
  1361. error = device_create_file(machine_data->fsl_diu_info[0]->dev,
  1362. &machine_data->dev_attr);
  1363. if (error) {
  1364. dev_err(machine_data->fsl_diu_info[0]->dev,
  1365. "could not create sysfs %s file\n",
  1366. machine_data->dev_attr.attr.name);
  1367. }
  1368. dev_set_drvdata(&ofdev->dev, machine_data);
  1369. return 0;
  1370. error:
  1371. for (i = ARRAY_SIZE(machine_data->fsl_diu_info);
  1372. i > 0; i--)
  1373. uninstall_fb(machine_data->fsl_diu_info[i - 1]);
  1374. if (pool.ad.vaddr)
  1375. free_buf(&ofdev->dev, &pool.ad,
  1376. sizeof(struct diu_ad) * FSL_AOI_NUM, 8);
  1377. if (pool.gamma.vaddr)
  1378. free_buf(&ofdev->dev, &pool.gamma, 768, 32);
  1379. if (pool.cursor.vaddr)
  1380. free_buf(&ofdev->dev, &pool.cursor, MAX_CURS * MAX_CURS * 2,
  1381. 32);
  1382. if (machine_data->dummy_aoi_virt)
  1383. fsl_diu_free(machine_data->dummy_aoi_virt, 64);
  1384. iounmap(dr.diu_reg);
  1385. error2:
  1386. for (i = 0; i < ARRAY_SIZE(machine_data->fsl_diu_info); i++)
  1387. if (machine_data->fsl_diu_info[i])
  1388. framebuffer_release(machine_data->fsl_diu_info[i]);
  1389. kfree(machine_data);
  1390. return ret;
  1391. }
  1392. static int fsl_diu_remove(struct of_device *ofdev)
  1393. {
  1394. struct fsl_diu_data *machine_data;
  1395. int i;
  1396. machine_data = dev_get_drvdata(&ofdev->dev);
  1397. disable_lcdc(machine_data->fsl_diu_info[0]);
  1398. free_irq_local(machine_data->irq);
  1399. for (i = ARRAY_SIZE(machine_data->fsl_diu_info); i > 0; i--)
  1400. uninstall_fb(machine_data->fsl_diu_info[i - 1]);
  1401. if (pool.ad.vaddr)
  1402. free_buf(&ofdev->dev, &pool.ad,
  1403. sizeof(struct diu_ad) * FSL_AOI_NUM, 8);
  1404. if (pool.gamma.vaddr)
  1405. free_buf(&ofdev->dev, &pool.gamma, 768, 32);
  1406. if (pool.cursor.vaddr)
  1407. free_buf(&ofdev->dev, &pool.cursor, MAX_CURS * MAX_CURS * 2,
  1408. 32);
  1409. if (machine_data->dummy_aoi_virt)
  1410. fsl_diu_free(machine_data->dummy_aoi_virt, 64);
  1411. iounmap(dr.diu_reg);
  1412. for (i = 0; i < ARRAY_SIZE(machine_data->fsl_diu_info); i++)
  1413. if (machine_data->fsl_diu_info[i])
  1414. framebuffer_release(machine_data->fsl_diu_info[i]);
  1415. kfree(machine_data);
  1416. return 0;
  1417. }
  1418. #ifndef MODULE
  1419. static int __init fsl_diu_setup(char *options)
  1420. {
  1421. char *opt;
  1422. unsigned long val;
  1423. if (!options || !*options)
  1424. return 0;
  1425. while ((opt = strsep(&options, ",")) != NULL) {
  1426. if (!*opt)
  1427. continue;
  1428. if (!strncmp(opt, "monitor=", 8)) {
  1429. if (!strict_strtoul(opt + 8, 10, &val) && (val <= 2))
  1430. monitor_port = val;
  1431. } else if (!strncmp(opt, "bpp=", 4)) {
  1432. if (!strict_strtoul(opt + 4, 10, &val))
  1433. default_bpp = val;
  1434. } else
  1435. fb_mode = opt;
  1436. }
  1437. return 0;
  1438. }
  1439. #endif
  1440. static struct of_device_id fsl_diu_match[] = {
  1441. {
  1442. .compatible = "fsl,diu",
  1443. },
  1444. {}
  1445. };
  1446. MODULE_DEVICE_TABLE(of, fsl_diu_match);
  1447. static struct of_platform_driver fsl_diu_driver = {
  1448. .owner = THIS_MODULE,
  1449. .name = "fsl_diu",
  1450. .match_table = fsl_diu_match,
  1451. .probe = fsl_diu_probe,
  1452. .remove = fsl_diu_remove,
  1453. .suspend = fsl_diu_suspend,
  1454. .resume = fsl_diu_resume,
  1455. };
  1456. static int __init fsl_diu_init(void)
  1457. {
  1458. #ifdef CONFIG_NOT_COHERENT_CACHE
  1459. struct device_node *np;
  1460. const u32 *prop;
  1461. #endif
  1462. int ret;
  1463. #ifndef MODULE
  1464. char *option;
  1465. /*
  1466. * For kernel boot options (in 'video=xxxfb:<options>' format)
  1467. */
  1468. if (fb_get_options("fslfb", &option))
  1469. return -ENODEV;
  1470. fsl_diu_setup(option);
  1471. #endif
  1472. printk(KERN_INFO "Freescale DIU driver\n");
  1473. #ifdef CONFIG_NOT_COHERENT_CACHE
  1474. np = of_find_node_by_type(NULL, "cpu");
  1475. if (!np) {
  1476. printk(KERN_ERR "Err: can't find device node 'cpu'\n");
  1477. return -ENODEV;
  1478. }
  1479. prop = of_get_property(np, "d-cache-size", NULL);
  1480. if (prop == NULL) {
  1481. of_node_put(np);
  1482. return -ENODEV;
  1483. }
  1484. /* Freescale PLRU requires 13/8 times the cache size to do a proper
  1485. displacement flush
  1486. */
  1487. coherence_data_size = *prop * 13;
  1488. coherence_data_size /= 8;
  1489. prop = of_get_property(np, "d-cache-line-size", NULL);
  1490. if (prop == NULL) {
  1491. of_node_put(np);
  1492. return -ENODEV;
  1493. }
  1494. d_cache_line_size = *prop;
  1495. of_node_put(np);
  1496. coherence_data = vmalloc(coherence_data_size);
  1497. if (!coherence_data)
  1498. return -ENOMEM;
  1499. #endif
  1500. ret = of_register_platform_driver(&fsl_diu_driver);
  1501. if (ret) {
  1502. printk(KERN_ERR
  1503. "fsl-diu: failed to register platform driver\n");
  1504. #if defined(CONFIG_NOT_COHERENT_CACHE)
  1505. vfree(coherence_data);
  1506. #endif
  1507. iounmap(dr.diu_reg);
  1508. }
  1509. return ret;
  1510. }
  1511. static void __exit fsl_diu_exit(void)
  1512. {
  1513. of_unregister_platform_driver(&fsl_diu_driver);
  1514. #if defined(CONFIG_NOT_COHERENT_CACHE)
  1515. vfree(coherence_data);
  1516. #endif
  1517. }
  1518. module_init(fsl_diu_init);
  1519. module_exit(fsl_diu_exit);
  1520. MODULE_AUTHOR("York Sun <yorksun@freescale.com>");
  1521. MODULE_DESCRIPTION("Freescale DIU framebuffer driver");
  1522. MODULE_LICENSE("GPL");
  1523. module_param_named(mode, fb_mode, charp, 0);
  1524. MODULE_PARM_DESC(mode,
  1525. "Specify resolution as \"<xres>x<yres>[-<bpp>][@<refresh>]\" ");
  1526. module_param_named(bpp, default_bpp, ulong, 0);
  1527. MODULE_PARM_DESC(bpp, "Specify bit-per-pixel if not specified mode");
  1528. module_param_named(monitor, monitor_port, int, 0);
  1529. MODULE_PARM_DESC(monitor,
  1530. "Specify the monitor port (0, 1 or 2) if supported by the platform");