mpt2sas_base.c 97 KB

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  1. /*
  2. * This is the Fusion MPT base driver providing common API layer interface
  3. * for access to MPT (Message Passing Technology) firmware.
  4. *
  5. * This code is based on drivers/scsi/mpt2sas/mpt2_base.c
  6. * Copyright (C) 2007-2008 LSI Corporation
  7. * (mailto:DL-MPTFusionLinux@lsi.com)
  8. *
  9. * This program is free software; you can redistribute it and/or
  10. * modify it under the terms of the GNU General Public License
  11. * as published by the Free Software Foundation; either version 2
  12. * of the License, or (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * NO WARRANTY
  20. * THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR
  21. * CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT
  22. * LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT,
  23. * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is
  24. * solely responsible for determining the appropriateness of using and
  25. * distributing the Program and assumes all risks associated with its
  26. * exercise of rights under this Agreement, including but not limited to
  27. * the risks and costs of program errors, damage to or loss of data,
  28. * programs or equipment, and unavailability or interruption of operations.
  29. * DISCLAIMER OF LIABILITY
  30. * NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY
  31. * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  32. * DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND
  33. * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
  34. * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
  35. * USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED
  36. * HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES
  37. * You should have received a copy of the GNU General Public License
  38. * along with this program; if not, write to the Free Software
  39. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301,
  40. * USA.
  41. */
  42. #include <linux/version.h>
  43. #include <linux/kernel.h>
  44. #include <linux/module.h>
  45. #include <linux/errno.h>
  46. #include <linux/init.h>
  47. #include <linux/slab.h>
  48. #include <linux/types.h>
  49. #include <linux/pci.h>
  50. #include <linux/kdev_t.h>
  51. #include <linux/blkdev.h>
  52. #include <linux/delay.h>
  53. #include <linux/interrupt.h>
  54. #include <linux/dma-mapping.h>
  55. #include <linux/sort.h>
  56. #include <linux/io.h>
  57. #include "mpt2sas_base.h"
  58. static MPT_CALLBACK mpt_callbacks[MPT_MAX_CALLBACKS];
  59. #define FAULT_POLLING_INTERVAL 1000 /* in milliseconds */
  60. #define MPT2SAS_MAX_REQUEST_QUEUE 500 /* maximum controller queue depth */
  61. static int max_queue_depth = -1;
  62. module_param(max_queue_depth, int, 0);
  63. MODULE_PARM_DESC(max_queue_depth, " max controller queue depth ");
  64. static int max_sgl_entries = -1;
  65. module_param(max_sgl_entries, int, 0);
  66. MODULE_PARM_DESC(max_sgl_entries, " max sg entries ");
  67. static int msix_disable = -1;
  68. module_param(msix_disable, int, 0);
  69. MODULE_PARM_DESC(msix_disable, " disable msix routed interrupts (default=0)");
  70. /**
  71. * _base_fault_reset_work - workq handling ioc fault conditions
  72. * @work: input argument, used to derive ioc
  73. * Context: sleep.
  74. *
  75. * Return nothing.
  76. */
  77. static void
  78. _base_fault_reset_work(struct work_struct *work)
  79. {
  80. struct MPT2SAS_ADAPTER *ioc =
  81. container_of(work, struct MPT2SAS_ADAPTER, fault_reset_work.work);
  82. unsigned long flags;
  83. u32 doorbell;
  84. int rc;
  85. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  86. if (ioc->ioc_reset_in_progress)
  87. goto rearm_timer;
  88. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  89. doorbell = mpt2sas_base_get_iocstate(ioc, 0);
  90. if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) {
  91. rc = mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP,
  92. FORCE_BIG_HAMMER);
  93. printk(MPT2SAS_WARN_FMT "%s: hard reset: %s\n", ioc->name,
  94. __func__, (rc == 0) ? "success" : "failed");
  95. doorbell = mpt2sas_base_get_iocstate(ioc, 0);
  96. if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT)
  97. mpt2sas_base_fault_info(ioc, doorbell &
  98. MPI2_DOORBELL_DATA_MASK);
  99. }
  100. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  101. rearm_timer:
  102. if (ioc->fault_reset_work_q)
  103. queue_delayed_work(ioc->fault_reset_work_q,
  104. &ioc->fault_reset_work,
  105. msecs_to_jiffies(FAULT_POLLING_INTERVAL));
  106. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  107. }
  108. #ifdef CONFIG_SCSI_MPT2SAS_LOGGING
  109. /**
  110. * _base_sas_ioc_info - verbose translation of the ioc status
  111. * @ioc: pointer to scsi command object
  112. * @mpi_reply: reply mf payload returned from firmware
  113. * @request_hdr: request mf
  114. *
  115. * Return nothing.
  116. */
  117. static void
  118. _base_sas_ioc_info(struct MPT2SAS_ADAPTER *ioc, MPI2DefaultReply_t *mpi_reply,
  119. MPI2RequestHeader_t *request_hdr)
  120. {
  121. u16 ioc_status = le16_to_cpu(mpi_reply->IOCStatus) &
  122. MPI2_IOCSTATUS_MASK;
  123. char *desc = NULL;
  124. u16 frame_sz;
  125. char *func_str = NULL;
  126. /* SCSI_IO, RAID_PASS are handled from _scsih_scsi_ioc_info */
  127. if (request_hdr->Function == MPI2_FUNCTION_SCSI_IO_REQUEST ||
  128. request_hdr->Function == MPI2_FUNCTION_RAID_SCSI_IO_PASSTHROUGH ||
  129. request_hdr->Function == MPI2_FUNCTION_EVENT_NOTIFICATION)
  130. return;
  131. switch (ioc_status) {
  132. /****************************************************************************
  133. * Common IOCStatus values for all replies
  134. ****************************************************************************/
  135. case MPI2_IOCSTATUS_INVALID_FUNCTION:
  136. desc = "invalid function";
  137. break;
  138. case MPI2_IOCSTATUS_BUSY:
  139. desc = "busy";
  140. break;
  141. case MPI2_IOCSTATUS_INVALID_SGL:
  142. desc = "invalid sgl";
  143. break;
  144. case MPI2_IOCSTATUS_INTERNAL_ERROR:
  145. desc = "internal error";
  146. break;
  147. case MPI2_IOCSTATUS_INVALID_VPID:
  148. desc = "invalid vpid";
  149. break;
  150. case MPI2_IOCSTATUS_INSUFFICIENT_RESOURCES:
  151. desc = "insufficient resources";
  152. break;
  153. case MPI2_IOCSTATUS_INVALID_FIELD:
  154. desc = "invalid field";
  155. break;
  156. case MPI2_IOCSTATUS_INVALID_STATE:
  157. desc = "invalid state";
  158. break;
  159. case MPI2_IOCSTATUS_OP_STATE_NOT_SUPPORTED:
  160. desc = "op state not supported";
  161. break;
  162. /****************************************************************************
  163. * Config IOCStatus values
  164. ****************************************************************************/
  165. case MPI2_IOCSTATUS_CONFIG_INVALID_ACTION:
  166. desc = "config invalid action";
  167. break;
  168. case MPI2_IOCSTATUS_CONFIG_INVALID_TYPE:
  169. desc = "config invalid type";
  170. break;
  171. case MPI2_IOCSTATUS_CONFIG_INVALID_PAGE:
  172. desc = "config invalid page";
  173. break;
  174. case MPI2_IOCSTATUS_CONFIG_INVALID_DATA:
  175. desc = "config invalid data";
  176. break;
  177. case MPI2_IOCSTATUS_CONFIG_NO_DEFAULTS:
  178. desc = "config no defaults";
  179. break;
  180. case MPI2_IOCSTATUS_CONFIG_CANT_COMMIT:
  181. desc = "config cant commit";
  182. break;
  183. /****************************************************************************
  184. * SCSI IO Reply
  185. ****************************************************************************/
  186. case MPI2_IOCSTATUS_SCSI_RECOVERED_ERROR:
  187. case MPI2_IOCSTATUS_SCSI_INVALID_DEVHANDLE:
  188. case MPI2_IOCSTATUS_SCSI_DEVICE_NOT_THERE:
  189. case MPI2_IOCSTATUS_SCSI_DATA_OVERRUN:
  190. case MPI2_IOCSTATUS_SCSI_DATA_UNDERRUN:
  191. case MPI2_IOCSTATUS_SCSI_IO_DATA_ERROR:
  192. case MPI2_IOCSTATUS_SCSI_PROTOCOL_ERROR:
  193. case MPI2_IOCSTATUS_SCSI_TASK_TERMINATED:
  194. case MPI2_IOCSTATUS_SCSI_RESIDUAL_MISMATCH:
  195. case MPI2_IOCSTATUS_SCSI_TASK_MGMT_FAILED:
  196. case MPI2_IOCSTATUS_SCSI_IOC_TERMINATED:
  197. case MPI2_IOCSTATUS_SCSI_EXT_TERMINATED:
  198. break;
  199. /****************************************************************************
  200. * For use by SCSI Initiator and SCSI Target end-to-end data protection
  201. ****************************************************************************/
  202. case MPI2_IOCSTATUS_EEDP_GUARD_ERROR:
  203. desc = "eedp guard error";
  204. break;
  205. case MPI2_IOCSTATUS_EEDP_REF_TAG_ERROR:
  206. desc = "eedp ref tag error";
  207. break;
  208. case MPI2_IOCSTATUS_EEDP_APP_TAG_ERROR:
  209. desc = "eedp app tag error";
  210. break;
  211. /****************************************************************************
  212. * SCSI Target values
  213. ****************************************************************************/
  214. case MPI2_IOCSTATUS_TARGET_INVALID_IO_INDEX:
  215. desc = "target invalid io index";
  216. break;
  217. case MPI2_IOCSTATUS_TARGET_ABORTED:
  218. desc = "target aborted";
  219. break;
  220. case MPI2_IOCSTATUS_TARGET_NO_CONN_RETRYABLE:
  221. desc = "target no conn retryable";
  222. break;
  223. case MPI2_IOCSTATUS_TARGET_NO_CONNECTION:
  224. desc = "target no connection";
  225. break;
  226. case MPI2_IOCSTATUS_TARGET_XFER_COUNT_MISMATCH:
  227. desc = "target xfer count mismatch";
  228. break;
  229. case MPI2_IOCSTATUS_TARGET_DATA_OFFSET_ERROR:
  230. desc = "target data offset error";
  231. break;
  232. case MPI2_IOCSTATUS_TARGET_TOO_MUCH_WRITE_DATA:
  233. desc = "target too much write data";
  234. break;
  235. case MPI2_IOCSTATUS_TARGET_IU_TOO_SHORT:
  236. desc = "target iu too short";
  237. break;
  238. case MPI2_IOCSTATUS_TARGET_ACK_NAK_TIMEOUT:
  239. desc = "target ack nak timeout";
  240. break;
  241. case MPI2_IOCSTATUS_TARGET_NAK_RECEIVED:
  242. desc = "target nak received";
  243. break;
  244. /****************************************************************************
  245. * Serial Attached SCSI values
  246. ****************************************************************************/
  247. case MPI2_IOCSTATUS_SAS_SMP_REQUEST_FAILED:
  248. desc = "smp request failed";
  249. break;
  250. case MPI2_IOCSTATUS_SAS_SMP_DATA_OVERRUN:
  251. desc = "smp data overrun";
  252. break;
  253. /****************************************************************************
  254. * Diagnostic Buffer Post / Diagnostic Release values
  255. ****************************************************************************/
  256. case MPI2_IOCSTATUS_DIAGNOSTIC_RELEASED:
  257. desc = "diagnostic released";
  258. break;
  259. default:
  260. break;
  261. }
  262. if (!desc)
  263. return;
  264. switch (request_hdr->Function) {
  265. case MPI2_FUNCTION_CONFIG:
  266. frame_sz = sizeof(Mpi2ConfigRequest_t) + ioc->sge_size;
  267. func_str = "config_page";
  268. break;
  269. case MPI2_FUNCTION_SCSI_TASK_MGMT:
  270. frame_sz = sizeof(Mpi2SCSITaskManagementRequest_t);
  271. func_str = "task_mgmt";
  272. break;
  273. case MPI2_FUNCTION_SAS_IO_UNIT_CONTROL:
  274. frame_sz = sizeof(Mpi2SasIoUnitControlRequest_t);
  275. func_str = "sas_iounit_ctl";
  276. break;
  277. case MPI2_FUNCTION_SCSI_ENCLOSURE_PROCESSOR:
  278. frame_sz = sizeof(Mpi2SepRequest_t);
  279. func_str = "enclosure";
  280. break;
  281. case MPI2_FUNCTION_IOC_INIT:
  282. frame_sz = sizeof(Mpi2IOCInitRequest_t);
  283. func_str = "ioc_init";
  284. break;
  285. case MPI2_FUNCTION_PORT_ENABLE:
  286. frame_sz = sizeof(Mpi2PortEnableRequest_t);
  287. func_str = "port_enable";
  288. break;
  289. case MPI2_FUNCTION_SMP_PASSTHROUGH:
  290. frame_sz = sizeof(Mpi2SmpPassthroughRequest_t) + ioc->sge_size;
  291. func_str = "smp_passthru";
  292. break;
  293. default:
  294. frame_sz = 32;
  295. func_str = "unknown";
  296. break;
  297. }
  298. printk(MPT2SAS_WARN_FMT "ioc_status: %s(0x%04x), request(0x%p),"
  299. " (%s)\n", ioc->name, desc, ioc_status, request_hdr, func_str);
  300. _debug_dump_mf(request_hdr, frame_sz/4);
  301. }
  302. /**
  303. * _base_display_event_data - verbose translation of firmware asyn events
  304. * @ioc: pointer to scsi command object
  305. * @mpi_reply: reply mf payload returned from firmware
  306. *
  307. * Return nothing.
  308. */
  309. static void
  310. _base_display_event_data(struct MPT2SAS_ADAPTER *ioc,
  311. Mpi2EventNotificationReply_t *mpi_reply)
  312. {
  313. char *desc = NULL;
  314. u16 event;
  315. if (!(ioc->logging_level & MPT_DEBUG_EVENTS))
  316. return;
  317. event = le16_to_cpu(mpi_reply->Event);
  318. switch (event) {
  319. case MPI2_EVENT_LOG_DATA:
  320. desc = "Log Data";
  321. break;
  322. case MPI2_EVENT_STATE_CHANGE:
  323. desc = "Status Change";
  324. break;
  325. case MPI2_EVENT_HARD_RESET_RECEIVED:
  326. desc = "Hard Reset Received";
  327. break;
  328. case MPI2_EVENT_EVENT_CHANGE:
  329. desc = "Event Change";
  330. break;
  331. case MPI2_EVENT_TASK_SET_FULL:
  332. desc = "Task Set Full";
  333. break;
  334. case MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE:
  335. desc = "Device Status Change";
  336. break;
  337. case MPI2_EVENT_IR_OPERATION_STATUS:
  338. desc = "IR Operation Status";
  339. break;
  340. case MPI2_EVENT_SAS_DISCOVERY:
  341. desc = "Discovery";
  342. break;
  343. case MPI2_EVENT_SAS_BROADCAST_PRIMITIVE:
  344. desc = "SAS Broadcast Primitive";
  345. break;
  346. case MPI2_EVENT_SAS_INIT_DEVICE_STATUS_CHANGE:
  347. desc = "SAS Init Device Status Change";
  348. break;
  349. case MPI2_EVENT_SAS_INIT_TABLE_OVERFLOW:
  350. desc = "SAS Init Table Overflow";
  351. break;
  352. case MPI2_EVENT_SAS_TOPOLOGY_CHANGE_LIST:
  353. desc = "SAS Topology Change List";
  354. break;
  355. case MPI2_EVENT_SAS_ENCL_DEVICE_STATUS_CHANGE:
  356. desc = "SAS Enclosure Device Status Change";
  357. break;
  358. case MPI2_EVENT_IR_VOLUME:
  359. desc = "IR Volume";
  360. break;
  361. case MPI2_EVENT_IR_PHYSICAL_DISK:
  362. desc = "IR Physical Disk";
  363. break;
  364. case MPI2_EVENT_IR_CONFIGURATION_CHANGE_LIST:
  365. desc = "IR Configuration Change List";
  366. break;
  367. case MPI2_EVENT_LOG_ENTRY_ADDED:
  368. desc = "Log Entry Added";
  369. break;
  370. }
  371. if (!desc)
  372. return;
  373. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name, desc);
  374. }
  375. #endif
  376. /**
  377. * _base_sas_log_info - verbose translation of firmware log info
  378. * @ioc: pointer to scsi command object
  379. * @log_info: log info
  380. *
  381. * Return nothing.
  382. */
  383. static void
  384. _base_sas_log_info(struct MPT2SAS_ADAPTER *ioc , u32 log_info)
  385. {
  386. union loginfo_type {
  387. u32 loginfo;
  388. struct {
  389. u32 subcode:16;
  390. u32 code:8;
  391. u32 originator:4;
  392. u32 bus_type:4;
  393. } dw;
  394. };
  395. union loginfo_type sas_loginfo;
  396. char *originator_str = NULL;
  397. sas_loginfo.loginfo = log_info;
  398. if (sas_loginfo.dw.bus_type != 3 /*SAS*/)
  399. return;
  400. /* eat the loginfos associated with task aborts */
  401. if (ioc->ignore_loginfos && (log_info == 30050000 || log_info ==
  402. 0x31140000 || log_info == 0x31130000))
  403. return;
  404. switch (sas_loginfo.dw.originator) {
  405. case 0:
  406. originator_str = "IOP";
  407. break;
  408. case 1:
  409. originator_str = "PL";
  410. break;
  411. case 2:
  412. originator_str = "IR";
  413. break;
  414. }
  415. printk(MPT2SAS_WARN_FMT "log_info(0x%08x): originator(%s), "
  416. "code(0x%02x), sub_code(0x%04x)\n", ioc->name, log_info,
  417. originator_str, sas_loginfo.dw.code,
  418. sas_loginfo.dw.subcode);
  419. }
  420. /**
  421. * mpt2sas_base_fault_info - verbose translation of firmware FAULT code
  422. * @ioc: pointer to scsi command object
  423. * @fault_code: fault code
  424. *
  425. * Return nothing.
  426. */
  427. void
  428. mpt2sas_base_fault_info(struct MPT2SAS_ADAPTER *ioc , u16 fault_code)
  429. {
  430. printk(MPT2SAS_ERR_FMT "fault_state(0x%04x)!\n",
  431. ioc->name, fault_code);
  432. }
  433. /**
  434. * _base_display_reply_info -
  435. * @ioc: pointer to scsi command object
  436. * @smid: system request message index
  437. * @VF_ID: virtual function id
  438. * @reply: reply message frame(lower 32bit addr)
  439. *
  440. * Return nothing.
  441. */
  442. static void
  443. _base_display_reply_info(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 VF_ID,
  444. u32 reply)
  445. {
  446. MPI2DefaultReply_t *mpi_reply;
  447. u16 ioc_status;
  448. mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
  449. ioc_status = le16_to_cpu(mpi_reply->IOCStatus);
  450. #ifdef CONFIG_SCSI_MPT2SAS_LOGGING
  451. if ((ioc_status & MPI2_IOCSTATUS_MASK) &&
  452. (ioc->logging_level & MPT_DEBUG_REPLY)) {
  453. _base_sas_ioc_info(ioc , mpi_reply,
  454. mpt2sas_base_get_msg_frame(ioc, smid));
  455. }
  456. #endif
  457. if (ioc_status & MPI2_IOCSTATUS_FLAG_LOG_INFO_AVAILABLE)
  458. _base_sas_log_info(ioc, le32_to_cpu(mpi_reply->IOCLogInfo));
  459. }
  460. /**
  461. * mpt2sas_base_done - base internal command completion routine
  462. * @ioc: pointer to scsi command object
  463. * @smid: system request message index
  464. * @VF_ID: virtual function id
  465. * @reply: reply message frame(lower 32bit addr)
  466. *
  467. * Return nothing.
  468. */
  469. void
  470. mpt2sas_base_done(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 VF_ID, u32 reply)
  471. {
  472. MPI2DefaultReply_t *mpi_reply;
  473. mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
  474. if (mpi_reply && mpi_reply->Function == MPI2_FUNCTION_EVENT_ACK)
  475. return;
  476. if (ioc->base_cmds.status == MPT2_CMD_NOT_USED)
  477. return;
  478. ioc->base_cmds.status |= MPT2_CMD_COMPLETE;
  479. if (mpi_reply) {
  480. ioc->base_cmds.status |= MPT2_CMD_REPLY_VALID;
  481. memcpy(ioc->base_cmds.reply, mpi_reply, mpi_reply->MsgLength*4);
  482. }
  483. ioc->base_cmds.status &= ~MPT2_CMD_PENDING;
  484. complete(&ioc->base_cmds.done);
  485. }
  486. /**
  487. * _base_async_event - main callback handler for firmware asyn events
  488. * @ioc: pointer to scsi command object
  489. * @VF_ID: virtual function id
  490. * @reply: reply message frame(lower 32bit addr)
  491. *
  492. * Return nothing.
  493. */
  494. static void
  495. _base_async_event(struct MPT2SAS_ADAPTER *ioc, u8 VF_ID, u32 reply)
  496. {
  497. Mpi2EventNotificationReply_t *mpi_reply;
  498. Mpi2EventAckRequest_t *ack_request;
  499. u16 smid;
  500. mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
  501. if (!mpi_reply)
  502. return;
  503. if (mpi_reply->Function != MPI2_FUNCTION_EVENT_NOTIFICATION)
  504. return;
  505. #ifdef CONFIG_SCSI_MPT2SAS_LOGGING
  506. _base_display_event_data(ioc, mpi_reply);
  507. #endif
  508. if (!(mpi_reply->AckRequired & MPI2_EVENT_NOTIFICATION_ACK_REQUIRED))
  509. goto out;
  510. smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
  511. if (!smid) {
  512. printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
  513. ioc->name, __func__);
  514. goto out;
  515. }
  516. ack_request = mpt2sas_base_get_msg_frame(ioc, smid);
  517. memset(ack_request, 0, sizeof(Mpi2EventAckRequest_t));
  518. ack_request->Function = MPI2_FUNCTION_EVENT_ACK;
  519. ack_request->Event = mpi_reply->Event;
  520. ack_request->EventContext = mpi_reply->EventContext;
  521. ack_request->VF_ID = VF_ID;
  522. mpt2sas_base_put_smid_default(ioc, smid, VF_ID);
  523. out:
  524. /* scsih callback handler */
  525. mpt2sas_scsih_event_callback(ioc, VF_ID, reply);
  526. /* ctl callback handler */
  527. mpt2sas_ctl_event_callback(ioc, VF_ID, reply);
  528. }
  529. /**
  530. * _base_mask_interrupts - disable interrupts
  531. * @ioc: pointer to scsi command object
  532. *
  533. * Disabling ResetIRQ, Reply and Doorbell Interrupts
  534. *
  535. * Return nothing.
  536. */
  537. static void
  538. _base_mask_interrupts(struct MPT2SAS_ADAPTER *ioc)
  539. {
  540. u32 him_register;
  541. ioc->mask_interrupts = 1;
  542. him_register = readl(&ioc->chip->HostInterruptMask);
  543. him_register |= MPI2_HIM_DIM + MPI2_HIM_RIM + MPI2_HIM_RESET_IRQ_MASK;
  544. writel(him_register, &ioc->chip->HostInterruptMask);
  545. readl(&ioc->chip->HostInterruptMask);
  546. }
  547. /**
  548. * _base_unmask_interrupts - enable interrupts
  549. * @ioc: pointer to scsi command object
  550. *
  551. * Enabling only Reply Interrupts
  552. *
  553. * Return nothing.
  554. */
  555. static void
  556. _base_unmask_interrupts(struct MPT2SAS_ADAPTER *ioc)
  557. {
  558. u32 him_register;
  559. writel(0, &ioc->chip->HostInterruptStatus);
  560. him_register = readl(&ioc->chip->HostInterruptMask);
  561. him_register &= ~MPI2_HIM_RIM;
  562. writel(him_register, &ioc->chip->HostInterruptMask);
  563. ioc->mask_interrupts = 0;
  564. }
  565. /**
  566. * _base_interrupt - MPT adapter (IOC) specific interrupt handler.
  567. * @irq: irq number (not used)
  568. * @bus_id: bus identifier cookie == pointer to MPT_ADAPTER structure
  569. * @r: pt_regs pointer (not used)
  570. *
  571. * Return IRQ_HANDLE if processed, else IRQ_NONE.
  572. */
  573. static irqreturn_t
  574. _base_interrupt(int irq, void *bus_id)
  575. {
  576. u32 post_index, post_index_next, completed_cmds;
  577. u8 request_desript_type;
  578. u16 smid;
  579. u8 cb_idx;
  580. u32 reply;
  581. u8 VF_ID;
  582. int i;
  583. struct MPT2SAS_ADAPTER *ioc = bus_id;
  584. if (ioc->mask_interrupts)
  585. return IRQ_NONE;
  586. post_index = ioc->reply_post_host_index;
  587. request_desript_type = ioc->reply_post_free[post_index].
  588. Default.ReplyFlags & MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK;
  589. if (request_desript_type == MPI2_RPY_DESCRIPT_FLAGS_UNUSED)
  590. return IRQ_NONE;
  591. completed_cmds = 0;
  592. do {
  593. if (ioc->reply_post_free[post_index].Words == ~0ULL)
  594. goto out;
  595. reply = 0;
  596. cb_idx = 0xFF;
  597. smid = le16_to_cpu(ioc->reply_post_free[post_index].
  598. Default.DescriptorTypeDependent1);
  599. VF_ID = ioc->reply_post_free[post_index].
  600. Default.VF_ID;
  601. if (request_desript_type ==
  602. MPI2_RPY_DESCRIPT_FLAGS_ADDRESS_REPLY) {
  603. reply = le32_to_cpu(ioc->reply_post_free[post_index].
  604. AddressReply.ReplyFrameAddress);
  605. } else if (request_desript_type ==
  606. MPI2_RPY_DESCRIPT_FLAGS_TARGET_COMMAND_BUFFER)
  607. goto next;
  608. else if (request_desript_type ==
  609. MPI2_RPY_DESCRIPT_FLAGS_TARGETASSIST_SUCCESS)
  610. goto next;
  611. if (smid)
  612. cb_idx = ioc->scsi_lookup[smid - 1].cb_idx;
  613. if (smid && cb_idx != 0xFF) {
  614. mpt_callbacks[cb_idx](ioc, smid, VF_ID, reply);
  615. if (reply)
  616. _base_display_reply_info(ioc, smid, VF_ID,
  617. reply);
  618. mpt2sas_base_free_smid(ioc, smid);
  619. }
  620. if (!smid)
  621. _base_async_event(ioc, VF_ID, reply);
  622. /* reply free queue handling */
  623. if (reply) {
  624. ioc->reply_free_host_index =
  625. (ioc->reply_free_host_index ==
  626. (ioc->reply_free_queue_depth - 1)) ?
  627. 0 : ioc->reply_free_host_index + 1;
  628. ioc->reply_free[ioc->reply_free_host_index] =
  629. cpu_to_le32(reply);
  630. writel(ioc->reply_free_host_index,
  631. &ioc->chip->ReplyFreeHostIndex);
  632. wmb();
  633. }
  634. next:
  635. post_index_next = (post_index == (ioc->reply_post_queue_depth -
  636. 1)) ? 0 : post_index + 1;
  637. request_desript_type =
  638. ioc->reply_post_free[post_index_next].Default.ReplyFlags
  639. & MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK;
  640. completed_cmds++;
  641. if (request_desript_type == MPI2_RPY_DESCRIPT_FLAGS_UNUSED)
  642. goto out;
  643. post_index = post_index_next;
  644. } while (1);
  645. out:
  646. if (!completed_cmds)
  647. return IRQ_NONE;
  648. /* reply post descriptor handling */
  649. post_index_next = ioc->reply_post_host_index;
  650. for (i = 0 ; i < completed_cmds; i++) {
  651. post_index = post_index_next;
  652. /* poison the reply post descriptor */
  653. ioc->reply_post_free[post_index_next].Words = ~0ULL;
  654. post_index_next = (post_index ==
  655. (ioc->reply_post_queue_depth - 1))
  656. ? 0 : post_index + 1;
  657. }
  658. ioc->reply_post_host_index = post_index_next;
  659. writel(post_index_next, &ioc->chip->ReplyPostHostIndex);
  660. wmb();
  661. return IRQ_HANDLED;
  662. }
  663. /**
  664. * mpt2sas_base_release_callback_handler - clear interupt callback handler
  665. * @cb_idx: callback index
  666. *
  667. * Return nothing.
  668. */
  669. void
  670. mpt2sas_base_release_callback_handler(u8 cb_idx)
  671. {
  672. mpt_callbacks[cb_idx] = NULL;
  673. }
  674. /**
  675. * mpt2sas_base_register_callback_handler - obtain index for the interrupt callback handler
  676. * @cb_func: callback function
  677. *
  678. * Returns cb_func.
  679. */
  680. u8
  681. mpt2sas_base_register_callback_handler(MPT_CALLBACK cb_func)
  682. {
  683. u8 cb_idx;
  684. for (cb_idx = MPT_MAX_CALLBACKS-1; cb_idx; cb_idx--)
  685. if (mpt_callbacks[cb_idx] == NULL)
  686. break;
  687. mpt_callbacks[cb_idx] = cb_func;
  688. return cb_idx;
  689. }
  690. /**
  691. * mpt2sas_base_initialize_callback_handler - initialize the interrupt callback handler
  692. *
  693. * Return nothing.
  694. */
  695. void
  696. mpt2sas_base_initialize_callback_handler(void)
  697. {
  698. u8 cb_idx;
  699. for (cb_idx = 0; cb_idx < MPT_MAX_CALLBACKS; cb_idx++)
  700. mpt2sas_base_release_callback_handler(cb_idx);
  701. }
  702. /**
  703. * mpt2sas_base_build_zero_len_sge - build zero length sg entry
  704. * @ioc: per adapter object
  705. * @paddr: virtual address for SGE
  706. *
  707. * Create a zero length scatter gather entry to insure the IOCs hardware has
  708. * something to use if the target device goes brain dead and tries
  709. * to send data even when none is asked for.
  710. *
  711. * Return nothing.
  712. */
  713. void
  714. mpt2sas_base_build_zero_len_sge(struct MPT2SAS_ADAPTER *ioc, void *paddr)
  715. {
  716. u32 flags_length = (u32)((MPI2_SGE_FLAGS_LAST_ELEMENT |
  717. MPI2_SGE_FLAGS_END_OF_BUFFER | MPI2_SGE_FLAGS_END_OF_LIST |
  718. MPI2_SGE_FLAGS_SIMPLE_ELEMENT) <<
  719. MPI2_SGE_FLAGS_SHIFT);
  720. ioc->base_add_sg_single(paddr, flags_length, -1);
  721. }
  722. /**
  723. * _base_add_sg_single_32 - Place a simple 32 bit SGE at address pAddr.
  724. * @paddr: virtual address for SGE
  725. * @flags_length: SGE flags and data transfer length
  726. * @dma_addr: Physical address
  727. *
  728. * Return nothing.
  729. */
  730. static void
  731. _base_add_sg_single_32(void *paddr, u32 flags_length, dma_addr_t dma_addr)
  732. {
  733. Mpi2SGESimple32_t *sgel = paddr;
  734. flags_length |= (MPI2_SGE_FLAGS_32_BIT_ADDRESSING |
  735. MPI2_SGE_FLAGS_SYSTEM_ADDRESS) << MPI2_SGE_FLAGS_SHIFT;
  736. sgel->FlagsLength = cpu_to_le32(flags_length);
  737. sgel->Address = cpu_to_le32(dma_addr);
  738. }
  739. /**
  740. * _base_add_sg_single_64 - Place a simple 64 bit SGE at address pAddr.
  741. * @paddr: virtual address for SGE
  742. * @flags_length: SGE flags and data transfer length
  743. * @dma_addr: Physical address
  744. *
  745. * Return nothing.
  746. */
  747. static void
  748. _base_add_sg_single_64(void *paddr, u32 flags_length, dma_addr_t dma_addr)
  749. {
  750. Mpi2SGESimple64_t *sgel = paddr;
  751. flags_length |= (MPI2_SGE_FLAGS_64_BIT_ADDRESSING |
  752. MPI2_SGE_FLAGS_SYSTEM_ADDRESS) << MPI2_SGE_FLAGS_SHIFT;
  753. sgel->FlagsLength = cpu_to_le32(flags_length);
  754. sgel->Address = cpu_to_le64(dma_addr);
  755. }
  756. #define convert_to_kb(x) ((x) << (PAGE_SHIFT - 10))
  757. /**
  758. * _base_config_dma_addressing - set dma addressing
  759. * @ioc: per adapter object
  760. * @pdev: PCI device struct
  761. *
  762. * Returns 0 for success, non-zero for failure.
  763. */
  764. static int
  765. _base_config_dma_addressing(struct MPT2SAS_ADAPTER *ioc, struct pci_dev *pdev)
  766. {
  767. struct sysinfo s;
  768. char *desc = NULL;
  769. if (sizeof(dma_addr_t) > 4) {
  770. const uint64_t required_mask =
  771. dma_get_required_mask(&pdev->dev);
  772. if ((required_mask > DMA_BIT_MASK(32)) && !pci_set_dma_mask(pdev,
  773. DMA_BIT_MASK(64)) && !pci_set_consistent_dma_mask(pdev,
  774. DMA_BIT_MASK(64))) {
  775. ioc->base_add_sg_single = &_base_add_sg_single_64;
  776. ioc->sge_size = sizeof(Mpi2SGESimple64_t);
  777. desc = "64";
  778. goto out;
  779. }
  780. }
  781. if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))
  782. && !pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32))) {
  783. ioc->base_add_sg_single = &_base_add_sg_single_32;
  784. ioc->sge_size = sizeof(Mpi2SGESimple32_t);
  785. desc = "32";
  786. } else
  787. return -ENODEV;
  788. out:
  789. si_meminfo(&s);
  790. printk(MPT2SAS_INFO_FMT "%s BIT PCI BUS DMA ADDRESSING SUPPORTED, "
  791. "total mem (%ld kB)\n", ioc->name, desc, convert_to_kb(s.totalram));
  792. return 0;
  793. }
  794. /**
  795. * _base_save_msix_table - backup msix vector table
  796. * @ioc: per adapter object
  797. *
  798. * This address an errata where diag reset clears out the table
  799. */
  800. static void
  801. _base_save_msix_table(struct MPT2SAS_ADAPTER *ioc)
  802. {
  803. int i;
  804. if (!ioc->msix_enable || ioc->msix_table_backup == NULL)
  805. return;
  806. for (i = 0; i < ioc->msix_vector_count; i++)
  807. ioc->msix_table_backup[i] = ioc->msix_table[i];
  808. }
  809. /**
  810. * _base_restore_msix_table - this restores the msix vector table
  811. * @ioc: per adapter object
  812. *
  813. */
  814. static void
  815. _base_restore_msix_table(struct MPT2SAS_ADAPTER *ioc)
  816. {
  817. int i;
  818. if (!ioc->msix_enable || ioc->msix_table_backup == NULL)
  819. return;
  820. for (i = 0; i < ioc->msix_vector_count; i++)
  821. ioc->msix_table[i] = ioc->msix_table_backup[i];
  822. }
  823. /**
  824. * _base_check_enable_msix - checks MSIX capabable.
  825. * @ioc: per adapter object
  826. *
  827. * Check to see if card is capable of MSIX, and set number
  828. * of avaliable msix vectors
  829. */
  830. static int
  831. _base_check_enable_msix(struct MPT2SAS_ADAPTER *ioc)
  832. {
  833. int base;
  834. u16 message_control;
  835. u32 msix_table_offset;
  836. base = pci_find_capability(ioc->pdev, PCI_CAP_ID_MSIX);
  837. if (!base) {
  838. dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "msix not "
  839. "supported\n", ioc->name));
  840. return -EINVAL;
  841. }
  842. /* get msix vector count */
  843. pci_read_config_word(ioc->pdev, base + 2, &message_control);
  844. ioc->msix_vector_count = (message_control & 0x3FF) + 1;
  845. /* get msix table */
  846. pci_read_config_dword(ioc->pdev, base + 4, &msix_table_offset);
  847. msix_table_offset &= 0xFFFFFFF8;
  848. ioc->msix_table = (u32 *)((void *)ioc->chip + msix_table_offset);
  849. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "msix is supported, "
  850. "vector_count(%d), table_offset(0x%08x), table(%p)\n", ioc->name,
  851. ioc->msix_vector_count, msix_table_offset, ioc->msix_table));
  852. return 0;
  853. }
  854. /**
  855. * _base_disable_msix - disables msix
  856. * @ioc: per adapter object
  857. *
  858. */
  859. static void
  860. _base_disable_msix(struct MPT2SAS_ADAPTER *ioc)
  861. {
  862. if (ioc->msix_enable) {
  863. pci_disable_msix(ioc->pdev);
  864. kfree(ioc->msix_table_backup);
  865. ioc->msix_table_backup = NULL;
  866. ioc->msix_enable = 0;
  867. }
  868. }
  869. /**
  870. * _base_enable_msix - enables msix, failback to io_apic
  871. * @ioc: per adapter object
  872. *
  873. */
  874. static int
  875. _base_enable_msix(struct MPT2SAS_ADAPTER *ioc)
  876. {
  877. struct msix_entry entries;
  878. int r;
  879. u8 try_msix = 0;
  880. if (msix_disable == -1 || msix_disable == 0)
  881. try_msix = 1;
  882. if (!try_msix)
  883. goto try_ioapic;
  884. if (_base_check_enable_msix(ioc) != 0)
  885. goto try_ioapic;
  886. ioc->msix_table_backup = kcalloc(ioc->msix_vector_count,
  887. sizeof(u32), GFP_KERNEL);
  888. if (!ioc->msix_table_backup) {
  889. dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "allocation for "
  890. "msix_table_backup failed!!!\n", ioc->name));
  891. goto try_ioapic;
  892. }
  893. memset(&entries, 0, sizeof(struct msix_entry));
  894. r = pci_enable_msix(ioc->pdev, &entries, 1);
  895. if (r) {
  896. dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "pci_enable_msix "
  897. "failed (r=%d) !!!\n", ioc->name, r));
  898. goto try_ioapic;
  899. }
  900. r = request_irq(entries.vector, _base_interrupt, IRQF_SHARED,
  901. ioc->name, ioc);
  902. if (r) {
  903. dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "unable to allocate "
  904. "interrupt %d !!!\n", ioc->name, entries.vector));
  905. pci_disable_msix(ioc->pdev);
  906. goto try_ioapic;
  907. }
  908. ioc->pci_irq = entries.vector;
  909. ioc->msix_enable = 1;
  910. return 0;
  911. /* failback to io_apic interrupt routing */
  912. try_ioapic:
  913. r = request_irq(ioc->pdev->irq, _base_interrupt, IRQF_SHARED,
  914. ioc->name, ioc);
  915. if (r) {
  916. printk(MPT2SAS_ERR_FMT "unable to allocate interrupt %d!\n",
  917. ioc->name, ioc->pdev->irq);
  918. r = -EBUSY;
  919. goto out_fail;
  920. }
  921. ioc->pci_irq = ioc->pdev->irq;
  922. return 0;
  923. out_fail:
  924. return r;
  925. }
  926. /**
  927. * mpt2sas_base_map_resources - map in controller resources (io/irq/memap)
  928. * @ioc: per adapter object
  929. *
  930. * Returns 0 for success, non-zero for failure.
  931. */
  932. int
  933. mpt2sas_base_map_resources(struct MPT2SAS_ADAPTER *ioc)
  934. {
  935. struct pci_dev *pdev = ioc->pdev;
  936. u32 memap_sz;
  937. u32 pio_sz;
  938. int i, r = 0;
  939. dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n",
  940. ioc->name, __func__));
  941. ioc->bars = pci_select_bars(pdev, IORESOURCE_MEM);
  942. if (pci_enable_device_mem(pdev)) {
  943. printk(MPT2SAS_WARN_FMT "pci_enable_device_mem: "
  944. "failed\n", ioc->name);
  945. return -ENODEV;
  946. }
  947. if (pci_request_selected_regions(pdev, ioc->bars,
  948. MPT2SAS_DRIVER_NAME)) {
  949. printk(MPT2SAS_WARN_FMT "pci_request_selected_regions: "
  950. "failed\n", ioc->name);
  951. r = -ENODEV;
  952. goto out_fail;
  953. }
  954. pci_set_master(pdev);
  955. if (_base_config_dma_addressing(ioc, pdev) != 0) {
  956. printk(MPT2SAS_WARN_FMT "no suitable DMA mask for %s\n",
  957. ioc->name, pci_name(pdev));
  958. r = -ENODEV;
  959. goto out_fail;
  960. }
  961. for (i = 0, memap_sz = 0, pio_sz = 0 ; i < DEVICE_COUNT_RESOURCE; i++) {
  962. if (pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE_IO) {
  963. if (pio_sz)
  964. continue;
  965. ioc->pio_chip = pci_resource_start(pdev, i);
  966. pio_sz = pci_resource_len(pdev, i);
  967. } else {
  968. if (memap_sz)
  969. continue;
  970. ioc->chip_phys = pci_resource_start(pdev, i);
  971. memap_sz = pci_resource_len(pdev, i);
  972. ioc->chip = ioremap(ioc->chip_phys, memap_sz);
  973. if (ioc->chip == NULL) {
  974. printk(MPT2SAS_ERR_FMT "unable to map adapter "
  975. "memory!\n", ioc->name);
  976. r = -EINVAL;
  977. goto out_fail;
  978. }
  979. }
  980. }
  981. pci_set_drvdata(pdev, ioc->shost);
  982. _base_mask_interrupts(ioc);
  983. r = _base_enable_msix(ioc);
  984. if (r)
  985. goto out_fail;
  986. printk(MPT2SAS_INFO_FMT "%s: IRQ %d\n",
  987. ioc->name, ((ioc->msix_enable) ? "PCI-MSI-X enabled" :
  988. "IO-APIC enabled"), ioc->pci_irq);
  989. printk(MPT2SAS_INFO_FMT "iomem(0x%lx), mapped(0x%p), size(%d)\n",
  990. ioc->name, ioc->chip_phys, ioc->chip, memap_sz);
  991. printk(MPT2SAS_INFO_FMT "ioport(0x%lx), size(%d)\n",
  992. ioc->name, ioc->pio_chip, pio_sz);
  993. return 0;
  994. out_fail:
  995. if (ioc->chip_phys)
  996. iounmap(ioc->chip);
  997. ioc->chip_phys = 0;
  998. ioc->pci_irq = -1;
  999. pci_release_selected_regions(ioc->pdev, ioc->bars);
  1000. pci_disable_device(pdev);
  1001. pci_set_drvdata(pdev, NULL);
  1002. return r;
  1003. }
  1004. /**
  1005. * mpt2sas_base_get_msg_frame_dma - obtain request mf pointer phys addr
  1006. * @ioc: per adapter object
  1007. * @smid: system request message index(smid zero is invalid)
  1008. *
  1009. * Returns phys pointer to message frame.
  1010. */
  1011. dma_addr_t
  1012. mpt2sas_base_get_msg_frame_dma(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1013. {
  1014. return ioc->request_dma + (smid * ioc->request_sz);
  1015. }
  1016. /**
  1017. * mpt2sas_base_get_msg_frame - obtain request mf pointer
  1018. * @ioc: per adapter object
  1019. * @smid: system request message index(smid zero is invalid)
  1020. *
  1021. * Returns virt pointer to message frame.
  1022. */
  1023. void *
  1024. mpt2sas_base_get_msg_frame(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1025. {
  1026. return (void *)(ioc->request + (smid * ioc->request_sz));
  1027. }
  1028. /**
  1029. * mpt2sas_base_get_sense_buffer - obtain a sense buffer assigned to a mf request
  1030. * @ioc: per adapter object
  1031. * @smid: system request message index
  1032. *
  1033. * Returns virt pointer to sense buffer.
  1034. */
  1035. void *
  1036. mpt2sas_base_get_sense_buffer(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1037. {
  1038. return (void *)(ioc->sense + ((smid - 1) * SCSI_SENSE_BUFFERSIZE));
  1039. }
  1040. /**
  1041. * mpt2sas_base_get_sense_buffer_dma - obtain a sense buffer assigned to a mf request
  1042. * @ioc: per adapter object
  1043. * @smid: system request message index
  1044. *
  1045. * Returns phys pointer to sense buffer.
  1046. */
  1047. dma_addr_t
  1048. mpt2sas_base_get_sense_buffer_dma(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1049. {
  1050. return ioc->sense_dma + ((smid - 1) * SCSI_SENSE_BUFFERSIZE);
  1051. }
  1052. /**
  1053. * mpt2sas_base_get_reply_virt_addr - obtain reply frames virt address
  1054. * @ioc: per adapter object
  1055. * @phys_addr: lower 32 physical addr of the reply
  1056. *
  1057. * Converts 32bit lower physical addr into a virt address.
  1058. */
  1059. void *
  1060. mpt2sas_base_get_reply_virt_addr(struct MPT2SAS_ADAPTER *ioc, u32 phys_addr)
  1061. {
  1062. if (!phys_addr)
  1063. return NULL;
  1064. return ioc->reply + (phys_addr - (u32)ioc->reply_dma);
  1065. }
  1066. /**
  1067. * mpt2sas_base_get_smid - obtain a free smid
  1068. * @ioc: per adapter object
  1069. * @cb_idx: callback index
  1070. *
  1071. * Returns smid (zero is invalid)
  1072. */
  1073. u16
  1074. mpt2sas_base_get_smid(struct MPT2SAS_ADAPTER *ioc, u8 cb_idx)
  1075. {
  1076. unsigned long flags;
  1077. struct request_tracker *request;
  1078. u16 smid;
  1079. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  1080. if (list_empty(&ioc->free_list)) {
  1081. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1082. printk(MPT2SAS_ERR_FMT "%s: smid not available\n",
  1083. ioc->name, __func__);
  1084. return 0;
  1085. }
  1086. request = list_entry(ioc->free_list.next,
  1087. struct request_tracker, tracker_list);
  1088. request->cb_idx = cb_idx;
  1089. smid = request->smid;
  1090. list_del(&request->tracker_list);
  1091. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1092. return smid;
  1093. }
  1094. /**
  1095. * mpt2sas_base_free_smid - put smid back on free_list
  1096. * @ioc: per adapter object
  1097. * @smid: system request message index
  1098. *
  1099. * Return nothing.
  1100. */
  1101. void
  1102. mpt2sas_base_free_smid(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1103. {
  1104. unsigned long flags;
  1105. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  1106. ioc->scsi_lookup[smid - 1].cb_idx = 0xFF;
  1107. list_add_tail(&ioc->scsi_lookup[smid - 1].tracker_list,
  1108. &ioc->free_list);
  1109. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1110. /*
  1111. * See _wait_for_commands_to_complete() call with regards to this code.
  1112. */
  1113. if (ioc->shost_recovery && ioc->pending_io_count) {
  1114. if (ioc->pending_io_count == 1)
  1115. wake_up(&ioc->reset_wq);
  1116. ioc->pending_io_count--;
  1117. }
  1118. }
  1119. /**
  1120. * _base_writeq - 64 bit write to MMIO
  1121. * @ioc: per adapter object
  1122. * @b: data payload
  1123. * @addr: address in MMIO space
  1124. * @writeq_lock: spin lock
  1125. *
  1126. * Glue for handling an atomic 64 bit word to MMIO. This special handling takes
  1127. * care of 32 bit environment where its not quarenteed to send the entire word
  1128. * in one transfer.
  1129. */
  1130. #ifndef writeq
  1131. static inline void _base_writeq(__u64 b, volatile void __iomem *addr,
  1132. spinlock_t *writeq_lock)
  1133. {
  1134. unsigned long flags;
  1135. __u64 data_out = cpu_to_le64(b);
  1136. spin_lock_irqsave(writeq_lock, flags);
  1137. writel((u32)(data_out), addr);
  1138. writel((u32)(data_out >> 32), (addr + 4));
  1139. spin_unlock_irqrestore(writeq_lock, flags);
  1140. }
  1141. #else
  1142. static inline void _base_writeq(__u64 b, volatile void __iomem *addr,
  1143. spinlock_t *writeq_lock)
  1144. {
  1145. writeq(cpu_to_le64(b), addr);
  1146. }
  1147. #endif
  1148. /**
  1149. * mpt2sas_base_put_smid_scsi_io - send SCSI_IO request to firmware
  1150. * @ioc: per adapter object
  1151. * @smid: system request message index
  1152. * @vf_id: virtual function id
  1153. * @handle: device handle
  1154. *
  1155. * Return nothing.
  1156. */
  1157. void
  1158. mpt2sas_base_put_smid_scsi_io(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 vf_id,
  1159. u16 handle)
  1160. {
  1161. Mpi2RequestDescriptorUnion_t descriptor;
  1162. u64 *request = (u64 *)&descriptor;
  1163. descriptor.SCSIIO.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_SCSI_IO;
  1164. descriptor.SCSIIO.VF_ID = vf_id;
  1165. descriptor.SCSIIO.SMID = cpu_to_le16(smid);
  1166. descriptor.SCSIIO.DevHandle = cpu_to_le16(handle);
  1167. descriptor.SCSIIO.LMID = 0;
  1168. _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
  1169. &ioc->scsi_lookup_lock);
  1170. }
  1171. /**
  1172. * mpt2sas_base_put_smid_hi_priority - send Task Managment request to firmware
  1173. * @ioc: per adapter object
  1174. * @smid: system request message index
  1175. * @vf_id: virtual function id
  1176. *
  1177. * Return nothing.
  1178. */
  1179. void
  1180. mpt2sas_base_put_smid_hi_priority(struct MPT2SAS_ADAPTER *ioc, u16 smid,
  1181. u8 vf_id)
  1182. {
  1183. Mpi2RequestDescriptorUnion_t descriptor;
  1184. u64 *request = (u64 *)&descriptor;
  1185. descriptor.HighPriority.RequestFlags =
  1186. MPI2_REQ_DESCRIPT_FLAGS_HIGH_PRIORITY;
  1187. descriptor.HighPriority.VF_ID = vf_id;
  1188. descriptor.HighPriority.SMID = cpu_to_le16(smid);
  1189. descriptor.HighPriority.LMID = 0;
  1190. descriptor.HighPriority.Reserved1 = 0;
  1191. _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
  1192. &ioc->scsi_lookup_lock);
  1193. }
  1194. /**
  1195. * mpt2sas_base_put_smid_default - Default, primarily used for config pages
  1196. * @ioc: per adapter object
  1197. * @smid: system request message index
  1198. * @vf_id: virtual function id
  1199. *
  1200. * Return nothing.
  1201. */
  1202. void
  1203. mpt2sas_base_put_smid_default(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 vf_id)
  1204. {
  1205. Mpi2RequestDescriptorUnion_t descriptor;
  1206. u64 *request = (u64 *)&descriptor;
  1207. descriptor.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE;
  1208. descriptor.Default.VF_ID = vf_id;
  1209. descriptor.Default.SMID = cpu_to_le16(smid);
  1210. descriptor.Default.LMID = 0;
  1211. descriptor.Default.DescriptorTypeDependent = 0;
  1212. _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
  1213. &ioc->scsi_lookup_lock);
  1214. }
  1215. /**
  1216. * mpt2sas_base_put_smid_target_assist - send Target Assist/Status to firmware
  1217. * @ioc: per adapter object
  1218. * @smid: system request message index
  1219. * @vf_id: virtual function id
  1220. * @io_index: value used to track the IO
  1221. *
  1222. * Return nothing.
  1223. */
  1224. void
  1225. mpt2sas_base_put_smid_target_assist(struct MPT2SAS_ADAPTER *ioc, u16 smid,
  1226. u8 vf_id, u16 io_index)
  1227. {
  1228. Mpi2RequestDescriptorUnion_t descriptor;
  1229. u64 *request = (u64 *)&descriptor;
  1230. descriptor.SCSITarget.RequestFlags =
  1231. MPI2_REQ_DESCRIPT_FLAGS_SCSI_TARGET;
  1232. descriptor.SCSITarget.VF_ID = vf_id;
  1233. descriptor.SCSITarget.SMID = cpu_to_le16(smid);
  1234. descriptor.SCSITarget.LMID = 0;
  1235. descriptor.SCSITarget.IoIndex = cpu_to_le16(io_index);
  1236. _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
  1237. &ioc->scsi_lookup_lock);
  1238. }
  1239. /**
  1240. * _base_display_ioc_capabilities - Disply IOC's capabilities.
  1241. * @ioc: per adapter object
  1242. *
  1243. * Return nothing.
  1244. */
  1245. static void
  1246. _base_display_ioc_capabilities(struct MPT2SAS_ADAPTER *ioc)
  1247. {
  1248. int i = 0;
  1249. char desc[16];
  1250. u8 revision;
  1251. u32 iounit_pg1_flags;
  1252. pci_read_config_byte(ioc->pdev, PCI_CLASS_REVISION, &revision);
  1253. strncpy(desc, ioc->manu_pg0.ChipName, 16);
  1254. printk(MPT2SAS_INFO_FMT "%s: FWVersion(%02d.%02d.%02d.%02d), "
  1255. "ChipRevision(0x%02x), BiosVersion(%02d.%02d.%02d.%02d)\n",
  1256. ioc->name, desc,
  1257. (ioc->facts.FWVersion.Word & 0xFF000000) >> 24,
  1258. (ioc->facts.FWVersion.Word & 0x00FF0000) >> 16,
  1259. (ioc->facts.FWVersion.Word & 0x0000FF00) >> 8,
  1260. ioc->facts.FWVersion.Word & 0x000000FF,
  1261. revision,
  1262. (ioc->bios_pg3.BiosVersion & 0xFF000000) >> 24,
  1263. (ioc->bios_pg3.BiosVersion & 0x00FF0000) >> 16,
  1264. (ioc->bios_pg3.BiosVersion & 0x0000FF00) >> 8,
  1265. ioc->bios_pg3.BiosVersion & 0x000000FF);
  1266. printk(MPT2SAS_INFO_FMT "Protocol=(", ioc->name);
  1267. if (ioc->facts.ProtocolFlags & MPI2_IOCFACTS_PROTOCOL_SCSI_INITIATOR) {
  1268. printk("Initiator");
  1269. i++;
  1270. }
  1271. if (ioc->facts.ProtocolFlags & MPI2_IOCFACTS_PROTOCOL_SCSI_TARGET) {
  1272. printk("%sTarget", i ? "," : "");
  1273. i++;
  1274. }
  1275. i = 0;
  1276. printk("), ");
  1277. printk("Capabilities=(");
  1278. if (ioc->facts.IOCCapabilities &
  1279. MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID) {
  1280. printk("Raid");
  1281. i++;
  1282. }
  1283. if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_TLR) {
  1284. printk("%sTLR", i ? "," : "");
  1285. i++;
  1286. }
  1287. if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_MULTICAST) {
  1288. printk("%sMulticast", i ? "," : "");
  1289. i++;
  1290. }
  1291. if (ioc->facts.IOCCapabilities &
  1292. MPI2_IOCFACTS_CAPABILITY_BIDIRECTIONAL_TARGET) {
  1293. printk("%sBIDI Target", i ? "," : "");
  1294. i++;
  1295. }
  1296. if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_EEDP) {
  1297. printk("%sEEDP", i ? "," : "");
  1298. i++;
  1299. }
  1300. if (ioc->facts.IOCCapabilities &
  1301. MPI2_IOCFACTS_CAPABILITY_SNAPSHOT_BUFFER) {
  1302. printk("%sSnapshot Buffer", i ? "," : "");
  1303. i++;
  1304. }
  1305. if (ioc->facts.IOCCapabilities &
  1306. MPI2_IOCFACTS_CAPABILITY_DIAG_TRACE_BUFFER) {
  1307. printk("%sDiag Trace Buffer", i ? "," : "");
  1308. i++;
  1309. }
  1310. if (ioc->facts.IOCCapabilities &
  1311. MPI2_IOCFACTS_CAPABILITY_TASK_SET_FULL_HANDLING) {
  1312. printk("%sTask Set Full", i ? "," : "");
  1313. i++;
  1314. }
  1315. iounit_pg1_flags = le32_to_cpu(ioc->iounit_pg1.Flags);
  1316. if (!(iounit_pg1_flags & MPI2_IOUNITPAGE1_NATIVE_COMMAND_Q_DISABLE)) {
  1317. printk("%sNCQ", i ? "," : "");
  1318. i++;
  1319. }
  1320. printk(")\n");
  1321. }
  1322. /**
  1323. * _base_static_config_pages - static start of day config pages
  1324. * @ioc: per adapter object
  1325. *
  1326. * Return nothing.
  1327. */
  1328. static void
  1329. _base_static_config_pages(struct MPT2SAS_ADAPTER *ioc)
  1330. {
  1331. Mpi2ConfigReply_t mpi_reply;
  1332. u32 iounit_pg1_flags;
  1333. mpt2sas_config_get_manufacturing_pg0(ioc, &mpi_reply, &ioc->manu_pg0);
  1334. mpt2sas_config_get_bios_pg2(ioc, &mpi_reply, &ioc->bios_pg2);
  1335. mpt2sas_config_get_bios_pg3(ioc, &mpi_reply, &ioc->bios_pg3);
  1336. mpt2sas_config_get_ioc_pg8(ioc, &mpi_reply, &ioc->ioc_pg8);
  1337. mpt2sas_config_get_iounit_pg0(ioc, &mpi_reply, &ioc->iounit_pg0);
  1338. mpt2sas_config_get_iounit_pg1(ioc, &mpi_reply, &ioc->iounit_pg1);
  1339. _base_display_ioc_capabilities(ioc);
  1340. /*
  1341. * Enable task_set_full handling in iounit_pg1 when the
  1342. * facts capabilities indicate that its supported.
  1343. */
  1344. iounit_pg1_flags = le32_to_cpu(ioc->iounit_pg1.Flags);
  1345. if ((ioc->facts.IOCCapabilities &
  1346. MPI2_IOCFACTS_CAPABILITY_TASK_SET_FULL_HANDLING))
  1347. iounit_pg1_flags &=
  1348. ~MPI2_IOUNITPAGE1_DISABLE_TASK_SET_FULL_HANDLING;
  1349. else
  1350. iounit_pg1_flags |=
  1351. MPI2_IOUNITPAGE1_DISABLE_TASK_SET_FULL_HANDLING;
  1352. ioc->iounit_pg1.Flags = cpu_to_le32(iounit_pg1_flags);
  1353. mpt2sas_config_set_iounit_pg1(ioc, &mpi_reply, ioc->iounit_pg1);
  1354. }
  1355. /**
  1356. * _base_release_memory_pools - release memory
  1357. * @ioc: per adapter object
  1358. *
  1359. * Free memory allocated from _base_allocate_memory_pools.
  1360. *
  1361. * Return nothing.
  1362. */
  1363. static void
  1364. _base_release_memory_pools(struct MPT2SAS_ADAPTER *ioc)
  1365. {
  1366. dexitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
  1367. __func__));
  1368. if (ioc->request) {
  1369. pci_free_consistent(ioc->pdev, ioc->request_dma_sz,
  1370. ioc->request, ioc->request_dma);
  1371. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "request_pool(0x%p)"
  1372. ": free\n", ioc->name, ioc->request));
  1373. ioc->request = NULL;
  1374. }
  1375. if (ioc->sense) {
  1376. pci_pool_free(ioc->sense_dma_pool, ioc->sense, ioc->sense_dma);
  1377. if (ioc->sense_dma_pool)
  1378. pci_pool_destroy(ioc->sense_dma_pool);
  1379. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "sense_pool(0x%p)"
  1380. ": free\n", ioc->name, ioc->sense));
  1381. ioc->sense = NULL;
  1382. }
  1383. if (ioc->reply) {
  1384. pci_pool_free(ioc->reply_dma_pool, ioc->reply, ioc->reply_dma);
  1385. if (ioc->reply_dma_pool)
  1386. pci_pool_destroy(ioc->reply_dma_pool);
  1387. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_pool(0x%p)"
  1388. ": free\n", ioc->name, ioc->reply));
  1389. ioc->reply = NULL;
  1390. }
  1391. if (ioc->reply_free) {
  1392. pci_pool_free(ioc->reply_free_dma_pool, ioc->reply_free,
  1393. ioc->reply_free_dma);
  1394. if (ioc->reply_free_dma_pool)
  1395. pci_pool_destroy(ioc->reply_free_dma_pool);
  1396. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free_pool"
  1397. "(0x%p): free\n", ioc->name, ioc->reply_free));
  1398. ioc->reply_free = NULL;
  1399. }
  1400. if (ioc->reply_post_free) {
  1401. pci_pool_free(ioc->reply_post_free_dma_pool,
  1402. ioc->reply_post_free, ioc->reply_post_free_dma);
  1403. if (ioc->reply_post_free_dma_pool)
  1404. pci_pool_destroy(ioc->reply_post_free_dma_pool);
  1405. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT
  1406. "reply_post_free_pool(0x%p): free\n", ioc->name,
  1407. ioc->reply_post_free));
  1408. ioc->reply_post_free = NULL;
  1409. }
  1410. if (ioc->config_page) {
  1411. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT
  1412. "config_page(0x%p): free\n", ioc->name,
  1413. ioc->config_page));
  1414. pci_free_consistent(ioc->pdev, ioc->config_page_sz,
  1415. ioc->config_page, ioc->config_page_dma);
  1416. }
  1417. kfree(ioc->scsi_lookup);
  1418. }
  1419. /**
  1420. * _base_allocate_memory_pools - allocate start of day memory pools
  1421. * @ioc: per adapter object
  1422. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  1423. *
  1424. * Returns 0 success, anything else error
  1425. */
  1426. static int
  1427. _base_allocate_memory_pools(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  1428. {
  1429. Mpi2IOCFactsReply_t *facts;
  1430. u32 queue_size, queue_diff;
  1431. u16 max_sge_elements;
  1432. u16 num_of_reply_frames;
  1433. u16 chains_needed_per_io;
  1434. u32 sz, total_sz;
  1435. u16 i;
  1436. u32 retry_sz;
  1437. u16 max_request_credit;
  1438. dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
  1439. __func__));
  1440. retry_sz = 0;
  1441. facts = &ioc->facts;
  1442. /* command line tunables for max sgl entries */
  1443. if (max_sgl_entries != -1) {
  1444. ioc->shost->sg_tablesize = (max_sgl_entries <
  1445. MPT2SAS_SG_DEPTH) ? max_sgl_entries :
  1446. MPT2SAS_SG_DEPTH;
  1447. } else {
  1448. ioc->shost->sg_tablesize = MPT2SAS_SG_DEPTH;
  1449. }
  1450. /* command line tunables for max controller queue depth */
  1451. if (max_queue_depth != -1) {
  1452. max_request_credit = (max_queue_depth < facts->RequestCredit)
  1453. ? max_queue_depth : facts->RequestCredit;
  1454. } else {
  1455. max_request_credit = (facts->RequestCredit >
  1456. MPT2SAS_MAX_REQUEST_QUEUE) ? MPT2SAS_MAX_REQUEST_QUEUE :
  1457. facts->RequestCredit;
  1458. }
  1459. ioc->request_depth = max_request_credit;
  1460. /* request frame size */
  1461. ioc->request_sz = facts->IOCRequestFrameSize * 4;
  1462. /* reply frame size */
  1463. ioc->reply_sz = facts->ReplyFrameSize * 4;
  1464. retry_allocation:
  1465. total_sz = 0;
  1466. /* calculate number of sg elements left over in the 1st frame */
  1467. max_sge_elements = ioc->request_sz - ((sizeof(Mpi2SCSIIORequest_t) -
  1468. sizeof(Mpi2SGEIOUnion_t)) + ioc->sge_size);
  1469. ioc->max_sges_in_main_message = max_sge_elements/ioc->sge_size;
  1470. /* now do the same for a chain buffer */
  1471. max_sge_elements = ioc->request_sz - ioc->sge_size;
  1472. ioc->max_sges_in_chain_message = max_sge_elements/ioc->sge_size;
  1473. ioc->chain_offset_value_for_main_message =
  1474. ((sizeof(Mpi2SCSIIORequest_t) - sizeof(Mpi2SGEIOUnion_t)) +
  1475. (ioc->max_sges_in_chain_message * ioc->sge_size)) / 4;
  1476. /*
  1477. * MPT2SAS_SG_DEPTH = CONFIG_FUSION_MAX_SGE
  1478. */
  1479. chains_needed_per_io = ((ioc->shost->sg_tablesize -
  1480. ioc->max_sges_in_main_message)/ioc->max_sges_in_chain_message)
  1481. + 1;
  1482. if (chains_needed_per_io > facts->MaxChainDepth) {
  1483. chains_needed_per_io = facts->MaxChainDepth;
  1484. ioc->shost->sg_tablesize = min_t(u16,
  1485. ioc->max_sges_in_main_message + (ioc->max_sges_in_chain_message
  1486. * chains_needed_per_io), ioc->shost->sg_tablesize);
  1487. }
  1488. ioc->chains_needed_per_io = chains_needed_per_io;
  1489. /* reply free queue sizing - taking into account for events */
  1490. num_of_reply_frames = ioc->request_depth + 32;
  1491. /* number of replies frames can't be a multiple of 16 */
  1492. /* decrease number of reply frames by 1 */
  1493. if (!(num_of_reply_frames % 16))
  1494. num_of_reply_frames--;
  1495. /* calculate number of reply free queue entries
  1496. * (must be multiple of 16)
  1497. */
  1498. /* (we know reply_free_queue_depth is not a multiple of 16) */
  1499. queue_size = num_of_reply_frames;
  1500. queue_size += 16 - (queue_size % 16);
  1501. ioc->reply_free_queue_depth = queue_size;
  1502. /* reply descriptor post queue sizing */
  1503. /* this size should be the number of request frames + number of reply
  1504. * frames
  1505. */
  1506. queue_size = ioc->request_depth + num_of_reply_frames + 1;
  1507. /* round up to 16 byte boundary */
  1508. if (queue_size % 16)
  1509. queue_size += 16 - (queue_size % 16);
  1510. /* check against IOC maximum reply post queue depth */
  1511. if (queue_size > facts->MaxReplyDescriptorPostQueueDepth) {
  1512. queue_diff = queue_size -
  1513. facts->MaxReplyDescriptorPostQueueDepth;
  1514. /* round queue_diff up to multiple of 16 */
  1515. if (queue_diff % 16)
  1516. queue_diff += 16 - (queue_diff % 16);
  1517. /* adjust request_depth, reply_free_queue_depth,
  1518. * and queue_size
  1519. */
  1520. ioc->request_depth -= queue_diff;
  1521. ioc->reply_free_queue_depth -= queue_diff;
  1522. queue_size -= queue_diff;
  1523. }
  1524. ioc->reply_post_queue_depth = queue_size;
  1525. /* max scsi host queue depth */
  1526. ioc->shost->can_queue = ioc->request_depth - INTERNAL_CMDS_COUNT;
  1527. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scsi host queue: depth"
  1528. "(%d)\n", ioc->name, ioc->shost->can_queue));
  1529. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scatter gather: "
  1530. "sge_in_main_msg(%d), sge_per_chain(%d), sge_per_io(%d), "
  1531. "chains_per_io(%d)\n", ioc->name, ioc->max_sges_in_main_message,
  1532. ioc->max_sges_in_chain_message, ioc->shost->sg_tablesize,
  1533. ioc->chains_needed_per_io));
  1534. /* contiguous pool for request and chains, 16 byte align, one extra "
  1535. * "frame for smid=0
  1536. */
  1537. ioc->chain_depth = ioc->chains_needed_per_io * ioc->request_depth;
  1538. sz = ((ioc->request_depth + 1 + ioc->chain_depth) * ioc->request_sz);
  1539. ioc->request_dma_sz = sz;
  1540. ioc->request = pci_alloc_consistent(ioc->pdev, sz, &ioc->request_dma);
  1541. if (!ioc->request) {
  1542. printk(MPT2SAS_ERR_FMT "request pool: pci_alloc_consistent "
  1543. "failed: req_depth(%d), chains_per_io(%d), frame_sz(%d), "
  1544. "total(%d kB)\n", ioc->name, ioc->request_depth,
  1545. ioc->chains_needed_per_io, ioc->request_sz, sz/1024);
  1546. if (ioc->request_depth < MPT2SAS_SAS_QUEUE_DEPTH)
  1547. goto out;
  1548. retry_sz += 64;
  1549. ioc->request_depth = max_request_credit - retry_sz;
  1550. goto retry_allocation;
  1551. }
  1552. if (retry_sz)
  1553. printk(MPT2SAS_ERR_FMT "request pool: pci_alloc_consistent "
  1554. "succeed: req_depth(%d), chains_per_io(%d), frame_sz(%d), "
  1555. "total(%d kb)\n", ioc->name, ioc->request_depth,
  1556. ioc->chains_needed_per_io, ioc->request_sz, sz/1024);
  1557. ioc->chain = ioc->request + ((ioc->request_depth + 1) *
  1558. ioc->request_sz);
  1559. ioc->chain_dma = ioc->request_dma + ((ioc->request_depth + 1) *
  1560. ioc->request_sz);
  1561. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request pool(0x%p): "
  1562. "depth(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name,
  1563. ioc->request, ioc->request_depth, ioc->request_sz,
  1564. ((ioc->request_depth + 1) * ioc->request_sz)/1024));
  1565. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "chain pool(0x%p): depth"
  1566. "(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name, ioc->chain,
  1567. ioc->chain_depth, ioc->request_sz, ((ioc->chain_depth *
  1568. ioc->request_sz))/1024));
  1569. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request pool: dma(0x%llx)\n",
  1570. ioc->name, (unsigned long long) ioc->request_dma));
  1571. total_sz += sz;
  1572. ioc->scsi_lookup = kcalloc(ioc->request_depth,
  1573. sizeof(struct request_tracker), GFP_KERNEL);
  1574. if (!ioc->scsi_lookup) {
  1575. printk(MPT2SAS_ERR_FMT "scsi_lookup: kcalloc failed\n",
  1576. ioc->name);
  1577. goto out;
  1578. }
  1579. /* initialize some bits */
  1580. for (i = 0; i < ioc->request_depth; i++)
  1581. ioc->scsi_lookup[i].smid = i + 1;
  1582. /* sense buffers, 4 byte align */
  1583. sz = ioc->request_depth * SCSI_SENSE_BUFFERSIZE;
  1584. ioc->sense_dma_pool = pci_pool_create("sense pool", ioc->pdev, sz, 4,
  1585. 0);
  1586. if (!ioc->sense_dma_pool) {
  1587. printk(MPT2SAS_ERR_FMT "sense pool: pci_pool_create failed\n",
  1588. ioc->name);
  1589. goto out;
  1590. }
  1591. ioc->sense = pci_pool_alloc(ioc->sense_dma_pool , GFP_KERNEL,
  1592. &ioc->sense_dma);
  1593. if (!ioc->sense) {
  1594. printk(MPT2SAS_ERR_FMT "sense pool: pci_pool_alloc failed\n",
  1595. ioc->name);
  1596. goto out;
  1597. }
  1598. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT
  1599. "sense pool(0x%p): depth(%d), element_size(%d), pool_size"
  1600. "(%d kB)\n", ioc->name, ioc->sense, ioc->request_depth,
  1601. SCSI_SENSE_BUFFERSIZE, sz/1024));
  1602. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "sense_dma(0x%llx)\n",
  1603. ioc->name, (unsigned long long)ioc->sense_dma));
  1604. total_sz += sz;
  1605. /* reply pool, 4 byte align */
  1606. sz = ioc->reply_free_queue_depth * ioc->reply_sz;
  1607. ioc->reply_dma_pool = pci_pool_create("reply pool", ioc->pdev, sz, 4,
  1608. 0);
  1609. if (!ioc->reply_dma_pool) {
  1610. printk(MPT2SAS_ERR_FMT "reply pool: pci_pool_create failed\n",
  1611. ioc->name);
  1612. goto out;
  1613. }
  1614. ioc->reply = pci_pool_alloc(ioc->reply_dma_pool , GFP_KERNEL,
  1615. &ioc->reply_dma);
  1616. if (!ioc->reply) {
  1617. printk(MPT2SAS_ERR_FMT "reply pool: pci_pool_alloc failed\n",
  1618. ioc->name);
  1619. goto out;
  1620. }
  1621. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply pool(0x%p): depth"
  1622. "(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name, ioc->reply,
  1623. ioc->reply_free_queue_depth, ioc->reply_sz, sz/1024));
  1624. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_dma(0x%llx)\n",
  1625. ioc->name, (unsigned long long)ioc->reply_dma));
  1626. total_sz += sz;
  1627. /* reply free queue, 16 byte align */
  1628. sz = ioc->reply_free_queue_depth * 4;
  1629. ioc->reply_free_dma_pool = pci_pool_create("reply_free pool",
  1630. ioc->pdev, sz, 16, 0);
  1631. if (!ioc->reply_free_dma_pool) {
  1632. printk(MPT2SAS_ERR_FMT "reply_free pool: pci_pool_create "
  1633. "failed\n", ioc->name);
  1634. goto out;
  1635. }
  1636. ioc->reply_free = pci_pool_alloc(ioc->reply_free_dma_pool , GFP_KERNEL,
  1637. &ioc->reply_free_dma);
  1638. if (!ioc->reply_free) {
  1639. printk(MPT2SAS_ERR_FMT "reply_free pool: pci_pool_alloc "
  1640. "failed\n", ioc->name);
  1641. goto out;
  1642. }
  1643. memset(ioc->reply_free, 0, sz);
  1644. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free pool(0x%p): "
  1645. "depth(%d), element_size(%d), pool_size(%d kB)\n", ioc->name,
  1646. ioc->reply_free, ioc->reply_free_queue_depth, 4, sz/1024));
  1647. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free_dma"
  1648. "(0x%llx)\n", ioc->name, (unsigned long long)ioc->reply_free_dma));
  1649. total_sz += sz;
  1650. /* reply post queue, 16 byte align */
  1651. sz = ioc->reply_post_queue_depth * sizeof(Mpi2DefaultReplyDescriptor_t);
  1652. ioc->reply_post_free_dma_pool = pci_pool_create("reply_post_free pool",
  1653. ioc->pdev, sz, 16, 0);
  1654. if (!ioc->reply_post_free_dma_pool) {
  1655. printk(MPT2SAS_ERR_FMT "reply_post_free pool: pci_pool_create "
  1656. "failed\n", ioc->name);
  1657. goto out;
  1658. }
  1659. ioc->reply_post_free = pci_pool_alloc(ioc->reply_post_free_dma_pool ,
  1660. GFP_KERNEL, &ioc->reply_post_free_dma);
  1661. if (!ioc->reply_post_free) {
  1662. printk(MPT2SAS_ERR_FMT "reply_post_free pool: pci_pool_alloc "
  1663. "failed\n", ioc->name);
  1664. goto out;
  1665. }
  1666. memset(ioc->reply_post_free, 0, sz);
  1667. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply post free pool"
  1668. "(0x%p): depth(%d), element_size(%d), pool_size(%d kB)\n",
  1669. ioc->name, ioc->reply_post_free, ioc->reply_post_queue_depth, 8,
  1670. sz/1024));
  1671. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_post_free_dma = "
  1672. "(0x%llx)\n", ioc->name, (unsigned long long)
  1673. ioc->reply_post_free_dma));
  1674. total_sz += sz;
  1675. ioc->config_page_sz = 512;
  1676. ioc->config_page = pci_alloc_consistent(ioc->pdev,
  1677. ioc->config_page_sz, &ioc->config_page_dma);
  1678. if (!ioc->config_page) {
  1679. printk(MPT2SAS_ERR_FMT "config page: pci_pool_alloc "
  1680. "failed\n", ioc->name);
  1681. goto out;
  1682. }
  1683. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "config page(0x%p): size"
  1684. "(%d)\n", ioc->name, ioc->config_page, ioc->config_page_sz));
  1685. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "config_page_dma"
  1686. "(0x%llx)\n", ioc->name, (unsigned long long)ioc->config_page_dma));
  1687. total_sz += ioc->config_page_sz;
  1688. printk(MPT2SAS_INFO_FMT "Allocated physical memory: size(%d kB)\n",
  1689. ioc->name, total_sz/1024);
  1690. printk(MPT2SAS_INFO_FMT "Current Controller Queue Depth(%d), "
  1691. "Max Controller Queue Depth(%d)\n",
  1692. ioc->name, ioc->shost->can_queue, facts->RequestCredit);
  1693. printk(MPT2SAS_INFO_FMT "Scatter Gather Elements per IO(%d)\n",
  1694. ioc->name, ioc->shost->sg_tablesize);
  1695. return 0;
  1696. out:
  1697. _base_release_memory_pools(ioc);
  1698. return -ENOMEM;
  1699. }
  1700. /**
  1701. * mpt2sas_base_get_iocstate - Get the current state of a MPT adapter.
  1702. * @ioc: Pointer to MPT_ADAPTER structure
  1703. * @cooked: Request raw or cooked IOC state
  1704. *
  1705. * Returns all IOC Doorbell register bits if cooked==0, else just the
  1706. * Doorbell bits in MPI_IOC_STATE_MASK.
  1707. */
  1708. u32
  1709. mpt2sas_base_get_iocstate(struct MPT2SAS_ADAPTER *ioc, int cooked)
  1710. {
  1711. u32 s, sc;
  1712. s = readl(&ioc->chip->Doorbell);
  1713. sc = s & MPI2_IOC_STATE_MASK;
  1714. return cooked ? sc : s;
  1715. }
  1716. /**
  1717. * _base_wait_on_iocstate - waiting on a particular ioc state
  1718. * @ioc_state: controller state { READY, OPERATIONAL, or RESET }
  1719. * @timeout: timeout in second
  1720. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  1721. *
  1722. * Returns 0 for success, non-zero for failure.
  1723. */
  1724. static int
  1725. _base_wait_on_iocstate(struct MPT2SAS_ADAPTER *ioc, u32 ioc_state, int timeout,
  1726. int sleep_flag)
  1727. {
  1728. u32 count, cntdn;
  1729. u32 current_state;
  1730. count = 0;
  1731. cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
  1732. do {
  1733. current_state = mpt2sas_base_get_iocstate(ioc, 1);
  1734. if (current_state == ioc_state)
  1735. return 0;
  1736. if (count && current_state == MPI2_IOC_STATE_FAULT)
  1737. break;
  1738. if (sleep_flag == CAN_SLEEP)
  1739. msleep(1);
  1740. else
  1741. udelay(500);
  1742. count++;
  1743. } while (--cntdn);
  1744. return current_state;
  1745. }
  1746. /**
  1747. * _base_wait_for_doorbell_int - waiting for controller interrupt(generated by
  1748. * a write to the doorbell)
  1749. * @ioc: per adapter object
  1750. * @timeout: timeout in second
  1751. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  1752. *
  1753. * Returns 0 for success, non-zero for failure.
  1754. *
  1755. * Notes: MPI2_HIS_IOC2SYS_DB_STATUS - set to one when IOC writes to doorbell.
  1756. */
  1757. static int
  1758. _base_wait_for_doorbell_int(struct MPT2SAS_ADAPTER *ioc, int timeout,
  1759. int sleep_flag)
  1760. {
  1761. u32 cntdn, count;
  1762. u32 int_status;
  1763. count = 0;
  1764. cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
  1765. do {
  1766. int_status = readl(&ioc->chip->HostInterruptStatus);
  1767. if (int_status & MPI2_HIS_IOC2SYS_DB_STATUS) {
  1768. dhsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: "
  1769. "successfull count(%d), timeout(%d)\n", ioc->name,
  1770. __func__, count, timeout));
  1771. return 0;
  1772. }
  1773. if (sleep_flag == CAN_SLEEP)
  1774. msleep(1);
  1775. else
  1776. udelay(500);
  1777. count++;
  1778. } while (--cntdn);
  1779. printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), "
  1780. "int_status(%x)!\n", ioc->name, __func__, count, int_status);
  1781. return -EFAULT;
  1782. }
  1783. /**
  1784. * _base_wait_for_doorbell_ack - waiting for controller to read the doorbell.
  1785. * @ioc: per adapter object
  1786. * @timeout: timeout in second
  1787. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  1788. *
  1789. * Returns 0 for success, non-zero for failure.
  1790. *
  1791. * Notes: MPI2_HIS_SYS2IOC_DB_STATUS - set to one when host writes to
  1792. * doorbell.
  1793. */
  1794. static int
  1795. _base_wait_for_doorbell_ack(struct MPT2SAS_ADAPTER *ioc, int timeout,
  1796. int sleep_flag)
  1797. {
  1798. u32 cntdn, count;
  1799. u32 int_status;
  1800. u32 doorbell;
  1801. count = 0;
  1802. cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
  1803. do {
  1804. int_status = readl(&ioc->chip->HostInterruptStatus);
  1805. if (!(int_status & MPI2_HIS_SYS2IOC_DB_STATUS)) {
  1806. dhsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: "
  1807. "successfull count(%d), timeout(%d)\n", ioc->name,
  1808. __func__, count, timeout));
  1809. return 0;
  1810. } else if (int_status & MPI2_HIS_IOC2SYS_DB_STATUS) {
  1811. doorbell = readl(&ioc->chip->Doorbell);
  1812. if ((doorbell & MPI2_IOC_STATE_MASK) ==
  1813. MPI2_IOC_STATE_FAULT) {
  1814. mpt2sas_base_fault_info(ioc , doorbell);
  1815. return -EFAULT;
  1816. }
  1817. } else if (int_status == 0xFFFFFFFF)
  1818. goto out;
  1819. if (sleep_flag == CAN_SLEEP)
  1820. msleep(1);
  1821. else
  1822. udelay(500);
  1823. count++;
  1824. } while (--cntdn);
  1825. out:
  1826. printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), "
  1827. "int_status(%x)!\n", ioc->name, __func__, count, int_status);
  1828. return -EFAULT;
  1829. }
  1830. /**
  1831. * _base_wait_for_doorbell_not_used - waiting for doorbell to not be in use
  1832. * @ioc: per adapter object
  1833. * @timeout: timeout in second
  1834. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  1835. *
  1836. * Returns 0 for success, non-zero for failure.
  1837. *
  1838. */
  1839. static int
  1840. _base_wait_for_doorbell_not_used(struct MPT2SAS_ADAPTER *ioc, int timeout,
  1841. int sleep_flag)
  1842. {
  1843. u32 cntdn, count;
  1844. u32 doorbell_reg;
  1845. count = 0;
  1846. cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
  1847. do {
  1848. doorbell_reg = readl(&ioc->chip->Doorbell);
  1849. if (!(doorbell_reg & MPI2_DOORBELL_USED)) {
  1850. dhsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: "
  1851. "successfull count(%d), timeout(%d)\n", ioc->name,
  1852. __func__, count, timeout));
  1853. return 0;
  1854. }
  1855. if (sleep_flag == CAN_SLEEP)
  1856. msleep(1);
  1857. else
  1858. udelay(500);
  1859. count++;
  1860. } while (--cntdn);
  1861. printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), "
  1862. "doorbell_reg(%x)!\n", ioc->name, __func__, count, doorbell_reg);
  1863. return -EFAULT;
  1864. }
  1865. /**
  1866. * _base_send_ioc_reset - send doorbell reset
  1867. * @ioc: per adapter object
  1868. * @reset_type: currently only supports: MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET
  1869. * @timeout: timeout in second
  1870. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  1871. *
  1872. * Returns 0 for success, non-zero for failure.
  1873. */
  1874. static int
  1875. _base_send_ioc_reset(struct MPT2SAS_ADAPTER *ioc, u8 reset_type, int timeout,
  1876. int sleep_flag)
  1877. {
  1878. u32 ioc_state;
  1879. int r = 0;
  1880. if (reset_type != MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET) {
  1881. printk(MPT2SAS_ERR_FMT "%s: unknown reset_type\n",
  1882. ioc->name, __func__);
  1883. return -EFAULT;
  1884. }
  1885. if (!(ioc->facts.IOCCapabilities &
  1886. MPI2_IOCFACTS_CAPABILITY_EVENT_REPLAY))
  1887. return -EFAULT;
  1888. printk(MPT2SAS_INFO_FMT "sending message unit reset !!\n", ioc->name);
  1889. writel(reset_type << MPI2_DOORBELL_FUNCTION_SHIFT,
  1890. &ioc->chip->Doorbell);
  1891. if ((_base_wait_for_doorbell_ack(ioc, 15, sleep_flag))) {
  1892. r = -EFAULT;
  1893. goto out;
  1894. }
  1895. ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_READY,
  1896. timeout, sleep_flag);
  1897. if (ioc_state) {
  1898. printk(MPT2SAS_ERR_FMT "%s: failed going to ready state "
  1899. " (ioc_state=0x%x)\n", ioc->name, __func__, ioc_state);
  1900. r = -EFAULT;
  1901. goto out;
  1902. }
  1903. out:
  1904. printk(MPT2SAS_INFO_FMT "message unit reset: %s\n",
  1905. ioc->name, ((r == 0) ? "SUCCESS" : "FAILED"));
  1906. return r;
  1907. }
  1908. /**
  1909. * _base_handshake_req_reply_wait - send request thru doorbell interface
  1910. * @ioc: per adapter object
  1911. * @request_bytes: request length
  1912. * @request: pointer having request payload
  1913. * @reply_bytes: reply length
  1914. * @reply: pointer to reply payload
  1915. * @timeout: timeout in second
  1916. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  1917. *
  1918. * Returns 0 for success, non-zero for failure.
  1919. */
  1920. static int
  1921. _base_handshake_req_reply_wait(struct MPT2SAS_ADAPTER *ioc, int request_bytes,
  1922. u32 *request, int reply_bytes, u16 *reply, int timeout, int sleep_flag)
  1923. {
  1924. MPI2DefaultReply_t *default_reply = (MPI2DefaultReply_t *)reply;
  1925. int i;
  1926. u8 failed;
  1927. u16 dummy;
  1928. u32 *mfp;
  1929. /* make sure doorbell is not in use */
  1930. if ((readl(&ioc->chip->Doorbell) & MPI2_DOORBELL_USED)) {
  1931. printk(MPT2SAS_ERR_FMT "doorbell is in use "
  1932. " (line=%d)\n", ioc->name, __LINE__);
  1933. return -EFAULT;
  1934. }
  1935. /* clear pending doorbell interrupts from previous state changes */
  1936. if (readl(&ioc->chip->HostInterruptStatus) &
  1937. MPI2_HIS_IOC2SYS_DB_STATUS)
  1938. writel(0, &ioc->chip->HostInterruptStatus);
  1939. /* send message to ioc */
  1940. writel(((MPI2_FUNCTION_HANDSHAKE<<MPI2_DOORBELL_FUNCTION_SHIFT) |
  1941. ((request_bytes/4)<<MPI2_DOORBELL_ADD_DWORDS_SHIFT)),
  1942. &ioc->chip->Doorbell);
  1943. if ((_base_wait_for_doorbell_int(ioc, 5, sleep_flag))) {
  1944. printk(MPT2SAS_ERR_FMT "doorbell handshake "
  1945. "int failed (line=%d)\n", ioc->name, __LINE__);
  1946. return -EFAULT;
  1947. }
  1948. writel(0, &ioc->chip->HostInterruptStatus);
  1949. if ((_base_wait_for_doorbell_ack(ioc, 5, sleep_flag))) {
  1950. printk(MPT2SAS_ERR_FMT "doorbell handshake "
  1951. "ack failed (line=%d)\n", ioc->name, __LINE__);
  1952. return -EFAULT;
  1953. }
  1954. /* send message 32-bits at a time */
  1955. for (i = 0, failed = 0; i < request_bytes/4 && !failed; i++) {
  1956. writel(cpu_to_le32(request[i]), &ioc->chip->Doorbell);
  1957. if ((_base_wait_for_doorbell_ack(ioc, 5, sleep_flag)))
  1958. failed = 1;
  1959. }
  1960. if (failed) {
  1961. printk(MPT2SAS_ERR_FMT "doorbell handshake "
  1962. "sending request failed (line=%d)\n", ioc->name, __LINE__);
  1963. return -EFAULT;
  1964. }
  1965. /* now wait for the reply */
  1966. if ((_base_wait_for_doorbell_int(ioc, timeout, sleep_flag))) {
  1967. printk(MPT2SAS_ERR_FMT "doorbell handshake "
  1968. "int failed (line=%d)\n", ioc->name, __LINE__);
  1969. return -EFAULT;
  1970. }
  1971. /* read the first two 16-bits, it gives the total length of the reply */
  1972. reply[0] = le16_to_cpu(readl(&ioc->chip->Doorbell)
  1973. & MPI2_DOORBELL_DATA_MASK);
  1974. writel(0, &ioc->chip->HostInterruptStatus);
  1975. if ((_base_wait_for_doorbell_int(ioc, 5, sleep_flag))) {
  1976. printk(MPT2SAS_ERR_FMT "doorbell handshake "
  1977. "int failed (line=%d)\n", ioc->name, __LINE__);
  1978. return -EFAULT;
  1979. }
  1980. reply[1] = le16_to_cpu(readl(&ioc->chip->Doorbell)
  1981. & MPI2_DOORBELL_DATA_MASK);
  1982. writel(0, &ioc->chip->HostInterruptStatus);
  1983. for (i = 2; i < default_reply->MsgLength * 2; i++) {
  1984. if ((_base_wait_for_doorbell_int(ioc, 5, sleep_flag))) {
  1985. printk(MPT2SAS_ERR_FMT "doorbell "
  1986. "handshake int failed (line=%d)\n", ioc->name,
  1987. __LINE__);
  1988. return -EFAULT;
  1989. }
  1990. if (i >= reply_bytes/2) /* overflow case */
  1991. dummy = readl(&ioc->chip->Doorbell);
  1992. else
  1993. reply[i] = le16_to_cpu(readl(&ioc->chip->Doorbell)
  1994. & MPI2_DOORBELL_DATA_MASK);
  1995. writel(0, &ioc->chip->HostInterruptStatus);
  1996. }
  1997. _base_wait_for_doorbell_int(ioc, 5, sleep_flag);
  1998. if (_base_wait_for_doorbell_not_used(ioc, 5, sleep_flag) != 0) {
  1999. dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "doorbell is in use "
  2000. " (line=%d)\n", ioc->name, __LINE__));
  2001. }
  2002. writel(0, &ioc->chip->HostInterruptStatus);
  2003. if (ioc->logging_level & MPT_DEBUG_INIT) {
  2004. mfp = (u32 *)reply;
  2005. printk(KERN_DEBUG "\toffset:data\n");
  2006. for (i = 0; i < reply_bytes/4; i++)
  2007. printk(KERN_DEBUG "\t[0x%02x]:%08x\n", i*4,
  2008. le32_to_cpu(mfp[i]));
  2009. }
  2010. return 0;
  2011. }
  2012. /**
  2013. * mpt2sas_base_sas_iounit_control - send sas iounit control to FW
  2014. * @ioc: per adapter object
  2015. * @mpi_reply: the reply payload from FW
  2016. * @mpi_request: the request payload sent to FW
  2017. *
  2018. * The SAS IO Unit Control Request message allows the host to perform low-level
  2019. * operations, such as resets on the PHYs of the IO Unit, also allows the host
  2020. * to obtain the IOC assigned device handles for a device if it has other
  2021. * identifying information about the device, in addition allows the host to
  2022. * remove IOC resources associated with the device.
  2023. *
  2024. * Returns 0 for success, non-zero for failure.
  2025. */
  2026. int
  2027. mpt2sas_base_sas_iounit_control(struct MPT2SAS_ADAPTER *ioc,
  2028. Mpi2SasIoUnitControlReply_t *mpi_reply,
  2029. Mpi2SasIoUnitControlRequest_t *mpi_request)
  2030. {
  2031. u16 smid;
  2032. u32 ioc_state;
  2033. unsigned long timeleft;
  2034. u8 issue_reset;
  2035. int rc;
  2036. void *request;
  2037. u16 wait_state_count;
  2038. dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
  2039. __func__));
  2040. mutex_lock(&ioc->base_cmds.mutex);
  2041. if (ioc->base_cmds.status != MPT2_CMD_NOT_USED) {
  2042. printk(MPT2SAS_ERR_FMT "%s: base_cmd in use\n",
  2043. ioc->name, __func__);
  2044. rc = -EAGAIN;
  2045. goto out;
  2046. }
  2047. wait_state_count = 0;
  2048. ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
  2049. while (ioc_state != MPI2_IOC_STATE_OPERATIONAL) {
  2050. if (wait_state_count++ == 10) {
  2051. printk(MPT2SAS_ERR_FMT
  2052. "%s: failed due to ioc not operational\n",
  2053. ioc->name, __func__);
  2054. rc = -EFAULT;
  2055. goto out;
  2056. }
  2057. ssleep(1);
  2058. ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
  2059. printk(MPT2SAS_INFO_FMT "%s: waiting for "
  2060. "operational state(count=%d)\n", ioc->name,
  2061. __func__, wait_state_count);
  2062. }
  2063. smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
  2064. if (!smid) {
  2065. printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
  2066. ioc->name, __func__);
  2067. rc = -EAGAIN;
  2068. goto out;
  2069. }
  2070. rc = 0;
  2071. ioc->base_cmds.status = MPT2_CMD_PENDING;
  2072. request = mpt2sas_base_get_msg_frame(ioc, smid);
  2073. ioc->base_cmds.smid = smid;
  2074. memcpy(request, mpi_request, sizeof(Mpi2SasIoUnitControlRequest_t));
  2075. if (mpi_request->Operation == MPI2_SAS_OP_PHY_HARD_RESET ||
  2076. mpi_request->Operation == MPI2_SAS_OP_PHY_LINK_RESET)
  2077. ioc->ioc_link_reset_in_progress = 1;
  2078. mpt2sas_base_put_smid_default(ioc, smid, mpi_request->VF_ID);
  2079. timeleft = wait_for_completion_timeout(&ioc->base_cmds.done,
  2080. msecs_to_jiffies(10000));
  2081. if ((mpi_request->Operation == MPI2_SAS_OP_PHY_HARD_RESET ||
  2082. mpi_request->Operation == MPI2_SAS_OP_PHY_LINK_RESET) &&
  2083. ioc->ioc_link_reset_in_progress)
  2084. ioc->ioc_link_reset_in_progress = 0;
  2085. if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
  2086. printk(MPT2SAS_ERR_FMT "%s: timeout\n",
  2087. ioc->name, __func__);
  2088. _debug_dump_mf(mpi_request,
  2089. sizeof(Mpi2SasIoUnitControlRequest_t)/4);
  2090. if (!(ioc->base_cmds.status & MPT2_CMD_RESET))
  2091. issue_reset = 1;
  2092. goto issue_host_reset;
  2093. }
  2094. if (ioc->base_cmds.status & MPT2_CMD_REPLY_VALID)
  2095. memcpy(mpi_reply, ioc->base_cmds.reply,
  2096. sizeof(Mpi2SasIoUnitControlReply_t));
  2097. else
  2098. memset(mpi_reply, 0, sizeof(Mpi2SasIoUnitControlReply_t));
  2099. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  2100. goto out;
  2101. issue_host_reset:
  2102. if (issue_reset)
  2103. mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP,
  2104. FORCE_BIG_HAMMER);
  2105. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  2106. rc = -EFAULT;
  2107. out:
  2108. mutex_unlock(&ioc->base_cmds.mutex);
  2109. return rc;
  2110. }
  2111. /**
  2112. * mpt2sas_base_scsi_enclosure_processor - sending request to sep device
  2113. * @ioc: per adapter object
  2114. * @mpi_reply: the reply payload from FW
  2115. * @mpi_request: the request payload sent to FW
  2116. *
  2117. * The SCSI Enclosure Processor request message causes the IOC to
  2118. * communicate with SES devices to control LED status signals.
  2119. *
  2120. * Returns 0 for success, non-zero for failure.
  2121. */
  2122. int
  2123. mpt2sas_base_scsi_enclosure_processor(struct MPT2SAS_ADAPTER *ioc,
  2124. Mpi2SepReply_t *mpi_reply, Mpi2SepRequest_t *mpi_request)
  2125. {
  2126. u16 smid;
  2127. u32 ioc_state;
  2128. unsigned long timeleft;
  2129. u8 issue_reset;
  2130. int rc;
  2131. void *request;
  2132. u16 wait_state_count;
  2133. dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
  2134. __func__));
  2135. mutex_lock(&ioc->base_cmds.mutex);
  2136. if (ioc->base_cmds.status != MPT2_CMD_NOT_USED) {
  2137. printk(MPT2SAS_ERR_FMT "%s: base_cmd in use\n",
  2138. ioc->name, __func__);
  2139. rc = -EAGAIN;
  2140. goto out;
  2141. }
  2142. wait_state_count = 0;
  2143. ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
  2144. while (ioc_state != MPI2_IOC_STATE_OPERATIONAL) {
  2145. if (wait_state_count++ == 10) {
  2146. printk(MPT2SAS_ERR_FMT
  2147. "%s: failed due to ioc not operational\n",
  2148. ioc->name, __func__);
  2149. rc = -EFAULT;
  2150. goto out;
  2151. }
  2152. ssleep(1);
  2153. ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
  2154. printk(MPT2SAS_INFO_FMT "%s: waiting for "
  2155. "operational state(count=%d)\n", ioc->name,
  2156. __func__, wait_state_count);
  2157. }
  2158. smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
  2159. if (!smid) {
  2160. printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
  2161. ioc->name, __func__);
  2162. rc = -EAGAIN;
  2163. goto out;
  2164. }
  2165. rc = 0;
  2166. ioc->base_cmds.status = MPT2_CMD_PENDING;
  2167. request = mpt2sas_base_get_msg_frame(ioc, smid);
  2168. ioc->base_cmds.smid = smid;
  2169. memcpy(request, mpi_request, sizeof(Mpi2SepReply_t));
  2170. mpt2sas_base_put_smid_default(ioc, smid, mpi_request->VF_ID);
  2171. timeleft = wait_for_completion_timeout(&ioc->base_cmds.done,
  2172. msecs_to_jiffies(10000));
  2173. if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
  2174. printk(MPT2SAS_ERR_FMT "%s: timeout\n",
  2175. ioc->name, __func__);
  2176. _debug_dump_mf(mpi_request,
  2177. sizeof(Mpi2SepRequest_t)/4);
  2178. if (!(ioc->base_cmds.status & MPT2_CMD_RESET))
  2179. issue_reset = 1;
  2180. goto issue_host_reset;
  2181. }
  2182. if (ioc->base_cmds.status & MPT2_CMD_REPLY_VALID)
  2183. memcpy(mpi_reply, ioc->base_cmds.reply,
  2184. sizeof(Mpi2SepReply_t));
  2185. else
  2186. memset(mpi_reply, 0, sizeof(Mpi2SepReply_t));
  2187. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  2188. goto out;
  2189. issue_host_reset:
  2190. if (issue_reset)
  2191. mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP,
  2192. FORCE_BIG_HAMMER);
  2193. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  2194. rc = -EFAULT;
  2195. out:
  2196. mutex_unlock(&ioc->base_cmds.mutex);
  2197. return rc;
  2198. }
  2199. /**
  2200. * _base_get_port_facts - obtain port facts reply and save in ioc
  2201. * @ioc: per adapter object
  2202. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2203. *
  2204. * Returns 0 for success, non-zero for failure.
  2205. */
  2206. static int
  2207. _base_get_port_facts(struct MPT2SAS_ADAPTER *ioc, int port, int sleep_flag)
  2208. {
  2209. Mpi2PortFactsRequest_t mpi_request;
  2210. Mpi2PortFactsReply_t mpi_reply, *pfacts;
  2211. int mpi_reply_sz, mpi_request_sz, r;
  2212. dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
  2213. __func__));
  2214. mpi_reply_sz = sizeof(Mpi2PortFactsReply_t);
  2215. mpi_request_sz = sizeof(Mpi2PortFactsRequest_t);
  2216. memset(&mpi_request, 0, mpi_request_sz);
  2217. mpi_request.Function = MPI2_FUNCTION_PORT_FACTS;
  2218. mpi_request.PortNumber = port;
  2219. r = _base_handshake_req_reply_wait(ioc, mpi_request_sz,
  2220. (u32 *)&mpi_request, mpi_reply_sz, (u16 *)&mpi_reply, 5, CAN_SLEEP);
  2221. if (r != 0) {
  2222. printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n",
  2223. ioc->name, __func__, r);
  2224. return r;
  2225. }
  2226. pfacts = &ioc->pfacts[port];
  2227. memset(pfacts, 0, sizeof(Mpi2PortFactsReply_t));
  2228. pfacts->PortNumber = mpi_reply.PortNumber;
  2229. pfacts->VP_ID = mpi_reply.VP_ID;
  2230. pfacts->VF_ID = mpi_reply.VF_ID;
  2231. pfacts->MaxPostedCmdBuffers =
  2232. le16_to_cpu(mpi_reply.MaxPostedCmdBuffers);
  2233. return 0;
  2234. }
  2235. /**
  2236. * _base_get_ioc_facts - obtain ioc facts reply and save in ioc
  2237. * @ioc: per adapter object
  2238. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2239. *
  2240. * Returns 0 for success, non-zero for failure.
  2241. */
  2242. static int
  2243. _base_get_ioc_facts(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  2244. {
  2245. Mpi2IOCFactsRequest_t mpi_request;
  2246. Mpi2IOCFactsReply_t mpi_reply, *facts;
  2247. int mpi_reply_sz, mpi_request_sz, r;
  2248. dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
  2249. __func__));
  2250. mpi_reply_sz = sizeof(Mpi2IOCFactsReply_t);
  2251. mpi_request_sz = sizeof(Mpi2IOCFactsRequest_t);
  2252. memset(&mpi_request, 0, mpi_request_sz);
  2253. mpi_request.Function = MPI2_FUNCTION_IOC_FACTS;
  2254. r = _base_handshake_req_reply_wait(ioc, mpi_request_sz,
  2255. (u32 *)&mpi_request, mpi_reply_sz, (u16 *)&mpi_reply, 5, CAN_SLEEP);
  2256. if (r != 0) {
  2257. printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n",
  2258. ioc->name, __func__, r);
  2259. return r;
  2260. }
  2261. facts = &ioc->facts;
  2262. memset(facts, 0, sizeof(Mpi2IOCFactsReply_t));
  2263. facts->MsgVersion = le16_to_cpu(mpi_reply.MsgVersion);
  2264. facts->HeaderVersion = le16_to_cpu(mpi_reply.HeaderVersion);
  2265. facts->VP_ID = mpi_reply.VP_ID;
  2266. facts->VF_ID = mpi_reply.VF_ID;
  2267. facts->IOCExceptions = le16_to_cpu(mpi_reply.IOCExceptions);
  2268. facts->MaxChainDepth = mpi_reply.MaxChainDepth;
  2269. facts->WhoInit = mpi_reply.WhoInit;
  2270. facts->NumberOfPorts = mpi_reply.NumberOfPorts;
  2271. facts->RequestCredit = le16_to_cpu(mpi_reply.RequestCredit);
  2272. facts->MaxReplyDescriptorPostQueueDepth =
  2273. le16_to_cpu(mpi_reply.MaxReplyDescriptorPostQueueDepth);
  2274. facts->ProductID = le16_to_cpu(mpi_reply.ProductID);
  2275. facts->IOCCapabilities = le32_to_cpu(mpi_reply.IOCCapabilities);
  2276. if ((facts->IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID))
  2277. ioc->ir_firmware = 1;
  2278. facts->FWVersion.Word = le32_to_cpu(mpi_reply.FWVersion.Word);
  2279. facts->IOCRequestFrameSize =
  2280. le16_to_cpu(mpi_reply.IOCRequestFrameSize);
  2281. facts->MaxInitiators = le16_to_cpu(mpi_reply.MaxInitiators);
  2282. facts->MaxTargets = le16_to_cpu(mpi_reply.MaxTargets);
  2283. ioc->shost->max_id = -1;
  2284. facts->MaxSasExpanders = le16_to_cpu(mpi_reply.MaxSasExpanders);
  2285. facts->MaxEnclosures = le16_to_cpu(mpi_reply.MaxEnclosures);
  2286. facts->ProtocolFlags = le16_to_cpu(mpi_reply.ProtocolFlags);
  2287. facts->HighPriorityCredit =
  2288. le16_to_cpu(mpi_reply.HighPriorityCredit);
  2289. facts->ReplyFrameSize = mpi_reply.ReplyFrameSize;
  2290. facts->MaxDevHandle = le16_to_cpu(mpi_reply.MaxDevHandle);
  2291. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "hba queue depth(%d), "
  2292. "max chains per io(%d)\n", ioc->name, facts->RequestCredit,
  2293. facts->MaxChainDepth));
  2294. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request frame size(%d), "
  2295. "reply frame size(%d)\n", ioc->name,
  2296. facts->IOCRequestFrameSize * 4, facts->ReplyFrameSize * 4));
  2297. return 0;
  2298. }
  2299. /**
  2300. * _base_send_ioc_init - send ioc_init to firmware
  2301. * @ioc: per adapter object
  2302. * @VF_ID: virtual function id
  2303. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2304. *
  2305. * Returns 0 for success, non-zero for failure.
  2306. */
  2307. static int
  2308. _base_send_ioc_init(struct MPT2SAS_ADAPTER *ioc, u8 VF_ID, int sleep_flag)
  2309. {
  2310. Mpi2IOCInitRequest_t mpi_request;
  2311. Mpi2IOCInitReply_t mpi_reply;
  2312. int r;
  2313. dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
  2314. __func__));
  2315. memset(&mpi_request, 0, sizeof(Mpi2IOCInitRequest_t));
  2316. mpi_request.Function = MPI2_FUNCTION_IOC_INIT;
  2317. mpi_request.WhoInit = MPI2_WHOINIT_HOST_DRIVER;
  2318. mpi_request.VF_ID = VF_ID;
  2319. mpi_request.MsgVersion = cpu_to_le16(MPI2_VERSION);
  2320. mpi_request.HeaderVersion = cpu_to_le16(MPI2_HEADER_VERSION);
  2321. /* In MPI Revision I (0xA), the SystemReplyFrameSize(offset 0x18) was
  2322. * removed and made reserved. For those with older firmware will need
  2323. * this fix. It was decided that the Reply and Request frame sizes are
  2324. * the same.
  2325. */
  2326. if ((ioc->facts.HeaderVersion >> 8) < 0xA) {
  2327. mpi_request.Reserved7 = cpu_to_le16(ioc->reply_sz);
  2328. /* mpi_request.SystemReplyFrameSize =
  2329. * cpu_to_le16(ioc->reply_sz);
  2330. */
  2331. }
  2332. mpi_request.SystemRequestFrameSize = cpu_to_le16(ioc->request_sz/4);
  2333. mpi_request.ReplyDescriptorPostQueueDepth =
  2334. cpu_to_le16(ioc->reply_post_queue_depth);
  2335. mpi_request.ReplyFreeQueueDepth =
  2336. cpu_to_le16(ioc->reply_free_queue_depth);
  2337. #if BITS_PER_LONG > 32
  2338. mpi_request.SenseBufferAddressHigh =
  2339. cpu_to_le32(ioc->sense_dma >> 32);
  2340. mpi_request.SystemReplyAddressHigh =
  2341. cpu_to_le32(ioc->reply_dma >> 32);
  2342. mpi_request.SystemRequestFrameBaseAddress =
  2343. cpu_to_le64(ioc->request_dma);
  2344. mpi_request.ReplyFreeQueueAddress =
  2345. cpu_to_le64(ioc->reply_free_dma);
  2346. mpi_request.ReplyDescriptorPostQueueAddress =
  2347. cpu_to_le64(ioc->reply_post_free_dma);
  2348. #else
  2349. mpi_request.SystemRequestFrameBaseAddress =
  2350. cpu_to_le32(ioc->request_dma);
  2351. mpi_request.ReplyFreeQueueAddress =
  2352. cpu_to_le32(ioc->reply_free_dma);
  2353. mpi_request.ReplyDescriptorPostQueueAddress =
  2354. cpu_to_le32(ioc->reply_post_free_dma);
  2355. #endif
  2356. if (ioc->logging_level & MPT_DEBUG_INIT) {
  2357. u32 *mfp;
  2358. int i;
  2359. mfp = (u32 *)&mpi_request;
  2360. printk(KERN_DEBUG "\toffset:data\n");
  2361. for (i = 0; i < sizeof(Mpi2IOCInitRequest_t)/4; i++)
  2362. printk(KERN_DEBUG "\t[0x%02x]:%08x\n", i*4,
  2363. le32_to_cpu(mfp[i]));
  2364. }
  2365. r = _base_handshake_req_reply_wait(ioc,
  2366. sizeof(Mpi2IOCInitRequest_t), (u32 *)&mpi_request,
  2367. sizeof(Mpi2IOCInitReply_t), (u16 *)&mpi_reply, 10,
  2368. sleep_flag);
  2369. if (r != 0) {
  2370. printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n",
  2371. ioc->name, __func__, r);
  2372. return r;
  2373. }
  2374. if (mpi_reply.IOCStatus != MPI2_IOCSTATUS_SUCCESS ||
  2375. mpi_reply.IOCLogInfo) {
  2376. printk(MPT2SAS_ERR_FMT "%s: failed\n", ioc->name, __func__);
  2377. r = -EIO;
  2378. }
  2379. return 0;
  2380. }
  2381. /**
  2382. * _base_send_port_enable - send port_enable(discovery stuff) to firmware
  2383. * @ioc: per adapter object
  2384. * @VF_ID: virtual function id
  2385. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2386. *
  2387. * Returns 0 for success, non-zero for failure.
  2388. */
  2389. static int
  2390. _base_send_port_enable(struct MPT2SAS_ADAPTER *ioc, u8 VF_ID, int sleep_flag)
  2391. {
  2392. Mpi2PortEnableRequest_t *mpi_request;
  2393. u32 ioc_state;
  2394. unsigned long timeleft;
  2395. int r = 0;
  2396. u16 smid;
  2397. printk(MPT2SAS_INFO_FMT "sending port enable !!\n", ioc->name);
  2398. if (ioc->base_cmds.status & MPT2_CMD_PENDING) {
  2399. printk(MPT2SAS_ERR_FMT "%s: internal command already in use\n",
  2400. ioc->name, __func__);
  2401. return -EAGAIN;
  2402. }
  2403. smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
  2404. if (!smid) {
  2405. printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
  2406. ioc->name, __func__);
  2407. return -EAGAIN;
  2408. }
  2409. ioc->base_cmds.status = MPT2_CMD_PENDING;
  2410. mpi_request = mpt2sas_base_get_msg_frame(ioc, smid);
  2411. ioc->base_cmds.smid = smid;
  2412. memset(mpi_request, 0, sizeof(Mpi2PortEnableRequest_t));
  2413. mpi_request->Function = MPI2_FUNCTION_PORT_ENABLE;
  2414. mpi_request->VF_ID = VF_ID;
  2415. mpt2sas_base_put_smid_default(ioc, smid, VF_ID);
  2416. timeleft = wait_for_completion_timeout(&ioc->base_cmds.done,
  2417. 300*HZ);
  2418. if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
  2419. printk(MPT2SAS_ERR_FMT "%s: timeout\n",
  2420. ioc->name, __func__);
  2421. _debug_dump_mf(mpi_request,
  2422. sizeof(Mpi2PortEnableRequest_t)/4);
  2423. if (ioc->base_cmds.status & MPT2_CMD_RESET)
  2424. r = -EFAULT;
  2425. else
  2426. r = -ETIME;
  2427. goto out;
  2428. } else
  2429. dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: complete\n",
  2430. ioc->name, __func__));
  2431. ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_OPERATIONAL,
  2432. 60, sleep_flag);
  2433. if (ioc_state) {
  2434. printk(MPT2SAS_ERR_FMT "%s: failed going to operational state "
  2435. " (ioc_state=0x%x)\n", ioc->name, __func__, ioc_state);
  2436. r = -EFAULT;
  2437. }
  2438. out:
  2439. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  2440. printk(MPT2SAS_INFO_FMT "port enable: %s\n",
  2441. ioc->name, ((r == 0) ? "SUCCESS" : "FAILED"));
  2442. return r;
  2443. }
  2444. /**
  2445. * _base_unmask_events - turn on notification for this event
  2446. * @ioc: per adapter object
  2447. * @event: firmware event
  2448. *
  2449. * The mask is stored in ioc->event_masks.
  2450. */
  2451. static void
  2452. _base_unmask_events(struct MPT2SAS_ADAPTER *ioc, u16 event)
  2453. {
  2454. u32 desired_event;
  2455. if (event >= 128)
  2456. return;
  2457. desired_event = (1 << (event % 32));
  2458. if (event < 32)
  2459. ioc->event_masks[0] &= ~desired_event;
  2460. else if (event < 64)
  2461. ioc->event_masks[1] &= ~desired_event;
  2462. else if (event < 96)
  2463. ioc->event_masks[2] &= ~desired_event;
  2464. else if (event < 128)
  2465. ioc->event_masks[3] &= ~desired_event;
  2466. }
  2467. /**
  2468. * _base_event_notification - send event notification
  2469. * @ioc: per adapter object
  2470. * @VF_ID: virtual function id
  2471. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2472. *
  2473. * Returns 0 for success, non-zero for failure.
  2474. */
  2475. static int
  2476. _base_event_notification(struct MPT2SAS_ADAPTER *ioc, u8 VF_ID, int sleep_flag)
  2477. {
  2478. Mpi2EventNotificationRequest_t *mpi_request;
  2479. unsigned long timeleft;
  2480. u16 smid;
  2481. int r = 0;
  2482. int i;
  2483. dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
  2484. __func__));
  2485. if (ioc->base_cmds.status & MPT2_CMD_PENDING) {
  2486. printk(MPT2SAS_ERR_FMT "%s: internal command already in use\n",
  2487. ioc->name, __func__);
  2488. return -EAGAIN;
  2489. }
  2490. smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
  2491. if (!smid) {
  2492. printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
  2493. ioc->name, __func__);
  2494. return -EAGAIN;
  2495. }
  2496. ioc->base_cmds.status = MPT2_CMD_PENDING;
  2497. mpi_request = mpt2sas_base_get_msg_frame(ioc, smid);
  2498. ioc->base_cmds.smid = smid;
  2499. memset(mpi_request, 0, sizeof(Mpi2EventNotificationRequest_t));
  2500. mpi_request->Function = MPI2_FUNCTION_EVENT_NOTIFICATION;
  2501. mpi_request->VF_ID = VF_ID;
  2502. for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++)
  2503. mpi_request->EventMasks[i] =
  2504. le32_to_cpu(ioc->event_masks[i]);
  2505. mpt2sas_base_put_smid_default(ioc, smid, VF_ID);
  2506. timeleft = wait_for_completion_timeout(&ioc->base_cmds.done, 30*HZ);
  2507. if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
  2508. printk(MPT2SAS_ERR_FMT "%s: timeout\n",
  2509. ioc->name, __func__);
  2510. _debug_dump_mf(mpi_request,
  2511. sizeof(Mpi2EventNotificationRequest_t)/4);
  2512. if (ioc->base_cmds.status & MPT2_CMD_RESET)
  2513. r = -EFAULT;
  2514. else
  2515. r = -ETIME;
  2516. } else
  2517. dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: complete\n",
  2518. ioc->name, __func__));
  2519. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  2520. return r;
  2521. }
  2522. /**
  2523. * mpt2sas_base_validate_event_type - validating event types
  2524. * @ioc: per adapter object
  2525. * @event: firmware event
  2526. *
  2527. * This will turn on firmware event notification when application
  2528. * ask for that event. We don't mask events that are already enabled.
  2529. */
  2530. void
  2531. mpt2sas_base_validate_event_type(struct MPT2SAS_ADAPTER *ioc, u32 *event_type)
  2532. {
  2533. int i, j;
  2534. u32 event_mask, desired_event;
  2535. u8 send_update_to_fw;
  2536. for (i = 0, send_update_to_fw = 0; i <
  2537. MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++) {
  2538. event_mask = ~event_type[i];
  2539. desired_event = 1;
  2540. for (j = 0; j < 32; j++) {
  2541. if (!(event_mask & desired_event) &&
  2542. (ioc->event_masks[i] & desired_event)) {
  2543. ioc->event_masks[i] &= ~desired_event;
  2544. send_update_to_fw = 1;
  2545. }
  2546. desired_event = (desired_event << 1);
  2547. }
  2548. }
  2549. if (!send_update_to_fw)
  2550. return;
  2551. mutex_lock(&ioc->base_cmds.mutex);
  2552. _base_event_notification(ioc, 0, CAN_SLEEP);
  2553. mutex_unlock(&ioc->base_cmds.mutex);
  2554. }
  2555. /**
  2556. * _base_diag_reset - the "big hammer" start of day reset
  2557. * @ioc: per adapter object
  2558. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2559. *
  2560. * Returns 0 for success, non-zero for failure.
  2561. */
  2562. static int
  2563. _base_diag_reset(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  2564. {
  2565. u32 host_diagnostic;
  2566. u32 ioc_state;
  2567. u32 count;
  2568. u32 hcb_size;
  2569. printk(MPT2SAS_INFO_FMT "sending diag reset !!\n", ioc->name);
  2570. _base_save_msix_table(ioc);
  2571. drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "clear interrupts\n",
  2572. ioc->name));
  2573. writel(0, &ioc->chip->HostInterruptStatus);
  2574. count = 0;
  2575. do {
  2576. /* Write magic sequence to WriteSequence register
  2577. * Loop until in diagnostic mode
  2578. */
  2579. drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "write magic "
  2580. "sequence\n", ioc->name));
  2581. writel(MPI2_WRSEQ_FLUSH_KEY_VALUE, &ioc->chip->WriteSequence);
  2582. writel(MPI2_WRSEQ_1ST_KEY_VALUE, &ioc->chip->WriteSequence);
  2583. writel(MPI2_WRSEQ_2ND_KEY_VALUE, &ioc->chip->WriteSequence);
  2584. writel(MPI2_WRSEQ_3RD_KEY_VALUE, &ioc->chip->WriteSequence);
  2585. writel(MPI2_WRSEQ_4TH_KEY_VALUE, &ioc->chip->WriteSequence);
  2586. writel(MPI2_WRSEQ_5TH_KEY_VALUE, &ioc->chip->WriteSequence);
  2587. writel(MPI2_WRSEQ_6TH_KEY_VALUE, &ioc->chip->WriteSequence);
  2588. /* wait 100 msec */
  2589. if (sleep_flag == CAN_SLEEP)
  2590. msleep(100);
  2591. else
  2592. mdelay(100);
  2593. if (count++ > 20)
  2594. goto out;
  2595. host_diagnostic = readl(&ioc->chip->HostDiagnostic);
  2596. drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "wrote magic "
  2597. "sequence: count(%d), host_diagnostic(0x%08x)\n",
  2598. ioc->name, count, host_diagnostic));
  2599. } while ((host_diagnostic & MPI2_DIAG_DIAG_WRITE_ENABLE) == 0);
  2600. hcb_size = readl(&ioc->chip->HCBSize);
  2601. drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "diag reset: issued\n",
  2602. ioc->name));
  2603. writel(host_diagnostic | MPI2_DIAG_RESET_ADAPTER,
  2604. &ioc->chip->HostDiagnostic);
  2605. /* don't access any registers for 50 milliseconds */
  2606. msleep(50);
  2607. /* 300 second max wait */
  2608. for (count = 0; count < 3000000 ; count++) {
  2609. host_diagnostic = readl(&ioc->chip->HostDiagnostic);
  2610. if (host_diagnostic == 0xFFFFFFFF)
  2611. goto out;
  2612. if (!(host_diagnostic & MPI2_DIAG_RESET_ADAPTER))
  2613. break;
  2614. /* wait 100 msec */
  2615. if (sleep_flag == CAN_SLEEP)
  2616. msleep(1);
  2617. else
  2618. mdelay(1);
  2619. }
  2620. if (host_diagnostic & MPI2_DIAG_HCB_MODE) {
  2621. drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "restart the adapter "
  2622. "assuming the HCB Address points to good F/W\n",
  2623. ioc->name));
  2624. host_diagnostic &= ~MPI2_DIAG_BOOT_DEVICE_SELECT_MASK;
  2625. host_diagnostic |= MPI2_DIAG_BOOT_DEVICE_SELECT_HCDW;
  2626. writel(host_diagnostic, &ioc->chip->HostDiagnostic);
  2627. drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT
  2628. "re-enable the HCDW\n", ioc->name));
  2629. writel(hcb_size | MPI2_HCB_SIZE_HCB_ENABLE,
  2630. &ioc->chip->HCBSize);
  2631. }
  2632. drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "restart the adapter\n",
  2633. ioc->name));
  2634. writel(host_diagnostic & ~MPI2_DIAG_HOLD_IOC_RESET,
  2635. &ioc->chip->HostDiagnostic);
  2636. drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "disable writes to the "
  2637. "diagnostic register\n", ioc->name));
  2638. writel(MPI2_WRSEQ_FLUSH_KEY_VALUE, &ioc->chip->WriteSequence);
  2639. drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "Wait for FW to go to the "
  2640. "READY state\n", ioc->name));
  2641. ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_READY, 20,
  2642. sleep_flag);
  2643. if (ioc_state) {
  2644. printk(MPT2SAS_ERR_FMT "%s: failed going to ready state "
  2645. " (ioc_state=0x%x)\n", ioc->name, __func__, ioc_state);
  2646. goto out;
  2647. }
  2648. _base_restore_msix_table(ioc);
  2649. printk(MPT2SAS_INFO_FMT "diag reset: SUCCESS\n", ioc->name);
  2650. return 0;
  2651. out:
  2652. printk(MPT2SAS_ERR_FMT "diag reset: FAILED\n", ioc->name);
  2653. return -EFAULT;
  2654. }
  2655. /**
  2656. * _base_make_ioc_ready - put controller in READY state
  2657. * @ioc: per adapter object
  2658. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2659. * @type: FORCE_BIG_HAMMER or SOFT_RESET
  2660. *
  2661. * Returns 0 for success, non-zero for failure.
  2662. */
  2663. static int
  2664. _base_make_ioc_ready(struct MPT2SAS_ADAPTER *ioc, int sleep_flag,
  2665. enum reset_type type)
  2666. {
  2667. u32 ioc_state;
  2668. dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
  2669. __func__));
  2670. ioc_state = mpt2sas_base_get_iocstate(ioc, 0);
  2671. dhsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: ioc_state(0x%08x)\n",
  2672. ioc->name, __func__, ioc_state));
  2673. if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_READY)
  2674. return 0;
  2675. if (ioc_state & MPI2_DOORBELL_USED) {
  2676. dhsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "unexpected doorbell "
  2677. "active!\n", ioc->name));
  2678. goto issue_diag_reset;
  2679. }
  2680. if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) {
  2681. mpt2sas_base_fault_info(ioc, ioc_state &
  2682. MPI2_DOORBELL_DATA_MASK);
  2683. goto issue_diag_reset;
  2684. }
  2685. if (type == FORCE_BIG_HAMMER)
  2686. goto issue_diag_reset;
  2687. if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_OPERATIONAL)
  2688. if (!(_base_send_ioc_reset(ioc,
  2689. MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET, 15, CAN_SLEEP)))
  2690. return 0;
  2691. issue_diag_reset:
  2692. return _base_diag_reset(ioc, CAN_SLEEP);
  2693. }
  2694. /**
  2695. * _base_make_ioc_operational - put controller in OPERATIONAL state
  2696. * @ioc: per adapter object
  2697. * @VF_ID: virtual function id
  2698. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2699. *
  2700. * Returns 0 for success, non-zero for failure.
  2701. */
  2702. static int
  2703. _base_make_ioc_operational(struct MPT2SAS_ADAPTER *ioc, u8 VF_ID,
  2704. int sleep_flag)
  2705. {
  2706. int r, i;
  2707. unsigned long flags;
  2708. u32 reply_address;
  2709. dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
  2710. __func__));
  2711. /* initialize the scsi lookup free list */
  2712. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  2713. INIT_LIST_HEAD(&ioc->free_list);
  2714. for (i = 0; i < ioc->request_depth; i++) {
  2715. ioc->scsi_lookup[i].cb_idx = 0xFF;
  2716. list_add_tail(&ioc->scsi_lookup[i].tracker_list,
  2717. &ioc->free_list);
  2718. }
  2719. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  2720. /* initialize Reply Free Queue */
  2721. for (i = 0, reply_address = (u32)ioc->reply_dma ;
  2722. i < ioc->reply_free_queue_depth ; i++, reply_address +=
  2723. ioc->reply_sz)
  2724. ioc->reply_free[i] = cpu_to_le32(reply_address);
  2725. /* initialize Reply Post Free Queue */
  2726. for (i = 0; i < ioc->reply_post_queue_depth; i++)
  2727. ioc->reply_post_free[i].Words = ~0ULL;
  2728. r = _base_send_ioc_init(ioc, VF_ID, sleep_flag);
  2729. if (r)
  2730. return r;
  2731. /* initialize the index's */
  2732. ioc->reply_free_host_index = ioc->reply_free_queue_depth - 1;
  2733. ioc->reply_post_host_index = 0;
  2734. writel(ioc->reply_free_host_index, &ioc->chip->ReplyFreeHostIndex);
  2735. writel(0, &ioc->chip->ReplyPostHostIndex);
  2736. _base_unmask_interrupts(ioc);
  2737. r = _base_event_notification(ioc, VF_ID, sleep_flag);
  2738. if (r)
  2739. return r;
  2740. if (sleep_flag == CAN_SLEEP)
  2741. _base_static_config_pages(ioc);
  2742. r = _base_send_port_enable(ioc, VF_ID, sleep_flag);
  2743. if (r)
  2744. return r;
  2745. return r;
  2746. }
  2747. /**
  2748. * mpt2sas_base_free_resources - free resources controller resources (io/irq/memap)
  2749. * @ioc: per adapter object
  2750. *
  2751. * Return nothing.
  2752. */
  2753. void
  2754. mpt2sas_base_free_resources(struct MPT2SAS_ADAPTER *ioc)
  2755. {
  2756. struct pci_dev *pdev = ioc->pdev;
  2757. dexitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
  2758. __func__));
  2759. _base_mask_interrupts(ioc);
  2760. _base_make_ioc_ready(ioc, CAN_SLEEP, SOFT_RESET);
  2761. if (ioc->pci_irq) {
  2762. synchronize_irq(pdev->irq);
  2763. free_irq(ioc->pci_irq, ioc);
  2764. }
  2765. _base_disable_msix(ioc);
  2766. if (ioc->chip_phys)
  2767. iounmap(ioc->chip);
  2768. ioc->pci_irq = -1;
  2769. ioc->chip_phys = 0;
  2770. pci_release_selected_regions(ioc->pdev, ioc->bars);
  2771. pci_disable_device(pdev);
  2772. pci_set_drvdata(pdev, NULL);
  2773. return;
  2774. }
  2775. /**
  2776. * mpt2sas_base_attach - attach controller instance
  2777. * @ioc: per adapter object
  2778. *
  2779. * Returns 0 for success, non-zero for failure.
  2780. */
  2781. int
  2782. mpt2sas_base_attach(struct MPT2SAS_ADAPTER *ioc)
  2783. {
  2784. int r, i;
  2785. unsigned long flags;
  2786. dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
  2787. __func__));
  2788. r = mpt2sas_base_map_resources(ioc);
  2789. if (r)
  2790. return r;
  2791. r = _base_make_ioc_ready(ioc, CAN_SLEEP, SOFT_RESET);
  2792. if (r)
  2793. goto out_free_resources;
  2794. r = _base_get_ioc_facts(ioc, CAN_SLEEP);
  2795. if (r)
  2796. goto out_free_resources;
  2797. r = _base_allocate_memory_pools(ioc, CAN_SLEEP);
  2798. if (r)
  2799. goto out_free_resources;
  2800. init_waitqueue_head(&ioc->reset_wq);
  2801. /* base internal command bits */
  2802. mutex_init(&ioc->base_cmds.mutex);
  2803. init_completion(&ioc->base_cmds.done);
  2804. ioc->base_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  2805. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  2806. /* transport internal command bits */
  2807. ioc->transport_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  2808. ioc->transport_cmds.status = MPT2_CMD_NOT_USED;
  2809. mutex_init(&ioc->transport_cmds.mutex);
  2810. init_completion(&ioc->transport_cmds.done);
  2811. /* task management internal command bits */
  2812. ioc->tm_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  2813. ioc->tm_cmds.status = MPT2_CMD_NOT_USED;
  2814. mutex_init(&ioc->tm_cmds.mutex);
  2815. init_completion(&ioc->tm_cmds.done);
  2816. /* config page internal command bits */
  2817. ioc->config_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  2818. ioc->config_cmds.status = MPT2_CMD_NOT_USED;
  2819. mutex_init(&ioc->config_cmds.mutex);
  2820. init_completion(&ioc->config_cmds.done);
  2821. /* ctl module internal command bits */
  2822. ioc->ctl_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  2823. ioc->ctl_cmds.status = MPT2_CMD_NOT_USED;
  2824. mutex_init(&ioc->ctl_cmds.mutex);
  2825. init_completion(&ioc->ctl_cmds.done);
  2826. for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++)
  2827. ioc->event_masks[i] = -1;
  2828. /* here we enable the events we care about */
  2829. _base_unmask_events(ioc, MPI2_EVENT_SAS_DISCOVERY);
  2830. _base_unmask_events(ioc, MPI2_EVENT_SAS_BROADCAST_PRIMITIVE);
  2831. _base_unmask_events(ioc, MPI2_EVENT_SAS_TOPOLOGY_CHANGE_LIST);
  2832. _base_unmask_events(ioc, MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE);
  2833. _base_unmask_events(ioc, MPI2_EVENT_SAS_ENCL_DEVICE_STATUS_CHANGE);
  2834. _base_unmask_events(ioc, MPI2_EVENT_IR_CONFIGURATION_CHANGE_LIST);
  2835. _base_unmask_events(ioc, MPI2_EVENT_IR_VOLUME);
  2836. _base_unmask_events(ioc, MPI2_EVENT_IR_PHYSICAL_DISK);
  2837. _base_unmask_events(ioc, MPI2_EVENT_IR_OPERATION_STATUS);
  2838. _base_unmask_events(ioc, MPI2_EVENT_TASK_SET_FULL);
  2839. _base_unmask_events(ioc, MPI2_EVENT_LOG_ENTRY_ADDED);
  2840. ioc->pfacts = kcalloc(ioc->facts.NumberOfPorts,
  2841. sizeof(Mpi2PortFactsReply_t), GFP_KERNEL);
  2842. if (!ioc->pfacts)
  2843. goto out_free_resources;
  2844. for (i = 0 ; i < ioc->facts.NumberOfPorts; i++) {
  2845. r = _base_get_port_facts(ioc, i, CAN_SLEEP);
  2846. if (r)
  2847. goto out_free_resources;
  2848. }
  2849. r = _base_make_ioc_operational(ioc, 0, CAN_SLEEP);
  2850. if (r)
  2851. goto out_free_resources;
  2852. /* initialize fault polling */
  2853. INIT_DELAYED_WORK(&ioc->fault_reset_work, _base_fault_reset_work);
  2854. snprintf(ioc->fault_reset_work_q_name,
  2855. sizeof(ioc->fault_reset_work_q_name), "poll_%d_status", ioc->id);
  2856. ioc->fault_reset_work_q =
  2857. create_singlethread_workqueue(ioc->fault_reset_work_q_name);
  2858. if (!ioc->fault_reset_work_q) {
  2859. printk(MPT2SAS_ERR_FMT "%s: failed (line=%d)\n",
  2860. ioc->name, __func__, __LINE__);
  2861. goto out_free_resources;
  2862. }
  2863. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  2864. if (ioc->fault_reset_work_q)
  2865. queue_delayed_work(ioc->fault_reset_work_q,
  2866. &ioc->fault_reset_work,
  2867. msecs_to_jiffies(FAULT_POLLING_INTERVAL));
  2868. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  2869. return 0;
  2870. out_free_resources:
  2871. ioc->remove_host = 1;
  2872. mpt2sas_base_free_resources(ioc);
  2873. _base_release_memory_pools(ioc);
  2874. kfree(ioc->tm_cmds.reply);
  2875. kfree(ioc->transport_cmds.reply);
  2876. kfree(ioc->config_cmds.reply);
  2877. kfree(ioc->base_cmds.reply);
  2878. kfree(ioc->ctl_cmds.reply);
  2879. kfree(ioc->pfacts);
  2880. ioc->ctl_cmds.reply = NULL;
  2881. ioc->base_cmds.reply = NULL;
  2882. ioc->tm_cmds.reply = NULL;
  2883. ioc->transport_cmds.reply = NULL;
  2884. ioc->config_cmds.reply = NULL;
  2885. ioc->pfacts = NULL;
  2886. return r;
  2887. }
  2888. /**
  2889. * mpt2sas_base_detach - remove controller instance
  2890. * @ioc: per adapter object
  2891. *
  2892. * Return nothing.
  2893. */
  2894. void
  2895. mpt2sas_base_detach(struct MPT2SAS_ADAPTER *ioc)
  2896. {
  2897. unsigned long flags;
  2898. struct workqueue_struct *wq;
  2899. dexitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
  2900. __func__));
  2901. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  2902. wq = ioc->fault_reset_work_q;
  2903. ioc->fault_reset_work_q = NULL;
  2904. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  2905. if (!cancel_delayed_work(&ioc->fault_reset_work))
  2906. flush_workqueue(wq);
  2907. destroy_workqueue(wq);
  2908. mpt2sas_base_free_resources(ioc);
  2909. _base_release_memory_pools(ioc);
  2910. kfree(ioc->pfacts);
  2911. kfree(ioc->ctl_cmds.reply);
  2912. kfree(ioc->base_cmds.reply);
  2913. kfree(ioc->tm_cmds.reply);
  2914. kfree(ioc->transport_cmds.reply);
  2915. kfree(ioc->config_cmds.reply);
  2916. }
  2917. /**
  2918. * _base_reset_handler - reset callback handler (for base)
  2919. * @ioc: per adapter object
  2920. * @reset_phase: phase
  2921. *
  2922. * The handler for doing any required cleanup or initialization.
  2923. *
  2924. * The reset phase can be MPT2_IOC_PRE_RESET, MPT2_IOC_AFTER_RESET,
  2925. * MPT2_IOC_DONE_RESET
  2926. *
  2927. * Return nothing.
  2928. */
  2929. static void
  2930. _base_reset_handler(struct MPT2SAS_ADAPTER *ioc, int reset_phase)
  2931. {
  2932. switch (reset_phase) {
  2933. case MPT2_IOC_PRE_RESET:
  2934. dtmprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: "
  2935. "MPT2_IOC_PRE_RESET\n", ioc->name, __func__));
  2936. break;
  2937. case MPT2_IOC_AFTER_RESET:
  2938. dtmprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: "
  2939. "MPT2_IOC_AFTER_RESET\n", ioc->name, __func__));
  2940. if (ioc->transport_cmds.status & MPT2_CMD_PENDING) {
  2941. ioc->transport_cmds.status |= MPT2_CMD_RESET;
  2942. mpt2sas_base_free_smid(ioc, ioc->transport_cmds.smid);
  2943. complete(&ioc->transport_cmds.done);
  2944. }
  2945. if (ioc->base_cmds.status & MPT2_CMD_PENDING) {
  2946. ioc->base_cmds.status |= MPT2_CMD_RESET;
  2947. mpt2sas_base_free_smid(ioc, ioc->base_cmds.smid);
  2948. complete(&ioc->base_cmds.done);
  2949. }
  2950. if (ioc->config_cmds.status & MPT2_CMD_PENDING) {
  2951. ioc->config_cmds.status |= MPT2_CMD_RESET;
  2952. mpt2sas_base_free_smid(ioc, ioc->config_cmds.smid);
  2953. complete(&ioc->config_cmds.done);
  2954. }
  2955. break;
  2956. case MPT2_IOC_DONE_RESET:
  2957. dtmprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: "
  2958. "MPT2_IOC_DONE_RESET\n", ioc->name, __func__));
  2959. break;
  2960. }
  2961. mpt2sas_scsih_reset_handler(ioc, reset_phase);
  2962. mpt2sas_ctl_reset_handler(ioc, reset_phase);
  2963. }
  2964. /**
  2965. * _wait_for_commands_to_complete - reset controller
  2966. * @ioc: Pointer to MPT_ADAPTER structure
  2967. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2968. *
  2969. * This function waiting(3s) for all pending commands to complete
  2970. * prior to putting controller in reset.
  2971. */
  2972. static void
  2973. _wait_for_commands_to_complete(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  2974. {
  2975. u32 ioc_state;
  2976. unsigned long flags;
  2977. u16 i;
  2978. ioc->pending_io_count = 0;
  2979. if (sleep_flag != CAN_SLEEP)
  2980. return;
  2981. ioc_state = mpt2sas_base_get_iocstate(ioc, 0);
  2982. if ((ioc_state & MPI2_IOC_STATE_MASK) != MPI2_IOC_STATE_OPERATIONAL)
  2983. return;
  2984. /* pending command count */
  2985. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  2986. for (i = 0; i < ioc->request_depth; i++)
  2987. if (ioc->scsi_lookup[i].cb_idx != 0xFF)
  2988. ioc->pending_io_count++;
  2989. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  2990. if (!ioc->pending_io_count)
  2991. return;
  2992. /* wait for pending commands to complete */
  2993. wait_event_timeout(ioc->reset_wq, ioc->pending_io_count == 0, 3 * HZ);
  2994. }
  2995. /**
  2996. * mpt2sas_base_hard_reset_handler - reset controller
  2997. * @ioc: Pointer to MPT_ADAPTER structure
  2998. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2999. * @type: FORCE_BIG_HAMMER or SOFT_RESET
  3000. *
  3001. * Returns 0 for success, non-zero for failure.
  3002. */
  3003. int
  3004. mpt2sas_base_hard_reset_handler(struct MPT2SAS_ADAPTER *ioc, int sleep_flag,
  3005. enum reset_type type)
  3006. {
  3007. int r, i;
  3008. unsigned long flags;
  3009. dtmprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: enter\n", ioc->name,
  3010. __func__));
  3011. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  3012. if (ioc->ioc_reset_in_progress) {
  3013. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  3014. printk(MPT2SAS_ERR_FMT "%s: busy\n",
  3015. ioc->name, __func__);
  3016. return -EBUSY;
  3017. }
  3018. ioc->ioc_reset_in_progress = 1;
  3019. ioc->shost_recovery = 1;
  3020. if (ioc->shost->shost_state == SHOST_RUNNING) {
  3021. /* set back to SHOST_RUNNING in mpt2sas_scsih.c */
  3022. scsi_host_set_state(ioc->shost, SHOST_RECOVERY);
  3023. printk(MPT2SAS_INFO_FMT "putting controller into "
  3024. "SHOST_RECOVERY\n", ioc->name);
  3025. }
  3026. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  3027. _base_reset_handler(ioc, MPT2_IOC_PRE_RESET);
  3028. _wait_for_commands_to_complete(ioc, sleep_flag);
  3029. _base_mask_interrupts(ioc);
  3030. r = _base_make_ioc_ready(ioc, sleep_flag, type);
  3031. if (r)
  3032. goto out;
  3033. _base_reset_handler(ioc, MPT2_IOC_AFTER_RESET);
  3034. for (i = 0 ; i < ioc->facts.NumberOfPorts; i++)
  3035. r = _base_make_ioc_operational(ioc, ioc->pfacts[i].VF_ID,
  3036. sleep_flag);
  3037. if (!r)
  3038. _base_reset_handler(ioc, MPT2_IOC_DONE_RESET);
  3039. out:
  3040. dtmprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: %s\n",
  3041. ioc->name, __func__, ((r == 0) ? "SUCCESS" : "FAILED")));
  3042. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  3043. ioc->ioc_reset_in_progress = 0;
  3044. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  3045. return r;
  3046. }