cciss.h 7.1 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296
  1. #ifndef CCISS_H
  2. #define CCISS_H
  3. #include <linux/genhd.h>
  4. #include "cciss_cmd.h"
  5. #define NWD_SHIFT 4
  6. #define MAX_PART (1 << NWD_SHIFT)
  7. #define IO_OK 0
  8. #define IO_ERROR 1
  9. struct ctlr_info;
  10. typedef struct ctlr_info ctlr_info_t;
  11. struct access_method {
  12. void (*submit_command)(ctlr_info_t *h, CommandList_struct *c);
  13. void (*set_intr_mask)(ctlr_info_t *h, unsigned long val);
  14. unsigned long (*fifo_full)(ctlr_info_t *h);
  15. unsigned long (*intr_pending)(ctlr_info_t *h);
  16. unsigned long (*command_completed)(ctlr_info_t *h);
  17. };
  18. typedef struct _drive_info_struct
  19. {
  20. __u32 LunID;
  21. int usage_count;
  22. struct request_queue *queue;
  23. sector_t nr_blocks;
  24. int block_size;
  25. int heads;
  26. int sectors;
  27. int cylinders;
  28. int raid_level; /* set to -1 to indicate that
  29. * the drive is not in use/configured
  30. */
  31. int busy_configuring; /*This is set when the drive is being removed
  32. *to prevent it from being opened or it's queue
  33. *from being started.
  34. */
  35. __u8 serial_no[16]; /* from inquiry page 0x83, */
  36. /* not necc. null terminated. */
  37. } drive_info_struct;
  38. #ifdef CONFIG_CISS_SCSI_TAPE
  39. struct sendcmd_reject_list {
  40. int ncompletions;
  41. unsigned long *complete; /* array of NR_CMDS tags */
  42. };
  43. #endif
  44. struct ctlr_info
  45. {
  46. int ctlr;
  47. char devname[8];
  48. char *product_name;
  49. char firm_ver[4]; // Firmware version
  50. struct pci_dev *pdev;
  51. __u32 board_id;
  52. void __iomem *vaddr;
  53. unsigned long paddr;
  54. int nr_cmds; /* Number of commands allowed on this controller */
  55. CfgTable_struct __iomem *cfgtable;
  56. int interrupts_enabled;
  57. int major;
  58. int max_commands;
  59. int commands_outstanding;
  60. int max_outstanding; /* Debug */
  61. int num_luns;
  62. int highest_lun;
  63. int usage_count; /* number of opens all all minor devices */
  64. # define DOORBELL_INT 0
  65. # define PERF_MODE_INT 1
  66. # define SIMPLE_MODE_INT 2
  67. # define MEMQ_MODE_INT 3
  68. unsigned int intr[4];
  69. unsigned int msix_vector;
  70. unsigned int msi_vector;
  71. int cciss_max_sectors;
  72. BYTE cciss_read;
  73. BYTE cciss_write;
  74. BYTE cciss_read_capacity;
  75. // information about each logical volume
  76. drive_info_struct drv[CISS_MAX_LUN];
  77. struct access_method access;
  78. /* queue and queue Info */
  79. struct hlist_head reqQ;
  80. struct hlist_head cmpQ;
  81. unsigned int Qdepth;
  82. unsigned int maxQsinceinit;
  83. unsigned int maxSG;
  84. spinlock_t lock;
  85. //* pointers to command and error info pool */
  86. CommandList_struct *cmd_pool;
  87. dma_addr_t cmd_pool_dhandle;
  88. ErrorInfo_struct *errinfo_pool;
  89. dma_addr_t errinfo_pool_dhandle;
  90. unsigned long *cmd_pool_bits;
  91. int nr_allocs;
  92. int nr_frees;
  93. int busy_configuring;
  94. int busy_initializing;
  95. /* This element holds the zero based queue number of the last
  96. * queue to be started. It is used for fairness.
  97. */
  98. int next_to_run;
  99. // Disk structures we need to pass back
  100. struct gendisk *gendisk[CISS_MAX_LUN];
  101. #ifdef CONFIG_CISS_SCSI_TAPE
  102. void *scsi_ctlr; /* ptr to structure containing scsi related stuff */
  103. /* list of block side commands the scsi error handling sucked up */
  104. /* and saved for later processing */
  105. struct sendcmd_reject_list scsi_rejects;
  106. #endif
  107. unsigned char alive;
  108. struct completion *rescan_wait;
  109. struct task_struct *cciss_scan_thread;
  110. };
  111. /* Defining the diffent access_menthods */
  112. /*
  113. * Memory mapped FIFO interface (SMART 53xx cards)
  114. */
  115. #define SA5_DOORBELL 0x20
  116. #define SA5_REQUEST_PORT_OFFSET 0x40
  117. #define SA5_REPLY_INTR_MASK_OFFSET 0x34
  118. #define SA5_REPLY_PORT_OFFSET 0x44
  119. #define SA5_INTR_STATUS 0x30
  120. #define SA5_SCRATCHPAD_OFFSET 0xB0
  121. #define SA5_CTCFG_OFFSET 0xB4
  122. #define SA5_CTMEM_OFFSET 0xB8
  123. #define SA5_INTR_OFF 0x08
  124. #define SA5B_INTR_OFF 0x04
  125. #define SA5_INTR_PENDING 0x08
  126. #define SA5B_INTR_PENDING 0x04
  127. #define FIFO_EMPTY 0xffffffff
  128. #define CCISS_FIRMWARE_READY 0xffff0000 /* value in scratchpad register */
  129. #define CISS_ERROR_BIT 0x02
  130. #define CCISS_INTR_ON 1
  131. #define CCISS_INTR_OFF 0
  132. /*
  133. Send the command to the hardware
  134. */
  135. static void SA5_submit_command( ctlr_info_t *h, CommandList_struct *c)
  136. {
  137. #ifdef CCISS_DEBUG
  138. printk("Sending %x - down to controller\n", c->busaddr );
  139. #endif /* CCISS_DEBUG */
  140. writel(c->busaddr, h->vaddr + SA5_REQUEST_PORT_OFFSET);
  141. h->commands_outstanding++;
  142. if ( h->commands_outstanding > h->max_outstanding)
  143. h->max_outstanding = h->commands_outstanding;
  144. }
  145. /*
  146. * This card is the opposite of the other cards.
  147. * 0 turns interrupts on...
  148. * 0x08 turns them off...
  149. */
  150. static void SA5_intr_mask(ctlr_info_t *h, unsigned long val)
  151. {
  152. if (val)
  153. { /* Turn interrupts on */
  154. h->interrupts_enabled = 1;
  155. writel(0, h->vaddr + SA5_REPLY_INTR_MASK_OFFSET);
  156. } else /* Turn them off */
  157. {
  158. h->interrupts_enabled = 0;
  159. writel( SA5_INTR_OFF,
  160. h->vaddr + SA5_REPLY_INTR_MASK_OFFSET);
  161. }
  162. }
  163. /*
  164. * This card is the opposite of the other cards.
  165. * 0 turns interrupts on...
  166. * 0x04 turns them off...
  167. */
  168. static void SA5B_intr_mask(ctlr_info_t *h, unsigned long val)
  169. {
  170. if (val)
  171. { /* Turn interrupts on */
  172. h->interrupts_enabled = 1;
  173. writel(0, h->vaddr + SA5_REPLY_INTR_MASK_OFFSET);
  174. } else /* Turn them off */
  175. {
  176. h->interrupts_enabled = 0;
  177. writel( SA5B_INTR_OFF,
  178. h->vaddr + SA5_REPLY_INTR_MASK_OFFSET);
  179. }
  180. }
  181. /*
  182. * Returns true if fifo is full.
  183. *
  184. */
  185. static unsigned long SA5_fifo_full(ctlr_info_t *h)
  186. {
  187. if( h->commands_outstanding >= h->max_commands)
  188. return(1);
  189. else
  190. return(0);
  191. }
  192. /*
  193. * returns value read from hardware.
  194. * returns FIFO_EMPTY if there is nothing to read
  195. */
  196. static unsigned long SA5_completed(ctlr_info_t *h)
  197. {
  198. unsigned long register_value
  199. = readl(h->vaddr + SA5_REPLY_PORT_OFFSET);
  200. if(register_value != FIFO_EMPTY)
  201. {
  202. h->commands_outstanding--;
  203. #ifdef CCISS_DEBUG
  204. printk("cciss: Read %lx back from board\n", register_value);
  205. #endif /* CCISS_DEBUG */
  206. }
  207. #ifdef CCISS_DEBUG
  208. else
  209. {
  210. printk("cciss: FIFO Empty read\n");
  211. }
  212. #endif
  213. return ( register_value);
  214. }
  215. /*
  216. * Returns true if an interrupt is pending..
  217. */
  218. static unsigned long SA5_intr_pending(ctlr_info_t *h)
  219. {
  220. unsigned long register_value =
  221. readl(h->vaddr + SA5_INTR_STATUS);
  222. #ifdef CCISS_DEBUG
  223. printk("cciss: intr_pending %lx\n", register_value);
  224. #endif /* CCISS_DEBUG */
  225. if( register_value & SA5_INTR_PENDING)
  226. return 1;
  227. return 0 ;
  228. }
  229. /*
  230. * Returns true if an interrupt is pending..
  231. */
  232. static unsigned long SA5B_intr_pending(ctlr_info_t *h)
  233. {
  234. unsigned long register_value =
  235. readl(h->vaddr + SA5_INTR_STATUS);
  236. #ifdef CCISS_DEBUG
  237. printk("cciss: intr_pending %lx\n", register_value);
  238. #endif /* CCISS_DEBUG */
  239. if( register_value & SA5B_INTR_PENDING)
  240. return 1;
  241. return 0 ;
  242. }
  243. static struct access_method SA5_access = {
  244. SA5_submit_command,
  245. SA5_intr_mask,
  246. SA5_fifo_full,
  247. SA5_intr_pending,
  248. SA5_completed,
  249. };
  250. static struct access_method SA5B_access = {
  251. SA5_submit_command,
  252. SA5B_intr_mask,
  253. SA5_fifo_full,
  254. SA5B_intr_pending,
  255. SA5_completed,
  256. };
  257. struct board_type {
  258. __u32 board_id;
  259. char *product_name;
  260. struct access_method *access;
  261. int nr_cmds; /* Max cmds this kind of ctlr can handle. */
  262. };
  263. #define CCISS_LOCK(i) (&hba[i]->lock)
  264. #endif /* CCISS_H */