time.c 45 KB

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  1. /*
  2. * arch/s390/kernel/time.c
  3. * Time of day based timer functions.
  4. *
  5. * S390 version
  6. * Copyright IBM Corp. 1999, 2008
  7. * Author(s): Hartmut Penner (hp@de.ibm.com),
  8. * Martin Schwidefsky (schwidefsky@de.ibm.com),
  9. * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com)
  10. *
  11. * Derived from "arch/i386/kernel/time.c"
  12. * Copyright (C) 1991, 1992, 1995 Linus Torvalds
  13. */
  14. #define KMSG_COMPONENT "time"
  15. #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
  16. #include <linux/errno.h>
  17. #include <linux/module.h>
  18. #include <linux/sched.h>
  19. #include <linux/kernel.h>
  20. #include <linux/param.h>
  21. #include <linux/string.h>
  22. #include <linux/mm.h>
  23. #include <linux/interrupt.h>
  24. #include <linux/cpu.h>
  25. #include <linux/stop_machine.h>
  26. #include <linux/time.h>
  27. #include <linux/sysdev.h>
  28. #include <linux/delay.h>
  29. #include <linux/init.h>
  30. #include <linux/smp.h>
  31. #include <linux/types.h>
  32. #include <linux/profile.h>
  33. #include <linux/timex.h>
  34. #include <linux/notifier.h>
  35. #include <linux/clocksource.h>
  36. #include <linux/clockchips.h>
  37. #include <linux/bootmem.h>
  38. #include <asm/uaccess.h>
  39. #include <asm/delay.h>
  40. #include <asm/s390_ext.h>
  41. #include <asm/div64.h>
  42. #include <asm/vdso.h>
  43. #include <asm/irq.h>
  44. #include <asm/irq_regs.h>
  45. #include <asm/timer.h>
  46. #include <asm/etr.h>
  47. #include <asm/cio.h>
  48. /* change this if you have some constant time drift */
  49. #define USECS_PER_JIFFY ((unsigned long) 1000000/HZ)
  50. #define CLK_TICKS_PER_JIFFY ((unsigned long) USECS_PER_JIFFY << 12)
  51. /* The value of the TOD clock for 1.1.1970. */
  52. #define TOD_UNIX_EPOCH 0x7d91048bca000000ULL
  53. /*
  54. * Create a small time difference between the timer interrupts
  55. * on the different cpus to avoid lock contention.
  56. */
  57. #define CPU_DEVIATION (smp_processor_id() << 12)
  58. #define TICK_SIZE tick
  59. static ext_int_info_t ext_int_info_cc;
  60. static ext_int_info_t ext_int_etr_cc;
  61. static u64 sched_clock_base_cc;
  62. static DEFINE_PER_CPU(struct clock_event_device, comparators);
  63. /*
  64. * Scheduler clock - returns current time in nanosec units.
  65. */
  66. unsigned long long sched_clock(void)
  67. {
  68. return ((get_clock_xt() - sched_clock_base_cc) * 125) >> 9;
  69. }
  70. /*
  71. * Monotonic_clock - returns # of nanoseconds passed since time_init()
  72. */
  73. unsigned long long monotonic_clock(void)
  74. {
  75. return sched_clock();
  76. }
  77. EXPORT_SYMBOL(monotonic_clock);
  78. void tod_to_timeval(__u64 todval, struct timespec *xtime)
  79. {
  80. unsigned long long sec;
  81. sec = todval >> 12;
  82. do_div(sec, 1000000);
  83. xtime->tv_sec = sec;
  84. todval -= (sec * 1000000) << 12;
  85. xtime->tv_nsec = ((todval * 1000) >> 12);
  86. }
  87. #ifdef CONFIG_PROFILING
  88. #define s390_do_profile() profile_tick(CPU_PROFILING)
  89. #else
  90. #define s390_do_profile() do { ; } while(0)
  91. #endif /* CONFIG_PROFILING */
  92. void clock_comparator_work(void)
  93. {
  94. struct clock_event_device *cd;
  95. S390_lowcore.clock_comparator = -1ULL;
  96. set_clock_comparator(S390_lowcore.clock_comparator);
  97. cd = &__get_cpu_var(comparators);
  98. cd->event_handler(cd);
  99. s390_do_profile();
  100. }
  101. /*
  102. * Fixup the clock comparator.
  103. */
  104. static void fixup_clock_comparator(unsigned long long delta)
  105. {
  106. /* If nobody is waiting there's nothing to fix. */
  107. if (S390_lowcore.clock_comparator == -1ULL)
  108. return;
  109. S390_lowcore.clock_comparator += delta;
  110. set_clock_comparator(S390_lowcore.clock_comparator);
  111. }
  112. static int s390_next_event(unsigned long delta,
  113. struct clock_event_device *evt)
  114. {
  115. S390_lowcore.clock_comparator = get_clock() + delta;
  116. set_clock_comparator(S390_lowcore.clock_comparator);
  117. return 0;
  118. }
  119. static void s390_set_mode(enum clock_event_mode mode,
  120. struct clock_event_device *evt)
  121. {
  122. }
  123. /*
  124. * Set up lowcore and control register of the current cpu to
  125. * enable TOD clock and clock comparator interrupts.
  126. */
  127. void init_cpu_timer(void)
  128. {
  129. struct clock_event_device *cd;
  130. int cpu;
  131. S390_lowcore.clock_comparator = -1ULL;
  132. set_clock_comparator(S390_lowcore.clock_comparator);
  133. cpu = smp_processor_id();
  134. cd = &per_cpu(comparators, cpu);
  135. cd->name = "comparator";
  136. cd->features = CLOCK_EVT_FEAT_ONESHOT;
  137. cd->mult = 16777;
  138. cd->shift = 12;
  139. cd->min_delta_ns = 1;
  140. cd->max_delta_ns = LONG_MAX;
  141. cd->rating = 400;
  142. cd->cpumask = cpumask_of(cpu);
  143. cd->set_next_event = s390_next_event;
  144. cd->set_mode = s390_set_mode;
  145. clockevents_register_device(cd);
  146. /* Enable clock comparator timer interrupt. */
  147. __ctl_set_bit(0,11);
  148. /* Always allow the timing alert external interrupt. */
  149. __ctl_set_bit(0, 4);
  150. }
  151. static void clock_comparator_interrupt(__u16 code)
  152. {
  153. if (S390_lowcore.clock_comparator == -1ULL)
  154. set_clock_comparator(S390_lowcore.clock_comparator);
  155. }
  156. static void etr_timing_alert(struct etr_irq_parm *);
  157. static void stp_timing_alert(struct stp_irq_parm *);
  158. static void timing_alert_interrupt(__u16 code)
  159. {
  160. if (S390_lowcore.ext_params & 0x00c40000)
  161. etr_timing_alert((struct etr_irq_parm *)
  162. &S390_lowcore.ext_params);
  163. if (S390_lowcore.ext_params & 0x00038000)
  164. stp_timing_alert((struct stp_irq_parm *)
  165. &S390_lowcore.ext_params);
  166. }
  167. static void etr_reset(void);
  168. static void stp_reset(void);
  169. /*
  170. * Get the TOD clock running.
  171. */
  172. static u64 __init reset_tod_clock(void)
  173. {
  174. u64 time;
  175. etr_reset();
  176. stp_reset();
  177. if (store_clock(&time) == 0)
  178. return time;
  179. /* TOD clock not running. Set the clock to Unix Epoch. */
  180. if (set_clock(TOD_UNIX_EPOCH) != 0 || store_clock(&time) != 0)
  181. panic("TOD clock not operational.");
  182. return TOD_UNIX_EPOCH;
  183. }
  184. static cycle_t read_tod_clock(void)
  185. {
  186. return get_clock();
  187. }
  188. static struct clocksource clocksource_tod = {
  189. .name = "tod",
  190. .rating = 400,
  191. .read = read_tod_clock,
  192. .mask = -1ULL,
  193. .mult = 1000,
  194. .shift = 12,
  195. .flags = CLOCK_SOURCE_IS_CONTINUOUS,
  196. };
  197. void update_vsyscall(struct timespec *wall_time, struct clocksource *clock)
  198. {
  199. if (clock != &clocksource_tod)
  200. return;
  201. /* Make userspace gettimeofday spin until we're done. */
  202. ++vdso_data->tb_update_count;
  203. smp_wmb();
  204. vdso_data->xtime_tod_stamp = clock->cycle_last;
  205. vdso_data->xtime_clock_sec = xtime.tv_sec;
  206. vdso_data->xtime_clock_nsec = xtime.tv_nsec;
  207. vdso_data->wtom_clock_sec = wall_to_monotonic.tv_sec;
  208. vdso_data->wtom_clock_nsec = wall_to_monotonic.tv_nsec;
  209. smp_wmb();
  210. ++vdso_data->tb_update_count;
  211. }
  212. extern struct timezone sys_tz;
  213. void update_vsyscall_tz(void)
  214. {
  215. /* Make userspace gettimeofday spin until we're done. */
  216. ++vdso_data->tb_update_count;
  217. smp_wmb();
  218. vdso_data->tz_minuteswest = sys_tz.tz_minuteswest;
  219. vdso_data->tz_dsttime = sys_tz.tz_dsttime;
  220. smp_wmb();
  221. ++vdso_data->tb_update_count;
  222. }
  223. /*
  224. * Initialize the TOD clock and the CPU timer of
  225. * the boot cpu.
  226. */
  227. void __init time_init(void)
  228. {
  229. sched_clock_base_cc = reset_tod_clock();
  230. /* set xtime */
  231. tod_to_timeval(sched_clock_base_cc - TOD_UNIX_EPOCH, &xtime);
  232. set_normalized_timespec(&wall_to_monotonic,
  233. -xtime.tv_sec, -xtime.tv_nsec);
  234. /* request the clock comparator external interrupt */
  235. if (register_early_external_interrupt(0x1004,
  236. clock_comparator_interrupt,
  237. &ext_int_info_cc) != 0)
  238. panic("Couldn't request external interrupt 0x1004");
  239. if (clocksource_register(&clocksource_tod) != 0)
  240. panic("Could not register TOD clock source");
  241. /* request the timing alert external interrupt */
  242. if (register_early_external_interrupt(0x1406,
  243. timing_alert_interrupt,
  244. &ext_int_etr_cc) != 0)
  245. panic("Couldn't request external interrupt 0x1406");
  246. /* Enable TOD clock interrupts on the boot cpu. */
  247. init_cpu_timer();
  248. /* Enable cpu timer interrupts on the boot cpu. */
  249. vtime_init();
  250. }
  251. /*
  252. * The time is "clock". old is what we think the time is.
  253. * Adjust the value by a multiple of jiffies and add the delta to ntp.
  254. * "delay" is an approximation how long the synchronization took. If
  255. * the time correction is positive, then "delay" is subtracted from
  256. * the time difference and only the remaining part is passed to ntp.
  257. */
  258. static unsigned long long adjust_time(unsigned long long old,
  259. unsigned long long clock,
  260. unsigned long long delay)
  261. {
  262. unsigned long long delta, ticks;
  263. struct timex adjust;
  264. if (clock > old) {
  265. /* It is later than we thought. */
  266. delta = ticks = clock - old;
  267. delta = ticks = (delta < delay) ? 0 : delta - delay;
  268. delta -= do_div(ticks, CLK_TICKS_PER_JIFFY);
  269. adjust.offset = ticks * (1000000 / HZ);
  270. } else {
  271. /* It is earlier than we thought. */
  272. delta = ticks = old - clock;
  273. delta -= do_div(ticks, CLK_TICKS_PER_JIFFY);
  274. delta = -delta;
  275. adjust.offset = -ticks * (1000000 / HZ);
  276. }
  277. sched_clock_base_cc += delta;
  278. if (adjust.offset != 0) {
  279. pr_notice("The ETR interface has adjusted the clock "
  280. "by %li microseconds\n", adjust.offset);
  281. adjust.modes = ADJ_OFFSET_SINGLESHOT;
  282. do_adjtimex(&adjust);
  283. }
  284. return delta;
  285. }
  286. static DEFINE_PER_CPU(atomic_t, clock_sync_word);
  287. static DEFINE_MUTEX(clock_sync_mutex);
  288. static unsigned long clock_sync_flags;
  289. #define CLOCK_SYNC_HAS_ETR 0
  290. #define CLOCK_SYNC_HAS_STP 1
  291. #define CLOCK_SYNC_ETR 2
  292. #define CLOCK_SYNC_STP 3
  293. /*
  294. * The synchronous get_clock function. It will write the current clock
  295. * value to the clock pointer and return 0 if the clock is in sync with
  296. * the external time source. If the clock mode is local it will return
  297. * -ENOSYS and -EAGAIN if the clock is not in sync with the external
  298. * reference.
  299. */
  300. int get_sync_clock(unsigned long long *clock)
  301. {
  302. atomic_t *sw_ptr;
  303. unsigned int sw0, sw1;
  304. sw_ptr = &get_cpu_var(clock_sync_word);
  305. sw0 = atomic_read(sw_ptr);
  306. *clock = get_clock();
  307. sw1 = atomic_read(sw_ptr);
  308. put_cpu_var(clock_sync_sync);
  309. if (sw0 == sw1 && (sw0 & 0x80000000U))
  310. /* Success: time is in sync. */
  311. return 0;
  312. if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags) &&
  313. !test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags))
  314. return -ENOSYS;
  315. if (!test_bit(CLOCK_SYNC_ETR, &clock_sync_flags) &&
  316. !test_bit(CLOCK_SYNC_STP, &clock_sync_flags))
  317. return -EACCES;
  318. return -EAGAIN;
  319. }
  320. EXPORT_SYMBOL(get_sync_clock);
  321. /*
  322. * Make get_sync_clock return -EAGAIN.
  323. */
  324. static void disable_sync_clock(void *dummy)
  325. {
  326. atomic_t *sw_ptr = &__get_cpu_var(clock_sync_word);
  327. /*
  328. * Clear the in-sync bit 2^31. All get_sync_clock calls will
  329. * fail until the sync bit is turned back on. In addition
  330. * increase the "sequence" counter to avoid the race of an
  331. * etr event and the complete recovery against get_sync_clock.
  332. */
  333. atomic_clear_mask(0x80000000, sw_ptr);
  334. atomic_inc(sw_ptr);
  335. }
  336. /*
  337. * Make get_sync_clock return 0 again.
  338. * Needs to be called from a context disabled for preemption.
  339. */
  340. static void enable_sync_clock(void)
  341. {
  342. atomic_t *sw_ptr = &__get_cpu_var(clock_sync_word);
  343. atomic_set_mask(0x80000000, sw_ptr);
  344. }
  345. /*
  346. * Function to check if the clock is in sync.
  347. */
  348. static inline int check_sync_clock(void)
  349. {
  350. atomic_t *sw_ptr;
  351. int rc;
  352. sw_ptr = &get_cpu_var(clock_sync_word);
  353. rc = (atomic_read(sw_ptr) & 0x80000000U) != 0;
  354. put_cpu_var(clock_sync_sync);
  355. return rc;
  356. }
  357. /* Single threaded workqueue used for etr and stp sync events */
  358. static struct workqueue_struct *time_sync_wq;
  359. static void __init time_init_wq(void)
  360. {
  361. if (time_sync_wq)
  362. return;
  363. time_sync_wq = create_singlethread_workqueue("timesync");
  364. stop_machine_create();
  365. }
  366. /*
  367. * External Time Reference (ETR) code.
  368. */
  369. static int etr_port0_online;
  370. static int etr_port1_online;
  371. static int etr_steai_available;
  372. static int __init early_parse_etr(char *p)
  373. {
  374. if (strncmp(p, "off", 3) == 0)
  375. etr_port0_online = etr_port1_online = 0;
  376. else if (strncmp(p, "port0", 5) == 0)
  377. etr_port0_online = 1;
  378. else if (strncmp(p, "port1", 5) == 0)
  379. etr_port1_online = 1;
  380. else if (strncmp(p, "on", 2) == 0)
  381. etr_port0_online = etr_port1_online = 1;
  382. return 0;
  383. }
  384. early_param("etr", early_parse_etr);
  385. enum etr_event {
  386. ETR_EVENT_PORT0_CHANGE,
  387. ETR_EVENT_PORT1_CHANGE,
  388. ETR_EVENT_PORT_ALERT,
  389. ETR_EVENT_SYNC_CHECK,
  390. ETR_EVENT_SWITCH_LOCAL,
  391. ETR_EVENT_UPDATE,
  392. };
  393. /*
  394. * Valid bit combinations of the eacr register are (x = don't care):
  395. * e0 e1 dp p0 p1 ea es sl
  396. * 0 0 x 0 0 0 0 0 initial, disabled state
  397. * 0 0 x 0 1 1 0 0 port 1 online
  398. * 0 0 x 1 0 1 0 0 port 0 online
  399. * 0 0 x 1 1 1 0 0 both ports online
  400. * 0 1 x 0 1 1 0 0 port 1 online and usable, ETR or PPS mode
  401. * 0 1 x 0 1 1 0 1 port 1 online, usable and ETR mode
  402. * 0 1 x 0 1 1 1 0 port 1 online, usable, PPS mode, in-sync
  403. * 0 1 x 0 1 1 1 1 port 1 online, usable, ETR mode, in-sync
  404. * 0 1 x 1 1 1 0 0 both ports online, port 1 usable
  405. * 0 1 x 1 1 1 1 0 both ports online, port 1 usable, PPS mode, in-sync
  406. * 0 1 x 1 1 1 1 1 both ports online, port 1 usable, ETR mode, in-sync
  407. * 1 0 x 1 0 1 0 0 port 0 online and usable, ETR or PPS mode
  408. * 1 0 x 1 0 1 0 1 port 0 online, usable and ETR mode
  409. * 1 0 x 1 0 1 1 0 port 0 online, usable, PPS mode, in-sync
  410. * 1 0 x 1 0 1 1 1 port 0 online, usable, ETR mode, in-sync
  411. * 1 0 x 1 1 1 0 0 both ports online, port 0 usable
  412. * 1 0 x 1 1 1 1 0 both ports online, port 0 usable, PPS mode, in-sync
  413. * 1 0 x 1 1 1 1 1 both ports online, port 0 usable, ETR mode, in-sync
  414. * 1 1 x 1 1 1 1 0 both ports online & usable, ETR, in-sync
  415. * 1 1 x 1 1 1 1 1 both ports online & usable, ETR, in-sync
  416. */
  417. static struct etr_eacr etr_eacr;
  418. static u64 etr_tolec; /* time of last eacr update */
  419. static struct etr_aib etr_port0;
  420. static int etr_port0_uptodate;
  421. static struct etr_aib etr_port1;
  422. static int etr_port1_uptodate;
  423. static unsigned long etr_events;
  424. static struct timer_list etr_timer;
  425. static void etr_timeout(unsigned long dummy);
  426. static void etr_work_fn(struct work_struct *work);
  427. static DEFINE_MUTEX(etr_work_mutex);
  428. static DECLARE_WORK(etr_work, etr_work_fn);
  429. /*
  430. * Reset ETR attachment.
  431. */
  432. static void etr_reset(void)
  433. {
  434. etr_eacr = (struct etr_eacr) {
  435. .e0 = 0, .e1 = 0, ._pad0 = 4, .dp = 0,
  436. .p0 = 0, .p1 = 0, ._pad1 = 0, .ea = 0,
  437. .es = 0, .sl = 0 };
  438. if (etr_setr(&etr_eacr) == 0) {
  439. etr_tolec = get_clock();
  440. set_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags);
  441. if (etr_port0_online && etr_port1_online)
  442. set_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
  443. } else if (etr_port0_online || etr_port1_online) {
  444. pr_warning("The real or virtual hardware system does "
  445. "not provide an ETR interface\n");
  446. etr_port0_online = etr_port1_online = 0;
  447. }
  448. }
  449. static int __init etr_init(void)
  450. {
  451. struct etr_aib aib;
  452. if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags))
  453. return 0;
  454. time_init_wq();
  455. /* Check if this machine has the steai instruction. */
  456. if (etr_steai(&aib, ETR_STEAI_STEPPING_PORT) == 0)
  457. etr_steai_available = 1;
  458. setup_timer(&etr_timer, etr_timeout, 0UL);
  459. if (etr_port0_online) {
  460. set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events);
  461. queue_work(time_sync_wq, &etr_work);
  462. }
  463. if (etr_port1_online) {
  464. set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events);
  465. queue_work(time_sync_wq, &etr_work);
  466. }
  467. return 0;
  468. }
  469. arch_initcall(etr_init);
  470. /*
  471. * Two sorts of ETR machine checks. The architecture reads:
  472. * "When a machine-check niterruption occurs and if a switch-to-local or
  473. * ETR-sync-check interrupt request is pending but disabled, this pending
  474. * disabled interruption request is indicated and is cleared".
  475. * Which means that we can get etr_switch_to_local events from the machine
  476. * check handler although the interruption condition is disabled. Lovely..
  477. */
  478. /*
  479. * Switch to local machine check. This is called when the last usable
  480. * ETR port goes inactive. After switch to local the clock is not in sync.
  481. */
  482. void etr_switch_to_local(void)
  483. {
  484. if (!etr_eacr.sl)
  485. return;
  486. disable_sync_clock(NULL);
  487. set_bit(ETR_EVENT_SWITCH_LOCAL, &etr_events);
  488. queue_work(time_sync_wq, &etr_work);
  489. }
  490. /*
  491. * ETR sync check machine check. This is called when the ETR OTE and the
  492. * local clock OTE are farther apart than the ETR sync check tolerance.
  493. * After a ETR sync check the clock is not in sync. The machine check
  494. * is broadcasted to all cpus at the same time.
  495. */
  496. void etr_sync_check(void)
  497. {
  498. if (!etr_eacr.es)
  499. return;
  500. disable_sync_clock(NULL);
  501. set_bit(ETR_EVENT_SYNC_CHECK, &etr_events);
  502. queue_work(time_sync_wq, &etr_work);
  503. }
  504. /*
  505. * ETR timing alert. There are two causes:
  506. * 1) port state change, check the usability of the port
  507. * 2) port alert, one of the ETR-data-validity bits (v1-v2 bits of the
  508. * sldr-status word) or ETR-data word 1 (edf1) or ETR-data word 3 (edf3)
  509. * or ETR-data word 4 (edf4) has changed.
  510. */
  511. static void etr_timing_alert(struct etr_irq_parm *intparm)
  512. {
  513. if (intparm->pc0)
  514. /* ETR port 0 state change. */
  515. set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events);
  516. if (intparm->pc1)
  517. /* ETR port 1 state change. */
  518. set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events);
  519. if (intparm->eai)
  520. /*
  521. * ETR port alert on either port 0, 1 or both.
  522. * Both ports are not up-to-date now.
  523. */
  524. set_bit(ETR_EVENT_PORT_ALERT, &etr_events);
  525. queue_work(time_sync_wq, &etr_work);
  526. }
  527. static void etr_timeout(unsigned long dummy)
  528. {
  529. set_bit(ETR_EVENT_UPDATE, &etr_events);
  530. queue_work(time_sync_wq, &etr_work);
  531. }
  532. /*
  533. * Check if the etr mode is pss.
  534. */
  535. static inline int etr_mode_is_pps(struct etr_eacr eacr)
  536. {
  537. return eacr.es && !eacr.sl;
  538. }
  539. /*
  540. * Check if the etr mode is etr.
  541. */
  542. static inline int etr_mode_is_etr(struct etr_eacr eacr)
  543. {
  544. return eacr.es && eacr.sl;
  545. }
  546. /*
  547. * Check if the port can be used for TOD synchronization.
  548. * For PPS mode the port has to receive OTEs. For ETR mode
  549. * the port has to receive OTEs, the ETR stepping bit has to
  550. * be zero and the validity bits for data frame 1, 2, and 3
  551. * have to be 1.
  552. */
  553. static int etr_port_valid(struct etr_aib *aib, int port)
  554. {
  555. unsigned int psc;
  556. /* Check that this port is receiving OTEs. */
  557. if (aib->tsp == 0)
  558. return 0;
  559. psc = port ? aib->esw.psc1 : aib->esw.psc0;
  560. if (psc == etr_lpsc_pps_mode)
  561. return 1;
  562. if (psc == etr_lpsc_operational_step)
  563. return !aib->esw.y && aib->slsw.v1 &&
  564. aib->slsw.v2 && aib->slsw.v3;
  565. return 0;
  566. }
  567. /*
  568. * Check if two ports are on the same network.
  569. */
  570. static int etr_compare_network(struct etr_aib *aib1, struct etr_aib *aib2)
  571. {
  572. // FIXME: any other fields we have to compare?
  573. return aib1->edf1.net_id == aib2->edf1.net_id;
  574. }
  575. /*
  576. * Wrapper for etr_stei that converts physical port states
  577. * to logical port states to be consistent with the output
  578. * of stetr (see etr_psc vs. etr_lpsc).
  579. */
  580. static void etr_steai_cv(struct etr_aib *aib, unsigned int func)
  581. {
  582. BUG_ON(etr_steai(aib, func) != 0);
  583. /* Convert port state to logical port state. */
  584. if (aib->esw.psc0 == 1)
  585. aib->esw.psc0 = 2;
  586. else if (aib->esw.psc0 == 0 && aib->esw.p == 0)
  587. aib->esw.psc0 = 1;
  588. if (aib->esw.psc1 == 1)
  589. aib->esw.psc1 = 2;
  590. else if (aib->esw.psc1 == 0 && aib->esw.p == 1)
  591. aib->esw.psc1 = 1;
  592. }
  593. /*
  594. * Check if the aib a2 is still connected to the same attachment as
  595. * aib a1, the etv values differ by one and a2 is valid.
  596. */
  597. static int etr_aib_follows(struct etr_aib *a1, struct etr_aib *a2, int p)
  598. {
  599. int state_a1, state_a2;
  600. /* Paranoia check: e0/e1 should better be the same. */
  601. if (a1->esw.eacr.e0 != a2->esw.eacr.e0 ||
  602. a1->esw.eacr.e1 != a2->esw.eacr.e1)
  603. return 0;
  604. /* Still connected to the same etr ? */
  605. state_a1 = p ? a1->esw.psc1 : a1->esw.psc0;
  606. state_a2 = p ? a2->esw.psc1 : a2->esw.psc0;
  607. if (state_a1 == etr_lpsc_operational_step) {
  608. if (state_a2 != etr_lpsc_operational_step ||
  609. a1->edf1.net_id != a2->edf1.net_id ||
  610. a1->edf1.etr_id != a2->edf1.etr_id ||
  611. a1->edf1.etr_pn != a2->edf1.etr_pn)
  612. return 0;
  613. } else if (state_a2 != etr_lpsc_pps_mode)
  614. return 0;
  615. /* The ETV value of a2 needs to be ETV of a1 + 1. */
  616. if (a1->edf2.etv + 1 != a2->edf2.etv)
  617. return 0;
  618. if (!etr_port_valid(a2, p))
  619. return 0;
  620. return 1;
  621. }
  622. struct clock_sync_data {
  623. atomic_t cpus;
  624. int in_sync;
  625. unsigned long long fixup_cc;
  626. int etr_port;
  627. struct etr_aib *etr_aib;
  628. };
  629. static void clock_sync_cpu(struct clock_sync_data *sync)
  630. {
  631. atomic_dec(&sync->cpus);
  632. enable_sync_clock();
  633. /*
  634. * This looks like a busy wait loop but it isn't. etr_sync_cpus
  635. * is called on all other cpus while the TOD clocks is stopped.
  636. * __udelay will stop the cpu on an enabled wait psw until the
  637. * TOD is running again.
  638. */
  639. while (sync->in_sync == 0) {
  640. __udelay(1);
  641. /*
  642. * A different cpu changes *in_sync. Therefore use
  643. * barrier() to force memory access.
  644. */
  645. barrier();
  646. }
  647. if (sync->in_sync != 1)
  648. /* Didn't work. Clear per-cpu in sync bit again. */
  649. disable_sync_clock(NULL);
  650. /*
  651. * This round of TOD syncing is done. Set the clock comparator
  652. * to the next tick and let the processor continue.
  653. */
  654. fixup_clock_comparator(sync->fixup_cc);
  655. }
  656. /*
  657. * Sync the TOD clock using the port refered to by aibp. This port
  658. * has to be enabled and the other port has to be disabled. The
  659. * last eacr update has to be more than 1.6 seconds in the past.
  660. */
  661. static int etr_sync_clock(void *data)
  662. {
  663. static int first;
  664. unsigned long long clock, old_clock, delay, delta;
  665. struct clock_sync_data *etr_sync;
  666. struct etr_aib *sync_port, *aib;
  667. int port;
  668. int rc;
  669. etr_sync = data;
  670. if (xchg(&first, 1) == 1) {
  671. /* Slave */
  672. clock_sync_cpu(etr_sync);
  673. return 0;
  674. }
  675. /* Wait until all other cpus entered the sync function. */
  676. while (atomic_read(&etr_sync->cpus) != 0)
  677. cpu_relax();
  678. port = etr_sync->etr_port;
  679. aib = etr_sync->etr_aib;
  680. sync_port = (port == 0) ? &etr_port0 : &etr_port1;
  681. enable_sync_clock();
  682. /* Set clock to next OTE. */
  683. __ctl_set_bit(14, 21);
  684. __ctl_set_bit(0, 29);
  685. clock = ((unsigned long long) (aib->edf2.etv + 1)) << 32;
  686. old_clock = get_clock();
  687. if (set_clock(clock) == 0) {
  688. __udelay(1); /* Wait for the clock to start. */
  689. __ctl_clear_bit(0, 29);
  690. __ctl_clear_bit(14, 21);
  691. etr_stetr(aib);
  692. /* Adjust Linux timing variables. */
  693. delay = (unsigned long long)
  694. (aib->edf2.etv - sync_port->edf2.etv) << 32;
  695. delta = adjust_time(old_clock, clock, delay);
  696. etr_sync->fixup_cc = delta;
  697. fixup_clock_comparator(delta);
  698. /* Verify that the clock is properly set. */
  699. if (!etr_aib_follows(sync_port, aib, port)) {
  700. /* Didn't work. */
  701. disable_sync_clock(NULL);
  702. etr_sync->in_sync = -EAGAIN;
  703. rc = -EAGAIN;
  704. } else {
  705. etr_sync->in_sync = 1;
  706. rc = 0;
  707. }
  708. } else {
  709. /* Could not set the clock ?!? */
  710. __ctl_clear_bit(0, 29);
  711. __ctl_clear_bit(14, 21);
  712. disable_sync_clock(NULL);
  713. etr_sync->in_sync = -EAGAIN;
  714. rc = -EAGAIN;
  715. }
  716. xchg(&first, 0);
  717. return rc;
  718. }
  719. static int etr_sync_clock_stop(struct etr_aib *aib, int port)
  720. {
  721. struct clock_sync_data etr_sync;
  722. struct etr_aib *sync_port;
  723. int follows;
  724. int rc;
  725. /* Check if the current aib is adjacent to the sync port aib. */
  726. sync_port = (port == 0) ? &etr_port0 : &etr_port1;
  727. follows = etr_aib_follows(sync_port, aib, port);
  728. memcpy(sync_port, aib, sizeof(*aib));
  729. if (!follows)
  730. return -EAGAIN;
  731. memset(&etr_sync, 0, sizeof(etr_sync));
  732. etr_sync.etr_aib = aib;
  733. etr_sync.etr_port = port;
  734. get_online_cpus();
  735. atomic_set(&etr_sync.cpus, num_online_cpus() - 1);
  736. rc = stop_machine(etr_sync_clock, &etr_sync, &cpu_online_map);
  737. put_online_cpus();
  738. return rc;
  739. }
  740. /*
  741. * Handle the immediate effects of the different events.
  742. * The port change event is used for online/offline changes.
  743. */
  744. static struct etr_eacr etr_handle_events(struct etr_eacr eacr)
  745. {
  746. if (test_and_clear_bit(ETR_EVENT_SYNC_CHECK, &etr_events))
  747. eacr.es = 0;
  748. if (test_and_clear_bit(ETR_EVENT_SWITCH_LOCAL, &etr_events))
  749. eacr.es = eacr.sl = 0;
  750. if (test_and_clear_bit(ETR_EVENT_PORT_ALERT, &etr_events))
  751. etr_port0_uptodate = etr_port1_uptodate = 0;
  752. if (test_and_clear_bit(ETR_EVENT_PORT0_CHANGE, &etr_events)) {
  753. if (eacr.e0)
  754. /*
  755. * Port change of an enabled port. We have to
  756. * assume that this can have caused an stepping
  757. * port switch.
  758. */
  759. etr_tolec = get_clock();
  760. eacr.p0 = etr_port0_online;
  761. if (!eacr.p0)
  762. eacr.e0 = 0;
  763. etr_port0_uptodate = 0;
  764. }
  765. if (test_and_clear_bit(ETR_EVENT_PORT1_CHANGE, &etr_events)) {
  766. if (eacr.e1)
  767. /*
  768. * Port change of an enabled port. We have to
  769. * assume that this can have caused an stepping
  770. * port switch.
  771. */
  772. etr_tolec = get_clock();
  773. eacr.p1 = etr_port1_online;
  774. if (!eacr.p1)
  775. eacr.e1 = 0;
  776. etr_port1_uptodate = 0;
  777. }
  778. clear_bit(ETR_EVENT_UPDATE, &etr_events);
  779. return eacr;
  780. }
  781. /*
  782. * Set up a timer that expires after the etr_tolec + 1.6 seconds if
  783. * one of the ports needs an update.
  784. */
  785. static void etr_set_tolec_timeout(unsigned long long now)
  786. {
  787. unsigned long micros;
  788. if ((!etr_eacr.p0 || etr_port0_uptodate) &&
  789. (!etr_eacr.p1 || etr_port1_uptodate))
  790. return;
  791. micros = (now > etr_tolec) ? ((now - etr_tolec) >> 12) : 0;
  792. micros = (micros > 1600000) ? 0 : 1600000 - micros;
  793. mod_timer(&etr_timer, jiffies + (micros * HZ) / 1000000 + 1);
  794. }
  795. /*
  796. * Set up a time that expires after 1/2 second.
  797. */
  798. static void etr_set_sync_timeout(void)
  799. {
  800. mod_timer(&etr_timer, jiffies + HZ/2);
  801. }
  802. /*
  803. * Update the aib information for one or both ports.
  804. */
  805. static struct etr_eacr etr_handle_update(struct etr_aib *aib,
  806. struct etr_eacr eacr)
  807. {
  808. /* With both ports disabled the aib information is useless. */
  809. if (!eacr.e0 && !eacr.e1)
  810. return eacr;
  811. /* Update port0 or port1 with aib stored in etr_work_fn. */
  812. if (aib->esw.q == 0) {
  813. /* Information for port 0 stored. */
  814. if (eacr.p0 && !etr_port0_uptodate) {
  815. etr_port0 = *aib;
  816. if (etr_port0_online)
  817. etr_port0_uptodate = 1;
  818. }
  819. } else {
  820. /* Information for port 1 stored. */
  821. if (eacr.p1 && !etr_port1_uptodate) {
  822. etr_port1 = *aib;
  823. if (etr_port0_online)
  824. etr_port1_uptodate = 1;
  825. }
  826. }
  827. /*
  828. * Do not try to get the alternate port aib if the clock
  829. * is not in sync yet.
  830. */
  831. if (!check_sync_clock())
  832. return eacr;
  833. /*
  834. * If steai is available we can get the information about
  835. * the other port immediately. If only stetr is available the
  836. * data-port bit toggle has to be used.
  837. */
  838. if (etr_steai_available) {
  839. if (eacr.p0 && !etr_port0_uptodate) {
  840. etr_steai_cv(&etr_port0, ETR_STEAI_PORT_0);
  841. etr_port0_uptodate = 1;
  842. }
  843. if (eacr.p1 && !etr_port1_uptodate) {
  844. etr_steai_cv(&etr_port1, ETR_STEAI_PORT_1);
  845. etr_port1_uptodate = 1;
  846. }
  847. } else {
  848. /*
  849. * One port was updated above, if the other
  850. * port is not uptodate toggle dp bit.
  851. */
  852. if ((eacr.p0 && !etr_port0_uptodate) ||
  853. (eacr.p1 && !etr_port1_uptodate))
  854. eacr.dp ^= 1;
  855. else
  856. eacr.dp = 0;
  857. }
  858. return eacr;
  859. }
  860. /*
  861. * Write new etr control register if it differs from the current one.
  862. * Return 1 if etr_tolec has been updated as well.
  863. */
  864. static void etr_update_eacr(struct etr_eacr eacr)
  865. {
  866. int dp_changed;
  867. if (memcmp(&etr_eacr, &eacr, sizeof(eacr)) == 0)
  868. /* No change, return. */
  869. return;
  870. /*
  871. * The disable of an active port of the change of the data port
  872. * bit can/will cause a change in the data port.
  873. */
  874. dp_changed = etr_eacr.e0 > eacr.e0 || etr_eacr.e1 > eacr.e1 ||
  875. (etr_eacr.dp ^ eacr.dp) != 0;
  876. etr_eacr = eacr;
  877. etr_setr(&etr_eacr);
  878. if (dp_changed)
  879. etr_tolec = get_clock();
  880. }
  881. /*
  882. * ETR work. In this function you'll find the main logic. In
  883. * particular this is the only function that calls etr_update_eacr(),
  884. * it "controls" the etr control register.
  885. */
  886. static void etr_work_fn(struct work_struct *work)
  887. {
  888. unsigned long long now;
  889. struct etr_eacr eacr;
  890. struct etr_aib aib;
  891. int sync_port;
  892. /* prevent multiple execution. */
  893. mutex_lock(&etr_work_mutex);
  894. /* Create working copy of etr_eacr. */
  895. eacr = etr_eacr;
  896. /* Check for the different events and their immediate effects. */
  897. eacr = etr_handle_events(eacr);
  898. /* Check if ETR is supposed to be active. */
  899. eacr.ea = eacr.p0 || eacr.p1;
  900. if (!eacr.ea) {
  901. /* Both ports offline. Reset everything. */
  902. eacr.dp = eacr.es = eacr.sl = 0;
  903. on_each_cpu(disable_sync_clock, NULL, 1);
  904. del_timer_sync(&etr_timer);
  905. etr_update_eacr(eacr);
  906. goto out_unlock;
  907. }
  908. /* Store aib to get the current ETR status word. */
  909. BUG_ON(etr_stetr(&aib) != 0);
  910. etr_port0.esw = etr_port1.esw = aib.esw; /* Copy status word. */
  911. now = get_clock();
  912. /*
  913. * Update the port information if the last stepping port change
  914. * or data port change is older than 1.6 seconds.
  915. */
  916. if (now >= etr_tolec + (1600000 << 12))
  917. eacr = etr_handle_update(&aib, eacr);
  918. /*
  919. * Select ports to enable. The prefered synchronization mode is PPS.
  920. * If a port can be enabled depends on a number of things:
  921. * 1) The port needs to be online and uptodate. A port is not
  922. * disabled just because it is not uptodate, but it is only
  923. * enabled if it is uptodate.
  924. * 2) The port needs to have the same mode (pps / etr).
  925. * 3) The port needs to be usable -> etr_port_valid() == 1
  926. * 4) To enable the second port the clock needs to be in sync.
  927. * 5) If both ports are useable and are ETR ports, the network id
  928. * has to be the same.
  929. * The eacr.sl bit is used to indicate etr mode vs. pps mode.
  930. */
  931. if (eacr.p0 && aib.esw.psc0 == etr_lpsc_pps_mode) {
  932. eacr.sl = 0;
  933. eacr.e0 = 1;
  934. if (!etr_mode_is_pps(etr_eacr))
  935. eacr.es = 0;
  936. if (!eacr.es || !eacr.p1 || aib.esw.psc1 != etr_lpsc_pps_mode)
  937. eacr.e1 = 0;
  938. // FIXME: uptodate checks ?
  939. else if (etr_port0_uptodate && etr_port1_uptodate)
  940. eacr.e1 = 1;
  941. sync_port = (etr_port0_uptodate &&
  942. etr_port_valid(&etr_port0, 0)) ? 0 : -1;
  943. } else if (eacr.p1 && aib.esw.psc1 == etr_lpsc_pps_mode) {
  944. eacr.sl = 0;
  945. eacr.e0 = 0;
  946. eacr.e1 = 1;
  947. if (!etr_mode_is_pps(etr_eacr))
  948. eacr.es = 0;
  949. sync_port = (etr_port1_uptodate &&
  950. etr_port_valid(&etr_port1, 1)) ? 1 : -1;
  951. } else if (eacr.p0 && aib.esw.psc0 == etr_lpsc_operational_step) {
  952. eacr.sl = 1;
  953. eacr.e0 = 1;
  954. if (!etr_mode_is_etr(etr_eacr))
  955. eacr.es = 0;
  956. if (!eacr.es || !eacr.p1 ||
  957. aib.esw.psc1 != etr_lpsc_operational_alt)
  958. eacr.e1 = 0;
  959. else if (etr_port0_uptodate && etr_port1_uptodate &&
  960. etr_compare_network(&etr_port0, &etr_port1))
  961. eacr.e1 = 1;
  962. sync_port = (etr_port0_uptodate &&
  963. etr_port_valid(&etr_port0, 0)) ? 0 : -1;
  964. } else if (eacr.p1 && aib.esw.psc1 == etr_lpsc_operational_step) {
  965. eacr.sl = 1;
  966. eacr.e0 = 0;
  967. eacr.e1 = 1;
  968. if (!etr_mode_is_etr(etr_eacr))
  969. eacr.es = 0;
  970. sync_port = (etr_port1_uptodate &&
  971. etr_port_valid(&etr_port1, 1)) ? 1 : -1;
  972. } else {
  973. /* Both ports not usable. */
  974. eacr.es = eacr.sl = 0;
  975. sync_port = -1;
  976. }
  977. /*
  978. * If the clock is in sync just update the eacr and return.
  979. * If there is no valid sync port wait for a port update.
  980. */
  981. if (check_sync_clock() || sync_port < 0) {
  982. etr_update_eacr(eacr);
  983. etr_set_tolec_timeout(now);
  984. goto out_unlock;
  985. }
  986. /*
  987. * Prepare control register for clock syncing
  988. * (reset data port bit, set sync check control.
  989. */
  990. eacr.dp = 0;
  991. eacr.es = 1;
  992. /*
  993. * Update eacr and try to synchronize the clock. If the update
  994. * of eacr caused a stepping port switch (or if we have to
  995. * assume that a stepping port switch has occured) or the
  996. * clock syncing failed, reset the sync check control bit
  997. * and set up a timer to try again after 0.5 seconds
  998. */
  999. etr_update_eacr(eacr);
  1000. if (now < etr_tolec + (1600000 << 12) ||
  1001. etr_sync_clock_stop(&aib, sync_port) != 0) {
  1002. /* Sync failed. Try again in 1/2 second. */
  1003. eacr.es = 0;
  1004. etr_update_eacr(eacr);
  1005. etr_set_sync_timeout();
  1006. } else
  1007. etr_set_tolec_timeout(now);
  1008. out_unlock:
  1009. mutex_unlock(&etr_work_mutex);
  1010. }
  1011. /*
  1012. * Sysfs interface functions
  1013. */
  1014. static struct sysdev_class etr_sysclass = {
  1015. .name = "etr",
  1016. };
  1017. static struct sys_device etr_port0_dev = {
  1018. .id = 0,
  1019. .cls = &etr_sysclass,
  1020. };
  1021. static struct sys_device etr_port1_dev = {
  1022. .id = 1,
  1023. .cls = &etr_sysclass,
  1024. };
  1025. /*
  1026. * ETR class attributes
  1027. */
  1028. static ssize_t etr_stepping_port_show(struct sysdev_class *class, char *buf)
  1029. {
  1030. return sprintf(buf, "%i\n", etr_port0.esw.p);
  1031. }
  1032. static SYSDEV_CLASS_ATTR(stepping_port, 0400, etr_stepping_port_show, NULL);
  1033. static ssize_t etr_stepping_mode_show(struct sysdev_class *class, char *buf)
  1034. {
  1035. char *mode_str;
  1036. if (etr_mode_is_pps(etr_eacr))
  1037. mode_str = "pps";
  1038. else if (etr_mode_is_etr(etr_eacr))
  1039. mode_str = "etr";
  1040. else
  1041. mode_str = "local";
  1042. return sprintf(buf, "%s\n", mode_str);
  1043. }
  1044. static SYSDEV_CLASS_ATTR(stepping_mode, 0400, etr_stepping_mode_show, NULL);
  1045. /*
  1046. * ETR port attributes
  1047. */
  1048. static inline struct etr_aib *etr_aib_from_dev(struct sys_device *dev)
  1049. {
  1050. if (dev == &etr_port0_dev)
  1051. return etr_port0_online ? &etr_port0 : NULL;
  1052. else
  1053. return etr_port1_online ? &etr_port1 : NULL;
  1054. }
  1055. static ssize_t etr_online_show(struct sys_device *dev,
  1056. struct sysdev_attribute *attr,
  1057. char *buf)
  1058. {
  1059. unsigned int online;
  1060. online = (dev == &etr_port0_dev) ? etr_port0_online : etr_port1_online;
  1061. return sprintf(buf, "%i\n", online);
  1062. }
  1063. static ssize_t etr_online_store(struct sys_device *dev,
  1064. struct sysdev_attribute *attr,
  1065. const char *buf, size_t count)
  1066. {
  1067. unsigned int value;
  1068. value = simple_strtoul(buf, NULL, 0);
  1069. if (value != 0 && value != 1)
  1070. return -EINVAL;
  1071. if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags))
  1072. return -EOPNOTSUPP;
  1073. mutex_lock(&clock_sync_mutex);
  1074. if (dev == &etr_port0_dev) {
  1075. if (etr_port0_online == value)
  1076. goto out; /* Nothing to do. */
  1077. etr_port0_online = value;
  1078. if (etr_port0_online && etr_port1_online)
  1079. set_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
  1080. else
  1081. clear_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
  1082. set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events);
  1083. queue_work(time_sync_wq, &etr_work);
  1084. } else {
  1085. if (etr_port1_online == value)
  1086. goto out; /* Nothing to do. */
  1087. etr_port1_online = value;
  1088. if (etr_port0_online && etr_port1_online)
  1089. set_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
  1090. else
  1091. clear_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
  1092. set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events);
  1093. queue_work(time_sync_wq, &etr_work);
  1094. }
  1095. out:
  1096. mutex_unlock(&clock_sync_mutex);
  1097. return count;
  1098. }
  1099. static SYSDEV_ATTR(online, 0600, etr_online_show, etr_online_store);
  1100. static ssize_t etr_stepping_control_show(struct sys_device *dev,
  1101. struct sysdev_attribute *attr,
  1102. char *buf)
  1103. {
  1104. return sprintf(buf, "%i\n", (dev == &etr_port0_dev) ?
  1105. etr_eacr.e0 : etr_eacr.e1);
  1106. }
  1107. static SYSDEV_ATTR(stepping_control, 0400, etr_stepping_control_show, NULL);
  1108. static ssize_t etr_mode_code_show(struct sys_device *dev,
  1109. struct sysdev_attribute *attr, char *buf)
  1110. {
  1111. if (!etr_port0_online && !etr_port1_online)
  1112. /* Status word is not uptodate if both ports are offline. */
  1113. return -ENODATA;
  1114. return sprintf(buf, "%i\n", (dev == &etr_port0_dev) ?
  1115. etr_port0.esw.psc0 : etr_port0.esw.psc1);
  1116. }
  1117. static SYSDEV_ATTR(state_code, 0400, etr_mode_code_show, NULL);
  1118. static ssize_t etr_untuned_show(struct sys_device *dev,
  1119. struct sysdev_attribute *attr, char *buf)
  1120. {
  1121. struct etr_aib *aib = etr_aib_from_dev(dev);
  1122. if (!aib || !aib->slsw.v1)
  1123. return -ENODATA;
  1124. return sprintf(buf, "%i\n", aib->edf1.u);
  1125. }
  1126. static SYSDEV_ATTR(untuned, 0400, etr_untuned_show, NULL);
  1127. static ssize_t etr_network_id_show(struct sys_device *dev,
  1128. struct sysdev_attribute *attr, char *buf)
  1129. {
  1130. struct etr_aib *aib = etr_aib_from_dev(dev);
  1131. if (!aib || !aib->slsw.v1)
  1132. return -ENODATA;
  1133. return sprintf(buf, "%i\n", aib->edf1.net_id);
  1134. }
  1135. static SYSDEV_ATTR(network, 0400, etr_network_id_show, NULL);
  1136. static ssize_t etr_id_show(struct sys_device *dev,
  1137. struct sysdev_attribute *attr, char *buf)
  1138. {
  1139. struct etr_aib *aib = etr_aib_from_dev(dev);
  1140. if (!aib || !aib->slsw.v1)
  1141. return -ENODATA;
  1142. return sprintf(buf, "%i\n", aib->edf1.etr_id);
  1143. }
  1144. static SYSDEV_ATTR(id, 0400, etr_id_show, NULL);
  1145. static ssize_t etr_port_number_show(struct sys_device *dev,
  1146. struct sysdev_attribute *attr, char *buf)
  1147. {
  1148. struct etr_aib *aib = etr_aib_from_dev(dev);
  1149. if (!aib || !aib->slsw.v1)
  1150. return -ENODATA;
  1151. return sprintf(buf, "%i\n", aib->edf1.etr_pn);
  1152. }
  1153. static SYSDEV_ATTR(port, 0400, etr_port_number_show, NULL);
  1154. static ssize_t etr_coupled_show(struct sys_device *dev,
  1155. struct sysdev_attribute *attr, char *buf)
  1156. {
  1157. struct etr_aib *aib = etr_aib_from_dev(dev);
  1158. if (!aib || !aib->slsw.v3)
  1159. return -ENODATA;
  1160. return sprintf(buf, "%i\n", aib->edf3.c);
  1161. }
  1162. static SYSDEV_ATTR(coupled, 0400, etr_coupled_show, NULL);
  1163. static ssize_t etr_local_time_show(struct sys_device *dev,
  1164. struct sysdev_attribute *attr, char *buf)
  1165. {
  1166. struct etr_aib *aib = etr_aib_from_dev(dev);
  1167. if (!aib || !aib->slsw.v3)
  1168. return -ENODATA;
  1169. return sprintf(buf, "%i\n", aib->edf3.blto);
  1170. }
  1171. static SYSDEV_ATTR(local_time, 0400, etr_local_time_show, NULL);
  1172. static ssize_t etr_utc_offset_show(struct sys_device *dev,
  1173. struct sysdev_attribute *attr, char *buf)
  1174. {
  1175. struct etr_aib *aib = etr_aib_from_dev(dev);
  1176. if (!aib || !aib->slsw.v3)
  1177. return -ENODATA;
  1178. return sprintf(buf, "%i\n", aib->edf3.buo);
  1179. }
  1180. static SYSDEV_ATTR(utc_offset, 0400, etr_utc_offset_show, NULL);
  1181. static struct sysdev_attribute *etr_port_attributes[] = {
  1182. &attr_online,
  1183. &attr_stepping_control,
  1184. &attr_state_code,
  1185. &attr_untuned,
  1186. &attr_network,
  1187. &attr_id,
  1188. &attr_port,
  1189. &attr_coupled,
  1190. &attr_local_time,
  1191. &attr_utc_offset,
  1192. NULL
  1193. };
  1194. static int __init etr_register_port(struct sys_device *dev)
  1195. {
  1196. struct sysdev_attribute **attr;
  1197. int rc;
  1198. rc = sysdev_register(dev);
  1199. if (rc)
  1200. goto out;
  1201. for (attr = etr_port_attributes; *attr; attr++) {
  1202. rc = sysdev_create_file(dev, *attr);
  1203. if (rc)
  1204. goto out_unreg;
  1205. }
  1206. return 0;
  1207. out_unreg:
  1208. for (; attr >= etr_port_attributes; attr--)
  1209. sysdev_remove_file(dev, *attr);
  1210. sysdev_unregister(dev);
  1211. out:
  1212. return rc;
  1213. }
  1214. static void __init etr_unregister_port(struct sys_device *dev)
  1215. {
  1216. struct sysdev_attribute **attr;
  1217. for (attr = etr_port_attributes; *attr; attr++)
  1218. sysdev_remove_file(dev, *attr);
  1219. sysdev_unregister(dev);
  1220. }
  1221. static int __init etr_init_sysfs(void)
  1222. {
  1223. int rc;
  1224. rc = sysdev_class_register(&etr_sysclass);
  1225. if (rc)
  1226. goto out;
  1227. rc = sysdev_class_create_file(&etr_sysclass, &attr_stepping_port);
  1228. if (rc)
  1229. goto out_unreg_class;
  1230. rc = sysdev_class_create_file(&etr_sysclass, &attr_stepping_mode);
  1231. if (rc)
  1232. goto out_remove_stepping_port;
  1233. rc = etr_register_port(&etr_port0_dev);
  1234. if (rc)
  1235. goto out_remove_stepping_mode;
  1236. rc = etr_register_port(&etr_port1_dev);
  1237. if (rc)
  1238. goto out_remove_port0;
  1239. return 0;
  1240. out_remove_port0:
  1241. etr_unregister_port(&etr_port0_dev);
  1242. out_remove_stepping_mode:
  1243. sysdev_class_remove_file(&etr_sysclass, &attr_stepping_mode);
  1244. out_remove_stepping_port:
  1245. sysdev_class_remove_file(&etr_sysclass, &attr_stepping_port);
  1246. out_unreg_class:
  1247. sysdev_class_unregister(&etr_sysclass);
  1248. out:
  1249. return rc;
  1250. }
  1251. device_initcall(etr_init_sysfs);
  1252. /*
  1253. * Server Time Protocol (STP) code.
  1254. */
  1255. static int stp_online;
  1256. static struct stp_sstpi stp_info;
  1257. static void *stp_page;
  1258. static void stp_work_fn(struct work_struct *work);
  1259. static DEFINE_MUTEX(stp_work_mutex);
  1260. static DECLARE_WORK(stp_work, stp_work_fn);
  1261. static int __init early_parse_stp(char *p)
  1262. {
  1263. if (strncmp(p, "off", 3) == 0)
  1264. stp_online = 0;
  1265. else if (strncmp(p, "on", 2) == 0)
  1266. stp_online = 1;
  1267. return 0;
  1268. }
  1269. early_param("stp", early_parse_stp);
  1270. /*
  1271. * Reset STP attachment.
  1272. */
  1273. static void __init stp_reset(void)
  1274. {
  1275. int rc;
  1276. stp_page = alloc_bootmem_pages(PAGE_SIZE);
  1277. rc = chsc_sstpc(stp_page, STP_OP_CTRL, 0x0000);
  1278. if (rc == 0)
  1279. set_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags);
  1280. else if (stp_online) {
  1281. pr_warning("The real or virtual hardware system does "
  1282. "not provide an STP interface\n");
  1283. free_bootmem((unsigned long) stp_page, PAGE_SIZE);
  1284. stp_page = NULL;
  1285. stp_online = 0;
  1286. }
  1287. }
  1288. static int __init stp_init(void)
  1289. {
  1290. if (!test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags))
  1291. return 0;
  1292. time_init_wq();
  1293. if (!stp_online)
  1294. return 0;
  1295. queue_work(time_sync_wq, &stp_work);
  1296. return 0;
  1297. }
  1298. arch_initcall(stp_init);
  1299. /*
  1300. * STP timing alert. There are three causes:
  1301. * 1) timing status change
  1302. * 2) link availability change
  1303. * 3) time control parameter change
  1304. * In all three cases we are only interested in the clock source state.
  1305. * If a STP clock source is now available use it.
  1306. */
  1307. static void stp_timing_alert(struct stp_irq_parm *intparm)
  1308. {
  1309. if (intparm->tsc || intparm->lac || intparm->tcpc)
  1310. queue_work(time_sync_wq, &stp_work);
  1311. }
  1312. /*
  1313. * STP sync check machine check. This is called when the timing state
  1314. * changes from the synchronized state to the unsynchronized state.
  1315. * After a STP sync check the clock is not in sync. The machine check
  1316. * is broadcasted to all cpus at the same time.
  1317. */
  1318. void stp_sync_check(void)
  1319. {
  1320. disable_sync_clock(NULL);
  1321. queue_work(time_sync_wq, &stp_work);
  1322. }
  1323. /*
  1324. * STP island condition machine check. This is called when an attached
  1325. * server attempts to communicate over an STP link and the servers
  1326. * have matching CTN ids and have a valid stratum-1 configuration
  1327. * but the configurations do not match.
  1328. */
  1329. void stp_island_check(void)
  1330. {
  1331. disable_sync_clock(NULL);
  1332. queue_work(time_sync_wq, &stp_work);
  1333. }
  1334. static int stp_sync_clock(void *data)
  1335. {
  1336. static int first;
  1337. unsigned long long old_clock, delta;
  1338. struct clock_sync_data *stp_sync;
  1339. int rc;
  1340. stp_sync = data;
  1341. if (xchg(&first, 1) == 1) {
  1342. /* Slave */
  1343. clock_sync_cpu(stp_sync);
  1344. return 0;
  1345. }
  1346. /* Wait until all other cpus entered the sync function. */
  1347. while (atomic_read(&stp_sync->cpus) != 0)
  1348. cpu_relax();
  1349. enable_sync_clock();
  1350. rc = 0;
  1351. if (stp_info.todoff[0] || stp_info.todoff[1] ||
  1352. stp_info.todoff[2] || stp_info.todoff[3] ||
  1353. stp_info.tmd != 2) {
  1354. old_clock = get_clock();
  1355. rc = chsc_sstpc(stp_page, STP_OP_SYNC, 0);
  1356. if (rc == 0) {
  1357. delta = adjust_time(old_clock, get_clock(), 0);
  1358. fixup_clock_comparator(delta);
  1359. rc = chsc_sstpi(stp_page, &stp_info,
  1360. sizeof(struct stp_sstpi));
  1361. if (rc == 0 && stp_info.tmd != 2)
  1362. rc = -EAGAIN;
  1363. }
  1364. }
  1365. if (rc) {
  1366. disable_sync_clock(NULL);
  1367. stp_sync->in_sync = -EAGAIN;
  1368. } else
  1369. stp_sync->in_sync = 1;
  1370. xchg(&first, 0);
  1371. return 0;
  1372. }
  1373. /*
  1374. * STP work. Check for the STP state and take over the clock
  1375. * synchronization if the STP clock source is usable.
  1376. */
  1377. static void stp_work_fn(struct work_struct *work)
  1378. {
  1379. struct clock_sync_data stp_sync;
  1380. int rc;
  1381. /* prevent multiple execution. */
  1382. mutex_lock(&stp_work_mutex);
  1383. if (!stp_online) {
  1384. chsc_sstpc(stp_page, STP_OP_CTRL, 0x0000);
  1385. goto out_unlock;
  1386. }
  1387. rc = chsc_sstpc(stp_page, STP_OP_CTRL, 0xb0e0);
  1388. if (rc)
  1389. goto out_unlock;
  1390. rc = chsc_sstpi(stp_page, &stp_info, sizeof(struct stp_sstpi));
  1391. if (rc || stp_info.c == 0)
  1392. goto out_unlock;
  1393. /* Skip synchronization if the clock is already in sync. */
  1394. if (check_sync_clock())
  1395. goto out_unlock;
  1396. memset(&stp_sync, 0, sizeof(stp_sync));
  1397. get_online_cpus();
  1398. atomic_set(&stp_sync.cpus, num_online_cpus() - 1);
  1399. stop_machine(stp_sync_clock, &stp_sync, &cpu_online_map);
  1400. put_online_cpus();
  1401. out_unlock:
  1402. mutex_unlock(&stp_work_mutex);
  1403. }
  1404. /*
  1405. * STP class sysfs interface functions
  1406. */
  1407. static struct sysdev_class stp_sysclass = {
  1408. .name = "stp",
  1409. };
  1410. static ssize_t stp_ctn_id_show(struct sysdev_class *class, char *buf)
  1411. {
  1412. if (!stp_online)
  1413. return -ENODATA;
  1414. return sprintf(buf, "%016llx\n",
  1415. *(unsigned long long *) stp_info.ctnid);
  1416. }
  1417. static SYSDEV_CLASS_ATTR(ctn_id, 0400, stp_ctn_id_show, NULL);
  1418. static ssize_t stp_ctn_type_show(struct sysdev_class *class, char *buf)
  1419. {
  1420. if (!stp_online)
  1421. return -ENODATA;
  1422. return sprintf(buf, "%i\n", stp_info.ctn);
  1423. }
  1424. static SYSDEV_CLASS_ATTR(ctn_type, 0400, stp_ctn_type_show, NULL);
  1425. static ssize_t stp_dst_offset_show(struct sysdev_class *class, char *buf)
  1426. {
  1427. if (!stp_online || !(stp_info.vbits & 0x2000))
  1428. return -ENODATA;
  1429. return sprintf(buf, "%i\n", (int)(s16) stp_info.dsto);
  1430. }
  1431. static SYSDEV_CLASS_ATTR(dst_offset, 0400, stp_dst_offset_show, NULL);
  1432. static ssize_t stp_leap_seconds_show(struct sysdev_class *class, char *buf)
  1433. {
  1434. if (!stp_online || !(stp_info.vbits & 0x8000))
  1435. return -ENODATA;
  1436. return sprintf(buf, "%i\n", (int)(s16) stp_info.leaps);
  1437. }
  1438. static SYSDEV_CLASS_ATTR(leap_seconds, 0400, stp_leap_seconds_show, NULL);
  1439. static ssize_t stp_stratum_show(struct sysdev_class *class, char *buf)
  1440. {
  1441. if (!stp_online)
  1442. return -ENODATA;
  1443. return sprintf(buf, "%i\n", (int)(s16) stp_info.stratum);
  1444. }
  1445. static SYSDEV_CLASS_ATTR(stratum, 0400, stp_stratum_show, NULL);
  1446. static ssize_t stp_time_offset_show(struct sysdev_class *class, char *buf)
  1447. {
  1448. if (!stp_online || !(stp_info.vbits & 0x0800))
  1449. return -ENODATA;
  1450. return sprintf(buf, "%i\n", (int) stp_info.tto);
  1451. }
  1452. static SYSDEV_CLASS_ATTR(time_offset, 0400, stp_time_offset_show, NULL);
  1453. static ssize_t stp_time_zone_offset_show(struct sysdev_class *class, char *buf)
  1454. {
  1455. if (!stp_online || !(stp_info.vbits & 0x4000))
  1456. return -ENODATA;
  1457. return sprintf(buf, "%i\n", (int)(s16) stp_info.tzo);
  1458. }
  1459. static SYSDEV_CLASS_ATTR(time_zone_offset, 0400,
  1460. stp_time_zone_offset_show, NULL);
  1461. static ssize_t stp_timing_mode_show(struct sysdev_class *class, char *buf)
  1462. {
  1463. if (!stp_online)
  1464. return -ENODATA;
  1465. return sprintf(buf, "%i\n", stp_info.tmd);
  1466. }
  1467. static SYSDEV_CLASS_ATTR(timing_mode, 0400, stp_timing_mode_show, NULL);
  1468. static ssize_t stp_timing_state_show(struct sysdev_class *class, char *buf)
  1469. {
  1470. if (!stp_online)
  1471. return -ENODATA;
  1472. return sprintf(buf, "%i\n", stp_info.tst);
  1473. }
  1474. static SYSDEV_CLASS_ATTR(timing_state, 0400, stp_timing_state_show, NULL);
  1475. static ssize_t stp_online_show(struct sysdev_class *class, char *buf)
  1476. {
  1477. return sprintf(buf, "%i\n", stp_online);
  1478. }
  1479. static ssize_t stp_online_store(struct sysdev_class *class,
  1480. const char *buf, size_t count)
  1481. {
  1482. unsigned int value;
  1483. value = simple_strtoul(buf, NULL, 0);
  1484. if (value != 0 && value != 1)
  1485. return -EINVAL;
  1486. if (!test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags))
  1487. return -EOPNOTSUPP;
  1488. mutex_lock(&clock_sync_mutex);
  1489. stp_online = value;
  1490. if (stp_online)
  1491. set_bit(CLOCK_SYNC_STP, &clock_sync_flags);
  1492. else
  1493. clear_bit(CLOCK_SYNC_STP, &clock_sync_flags);
  1494. queue_work(time_sync_wq, &stp_work);
  1495. mutex_unlock(&clock_sync_mutex);
  1496. return count;
  1497. }
  1498. /*
  1499. * Can't use SYSDEV_CLASS_ATTR because the attribute should be named
  1500. * stp/online but attr_online already exists in this file ..
  1501. */
  1502. static struct sysdev_class_attribute attr_stp_online = {
  1503. .attr = { .name = "online", .mode = 0600 },
  1504. .show = stp_online_show,
  1505. .store = stp_online_store,
  1506. };
  1507. static struct sysdev_class_attribute *stp_attributes[] = {
  1508. &attr_ctn_id,
  1509. &attr_ctn_type,
  1510. &attr_dst_offset,
  1511. &attr_leap_seconds,
  1512. &attr_stp_online,
  1513. &attr_stratum,
  1514. &attr_time_offset,
  1515. &attr_time_zone_offset,
  1516. &attr_timing_mode,
  1517. &attr_timing_state,
  1518. NULL
  1519. };
  1520. static int __init stp_init_sysfs(void)
  1521. {
  1522. struct sysdev_class_attribute **attr;
  1523. int rc;
  1524. rc = sysdev_class_register(&stp_sysclass);
  1525. if (rc)
  1526. goto out;
  1527. for (attr = stp_attributes; *attr; attr++) {
  1528. rc = sysdev_class_create_file(&stp_sysclass, *attr);
  1529. if (rc)
  1530. goto out_unreg;
  1531. }
  1532. return 0;
  1533. out_unreg:
  1534. for (; attr >= stp_attributes; attr--)
  1535. sysdev_class_remove_file(&stp_sysclass, *attr);
  1536. sysdev_class_unregister(&stp_sysclass);
  1537. out:
  1538. return rc;
  1539. }
  1540. device_initcall(stp_init_sysfs);