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  1. /* Boot entry point for MN10300 kernel
  2. *
  3. * Copyright (C) 2005 Red Hat, Inc. All Rights Reserved.
  4. * Written by David Howells (dhowells@redhat.com)
  5. *
  6. * This program is free software; you can redistribute it and/or
  7. * modify it under the terms of the GNU General Public Licence
  8. * as published by the Free Software Foundation; either version
  9. * 2 of the Licence, or (at your option) any later version.
  10. */
  11. #include <linux/threads.h>
  12. #include <linux/linkage.h>
  13. #include <linux/serial_reg.h>
  14. #include <asm/thread_info.h>
  15. #include <asm/page.h>
  16. #include <asm/pgtable.h>
  17. #include <asm/frame.inc>
  18. #include <asm/param.h>
  19. #include <unit/serial.h>
  20. .section .text.head,"ax"
  21. ###############################################################################
  22. #
  23. # bootloader entry point
  24. #
  25. ###############################################################################
  26. .globl _start
  27. .type _start,@function
  28. _start:
  29. # save commandline pointer
  30. mov d0,a3
  31. # preload the PGD pointer register
  32. mov swapper_pg_dir,d0
  33. mov d0,(PTBR)
  34. # turn on the TLBs
  35. mov MMUCTR_IIV|MMUCTR_DIV,d0
  36. mov d0,(MMUCTR)
  37. mov MMUCTR_ITE|MMUCTR_DTE|MMUCTR_CE,d0
  38. mov d0,(MMUCTR)
  39. # turn on AM33v2 exception handling mode and set the trap table base
  40. movhu (CPUP),d0
  41. or CPUP_EXM_AM33V2,d0
  42. movhu d0,(CPUP)
  43. mov CONFIG_INTERRUPT_VECTOR_BASE,d0
  44. mov d0,(TBR)
  45. # invalidate and enable both of the caches
  46. mov CHCTR,a0
  47. clr d0
  48. movhu d0,(a0) # turn off first
  49. mov CHCTR_ICINV|CHCTR_DCINV,d0
  50. movhu d0,(a0)
  51. setlb
  52. mov (a0),d0
  53. btst CHCTR_ICBUSY|CHCTR_DCBUSY,d0 # wait till not busy
  54. lne
  55. #ifndef CONFIG_MN10300_CACHE_DISABLED
  56. #ifdef CONFIG_MN10300_CACHE_WBACK
  57. #ifndef CONFIG_MN10300_CACHE_WBACK_NOWRALLOC
  58. mov CHCTR_ICEN|CHCTR_DCEN|CHCTR_DCWTMD_WRBACK,d0
  59. #else
  60. mov CHCTR_ICEN|CHCTR_DCEN|CHCTR_DCWTMD_WRBACK|CHCTR_DCALMD,d0
  61. #endif /* CACHE_DISABLED */
  62. #else
  63. mov CHCTR_ICEN|CHCTR_DCEN|CHCTR_DCWTMD_WRTHROUGH,d0
  64. #endif /* WBACK */
  65. movhu d0,(a0) # enable
  66. #endif /* NOWRALLOC */
  67. # turn on RTS on the debug serial port if applicable
  68. #ifdef CONFIG_MN10300_UNIT_ASB2305
  69. bset UART_MCR_RTS,(ASB2305_DEBUG_MCR)
  70. #endif
  71. # clear the BSS area
  72. mov __bss_start,a0
  73. mov __bss_stop,a1
  74. clr d0
  75. bssclear:
  76. cmp a1,a0
  77. bge bssclear_end
  78. mov d0,(a0)
  79. inc4 a0
  80. bra bssclear
  81. bssclear_end:
  82. # retrieve the parameters (including command line) before we overwrite
  83. # them
  84. cmp 0xabadcafe,d1
  85. bne __no_parameters
  86. __copy_parameters:
  87. mov redboot_command_line,a0
  88. mov a0,a1
  89. add COMMAND_LINE_SIZE,a1
  90. 1:
  91. movbu (a3),d0
  92. inc a3
  93. movbu d0,(a0)
  94. inc a0
  95. cmp a1,a0
  96. blt 1b
  97. mov redboot_platform_name,a0
  98. mov a0,a1
  99. add COMMAND_LINE_SIZE,a1
  100. mov d2,a3
  101. 1:
  102. movbu (a3),d0
  103. inc a3
  104. movbu d0,(a0)
  105. inc a0
  106. cmp a1,a0
  107. blt 1b
  108. __no_parameters:
  109. # set up the registers with recognisable rubbish in them
  110. mov init_thread_union+THREAD_SIZE-12,sp
  111. mov 0xea01eaea,d0
  112. mov d0,(4,sp) # EPSW save area
  113. mov 0xea02eaea,d0
  114. mov d0,(8,sp) # PC save area
  115. mov 0xeb0060ed,d0
  116. mov d0,mdr
  117. mov 0xeb0061ed,d0
  118. mov d0,mdrq
  119. mov 0xeb0062ed,d0
  120. mov d0,mcrh
  121. mov 0xeb0063ed,d0
  122. mov d0,mcrl
  123. mov 0xeb0064ed,d0
  124. mov d0,mcvf
  125. mov 0xed0065ed,a3
  126. mov a3,usp
  127. mov 0xed00e0ed,e0
  128. mov 0xed00e1ed,e1
  129. mov 0xed00e2ed,e2
  130. mov 0xed00e3ed,e3
  131. mov 0xed00e4ed,e4
  132. mov 0xed00e5ed,e5
  133. mov 0xed00e6ed,e6
  134. mov 0xed00e7ed,e7
  135. mov 0xed00d0ed,d0
  136. mov 0xed00d1ed,d1
  137. mov 0xed00d2ed,d2
  138. mov 0xed00d3ed,d3
  139. mov 0xed00a0ed,a0
  140. mov 0xed00a1ed,a1
  141. mov 0xed00a2ed,a2
  142. mov 0,a3
  143. # set up the initial kernel stack
  144. SAVE_ALL
  145. mov 0xffffffff,d0
  146. mov d0,(REG_ORIG_D0,fp)
  147. # put different recognisable rubbish in the regs
  148. mov 0xfb0060ed,d0
  149. mov d0,mdr
  150. mov 0xfb0061ed,d0
  151. mov d0,mdrq
  152. mov 0xfb0062ed,d0
  153. mov d0,mcrh
  154. mov 0xfb0063ed,d0
  155. mov d0,mcrl
  156. mov 0xfb0064ed,d0
  157. mov d0,mcvf
  158. mov 0xfd0065ed,a0
  159. mov a0,usp
  160. mov 0xfd00e0ed,e0
  161. mov 0xfd00e1ed,e1
  162. mov 0xfd00e2ed,e2
  163. mov 0xfd00e3ed,e3
  164. mov 0xfd00e4ed,e4
  165. mov 0xfd00e5ed,e5
  166. mov 0xfd00e6ed,e6
  167. mov 0xfd00e7ed,e7
  168. mov 0xfd00d0ed,d0
  169. mov 0xfd00d1ed,d1
  170. mov 0xfd00d2ed,d2
  171. mov 0xfd00d3ed,d3
  172. mov 0xfd00a0ed,a0
  173. mov 0xfd00a1ed,a1
  174. mov 0xfd00a2ed,a2
  175. # we may be holding current in E2
  176. #ifdef CONFIG_MN10300_CURRENT_IN_E2
  177. mov init_task,e2
  178. #endif
  179. # initialise the processor and the unit
  180. call processor_init[],0
  181. call unit_init[],0
  182. #ifdef CONFIG_GDBSTUB
  183. call gdbstub_init[],0
  184. #ifdef CONFIG_GDBSTUB_IMMEDIATE
  185. .globl __gdbstub_pause
  186. __gdbstub_pause:
  187. bra __gdbstub_pause
  188. #endif
  189. #endif
  190. jmp start_kernel
  191. .size _start, _start-.
  192. ENTRY(__head_end)
  193. /*
  194. * This is initialized to disallow all access to the low 2G region
  195. * - the high 2G region is managed directly by the MMU
  196. * - range 0x70000000-0x7C000000 are initialised for use by VMALLOC
  197. */
  198. .section .bss
  199. .balign PAGE_SIZE
  200. ENTRY(swapper_pg_dir)
  201. .space PTRS_PER_PGD*4
  202. /*
  203. * The page tables are initialized to only 8MB here - the final page
  204. * tables are set up later depending on memory size.
  205. */
  206. .balign PAGE_SIZE
  207. ENTRY(empty_zero_page)
  208. .space PAGE_SIZE
  209. .balign PAGE_SIZE
  210. ENTRY(empty_bad_page)
  211. .space PAGE_SIZE
  212. .balign PAGE_SIZE
  213. ENTRY(empty_bad_pte_table)
  214. .space PAGE_SIZE
  215. .balign PAGE_SIZE
  216. ENTRY(large_page_table)
  217. .space PAGE_SIZE
  218. .balign PAGE_SIZE
  219. ENTRY(kernel_vmalloc_ptes)
  220. .space ((VMALLOC_END-VMALLOC_START)/PAGE_SIZE)*4