smp.c 8.0 KB

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  1. #include <linux/types.h>
  2. #include <asm/delay.h>
  3. #include <irq.h>
  4. #include <hwregs/intr_vect.h>
  5. #include <hwregs/intr_vect_defs.h>
  6. #include <asm/tlbflush.h>
  7. #include <asm/mmu_context.h>
  8. #include <hwregs/asm/mmu_defs_asm.h>
  9. #include <hwregs/supp_reg.h>
  10. #include <asm/atomic.h>
  11. #include <linux/err.h>
  12. #include <linux/init.h>
  13. #include <linux/timex.h>
  14. #include <linux/sched.h>
  15. #include <linux/kernel.h>
  16. #include <linux/cpumask.h>
  17. #include <linux/interrupt.h>
  18. #include <linux/module.h>
  19. #define IPI_SCHEDULE 1
  20. #define IPI_CALL 2
  21. #define IPI_FLUSH_TLB 4
  22. #define IPI_BOOT 8
  23. #define FLUSH_ALL (void*)0xffffffff
  24. /* Vector of locks used for various atomic operations */
  25. spinlock_t cris_atomic_locks[] = { [0 ... LOCK_COUNT - 1] = SPIN_LOCK_UNLOCKED};
  26. /* CPU masks */
  27. cpumask_t phys_cpu_present_map = CPU_MASK_NONE;
  28. EXPORT_SYMBOL(phys_cpu_present_map);
  29. /* Variables used during SMP boot */
  30. volatile int cpu_now_booting = 0;
  31. volatile struct thread_info *smp_init_current_idle_thread;
  32. /* Variables used during IPI */
  33. static DEFINE_SPINLOCK(call_lock);
  34. static DEFINE_SPINLOCK(tlbstate_lock);
  35. struct call_data_struct {
  36. void (*func) (void *info);
  37. void *info;
  38. int wait;
  39. };
  40. static struct call_data_struct * call_data;
  41. static struct mm_struct* flush_mm;
  42. static struct vm_area_struct* flush_vma;
  43. static unsigned long flush_addr;
  44. extern int setup_irq(int, struct irqaction *);
  45. /* Mode registers */
  46. static unsigned long irq_regs[NR_CPUS] = {
  47. regi_irq,
  48. regi_irq2
  49. };
  50. static irqreturn_t crisv32_ipi_interrupt(int irq, void *dev_id);
  51. static int send_ipi(int vector, int wait, cpumask_t cpu_mask);
  52. static struct irqaction irq_ipi = {
  53. .handler = crisv32_ipi_interrupt,
  54. .flags = IRQF_DISABLED,
  55. .name = "ipi",
  56. };
  57. extern void cris_mmu_init(void);
  58. extern void cris_timer_init(void);
  59. /* SMP initialization */
  60. void __init smp_prepare_cpus(unsigned int max_cpus)
  61. {
  62. int i;
  63. /* From now on we can expect IPIs so set them up */
  64. setup_irq(IPI_INTR_VECT, &irq_ipi);
  65. /* Mark all possible CPUs as present */
  66. for (i = 0; i < max_cpus; i++)
  67. cpu_set(i, phys_cpu_present_map);
  68. }
  69. void __devinit smp_prepare_boot_cpu(void)
  70. {
  71. /* PGD pointer has moved after per_cpu initialization so
  72. * update the MMU.
  73. */
  74. pgd_t **pgd;
  75. pgd = (pgd_t**)&per_cpu(current_pgd, smp_processor_id());
  76. SUPP_BANK_SEL(1);
  77. SUPP_REG_WR(RW_MM_TLB_PGD, pgd);
  78. SUPP_BANK_SEL(2);
  79. SUPP_REG_WR(RW_MM_TLB_PGD, pgd);
  80. set_cpu_online(0, true);
  81. cpu_set(0, phys_cpu_present_map);
  82. set_cpu_possible(0, true);
  83. }
  84. void __init smp_cpus_done(unsigned int max_cpus)
  85. {
  86. }
  87. /* Bring one cpu online.*/
  88. static int __init
  89. smp_boot_one_cpu(int cpuid)
  90. {
  91. unsigned timeout;
  92. struct task_struct *idle;
  93. cpumask_t cpu_mask = CPU_MASK_NONE;
  94. idle = fork_idle(cpuid);
  95. if (IS_ERR(idle))
  96. panic("SMP: fork failed for CPU:%d", cpuid);
  97. task_thread_info(idle)->cpu = cpuid;
  98. /* Information to the CPU that is about to boot */
  99. smp_init_current_idle_thread = task_thread_info(idle);
  100. cpu_now_booting = cpuid;
  101. /* Kick it */
  102. cpu_set(cpuid, cpu_online_map);
  103. cpu_set(cpuid, cpu_mask);
  104. send_ipi(IPI_BOOT, 0, cpu_mask);
  105. cpu_clear(cpuid, cpu_online_map);
  106. /* Wait for CPU to come online */
  107. for (timeout = 0; timeout < 10000; timeout++) {
  108. if(cpu_online(cpuid)) {
  109. cpu_now_booting = 0;
  110. smp_init_current_idle_thread = NULL;
  111. return 0; /* CPU online */
  112. }
  113. udelay(100);
  114. barrier();
  115. }
  116. put_task_struct(idle);
  117. idle = NULL;
  118. printk(KERN_CRIT "SMP: CPU:%d is stuck.\n", cpuid);
  119. return -1;
  120. }
  121. /* Secondary CPUs starts using C here. Here we need to setup CPU
  122. * specific stuff such as the local timer and the MMU. */
  123. void __init smp_callin(void)
  124. {
  125. extern void cpu_idle(void);
  126. int cpu = cpu_now_booting;
  127. reg_intr_vect_rw_mask vect_mask = {0};
  128. /* Initialise the idle task for this CPU */
  129. atomic_inc(&init_mm.mm_count);
  130. current->active_mm = &init_mm;
  131. /* Set up MMU */
  132. cris_mmu_init();
  133. __flush_tlb_all();
  134. /* Setup local timer. */
  135. cris_timer_init();
  136. /* Enable IRQ and idle */
  137. REG_WR(intr_vect, irq_regs[cpu], rw_mask, vect_mask);
  138. unmask_irq(IPI_INTR_VECT);
  139. unmask_irq(TIMER0_INTR_VECT);
  140. preempt_disable();
  141. notify_cpu_starting(cpu);
  142. local_irq_enable();
  143. cpu_set(cpu, cpu_online_map);
  144. cpu_idle();
  145. }
  146. /* Stop execution on this CPU.*/
  147. void stop_this_cpu(void* dummy)
  148. {
  149. local_irq_disable();
  150. asm volatile("halt");
  151. }
  152. /* Other calls */
  153. void smp_send_stop(void)
  154. {
  155. smp_call_function(stop_this_cpu, NULL, 0);
  156. }
  157. int setup_profiling_timer(unsigned int multiplier)
  158. {
  159. return -EINVAL;
  160. }
  161. /* cache_decay_ticks is used by the scheduler to decide if a process
  162. * is "hot" on one CPU. A higher value means a higher penalty to move
  163. * a process to another CPU. Our cache is rather small so we report
  164. * 1 tick.
  165. */
  166. unsigned long cache_decay_ticks = 1;
  167. int __cpuinit __cpu_up(unsigned int cpu)
  168. {
  169. smp_boot_one_cpu(cpu);
  170. return cpu_online(cpu) ? 0 : -ENOSYS;
  171. }
  172. void smp_send_reschedule(int cpu)
  173. {
  174. cpumask_t cpu_mask = CPU_MASK_NONE;
  175. cpu_set(cpu, cpu_mask);
  176. send_ipi(IPI_SCHEDULE, 0, cpu_mask);
  177. }
  178. /* TLB flushing
  179. *
  180. * Flush needs to be done on the local CPU and on any other CPU that
  181. * may have the same mapping. The mm->cpu_vm_mask is used to keep track
  182. * of which CPUs that a specific process has been executed on.
  183. */
  184. void flush_tlb_common(struct mm_struct* mm, struct vm_area_struct* vma, unsigned long addr)
  185. {
  186. unsigned long flags;
  187. cpumask_t cpu_mask;
  188. spin_lock_irqsave(&tlbstate_lock, flags);
  189. cpu_mask = (mm == FLUSH_ALL ? cpu_all_mask : *mm_cpumask(mm));
  190. cpu_clear(smp_processor_id(), cpu_mask);
  191. flush_mm = mm;
  192. flush_vma = vma;
  193. flush_addr = addr;
  194. send_ipi(IPI_FLUSH_TLB, 1, cpu_mask);
  195. spin_unlock_irqrestore(&tlbstate_lock, flags);
  196. }
  197. void flush_tlb_all(void)
  198. {
  199. __flush_tlb_all();
  200. flush_tlb_common(FLUSH_ALL, FLUSH_ALL, 0);
  201. }
  202. void flush_tlb_mm(struct mm_struct *mm)
  203. {
  204. __flush_tlb_mm(mm);
  205. flush_tlb_common(mm, FLUSH_ALL, 0);
  206. /* No more mappings in other CPUs */
  207. cpumask_clear(mm_cpumask(mm));
  208. cpumask_set_cpu(smp_processor_id(), mm_cpumask(mm));
  209. }
  210. void flush_tlb_page(struct vm_area_struct *vma,
  211. unsigned long addr)
  212. {
  213. __flush_tlb_page(vma, addr);
  214. flush_tlb_common(vma->vm_mm, vma, addr);
  215. }
  216. /* Inter processor interrupts
  217. *
  218. * The IPIs are used for:
  219. * * Force a schedule on a CPU
  220. * * FLush TLB on other CPUs
  221. * * Call a function on other CPUs
  222. */
  223. int send_ipi(int vector, int wait, cpumask_t cpu_mask)
  224. {
  225. int i = 0;
  226. reg_intr_vect_rw_ipi ipi = REG_RD(intr_vect, irq_regs[i], rw_ipi);
  227. int ret = 0;
  228. /* Calculate CPUs to send to. */
  229. cpus_and(cpu_mask, cpu_mask, cpu_online_map);
  230. /* Send the IPI. */
  231. for_each_cpu_mask(i, cpu_mask)
  232. {
  233. ipi.vector |= vector;
  234. REG_WR(intr_vect, irq_regs[i], rw_ipi, ipi);
  235. }
  236. /* Wait for IPI to finish on other CPUS */
  237. if (wait) {
  238. for_each_cpu_mask(i, cpu_mask) {
  239. int j;
  240. for (j = 0 ; j < 1000; j++) {
  241. ipi = REG_RD(intr_vect, irq_regs[i], rw_ipi);
  242. if (!ipi.vector)
  243. break;
  244. udelay(100);
  245. }
  246. /* Timeout? */
  247. if (ipi.vector) {
  248. printk("SMP call timeout from %d to %d\n", smp_processor_id(), i);
  249. ret = -ETIMEDOUT;
  250. dump_stack();
  251. }
  252. }
  253. }
  254. return ret;
  255. }
  256. /*
  257. * You must not call this function with disabled interrupts or from a
  258. * hardware interrupt handler or from a bottom half handler.
  259. */
  260. int smp_call_function(void (*func)(void *info), void *info, int wait)
  261. {
  262. cpumask_t cpu_mask = CPU_MASK_ALL;
  263. struct call_data_struct data;
  264. int ret;
  265. cpu_clear(smp_processor_id(), cpu_mask);
  266. WARN_ON(irqs_disabled());
  267. data.func = func;
  268. data.info = info;
  269. data.wait = wait;
  270. spin_lock(&call_lock);
  271. call_data = &data;
  272. ret = send_ipi(IPI_CALL, wait, cpu_mask);
  273. spin_unlock(&call_lock);
  274. return ret;
  275. }
  276. irqreturn_t crisv32_ipi_interrupt(int irq, void *dev_id)
  277. {
  278. void (*func) (void *info) = call_data->func;
  279. void *info = call_data->info;
  280. reg_intr_vect_rw_ipi ipi;
  281. ipi = REG_RD(intr_vect, irq_regs[smp_processor_id()], rw_ipi);
  282. if (ipi.vector & IPI_CALL) {
  283. func(info);
  284. }
  285. if (ipi.vector & IPI_FLUSH_TLB) {
  286. if (flush_mm == FLUSH_ALL)
  287. __flush_tlb_all();
  288. else if (flush_vma == FLUSH_ALL)
  289. __flush_tlb_mm(flush_mm);
  290. else
  291. __flush_tlb_page(flush_vma, flush_addr);
  292. }
  293. ipi.vector = 0;
  294. REG_WR(intr_vect, irq_regs[smp_processor_id()], rw_ipi, ipi);
  295. return IRQ_HANDLED;
  296. }