tcm_bf537.c 15 KB

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  1. /*
  2. * File: arch/blackfin/mach-bf537/boards/tcm_bf537.c
  3. * Based on: arch/blackfin/mach-bf533/boards/cm_bf537.c
  4. * Author: Aidan Williams <aidan@nicta.com.au>
  5. *
  6. * Created: 2005
  7. * Description: Board description file
  8. *
  9. * Modified:
  10. * Copyright 2005 National ICT Australia (NICTA)
  11. * Copyright 2004-2006 Analog Devices Inc.
  12. *
  13. * Bugs: Enter bugs at http://blackfin.uclinux.org/
  14. *
  15. * This program is free software; you can redistribute it and/or modify
  16. * it under the terms of the GNU General Public License as published by
  17. * the Free Software Foundation; either version 2 of the License, or
  18. * (at your option) any later version.
  19. *
  20. * This program is distributed in the hope that it will be useful,
  21. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  22. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  23. * GNU General Public License for more details.
  24. *
  25. * You should have received a copy of the GNU General Public License
  26. * along with this program; if not, see the file COPYING, or write
  27. * to the Free Software Foundation, Inc.,
  28. * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  29. */
  30. #include <linux/device.h>
  31. #include <linux/etherdevice.h>
  32. #include <linux/platform_device.h>
  33. #include <linux/mtd/mtd.h>
  34. #include <linux/mtd/partitions.h>
  35. #include <linux/mtd/physmap.h>
  36. #include <linux/spi/spi.h>
  37. #include <linux/spi/flash.h>
  38. #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
  39. #include <linux/usb/isp1362.h>
  40. #endif
  41. #include <linux/ata_platform.h>
  42. #include <linux/irq.h>
  43. #include <asm/dma.h>
  44. #include <asm/bfin5xx_spi.h>
  45. #include <asm/portmux.h>
  46. #include <asm/dpmc.h>
  47. /*
  48. * Name the Board for the /proc/cpuinfo
  49. */
  50. const char bfin_board_name[] = "Bluetechnix TCM BF537";
  51. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  52. /* all SPI peripherals info goes here */
  53. #if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
  54. static struct mtd_partition bfin_spi_flash_partitions[] = {
  55. {
  56. .name = "bootloader(spi)",
  57. .size = 0x00020000,
  58. .offset = 0,
  59. .mask_flags = MTD_CAP_ROM
  60. }, {
  61. .name = "linux kernel(spi)",
  62. .size = 0xe0000,
  63. .offset = 0x20000
  64. }, {
  65. .name = "file system(spi)",
  66. .size = 0x700000,
  67. .offset = 0x00100000,
  68. }
  69. };
  70. static struct flash_platform_data bfin_spi_flash_data = {
  71. .name = "m25p80",
  72. .parts = bfin_spi_flash_partitions,
  73. .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
  74. .type = "m25p64",
  75. };
  76. /* SPI flash chip (m25p64) */
  77. static struct bfin5xx_spi_chip spi_flash_chip_info = {
  78. .enable_dma = 0, /* use dma transfer with this chip*/
  79. .bits_per_word = 8,
  80. };
  81. #endif
  82. #if defined(CONFIG_SPI_ADC_BF533) || defined(CONFIG_SPI_ADC_BF533_MODULE)
  83. /* SPI ADC chip */
  84. static struct bfin5xx_spi_chip spi_adc_chip_info = {
  85. .enable_dma = 1, /* use dma transfer with this chip*/
  86. .bits_per_word = 16,
  87. };
  88. #endif
  89. #if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
  90. static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
  91. .enable_dma = 0,
  92. .bits_per_word = 16,
  93. };
  94. #endif
  95. #if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE)
  96. static struct bfin5xx_spi_chip ad9960_spi_chip_info = {
  97. .enable_dma = 0,
  98. .bits_per_word = 16,
  99. };
  100. #endif
  101. #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
  102. static struct bfin5xx_spi_chip mmc_spi_chip_info = {
  103. .enable_dma = 0,
  104. .bits_per_word = 8,
  105. };
  106. #endif
  107. static struct spi_board_info bfin_spi_board_info[] __initdata = {
  108. #if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
  109. {
  110. /* the modalias must be the same as spi device driver name */
  111. .modalias = "m25p80", /* Name of spi_driver for this device */
  112. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  113. .bus_num = 0, /* Framework bus number */
  114. .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
  115. .platform_data = &bfin_spi_flash_data,
  116. .controller_data = &spi_flash_chip_info,
  117. .mode = SPI_MODE_3,
  118. },
  119. #endif
  120. #if defined(CONFIG_SPI_ADC_BF533) || defined(CONFIG_SPI_ADC_BF533_MODULE)
  121. {
  122. .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
  123. .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
  124. .bus_num = 0, /* Framework bus number */
  125. .chip_select = 1, /* Framework chip select. */
  126. .platform_data = NULL, /* No spi_driver specific config */
  127. .controller_data = &spi_adc_chip_info,
  128. },
  129. #endif
  130. #if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
  131. {
  132. .modalias = "ad1836-spi",
  133. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  134. .bus_num = 0,
  135. .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT,
  136. .controller_data = &ad1836_spi_chip_info,
  137. },
  138. #endif
  139. #if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE)
  140. {
  141. .modalias = "ad9960-spi",
  142. .max_speed_hz = 10000000, /* max spi clock (SCK) speed in HZ */
  143. .bus_num = 0,
  144. .chip_select = 1,
  145. .controller_data = &ad9960_spi_chip_info,
  146. },
  147. #endif
  148. #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
  149. {
  150. .modalias = "mmc_spi",
  151. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  152. .bus_num = 0,
  153. .chip_select = 5,
  154. .controller_data = &mmc_spi_chip_info,
  155. .mode = SPI_MODE_3,
  156. },
  157. #endif
  158. };
  159. /* SPI (0) */
  160. static struct resource bfin_spi0_resource[] = {
  161. [0] = {
  162. .start = SPI0_REGBASE,
  163. .end = SPI0_REGBASE + 0xFF,
  164. .flags = IORESOURCE_MEM,
  165. },
  166. [1] = {
  167. .start = CH_SPI,
  168. .end = CH_SPI,
  169. .flags = IORESOURCE_IRQ,
  170. }
  171. };
  172. /* SPI controller data */
  173. static struct bfin5xx_spi_master bfin_spi0_info = {
  174. .num_chipselect = 8,
  175. .enable_dma = 1, /* master has the ability to do dma transfer */
  176. .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
  177. };
  178. static struct platform_device bfin_spi0_device = {
  179. .name = "bfin-spi",
  180. .id = 0, /* Bus number */
  181. .num_resources = ARRAY_SIZE(bfin_spi0_resource),
  182. .resource = bfin_spi0_resource,
  183. .dev = {
  184. .platform_data = &bfin_spi0_info, /* Passed to driver */
  185. },
  186. };
  187. #endif /* spi master and devices */
  188. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  189. static struct platform_device rtc_device = {
  190. .name = "rtc-bfin",
  191. .id = -1,
  192. };
  193. #endif
  194. #if defined(CONFIG_FB_HITACHI_TX09) || defined(CONFIG_FB_HITACHI_TX09_MODULE)
  195. static struct platform_device hitachi_fb_device = {
  196. .name = "hitachi-tx09",
  197. };
  198. #endif
  199. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  200. static struct resource smc91x_resources[] = {
  201. {
  202. .start = 0x20200300,
  203. .end = 0x20200300 + 16,
  204. .flags = IORESOURCE_MEM,
  205. }, {
  206. .start = IRQ_PF14,
  207. .end = IRQ_PF14,
  208. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  209. },
  210. };
  211. static struct platform_device smc91x_device = {
  212. .name = "smc91x",
  213. .id = 0,
  214. .num_resources = ARRAY_SIZE(smc91x_resources),
  215. .resource = smc91x_resources,
  216. };
  217. #endif
  218. #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
  219. static struct resource isp1362_hcd_resources[] = {
  220. {
  221. .start = 0x20308000,
  222. .end = 0x20308000,
  223. .flags = IORESOURCE_MEM,
  224. }, {
  225. .start = 0x20308004,
  226. .end = 0x20308004,
  227. .flags = IORESOURCE_MEM,
  228. }, {
  229. .start = IRQ_PG15,
  230. .end = IRQ_PG15,
  231. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  232. },
  233. };
  234. static struct isp1362_platform_data isp1362_priv = {
  235. .sel15Kres = 1,
  236. .clknotstop = 0,
  237. .oc_enable = 0,
  238. .int_act_high = 0,
  239. .int_edge_triggered = 0,
  240. .remote_wakeup_connected = 0,
  241. .no_power_switching = 1,
  242. .power_switching_mode = 0,
  243. };
  244. static struct platform_device isp1362_hcd_device = {
  245. .name = "isp1362-hcd",
  246. .id = 0,
  247. .dev = {
  248. .platform_data = &isp1362_priv,
  249. },
  250. .num_resources = ARRAY_SIZE(isp1362_hcd_resources),
  251. .resource = isp1362_hcd_resources,
  252. };
  253. #endif
  254. #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
  255. static struct resource net2272_bfin_resources[] = {
  256. {
  257. .start = 0x20200000,
  258. .end = 0x20200000 + 0x100,
  259. .flags = IORESOURCE_MEM,
  260. }, {
  261. .start = IRQ_PH14,
  262. .end = IRQ_PH14,
  263. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  264. },
  265. };
  266. static struct platform_device net2272_bfin_device = {
  267. .name = "net2272",
  268. .id = -1,
  269. .num_resources = ARRAY_SIZE(net2272_bfin_resources),
  270. .resource = net2272_bfin_resources,
  271. };
  272. #endif
  273. static struct resource bfin_gpios_resources = {
  274. .start = 0,
  275. .end = MAX_BLACKFIN_GPIOS - 1,
  276. .flags = IORESOURCE_IRQ,
  277. };
  278. static struct platform_device bfin_gpios_device = {
  279. .name = "simple-gpio",
  280. .id = -1,
  281. .num_resources = 1,
  282. .resource = &bfin_gpios_resources,
  283. };
  284. #if defined(CONFIG_MTD_GPIO_ADDR) || defined(CONFIG_MTD_GPIO_ADDR_MODULE)
  285. static struct mtd_partition cm_partitions[] = {
  286. {
  287. .name = "bootloader(nor)",
  288. .size = 0x40000,
  289. .offset = 0,
  290. }, {
  291. .name = "linux kernel(nor)",
  292. .size = 0xE0000,
  293. .offset = MTDPART_OFS_APPEND,
  294. }, {
  295. .name = "file system(nor)",
  296. .size = MTDPART_SIZ_FULL,
  297. .offset = MTDPART_OFS_APPEND,
  298. }
  299. };
  300. static struct physmap_flash_data cm_flash_data = {
  301. .width = 2,
  302. .parts = cm_partitions,
  303. .nr_parts = ARRAY_SIZE(cm_partitions),
  304. };
  305. static unsigned cm_flash_gpios[] = { GPIO_PF4, GPIO_PF5 };
  306. static struct resource cm_flash_resource[] = {
  307. {
  308. .name = "cfi_probe",
  309. .start = 0x20000000,
  310. .end = 0x201fffff,
  311. .flags = IORESOURCE_MEM,
  312. }, {
  313. .start = (unsigned long)cm_flash_gpios,
  314. .end = ARRAY_SIZE(cm_flash_gpios),
  315. .flags = IORESOURCE_IRQ,
  316. }
  317. };
  318. static struct platform_device cm_flash_device = {
  319. .name = "gpio-addr-flash",
  320. .id = 0,
  321. .dev = {
  322. .platform_data = &cm_flash_data,
  323. },
  324. .num_resources = ARRAY_SIZE(cm_flash_resource),
  325. .resource = cm_flash_resource,
  326. };
  327. #endif
  328. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  329. static struct resource bfin_uart_resources[] = {
  330. {
  331. .start = 0xFFC00400,
  332. .end = 0xFFC004FF,
  333. .flags = IORESOURCE_MEM,
  334. }, {
  335. .start = 0xFFC02000,
  336. .end = 0xFFC020FF,
  337. .flags = IORESOURCE_MEM,
  338. },
  339. };
  340. static struct platform_device bfin_uart_device = {
  341. .name = "bfin-uart",
  342. .id = 1,
  343. .num_resources = ARRAY_SIZE(bfin_uart_resources),
  344. .resource = bfin_uart_resources,
  345. };
  346. #endif
  347. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  348. #ifdef CONFIG_BFIN_SIR0
  349. static struct resource bfin_sir0_resources[] = {
  350. {
  351. .start = 0xFFC00400,
  352. .end = 0xFFC004FF,
  353. .flags = IORESOURCE_MEM,
  354. },
  355. {
  356. .start = IRQ_UART0_RX,
  357. .end = IRQ_UART0_RX+1,
  358. .flags = IORESOURCE_IRQ,
  359. },
  360. {
  361. .start = CH_UART0_RX,
  362. .end = CH_UART0_RX+1,
  363. .flags = IORESOURCE_DMA,
  364. },
  365. };
  366. static struct platform_device bfin_sir0_device = {
  367. .name = "bfin_sir",
  368. .id = 0,
  369. .num_resources = ARRAY_SIZE(bfin_sir0_resources),
  370. .resource = bfin_sir0_resources,
  371. };
  372. #endif
  373. #ifdef CONFIG_BFIN_SIR1
  374. static struct resource bfin_sir1_resources[] = {
  375. {
  376. .start = 0xFFC02000,
  377. .end = 0xFFC020FF,
  378. .flags = IORESOURCE_MEM,
  379. },
  380. {
  381. .start = IRQ_UART1_RX,
  382. .end = IRQ_UART1_RX+1,
  383. .flags = IORESOURCE_IRQ,
  384. },
  385. {
  386. .start = CH_UART1_RX,
  387. .end = CH_UART1_RX+1,
  388. .flags = IORESOURCE_DMA,
  389. },
  390. };
  391. static struct platform_device bfin_sir1_device = {
  392. .name = "bfin_sir",
  393. .id = 1,
  394. .num_resources = ARRAY_SIZE(bfin_sir1_resources),
  395. .resource = bfin_sir1_resources,
  396. };
  397. #endif
  398. #endif
  399. #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
  400. static struct resource bfin_twi0_resource[] = {
  401. [0] = {
  402. .start = TWI0_REGBASE,
  403. .end = TWI0_REGBASE,
  404. .flags = IORESOURCE_MEM,
  405. },
  406. [1] = {
  407. .start = IRQ_TWI,
  408. .end = IRQ_TWI,
  409. .flags = IORESOURCE_IRQ,
  410. },
  411. };
  412. static struct platform_device i2c_bfin_twi_device = {
  413. .name = "i2c-bfin-twi",
  414. .id = 0,
  415. .num_resources = ARRAY_SIZE(bfin_twi0_resource),
  416. .resource = bfin_twi0_resource,
  417. };
  418. #endif
  419. #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
  420. static struct platform_device bfin_sport0_uart_device = {
  421. .name = "bfin-sport-uart",
  422. .id = 0,
  423. };
  424. static struct platform_device bfin_sport1_uart_device = {
  425. .name = "bfin-sport-uart",
  426. .id = 1,
  427. };
  428. #endif
  429. #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
  430. static struct platform_device bfin_mii_bus = {
  431. .name = "bfin_mii_bus",
  432. };
  433. static struct platform_device bfin_mac_device = {
  434. .name = "bfin_mac",
  435. .dev.platform_data = &bfin_mii_bus,
  436. };
  437. #endif
  438. #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
  439. #define PATA_INT IRQ_PF14
  440. static struct pata_platform_info bfin_pata_platform_data = {
  441. .ioport_shift = 2,
  442. .irq_type = IRQF_TRIGGER_HIGH | IRQF_DISABLED,
  443. };
  444. static struct resource bfin_pata_resources[] = {
  445. {
  446. .start = 0x2030C000,
  447. .end = 0x2030C01F,
  448. .flags = IORESOURCE_MEM,
  449. },
  450. {
  451. .start = 0x2030D018,
  452. .end = 0x2030D01B,
  453. .flags = IORESOURCE_MEM,
  454. },
  455. {
  456. .start = PATA_INT,
  457. .end = PATA_INT,
  458. .flags = IORESOURCE_IRQ,
  459. },
  460. };
  461. static struct platform_device bfin_pata_device = {
  462. .name = "pata_platform",
  463. .id = -1,
  464. .num_resources = ARRAY_SIZE(bfin_pata_resources),
  465. .resource = bfin_pata_resources,
  466. .dev = {
  467. .platform_data = &bfin_pata_platform_data,
  468. }
  469. };
  470. #endif
  471. static const unsigned int cclk_vlev_datasheet[] =
  472. {
  473. VRPAIR(VLEV_085, 250000000),
  474. VRPAIR(VLEV_090, 376000000),
  475. VRPAIR(VLEV_095, 426000000),
  476. VRPAIR(VLEV_100, 426000000),
  477. VRPAIR(VLEV_105, 476000000),
  478. VRPAIR(VLEV_110, 476000000),
  479. VRPAIR(VLEV_115, 476000000),
  480. VRPAIR(VLEV_120, 500000000),
  481. VRPAIR(VLEV_125, 533000000),
  482. VRPAIR(VLEV_130, 600000000),
  483. };
  484. static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
  485. .tuple_tab = cclk_vlev_datasheet,
  486. .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
  487. .vr_settling_time = 25 /* us */,
  488. };
  489. static struct platform_device bfin_dpmc = {
  490. .name = "bfin dpmc",
  491. .dev = {
  492. .platform_data = &bfin_dmpc_vreg_data,
  493. },
  494. };
  495. static struct platform_device *cm_bf537_devices[] __initdata = {
  496. &bfin_dpmc,
  497. #if defined(CONFIG_FB_HITACHI_TX09) || defined(CONFIG_FB_HITACHI_TX09_MODULE)
  498. &hitachi_fb_device,
  499. #endif
  500. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  501. &rtc_device,
  502. #endif
  503. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  504. &bfin_uart_device,
  505. #endif
  506. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  507. #ifdef CONFIG_BFIN_SIR0
  508. &bfin_sir0_device,
  509. #endif
  510. #ifdef CONFIG_BFIN_SIR1
  511. &bfin_sir1_device,
  512. #endif
  513. #endif
  514. #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
  515. &i2c_bfin_twi_device,
  516. #endif
  517. #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
  518. &bfin_sport0_uart_device,
  519. &bfin_sport1_uart_device,
  520. #endif
  521. #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
  522. &isp1362_hcd_device,
  523. #endif
  524. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  525. &smc91x_device,
  526. #endif
  527. #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
  528. &bfin_mii_bus,
  529. &bfin_mac_device,
  530. #endif
  531. #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
  532. &net2272_bfin_device,
  533. #endif
  534. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  535. &bfin_spi0_device,
  536. #endif
  537. #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
  538. &bfin_pata_device,
  539. #endif
  540. #if defined(CONFIG_MTD_GPIO_ADDR) || defined(CONFIG_MTD_GPIO_ADDR_MODULE)
  541. &cm_flash_device,
  542. #endif
  543. &bfin_gpios_device,
  544. };
  545. static int __init tcm_bf537_init(void)
  546. {
  547. printk(KERN_INFO "%s(): registering device resources\n", __func__);
  548. platform_add_devices(cm_bf537_devices, ARRAY_SIZE(cm_bf537_devices));
  549. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  550. spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
  551. #endif
  552. #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
  553. irq_desc[PATA_INT].status |= IRQ_NOAUTOEN;
  554. #endif
  555. return 0;
  556. }
  557. arch_initcall(tcm_bf537_init);
  558. void bfin_get_ether_addr(char *addr)
  559. {
  560. random_ether_addr(addr);
  561. printk(KERN_WARNING "%s:%s: Setting Ethernet MAC to a random one\n", __FILE__, __func__);
  562. }
  563. EXPORT_SYMBOL(bfin_get_ether_addr);