pnav10.c 14 KB

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  1. /*
  2. * File: arch/blackfin/mach-bf537/boards/stamp.c
  3. * Based on: arch/blackfin/mach-bf533/boards/ezkit.c
  4. * Author: Aidan Williams <aidan@nicta.com.au>
  5. *
  6. * Created:
  7. * Description:
  8. *
  9. * Modified:
  10. * Copyright 2005 National ICT Australia (NICTA)
  11. * Copyright 2004-2008 Analog Devices Inc.
  12. *
  13. * Bugs: Enter bugs at http://blackfin.uclinux.org/
  14. *
  15. * This program is free software; you can redistribute it and/or modify
  16. * it under the terms of the GNU General Public License as published by
  17. * the Free Software Foundation; either version 2 of the License, or
  18. * (at your option) any later version.
  19. *
  20. * This program is distributed in the hope that it will be useful,
  21. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  22. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  23. * GNU General Public License for more details.
  24. *
  25. * You should have received a copy of the GNU General Public License
  26. * along with this program; if not, see the file COPYING, or write
  27. * to the Free Software Foundation, Inc.,
  28. * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  29. */
  30. #include <linux/device.h>
  31. #include <linux/etherdevice.h>
  32. #include <linux/platform_device.h>
  33. #include <linux/mtd/mtd.h>
  34. #include <linux/mtd/partitions.h>
  35. #include <linux/spi/spi.h>
  36. #include <linux/spi/flash.h>
  37. #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
  38. #include <linux/usb/isp1362.h>
  39. #endif
  40. #include <linux/irq.h>
  41. #include <asm/dma.h>
  42. #include <asm/bfin5xx_spi.h>
  43. #include <asm/portmux.h>
  44. #include <linux/usb/sl811.h>
  45. #include <linux/spi/ad7877.h>
  46. /*
  47. * Name the Board for the /proc/cpuinfo
  48. */
  49. const char bfin_board_name[] = "ADI PNAV-1.0";
  50. /*
  51. * Driver needs to know address, irq and flag pin.
  52. */
  53. #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
  54. static struct resource bfin_pcmcia_cf_resources[] = {
  55. {
  56. .start = 0x20310000, /* IO PORT */
  57. .end = 0x20312000,
  58. .flags = IORESOURCE_MEM,
  59. }, {
  60. .start = 0x20311000, /* Attribute Memory */
  61. .end = 0x20311FFF,
  62. .flags = IORESOURCE_MEM,
  63. }, {
  64. .start = IRQ_PF4,
  65. .end = IRQ_PF4,
  66. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
  67. }, {
  68. .start = 6, /* Card Detect PF6 */
  69. .end = 6,
  70. .flags = IORESOURCE_IRQ,
  71. },
  72. };
  73. static struct platform_device bfin_pcmcia_cf_device = {
  74. .name = "bfin_cf_pcmcia",
  75. .id = -1,
  76. .num_resources = ARRAY_SIZE(bfin_pcmcia_cf_resources),
  77. .resource = bfin_pcmcia_cf_resources,
  78. };
  79. #endif
  80. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  81. static struct platform_device rtc_device = {
  82. .name = "rtc-bfin",
  83. .id = -1,
  84. };
  85. #endif
  86. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  87. static struct resource smc91x_resources[] = {
  88. {
  89. .name = "smc91x-regs",
  90. .start = 0x20300300,
  91. .end = 0x20300300 + 16,
  92. .flags = IORESOURCE_MEM,
  93. }, {
  94. .start = IRQ_PF7,
  95. .end = IRQ_PF7,
  96. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  97. },
  98. };
  99. static struct platform_device smc91x_device = {
  100. .name = "smc91x",
  101. .id = 0,
  102. .num_resources = ARRAY_SIZE(smc91x_resources),
  103. .resource = smc91x_resources,
  104. };
  105. #endif
  106. #if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE)
  107. static struct resource sl811_hcd_resources[] = {
  108. {
  109. .start = 0x20340000,
  110. .end = 0x20340000,
  111. .flags = IORESOURCE_MEM,
  112. }, {
  113. .start = 0x20340004,
  114. .end = 0x20340004,
  115. .flags = IORESOURCE_MEM,
  116. }, {
  117. .start = CONFIG_USB_SL811_BFIN_IRQ,
  118. .end = CONFIG_USB_SL811_BFIN_IRQ,
  119. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  120. },
  121. };
  122. #if defined(CONFIG_USB_SL811_BFIN_USE_VBUS)
  123. void sl811_port_power(struct device *dev, int is_on)
  124. {
  125. gpio_request(CONFIG_USB_SL811_BFIN_GPIO_VBUS, "usb:SL811_VBUS");
  126. gpio_direction_output(CONFIG_USB_SL811_BFIN_GPIO_VBUS, is_on);
  127. }
  128. #endif
  129. static struct sl811_platform_data sl811_priv = {
  130. .potpg = 10,
  131. .power = 250, /* == 500mA */
  132. #if defined(CONFIG_USB_SL811_BFIN_USE_VBUS)
  133. .port_power = &sl811_port_power,
  134. #endif
  135. };
  136. static struct platform_device sl811_hcd_device = {
  137. .name = "sl811-hcd",
  138. .id = 0,
  139. .dev = {
  140. .platform_data = &sl811_priv,
  141. },
  142. .num_resources = ARRAY_SIZE(sl811_hcd_resources),
  143. .resource = sl811_hcd_resources,
  144. };
  145. #endif
  146. #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
  147. static struct resource isp1362_hcd_resources[] = {
  148. {
  149. .start = 0x20360000,
  150. .end = 0x20360000,
  151. .flags = IORESOURCE_MEM,
  152. }, {
  153. .start = 0x20360004,
  154. .end = 0x20360004,
  155. .flags = IORESOURCE_MEM,
  156. }, {
  157. .start = CONFIG_USB_ISP1362_BFIN_GPIO_IRQ,
  158. .end = CONFIG_USB_ISP1362_BFIN_GPIO_IRQ,
  159. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  160. },
  161. };
  162. static struct isp1362_platform_data isp1362_priv = {
  163. .sel15Kres = 1,
  164. .clknotstop = 0,
  165. .oc_enable = 0,
  166. .int_act_high = 0,
  167. .int_edge_triggered = 0,
  168. .remote_wakeup_connected = 0,
  169. .no_power_switching = 1,
  170. .power_switching_mode = 0,
  171. };
  172. static struct platform_device isp1362_hcd_device = {
  173. .name = "isp1362-hcd",
  174. .id = 0,
  175. .dev = {
  176. .platform_data = &isp1362_priv,
  177. },
  178. .num_resources = ARRAY_SIZE(isp1362_hcd_resources),
  179. .resource = isp1362_hcd_resources,
  180. };
  181. #endif
  182. #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
  183. static struct platform_device bfin_mii_bus = {
  184. .name = "bfin_mii_bus",
  185. };
  186. static struct platform_device bfin_mac_device = {
  187. .name = "bfin_mac",
  188. .dev.platform_data = &bfin_mii_bus,
  189. };
  190. #endif
  191. #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
  192. static struct resource net2272_bfin_resources[] = {
  193. {
  194. .start = 0x20300000,
  195. .end = 0x20300000 + 0x100,
  196. .flags = IORESOURCE_MEM,
  197. }, {
  198. .start = IRQ_PF7,
  199. .end = IRQ_PF7,
  200. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  201. },
  202. };
  203. static struct platform_device net2272_bfin_device = {
  204. .name = "net2272",
  205. .id = -1,
  206. .num_resources = ARRAY_SIZE(net2272_bfin_resources),
  207. .resource = net2272_bfin_resources,
  208. };
  209. #endif
  210. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  211. /* all SPI peripherals info goes here */
  212. #if defined(CONFIG_MTD_M25P80) \
  213. || defined(CONFIG_MTD_M25P80_MODULE)
  214. static struct mtd_partition bfin_spi_flash_partitions[] = {
  215. {
  216. .name = "bootloader(spi)",
  217. .size = 0x00020000,
  218. .offset = 0,
  219. .mask_flags = MTD_CAP_ROM
  220. }, {
  221. .name = "linux kernel(spi)",
  222. .size = 0xe0000,
  223. .offset = 0x20000
  224. }, {
  225. .name = "file system(spi)",
  226. .size = 0x700000,
  227. .offset = 0x00100000,
  228. }
  229. };
  230. static struct flash_platform_data bfin_spi_flash_data = {
  231. .name = "m25p80",
  232. .parts = bfin_spi_flash_partitions,
  233. .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
  234. .type = "m25p64",
  235. };
  236. /* SPI flash chip (m25p64) */
  237. static struct bfin5xx_spi_chip spi_flash_chip_info = {
  238. .enable_dma = 0, /* use dma transfer with this chip*/
  239. .bits_per_word = 8,
  240. };
  241. #endif
  242. #if defined(CONFIG_SPI_ADC_BF533) \
  243. || defined(CONFIG_SPI_ADC_BF533_MODULE)
  244. /* SPI ADC chip */
  245. static struct bfin5xx_spi_chip spi_adc_chip_info = {
  246. .enable_dma = 1, /* use dma transfer with this chip*/
  247. .bits_per_word = 16,
  248. };
  249. #endif
  250. #if defined(CONFIG_SND_BLACKFIN_AD1836) \
  251. || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
  252. static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
  253. .enable_dma = 0,
  254. .bits_per_word = 16,
  255. };
  256. #endif
  257. #if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE)
  258. static struct bfin5xx_spi_chip ad9960_spi_chip_info = {
  259. .enable_dma = 0,
  260. .bits_per_word = 16,
  261. };
  262. #endif
  263. #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
  264. static struct bfin5xx_spi_chip mmc_spi_chip_info = {
  265. .enable_dma = 0,
  266. .bits_per_word = 8,
  267. };
  268. #endif
  269. #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
  270. static struct bfin5xx_spi_chip spi_ad7877_chip_info = {
  271. .cs_change_per_word = 0,
  272. .enable_dma = 0,
  273. .bits_per_word = 16,
  274. };
  275. static const struct ad7877_platform_data bfin_ad7877_ts_info = {
  276. .model = 7877,
  277. .vref_delay_usecs = 50, /* internal, no capacitor */
  278. .x_plate_ohms = 419,
  279. .y_plate_ohms = 486,
  280. .pressure_max = 1000,
  281. .pressure_min = 0,
  282. .stopacq_polarity = 1,
  283. .first_conversion_delay = 3,
  284. .acquisition_time = 1,
  285. .averaging = 1,
  286. .pen_down_acc_interval = 1,
  287. };
  288. #endif
  289. static struct spi_board_info bfin_spi_board_info[] __initdata = {
  290. #if defined(CONFIG_MTD_M25P80) \
  291. || defined(CONFIG_MTD_M25P80_MODULE)
  292. {
  293. /* the modalias must be the same as spi device driver name */
  294. .modalias = "m25p80", /* Name of spi_driver for this device */
  295. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  296. .bus_num = 0, /* Framework bus number */
  297. .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
  298. .platform_data = &bfin_spi_flash_data,
  299. .controller_data = &spi_flash_chip_info,
  300. .mode = SPI_MODE_3,
  301. },
  302. #endif
  303. #if defined(CONFIG_SPI_ADC_BF533) \
  304. || defined(CONFIG_SPI_ADC_BF533_MODULE)
  305. {
  306. .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
  307. .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
  308. .bus_num = 0, /* Framework bus number */
  309. .chip_select = 1, /* Framework chip select. */
  310. .platform_data = NULL, /* No spi_driver specific config */
  311. .controller_data = &spi_adc_chip_info,
  312. },
  313. #endif
  314. #if defined(CONFIG_SND_BLACKFIN_AD1836) \
  315. || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
  316. {
  317. .modalias = "ad1836-spi",
  318. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  319. .bus_num = 0,
  320. .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT,
  321. .controller_data = &ad1836_spi_chip_info,
  322. },
  323. #endif
  324. #if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE)
  325. {
  326. .modalias = "ad9960-spi",
  327. .max_speed_hz = 10000000, /* max spi clock (SCK) speed in HZ */
  328. .bus_num = 0,
  329. .chip_select = 1,
  330. .controller_data = &ad9960_spi_chip_info,
  331. },
  332. #endif
  333. #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
  334. {
  335. .modalias = "mmc_spi",
  336. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  337. .bus_num = 0,
  338. .chip_select = 5,
  339. .controller_data = &mmc_spi_chip_info,
  340. .mode = SPI_MODE_3,
  341. },
  342. #endif
  343. #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
  344. {
  345. .modalias = "ad7877",
  346. .platform_data = &bfin_ad7877_ts_info,
  347. .irq = IRQ_PF2,
  348. .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
  349. .bus_num = 0,
  350. .chip_select = 5,
  351. .controller_data = &spi_ad7877_chip_info,
  352. },
  353. #endif
  354. };
  355. /* SPI (0) */
  356. static struct resource bfin_spi0_resource[] = {
  357. [0] = {
  358. .start = SPI0_REGBASE,
  359. .end = SPI0_REGBASE + 0xFF,
  360. .flags = IORESOURCE_MEM,
  361. },
  362. [1] = {
  363. .start = CH_SPI,
  364. .end = CH_SPI,
  365. .flags = IORESOURCE_IRQ,
  366. }
  367. };
  368. /* SPI controller data */
  369. static struct bfin5xx_spi_master bfin_spi0_info = {
  370. .num_chipselect = 8,
  371. .enable_dma = 1, /* master has the ability to do dma transfer */
  372. .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
  373. };
  374. static struct platform_device bfin_spi0_device = {
  375. .name = "bfin-spi",
  376. .id = 0, /* Bus number */
  377. .num_resources = ARRAY_SIZE(bfin_spi0_resource),
  378. .resource = bfin_spi0_resource,
  379. .dev = {
  380. .platform_data = &bfin_spi0_info, /* Passed to driver */
  381. },
  382. };
  383. #endif /* spi master and devices */
  384. #if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
  385. static struct platform_device bfin_fb_device = {
  386. .name = "bf537-lq035",
  387. };
  388. #endif
  389. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  390. static struct resource bfin_uart_resources[] = {
  391. {
  392. .start = 0xFFC00400,
  393. .end = 0xFFC004FF,
  394. .flags = IORESOURCE_MEM,
  395. }, {
  396. .start = 0xFFC02000,
  397. .end = 0xFFC020FF,
  398. .flags = IORESOURCE_MEM,
  399. },
  400. };
  401. static struct platform_device bfin_uart_device = {
  402. .name = "bfin-uart",
  403. .id = 1,
  404. .num_resources = ARRAY_SIZE(bfin_uart_resources),
  405. .resource = bfin_uart_resources,
  406. };
  407. #endif
  408. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  409. #ifdef CONFIG_BFIN_SIR0
  410. static struct resource bfin_sir0_resources[] = {
  411. {
  412. .start = 0xFFC00400,
  413. .end = 0xFFC004FF,
  414. .flags = IORESOURCE_MEM,
  415. },
  416. {
  417. .start = IRQ_UART0_RX,
  418. .end = IRQ_UART0_RX+1,
  419. .flags = IORESOURCE_IRQ,
  420. },
  421. {
  422. .start = CH_UART0_RX,
  423. .end = CH_UART0_RX+1,
  424. .flags = IORESOURCE_DMA,
  425. },
  426. };
  427. static struct platform_device bfin_sir0_device = {
  428. .name = "bfin_sir",
  429. .id = 0,
  430. .num_resources = ARRAY_SIZE(bfin_sir0_resources),
  431. .resource = bfin_sir0_resources,
  432. };
  433. #endif
  434. #ifdef CONFIG_BFIN_SIR1
  435. static struct resource bfin_sir1_resources[] = {
  436. {
  437. .start = 0xFFC02000,
  438. .end = 0xFFC020FF,
  439. .flags = IORESOURCE_MEM,
  440. },
  441. {
  442. .start = IRQ_UART1_RX,
  443. .end = IRQ_UART1_RX+1,
  444. .flags = IORESOURCE_IRQ,
  445. },
  446. {
  447. .start = CH_UART1_RX,
  448. .end = CH_UART1_RX+1,
  449. .flags = IORESOURCE_DMA,
  450. },
  451. };
  452. static struct platform_device bfin_sir1_device = {
  453. .name = "bfin_sir",
  454. .id = 1,
  455. .num_resources = ARRAY_SIZE(bfin_sir1_resources),
  456. .resource = bfin_sir1_resources,
  457. };
  458. #endif
  459. #endif
  460. static struct platform_device *stamp_devices[] __initdata = {
  461. #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
  462. &bfin_pcmcia_cf_device,
  463. #endif
  464. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  465. &rtc_device,
  466. #endif
  467. #if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE)
  468. &sl811_hcd_device,
  469. #endif
  470. #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
  471. &isp1362_hcd_device,
  472. #endif
  473. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  474. &smc91x_device,
  475. #endif
  476. #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
  477. &bfin_mii_bus,
  478. &bfin_mac_device,
  479. #endif
  480. #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
  481. &net2272_bfin_device,
  482. #endif
  483. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  484. &bfin_spi0_device,
  485. #endif
  486. #if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
  487. &bfin_fb_device,
  488. #endif
  489. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  490. &bfin_uart_device,
  491. #endif
  492. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  493. #ifdef CONFIG_BFIN_SIR0
  494. &bfin_sir0_device,
  495. #endif
  496. #ifdef CONFIG_BFIN_SIR1
  497. &bfin_sir1_device,
  498. #endif
  499. #endif
  500. };
  501. static int __init pnav_init(void)
  502. {
  503. printk(KERN_INFO "%s(): registering device resources\n", __func__);
  504. platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
  505. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  506. spi_register_board_info(bfin_spi_board_info,
  507. ARRAY_SIZE(bfin_spi_board_info));
  508. #endif
  509. return 0;
  510. }
  511. arch_initcall(pnav_init);
  512. void bfin_get_ether_addr(char *addr)
  513. {
  514. random_ether_addr(addr);
  515. printk(KERN_WARNING "%s:%s: Setting Ethernet MAC to a random one\n", __FILE__, __func__);
  516. }
  517. EXPORT_SYMBOL(bfin_get_ether_addr);