ezbrd.c 17 KB

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  1. /*
  2. * File: arch/blackfin/mach-bf518/boards/ezbrd.c
  3. * Based on: arch/blackfin/mach-bf527/boards/ezbrd.c
  4. * Author: Bryan Wu <cooloney@kernel.org>
  5. *
  6. * Created:
  7. * Description:
  8. *
  9. * Modified:
  10. * Copyright 2005 National ICT Australia (NICTA)
  11. * Copyright 2004-2008 Analog Devices Inc.
  12. *
  13. * Bugs: Enter bugs at http://blackfin.uclinux.org/
  14. *
  15. * This program is free software; you can redistribute it and/or modify
  16. * it under the terms of the GNU General Public License as published by
  17. * the Free Software Foundation; either version 2 of the License, or
  18. * (at your option) any later version.
  19. *
  20. * This program is distributed in the hope that it will be useful,
  21. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  22. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  23. * GNU General Public License for more details.
  24. *
  25. * You should have received a copy of the GNU General Public License
  26. * along with this program; if not, see the file COPYING, or write
  27. * to the Free Software Foundation, Inc.,
  28. * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  29. */
  30. #include <linux/device.h>
  31. #include <linux/platform_device.h>
  32. #include <linux/mtd/mtd.h>
  33. #include <linux/mtd/partitions.h>
  34. #include <linux/mtd/physmap.h>
  35. #include <linux/spi/spi.h>
  36. #include <linux/spi/flash.h>
  37. #include <linux/i2c.h>
  38. #include <linux/irq.h>
  39. #include <linux/interrupt.h>
  40. #include <asm/dma.h>
  41. #include <asm/bfin5xx_spi.h>
  42. #include <asm/reboot.h>
  43. #include <asm/portmux.h>
  44. #include <asm/dpmc.h>
  45. #include <asm/bfin_sdh.h>
  46. #include <linux/spi/ad7877.h>
  47. #include <net/dsa.h>
  48. /*
  49. * Name the Board for the /proc/cpuinfo
  50. */
  51. const char bfin_board_name[] = "ADI BF518F-EZBRD";
  52. /*
  53. * Driver needs to know address, irq and flag pin.
  54. */
  55. #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
  56. static struct mtd_partition ezbrd_partitions[] = {
  57. {
  58. .name = "bootloader(nor)",
  59. .size = 0x40000,
  60. .offset = 0,
  61. }, {
  62. .name = "linux kernel(nor)",
  63. .size = 0x1C0000,
  64. .offset = MTDPART_OFS_APPEND,
  65. }, {
  66. .name = "file system(nor)",
  67. .size = MTDPART_SIZ_FULL,
  68. .offset = MTDPART_OFS_APPEND,
  69. }
  70. };
  71. static struct physmap_flash_data ezbrd_flash_data = {
  72. .width = 2,
  73. .parts = ezbrd_partitions,
  74. .nr_parts = ARRAY_SIZE(ezbrd_partitions),
  75. };
  76. static struct resource ezbrd_flash_resource = {
  77. .start = 0x20000000,
  78. .end = 0x203fffff,
  79. .flags = IORESOURCE_MEM,
  80. };
  81. static struct platform_device ezbrd_flash_device = {
  82. .name = "physmap-flash",
  83. .id = 0,
  84. .dev = {
  85. .platform_data = &ezbrd_flash_data,
  86. },
  87. .num_resources = 1,
  88. .resource = &ezbrd_flash_resource,
  89. };
  90. #endif
  91. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  92. static struct platform_device rtc_device = {
  93. .name = "rtc-bfin",
  94. .id = -1,
  95. };
  96. #endif
  97. #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
  98. static struct platform_device bfin_mii_bus = {
  99. .name = "bfin_mii_bus",
  100. };
  101. static struct platform_device bfin_mac_device = {
  102. .name = "bfin_mac",
  103. .dev.platform_data = &bfin_mii_bus,
  104. };
  105. #if defined(CONFIG_NET_DSA_KSZ8893M) || defined(CONFIG_NET_DSA_KSZ8893M_MODULE)
  106. static struct dsa_platform_data ksz8893m_switch_data = {
  107. .mii_bus = &bfin_mii_bus.dev,
  108. .netdev = &bfin_mac_device.dev,
  109. .port_names[0] = NULL,
  110. .port_names[1] = "eth%d",
  111. .port_names[2] = "eth%d",
  112. .port_names[3] = "cpu",
  113. };
  114. static struct platform_device ksz8893m_switch_device = {
  115. .name = "dsa",
  116. .id = 0,
  117. .num_resources = 0,
  118. .dev.platform_data = &ksz8893m_switch_data,
  119. };
  120. #endif
  121. #endif
  122. #if defined(CONFIG_MTD_M25P80) \
  123. || defined(CONFIG_MTD_M25P80_MODULE)
  124. static struct mtd_partition bfin_spi_flash_partitions[] = {
  125. {
  126. .name = "bootloader(spi)",
  127. .size = 0x00040000,
  128. .offset = 0,
  129. .mask_flags = MTD_CAP_ROM
  130. }, {
  131. .name = "linux kernel(spi)",
  132. .size = MTDPART_SIZ_FULL,
  133. .offset = MTDPART_OFS_APPEND,
  134. }
  135. };
  136. static struct flash_platform_data bfin_spi_flash_data = {
  137. .name = "m25p80",
  138. .parts = bfin_spi_flash_partitions,
  139. .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
  140. .type = "m25p16",
  141. };
  142. /* SPI flash chip (m25p64) */
  143. static struct bfin5xx_spi_chip spi_flash_chip_info = {
  144. .enable_dma = 0, /* use dma transfer with this chip*/
  145. .bits_per_word = 8,
  146. };
  147. #endif
  148. #if defined(CONFIG_SPI_ADC_BF533) \
  149. || defined(CONFIG_SPI_ADC_BF533_MODULE)
  150. /* SPI ADC chip */
  151. static struct bfin5xx_spi_chip spi_adc_chip_info = {
  152. .enable_dma = 1, /* use dma transfer with this chip*/
  153. .bits_per_word = 16,
  154. };
  155. #endif
  156. #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
  157. #if defined(CONFIG_NET_DSA_KSZ8893M) \
  158. || defined(CONFIG_NET_DSA_KSZ8893M_MODULE)
  159. /* SPI SWITCH CHIP */
  160. static struct bfin5xx_spi_chip spi_switch_info = {
  161. .enable_dma = 0,
  162. .bits_per_word = 8,
  163. };
  164. #endif
  165. #endif
  166. #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
  167. static struct bfin5xx_spi_chip mmc_spi_chip_info = {
  168. .enable_dma = 0,
  169. .bits_per_word = 8,
  170. };
  171. #endif
  172. #if defined(CONFIG_PBX)
  173. static struct bfin5xx_spi_chip spi_si3xxx_chip_info = {
  174. .ctl_reg = 0x4, /* send zero */
  175. .enable_dma = 0,
  176. .bits_per_word = 8,
  177. .cs_change_per_word = 1,
  178. };
  179. #endif
  180. #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
  181. static struct bfin5xx_spi_chip spi_ad7877_chip_info = {
  182. .enable_dma = 0,
  183. .bits_per_word = 16,
  184. };
  185. static const struct ad7877_platform_data bfin_ad7877_ts_info = {
  186. .model = 7877,
  187. .vref_delay_usecs = 50, /* internal, no capacitor */
  188. .x_plate_ohms = 419,
  189. .y_plate_ohms = 486,
  190. .pressure_max = 1000,
  191. .pressure_min = 0,
  192. .stopacq_polarity = 1,
  193. .first_conversion_delay = 3,
  194. .acquisition_time = 1,
  195. .averaging = 1,
  196. .pen_down_acc_interval = 1,
  197. };
  198. #endif
  199. #if defined(CONFIG_SND_SOC_WM8731) || defined(CONFIG_SND_SOC_WM8731_MODULE) \
  200. && defined(CONFIG_SND_SOC_WM8731_SPI)
  201. static struct bfin5xx_spi_chip spi_wm8731_chip_info = {
  202. .enable_dma = 0,
  203. .bits_per_word = 16,
  204. };
  205. #endif
  206. #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
  207. static struct bfin5xx_spi_chip spidev_chip_info = {
  208. .enable_dma = 0,
  209. .bits_per_word = 8,
  210. };
  211. #endif
  212. static struct spi_board_info bfin_spi_board_info[] __initdata = {
  213. #if defined(CONFIG_MTD_M25P80) \
  214. || defined(CONFIG_MTD_M25P80_MODULE)
  215. {
  216. /* the modalias must be the same as spi device driver name */
  217. .modalias = "m25p80", /* Name of spi_driver for this device */
  218. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  219. .bus_num = 0, /* Framework bus number */
  220. .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
  221. .platform_data = &bfin_spi_flash_data,
  222. .controller_data = &spi_flash_chip_info,
  223. .mode = SPI_MODE_3,
  224. },
  225. #endif
  226. #if defined(CONFIG_SPI_ADC_BF533) \
  227. || defined(CONFIG_SPI_ADC_BF533_MODULE)
  228. {
  229. .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
  230. .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
  231. .bus_num = 0, /* Framework bus number */
  232. .chip_select = 1, /* Framework chip select. */
  233. .platform_data = NULL, /* No spi_driver specific config */
  234. .controller_data = &spi_adc_chip_info,
  235. },
  236. #endif
  237. #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
  238. #if defined(CONFIG_NET_DSA_KSZ8893M) \
  239. || defined(CONFIG_NET_DSA_KSZ8893M_MODULE)
  240. {
  241. .modalias = "ksz8893m",
  242. .max_speed_hz = 5000000,
  243. .bus_num = 0,
  244. .chip_select = 1,
  245. .platform_data = NULL,
  246. .controller_data = &spi_switch_info,
  247. .mode = SPI_MODE_3,
  248. },
  249. #endif
  250. #endif
  251. #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
  252. {
  253. .modalias = "mmc_spi",
  254. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  255. .bus_num = 0,
  256. .chip_select = 5,
  257. .controller_data = &mmc_spi_chip_info,
  258. .mode = SPI_MODE_3,
  259. },
  260. #endif
  261. #if defined(CONFIG_PBX)
  262. {
  263. .modalias = "fxs-spi",
  264. .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
  265. .bus_num = 0,
  266. .chip_select = 8 - CONFIG_J11_JUMPER,
  267. .controller_data = &spi_si3xxx_chip_info,
  268. .mode = SPI_MODE_3,
  269. },
  270. {
  271. .modalias = "fxo-spi",
  272. .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
  273. .bus_num = 0,
  274. .chip_select = 8 - CONFIG_J19_JUMPER,
  275. .controller_data = &spi_si3xxx_chip_info,
  276. .mode = SPI_MODE_3,
  277. },
  278. #endif
  279. #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
  280. {
  281. .modalias = "ad7877",
  282. .platform_data = &bfin_ad7877_ts_info,
  283. .irq = IRQ_PF8,
  284. .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
  285. .bus_num = 0,
  286. .chip_select = 2,
  287. .controller_data = &spi_ad7877_chip_info,
  288. },
  289. #endif
  290. #if defined(CONFIG_SND_SOC_WM8731) || defined(CONFIG_SND_SOC_WM8731_MODULE) \
  291. && defined(CONFIG_SND_SOC_WM8731_SPI)
  292. {
  293. .modalias = "wm8731",
  294. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  295. .bus_num = 0,
  296. .chip_select = 5,
  297. .controller_data = &spi_wm8731_chip_info,
  298. .mode = SPI_MODE_0,
  299. },
  300. #endif
  301. #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
  302. {
  303. .modalias = "spidev",
  304. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  305. .bus_num = 0,
  306. .chip_select = 1,
  307. .controller_data = &spidev_chip_info,
  308. },
  309. #endif
  310. #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
  311. {
  312. .modalias = "bfin-lq035q1-spi",
  313. .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
  314. .bus_num = 0,
  315. .chip_select = 1,
  316. .controller_data = &lq035q1_spi_chip_info,
  317. .mode = SPI_CPHA | SPI_CPOL,
  318. },
  319. #endif
  320. };
  321. /* SPI controller data */
  322. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  323. /* SPI (0) */
  324. static struct bfin5xx_spi_master bfin_spi0_info = {
  325. .num_chipselect = 5,
  326. .enable_dma = 1, /* master has the ability to do dma transfer */
  327. .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
  328. };
  329. static struct resource bfin_spi0_resource[] = {
  330. [0] = {
  331. .start = SPI0_REGBASE,
  332. .end = SPI0_REGBASE + 0xFF,
  333. .flags = IORESOURCE_MEM,
  334. },
  335. [1] = {
  336. .start = CH_SPI0,
  337. .end = CH_SPI0,
  338. .flags = IORESOURCE_IRQ,
  339. },
  340. };
  341. static struct platform_device bfin_spi0_device = {
  342. .name = "bfin-spi",
  343. .id = 0, /* Bus number */
  344. .num_resources = ARRAY_SIZE(bfin_spi0_resource),
  345. .resource = bfin_spi0_resource,
  346. .dev = {
  347. .platform_data = &bfin_spi0_info, /* Passed to driver */
  348. },
  349. };
  350. /* SPI (1) */
  351. static struct bfin5xx_spi_master bfin_spi1_info = {
  352. .num_chipselect = 5,
  353. .enable_dma = 1, /* master has the ability to do dma transfer */
  354. .pin_req = {P_SPI1_SCK, P_SPI1_MISO, P_SPI1_MOSI, 0},
  355. };
  356. static struct resource bfin_spi1_resource[] = {
  357. [0] = {
  358. .start = SPI1_REGBASE,
  359. .end = SPI1_REGBASE + 0xFF,
  360. .flags = IORESOURCE_MEM,
  361. },
  362. [1] = {
  363. .start = CH_SPI1,
  364. .end = CH_SPI1,
  365. .flags = IORESOURCE_IRQ,
  366. },
  367. };
  368. static struct platform_device bfin_spi1_device = {
  369. .name = "bfin-spi",
  370. .id = 1, /* Bus number */
  371. .num_resources = ARRAY_SIZE(bfin_spi1_resource),
  372. .resource = bfin_spi1_resource,
  373. .dev = {
  374. .platform_data = &bfin_spi1_info, /* Passed to driver */
  375. },
  376. };
  377. #endif /* spi master and devices */
  378. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  379. static struct resource bfin_uart_resources[] = {
  380. #ifdef CONFIG_SERIAL_BFIN_UART0
  381. {
  382. .start = 0xFFC00400,
  383. .end = 0xFFC004FF,
  384. .flags = IORESOURCE_MEM,
  385. },
  386. #endif
  387. #ifdef CONFIG_SERIAL_BFIN_UART1
  388. {
  389. .start = 0xFFC02000,
  390. .end = 0xFFC020FF,
  391. .flags = IORESOURCE_MEM,
  392. },
  393. #endif
  394. };
  395. static struct platform_device bfin_uart_device = {
  396. .name = "bfin-uart",
  397. .id = 1,
  398. .num_resources = ARRAY_SIZE(bfin_uart_resources),
  399. .resource = bfin_uart_resources,
  400. };
  401. #endif
  402. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  403. #ifdef CONFIG_BFIN_SIR0
  404. static struct resource bfin_sir0_resources[] = {
  405. {
  406. .start = 0xFFC00400,
  407. .end = 0xFFC004FF,
  408. .flags = IORESOURCE_MEM,
  409. },
  410. {
  411. .start = IRQ_UART0_RX,
  412. .end = IRQ_UART0_RX+1,
  413. .flags = IORESOURCE_IRQ,
  414. },
  415. {
  416. .start = CH_UART0_RX,
  417. .end = CH_UART0_RX+1,
  418. .flags = IORESOURCE_DMA,
  419. },
  420. };
  421. static struct platform_device bfin_sir0_device = {
  422. .name = "bfin_sir",
  423. .id = 0,
  424. .num_resources = ARRAY_SIZE(bfin_sir0_resources),
  425. .resource = bfin_sir0_resources,
  426. };
  427. #endif
  428. #ifdef CONFIG_BFIN_SIR1
  429. static struct resource bfin_sir1_resources[] = {
  430. {
  431. .start = 0xFFC02000,
  432. .end = 0xFFC020FF,
  433. .flags = IORESOURCE_MEM,
  434. },
  435. {
  436. .start = IRQ_UART1_RX,
  437. .end = IRQ_UART1_RX+1,
  438. .flags = IORESOURCE_IRQ,
  439. },
  440. {
  441. .start = CH_UART1_RX,
  442. .end = CH_UART1_RX+1,
  443. .flags = IORESOURCE_DMA,
  444. },
  445. };
  446. static struct platform_device bfin_sir1_device = {
  447. .name = "bfin_sir",
  448. .id = 1,
  449. .num_resources = ARRAY_SIZE(bfin_sir1_resources),
  450. .resource = bfin_sir1_resources,
  451. };
  452. #endif
  453. #endif
  454. #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
  455. static struct resource bfin_twi0_resource[] = {
  456. [0] = {
  457. .start = TWI0_REGBASE,
  458. .end = TWI0_REGBASE,
  459. .flags = IORESOURCE_MEM,
  460. },
  461. [1] = {
  462. .start = IRQ_TWI,
  463. .end = IRQ_TWI,
  464. .flags = IORESOURCE_IRQ,
  465. },
  466. };
  467. static struct platform_device i2c_bfin_twi_device = {
  468. .name = "i2c-bfin-twi",
  469. .id = 0,
  470. .num_resources = ARRAY_SIZE(bfin_twi0_resource),
  471. .resource = bfin_twi0_resource,
  472. };
  473. #endif
  474. static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
  475. #if defined(CONFIG_TWI_LCD) || defined(CONFIG_TWI_LCD_MODULE)
  476. {
  477. I2C_BOARD_INFO("pcf8574_lcd", 0x22),
  478. },
  479. #endif
  480. #if defined(CONFIG_TWI_KEYPAD) || defined(CONFIG_TWI_KEYPAD_MODULE)
  481. {
  482. I2C_BOARD_INFO("pcf8574_keypad", 0x27),
  483. .irq = IRQ_PF8,
  484. },
  485. #endif
  486. };
  487. #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
  488. static struct platform_device bfin_sport0_uart_device = {
  489. .name = "bfin-sport-uart",
  490. .id = 0,
  491. };
  492. static struct platform_device bfin_sport1_uart_device = {
  493. .name = "bfin-sport-uart",
  494. .id = 1,
  495. };
  496. #endif
  497. #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
  498. #include <linux/input.h>
  499. #include <linux/gpio_keys.h>
  500. static struct gpio_keys_button bfin_gpio_keys_table[] = {
  501. {BTN_0, GPIO_PG0, 1, "gpio-keys: BTN0"},
  502. {BTN_1, GPIO_PG13, 1, "gpio-keys: BTN1"},
  503. };
  504. static struct gpio_keys_platform_data bfin_gpio_keys_data = {
  505. .buttons = bfin_gpio_keys_table,
  506. .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table),
  507. };
  508. static struct platform_device bfin_device_gpiokeys = {
  509. .name = "gpio-keys",
  510. .dev = {
  511. .platform_data = &bfin_gpio_keys_data,
  512. },
  513. };
  514. #endif
  515. #if defined(CONFIG_SDH_BFIN) || defined(CONFIG_SDH_BFIN_MODULE)
  516. static struct bfin_sd_host bfin_sdh_data = {
  517. .dma_chan = CH_RSI,
  518. .irq_int0 = IRQ_RSI_INT0,
  519. .pin_req = {P_RSI_DATA0, P_RSI_DATA1, P_RSI_DATA2, P_RSI_DATA3, P_RSI_CMD, P_RSI_CLK, 0},
  520. };
  521. static struct platform_device bf51x_sdh_device = {
  522. .name = "bfin-sdh",
  523. .id = 0,
  524. .dev = {
  525. .platform_data = &bfin_sdh_data,
  526. },
  527. };
  528. #endif
  529. static struct resource bfin_gpios_resources = {
  530. .start = 0,
  531. .end = MAX_BLACKFIN_GPIOS - 1,
  532. .flags = IORESOURCE_IRQ,
  533. };
  534. static struct platform_device bfin_gpios_device = {
  535. .name = "simple-gpio",
  536. .id = -1,
  537. .num_resources = 1,
  538. .resource = &bfin_gpios_resources,
  539. };
  540. static const unsigned int cclk_vlev_datasheet[] =
  541. {
  542. VRPAIR(VLEV_100, 400000000),
  543. VRPAIR(VLEV_105, 426000000),
  544. VRPAIR(VLEV_110, 500000000),
  545. VRPAIR(VLEV_115, 533000000),
  546. VRPAIR(VLEV_120, 600000000),
  547. };
  548. static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
  549. .tuple_tab = cclk_vlev_datasheet,
  550. .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
  551. .vr_settling_time = 25 /* us */,
  552. };
  553. static struct platform_device bfin_dpmc = {
  554. .name = "bfin dpmc",
  555. .dev = {
  556. .platform_data = &bfin_dmpc_vreg_data,
  557. },
  558. };
  559. static struct platform_device *stamp_devices[] __initdata = {
  560. &bfin_dpmc,
  561. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  562. &rtc_device,
  563. #endif
  564. #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
  565. &bfin_mii_bus,
  566. &bfin_mac_device,
  567. #if defined(CONFIG_NET_DSA_KSZ8893M) || defined(CONFIG_NET_DSA_KSZ8893M_MODULE)
  568. &ksz8893m_switch_device,
  569. #endif
  570. #endif
  571. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  572. &bfin_spi0_device,
  573. &bfin_spi1_device,
  574. #endif
  575. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  576. &bfin_uart_device,
  577. #endif
  578. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  579. #ifdef CONFIG_BFIN_SIR0
  580. &bfin_sir0_device,
  581. #endif
  582. #ifdef CONFIG_BFIN_SIR1
  583. &bfin_sir1_device,
  584. #endif
  585. #endif
  586. #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
  587. &i2c_bfin_twi_device,
  588. #endif
  589. #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
  590. &bfin_sport0_uart_device,
  591. &bfin_sport1_uart_device,
  592. #endif
  593. #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
  594. &bfin_device_gpiokeys,
  595. #endif
  596. #if defined(CONFIG_SDH_BFIN) || defined(CONFIG_SDH_BFIN_MODULE)
  597. &bf51x_sdh_device,
  598. #endif
  599. #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
  600. &ezbrd_flash_device,
  601. #endif
  602. &bfin_gpios_device,
  603. };
  604. static int __init ezbrd_init(void)
  605. {
  606. printk(KERN_INFO "%s(): registering device resources\n", __func__);
  607. i2c_register_board_info(0, bfin_i2c_board_info,
  608. ARRAY_SIZE(bfin_i2c_board_info));
  609. platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
  610. spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
  611. return 0;
  612. }
  613. arch_initcall(ezbrd_init);
  614. void native_machine_restart(char *cmd)
  615. {
  616. /* workaround reboot hang when booting from SPI */
  617. if ((bfin_read_SYSCR() & 0x7) == 0x3)
  618. bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
  619. }
  620. void bfin_get_ether_addr(char *addr)
  621. {
  622. /* the MAC is stored in OTP memory page 0xDF */
  623. u32 ret;
  624. u64 otp_mac;
  625. u32 (*otp_read)(u32 page, u32 flags, u64 *page_content) = (void *)0xEF00001A;
  626. ret = otp_read(0xDF, 0x00, &otp_mac);
  627. if (!(ret & 0x1)) {
  628. char *otp_mac_p = (char *)&otp_mac;
  629. for (ret = 0; ret < 6; ++ret)
  630. addr[ret] = otp_mac_p[5 - ret];
  631. }
  632. }
  633. EXPORT_SYMBOL(bfin_get_ether_addr);