dma.c 5.5 KB

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  1. /* linux/arch/arm/mach-s3c2412/dma.c
  2. *
  3. * Copyright (c) 2006 Simtec Electronics
  4. * Ben Dooks <ben@simtec.co.uk>
  5. *
  6. * S3C2412 DMA selection
  7. *
  8. * http://armlinux.simtec.co.uk/
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License version 2 as
  12. * published by the Free Software Foundation.
  13. */
  14. #include <linux/kernel.h>
  15. #include <linux/init.h>
  16. #include <linux/sysdev.h>
  17. #include <linux/serial_core.h>
  18. #include <linux/io.h>
  19. #include <mach/dma.h>
  20. #include <plat/dma.h>
  21. #include <plat/cpu.h>
  22. #include <plat/regs-serial.h>
  23. #include <mach/regs-gpio.h>
  24. #include <plat/regs-ac97.h>
  25. #include <mach/regs-mem.h>
  26. #include <mach/regs-lcd.h>
  27. #include <mach/regs-sdi.h>
  28. #include <plat/regs-s3c2412-iis.h>
  29. #include <plat/regs-iis.h>
  30. #include <plat/regs-spi.h>
  31. #define MAP(x) { (x)| DMA_CH_VALID, (x)| DMA_CH_VALID, (x)| DMA_CH_VALID, (x)| DMA_CH_VALID }
  32. static struct s3c24xx_dma_map __initdata s3c2412_dma_mappings[] = {
  33. [DMACH_XD0] = {
  34. .name = "xdreq0",
  35. .channels = MAP(S3C2412_DMAREQSEL_XDREQ0),
  36. .channels_rx = MAP(S3C2412_DMAREQSEL_XDREQ0),
  37. },
  38. [DMACH_XD1] = {
  39. .name = "xdreq1",
  40. .channels = MAP(S3C2412_DMAREQSEL_XDREQ1),
  41. .channels_rx = MAP(S3C2412_DMAREQSEL_XDREQ1),
  42. },
  43. [DMACH_SDI] = {
  44. .name = "sdi",
  45. .channels = MAP(S3C2412_DMAREQSEL_SDI),
  46. .channels_rx = MAP(S3C2412_DMAREQSEL_SDI),
  47. .hw_addr.to = S3C2410_PA_SDI + S3C2410_SDIDATA,
  48. .hw_addr.from = S3C2410_PA_SDI + S3C2410_SDIDATA,
  49. },
  50. [DMACH_SPI0] = {
  51. .name = "spi0",
  52. .channels = MAP(S3C2412_DMAREQSEL_SPI0TX),
  53. .channels_rx = MAP(S3C2412_DMAREQSEL_SPI0RX),
  54. .hw_addr.to = S3C2410_PA_SPI + S3C2410_SPTDAT,
  55. .hw_addr.from = S3C2410_PA_SPI + S3C2410_SPRDAT,
  56. },
  57. [DMACH_SPI1] = {
  58. .name = "spi1",
  59. .channels = MAP(S3C2412_DMAREQSEL_SPI1TX),
  60. .channels_rx = MAP(S3C2412_DMAREQSEL_SPI1RX),
  61. .hw_addr.to = S3C2410_PA_SPI + S3C2412_SPI1 + S3C2410_SPTDAT,
  62. .hw_addr.from = S3C2410_PA_SPI + S3C2412_SPI1 + S3C2410_SPRDAT,
  63. },
  64. [DMACH_UART0] = {
  65. .name = "uart0",
  66. .channels = MAP(S3C2412_DMAREQSEL_UART0_0),
  67. .channels_rx = MAP(S3C2412_DMAREQSEL_UART0_0),
  68. .hw_addr.to = S3C2410_PA_UART0 + S3C2410_UTXH,
  69. .hw_addr.from = S3C2410_PA_UART0 + S3C2410_URXH,
  70. },
  71. [DMACH_UART1] = {
  72. .name = "uart1",
  73. .channels = MAP(S3C2412_DMAREQSEL_UART1_0),
  74. .channels_rx = MAP(S3C2412_DMAREQSEL_UART1_0),
  75. .hw_addr.to = S3C2410_PA_UART1 + S3C2410_UTXH,
  76. .hw_addr.from = S3C2410_PA_UART1 + S3C2410_URXH,
  77. },
  78. [DMACH_UART2] = {
  79. .name = "uart2",
  80. .channels = MAP(S3C2412_DMAREQSEL_UART2_0),
  81. .channels_rx = MAP(S3C2412_DMAREQSEL_UART2_0),
  82. .hw_addr.to = S3C2410_PA_UART2 + S3C2410_UTXH,
  83. .hw_addr.from = S3C2410_PA_UART2 + S3C2410_URXH,
  84. },
  85. [DMACH_UART0_SRC2] = {
  86. .name = "uart0",
  87. .channels = MAP(S3C2412_DMAREQSEL_UART0_1),
  88. .channels_rx = MAP(S3C2412_DMAREQSEL_UART0_1),
  89. .hw_addr.to = S3C2410_PA_UART0 + S3C2410_UTXH,
  90. .hw_addr.from = S3C2410_PA_UART0 + S3C2410_URXH,
  91. },
  92. [DMACH_UART1_SRC2] = {
  93. .name = "uart1",
  94. .channels = MAP(S3C2412_DMAREQSEL_UART1_1),
  95. .channels_rx = MAP(S3C2412_DMAREQSEL_UART1_1),
  96. .hw_addr.to = S3C2410_PA_UART1 + S3C2410_UTXH,
  97. .hw_addr.from = S3C2410_PA_UART1 + S3C2410_URXH,
  98. },
  99. [DMACH_UART2_SRC2] = {
  100. .name = "uart2",
  101. .channels = MAP(S3C2412_DMAREQSEL_UART2_1),
  102. .channels_rx = MAP(S3C2412_DMAREQSEL_UART2_1),
  103. .hw_addr.to = S3C2410_PA_UART2 + S3C2410_UTXH,
  104. .hw_addr.from = S3C2410_PA_UART2 + S3C2410_URXH,
  105. },
  106. [DMACH_TIMER] = {
  107. .name = "timer",
  108. .channels = MAP(S3C2412_DMAREQSEL_TIMER),
  109. .channels_rx = MAP(S3C2412_DMAREQSEL_TIMER),
  110. },
  111. [DMACH_I2S_IN] = {
  112. .name = "i2s-sdi",
  113. .channels = MAP(S3C2412_DMAREQSEL_I2SRX),
  114. .channels_rx = MAP(S3C2412_DMAREQSEL_I2SRX),
  115. .hw_addr.from = S3C2410_PA_IIS + S3C2412_IISRXD,
  116. },
  117. [DMACH_I2S_OUT] = {
  118. .name = "i2s-sdo",
  119. .channels = MAP(S3C2412_DMAREQSEL_I2STX),
  120. .channels_rx = MAP(S3C2412_DMAREQSEL_I2STX),
  121. .hw_addr.to = S3C2410_PA_IIS + S3C2412_IISTXD,
  122. },
  123. [DMACH_USB_EP1] = {
  124. .name = "usb-ep1",
  125. .channels = MAP(S3C2412_DMAREQSEL_USBEP1),
  126. .channels_rx = MAP(S3C2412_DMAREQSEL_USBEP1),
  127. },
  128. [DMACH_USB_EP2] = {
  129. .name = "usb-ep2",
  130. .channels = MAP(S3C2412_DMAREQSEL_USBEP2),
  131. .channels_rx = MAP(S3C2412_DMAREQSEL_USBEP2),
  132. },
  133. [DMACH_USB_EP3] = {
  134. .name = "usb-ep3",
  135. .channels = MAP(S3C2412_DMAREQSEL_USBEP3),
  136. .channels_rx = MAP(S3C2412_DMAREQSEL_USBEP3),
  137. },
  138. [DMACH_USB_EP4] = {
  139. .name = "usb-ep4",
  140. .channels = MAP(S3C2412_DMAREQSEL_USBEP4),
  141. .channels_rx = MAP(S3C2412_DMAREQSEL_USBEP4),
  142. },
  143. };
  144. static void s3c2412_dma_direction(struct s3c2410_dma_chan *chan,
  145. struct s3c24xx_dma_map *map,
  146. enum s3c2410_dmasrc dir)
  147. {
  148. unsigned long chsel;
  149. if (dir == S3C2410_DMASRC_HW)
  150. chsel = map->channels_rx[0];
  151. else
  152. chsel = map->channels[0];
  153. chsel &= ~DMA_CH_VALID;
  154. chsel |= S3C2412_DMAREQSEL_HW;
  155. writel(chsel, chan->regs + S3C2412_DMA_DMAREQSEL);
  156. }
  157. static void s3c2412_dma_select(struct s3c2410_dma_chan *chan,
  158. struct s3c24xx_dma_map *map)
  159. {
  160. s3c2412_dma_direction(chan, map, chan->source);
  161. }
  162. static struct s3c24xx_dma_selection __initdata s3c2412_dma_sel = {
  163. .select = s3c2412_dma_select,
  164. .direction = s3c2412_dma_direction,
  165. .dcon_mask = 0,
  166. .map = s3c2412_dma_mappings,
  167. .map_size = ARRAY_SIZE(s3c2412_dma_mappings),
  168. };
  169. static int __init s3c2412_dma_add(struct sys_device *sysdev)
  170. {
  171. s3c2410_dma_init();
  172. return s3c24xx_dma_init_map(&s3c2412_dma_sel);
  173. }
  174. static struct sysdev_driver s3c2412_dma_driver = {
  175. .add = s3c2412_dma_add,
  176. };
  177. static int __init s3c2412_dma_init(void)
  178. {
  179. return sysdev_driver_register(&s3c2412_sysclass, &s3c2412_dma_driver);
  180. }
  181. arch_initcall(s3c2412_dma_init);