viper.c 22 KB

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  1. /*
  2. * linux/arch/arm/mach-pxa/viper.c
  3. *
  4. * Support for the Arcom VIPER SBC.
  5. *
  6. * Author: Ian Campbell
  7. * Created: Feb 03, 2003
  8. * Copyright: Arcom Control Systems
  9. *
  10. * Maintained by Marc Zyngier <maz@misterjones.org>
  11. * <marc.zyngier@altran.com>
  12. *
  13. * Based on lubbock.c:
  14. * Author: Nicolas Pitre
  15. * Created: Jun 15, 2001
  16. * Copyright: MontaVista Software Inc.
  17. *
  18. * This program is free software; you can redistribute it and/or modify
  19. * it under the terms of the GNU General Public License version 2 as
  20. * published by the Free Software Foundation.
  21. */
  22. #include <linux/types.h>
  23. #include <linux/memory.h>
  24. #include <linux/cpu.h>
  25. #include <linux/cpufreq.h>
  26. #include <linux/delay.h>
  27. #include <linux/fs.h>
  28. #include <linux/init.h>
  29. #include <linux/interrupt.h>
  30. #include <linux/major.h>
  31. #include <linux/module.h>
  32. #include <linux/pm.h>
  33. #include <linux/sched.h>
  34. #include <linux/gpio.h>
  35. #include <linux/i2c-gpio.h>
  36. #include <linux/serial_8250.h>
  37. #include <linux/smc91x.h>
  38. #include <linux/pwm_backlight.h>
  39. #include <linux/usb/isp116x.h>
  40. #include <linux/mtd/mtd.h>
  41. #include <linux/mtd/partitions.h>
  42. #include <linux/mtd/physmap.h>
  43. #include <mach/pxa25x.h>
  44. #include <mach/audio.h>
  45. #include <mach/pxafb.h>
  46. #include <mach/i2c.h>
  47. #include <mach/viper.h>
  48. #include <asm/setup.h>
  49. #include <asm/mach-types.h>
  50. #include <asm/irq.h>
  51. #include <asm/sizes.h>
  52. #include <asm/mach/arch.h>
  53. #include <asm/mach/map.h>
  54. #include <asm/mach/irq.h>
  55. #include "generic.h"
  56. #include "devices.h"
  57. static unsigned int icr;
  58. static void viper_icr_set_bit(unsigned int bit)
  59. {
  60. icr |= bit;
  61. VIPER_ICR = icr;
  62. }
  63. static void viper_icr_clear_bit(unsigned int bit)
  64. {
  65. icr &= ~bit;
  66. VIPER_ICR = icr;
  67. }
  68. /* This function is used from the pcmcia module to reset the CF */
  69. void viper_cf_rst(int state)
  70. {
  71. if (state)
  72. viper_icr_set_bit(VIPER_ICR_CF_RST);
  73. else
  74. viper_icr_clear_bit(VIPER_ICR_CF_RST);
  75. }
  76. EXPORT_SYMBOL(viper_cf_rst);
  77. /*
  78. * The CPLD version register was not present on VIPER boards prior to
  79. * v2i1. On v1 boards where the version register is not present we
  80. * will just read back the previous value from the databus.
  81. *
  82. * Therefore we do two reads. The first time we write 0 to the
  83. * (read-only) register before reading and the second time we write
  84. * 0xff first. If the two reads do not match or they read back as 0xff
  85. * or 0x00 then we have version 1 hardware.
  86. */
  87. static u8 viper_hw_version(void)
  88. {
  89. u8 v1, v2;
  90. unsigned long flags;
  91. local_irq_save(flags);
  92. VIPER_VERSION = 0;
  93. v1 = VIPER_VERSION;
  94. VIPER_VERSION = 0xff;
  95. v2 = VIPER_VERSION;
  96. v1 = (v1 != v2 || v1 == 0xff) ? 0 : v1;
  97. local_irq_restore(flags);
  98. return v1;
  99. }
  100. /* CPU sysdev */
  101. static int viper_cpu_suspend(struct sys_device *sysdev, pm_message_t state)
  102. {
  103. viper_icr_set_bit(VIPER_ICR_R_DIS);
  104. return 0;
  105. }
  106. static int viper_cpu_resume(struct sys_device *sysdev)
  107. {
  108. viper_icr_clear_bit(VIPER_ICR_R_DIS);
  109. return 0;
  110. }
  111. static struct sysdev_driver viper_cpu_sysdev_driver = {
  112. .suspend = viper_cpu_suspend,
  113. .resume = viper_cpu_resume,
  114. };
  115. static unsigned int current_voltage_divisor;
  116. /*
  117. * If force is not true then step from existing to new divisor. If
  118. * force is true then jump straight to the new divisor. Stepping is
  119. * used because if the jump in voltage is too large, the VCC can dip
  120. * too low and the regulator cuts out.
  121. *
  122. * force can be used to initialize the divisor to a know state by
  123. * setting the value for the current clock speed, since we are already
  124. * running at that speed we know the voltage should be pretty close so
  125. * the jump won't be too large
  126. */
  127. static void viper_set_core_cpu_voltage(unsigned long khz, int force)
  128. {
  129. int i = 0;
  130. unsigned int divisor = 0;
  131. const char *v;
  132. if (khz < 200000) {
  133. v = "1.0"; divisor = 0xfff;
  134. } else if (khz < 300000) {
  135. v = "1.1"; divisor = 0xde5;
  136. } else {
  137. v = "1.3"; divisor = 0x325;
  138. }
  139. pr_debug("viper: setting CPU core voltage to %sV at %d.%03dMHz\n",
  140. v, (int)khz / 1000, (int)khz % 1000);
  141. #define STEP 0x100
  142. do {
  143. int step;
  144. if (force)
  145. step = divisor;
  146. else if (current_voltage_divisor < divisor - STEP)
  147. step = current_voltage_divisor + STEP;
  148. else if (current_voltage_divisor > divisor + STEP)
  149. step = current_voltage_divisor - STEP;
  150. else
  151. step = divisor;
  152. force = 0;
  153. gpio_set_value(VIPER_PSU_CLK_GPIO, 0);
  154. gpio_set_value(VIPER_PSU_nCS_LD_GPIO, 0);
  155. for (i = 1 << 11 ; i > 0 ; i >>= 1) {
  156. udelay(1);
  157. gpio_set_value(VIPER_PSU_DATA_GPIO, step & i);
  158. udelay(1);
  159. gpio_set_value(VIPER_PSU_CLK_GPIO, 1);
  160. udelay(1);
  161. gpio_set_value(VIPER_PSU_CLK_GPIO, 0);
  162. }
  163. udelay(1);
  164. gpio_set_value(VIPER_PSU_nCS_LD_GPIO, 1);
  165. udelay(1);
  166. gpio_set_value(VIPER_PSU_nCS_LD_GPIO, 0);
  167. current_voltage_divisor = step;
  168. } while (current_voltage_divisor != divisor);
  169. }
  170. /* Interrupt handling */
  171. static unsigned long viper_irq_enabled_mask;
  172. static const int viper_isa_irqs[] = { 3, 4, 5, 6, 7, 10, 11, 12, 9, 14, 15 };
  173. static const int viper_isa_irq_map[] = {
  174. 0, /* ISA irq #0, invalid */
  175. 0, /* ISA irq #1, invalid */
  176. 0, /* ISA irq #2, invalid */
  177. 1 << 0, /* ISA irq #3 */
  178. 1 << 1, /* ISA irq #4 */
  179. 1 << 2, /* ISA irq #5 */
  180. 1 << 3, /* ISA irq #6 */
  181. 1 << 4, /* ISA irq #7 */
  182. 0, /* ISA irq #8, invalid */
  183. 1 << 8, /* ISA irq #9 */
  184. 1 << 5, /* ISA irq #10 */
  185. 1 << 6, /* ISA irq #11 */
  186. 1 << 7, /* ISA irq #12 */
  187. 0, /* ISA irq #13, invalid */
  188. 1 << 9, /* ISA irq #14 */
  189. 1 << 10, /* ISA irq #15 */
  190. };
  191. static inline int viper_irq_to_bitmask(unsigned int irq)
  192. {
  193. return viper_isa_irq_map[irq - PXA_ISA_IRQ(0)];
  194. }
  195. static inline int viper_bit_to_irq(int bit)
  196. {
  197. return viper_isa_irqs[bit] + PXA_ISA_IRQ(0);
  198. }
  199. static void viper_ack_irq(unsigned int irq)
  200. {
  201. int viper_irq = viper_irq_to_bitmask(irq);
  202. if (viper_irq & 0xff)
  203. VIPER_LO_IRQ_STATUS = viper_irq;
  204. else
  205. VIPER_HI_IRQ_STATUS = (viper_irq >> 8);
  206. }
  207. static void viper_mask_irq(unsigned int irq)
  208. {
  209. viper_irq_enabled_mask &= ~(viper_irq_to_bitmask(irq));
  210. }
  211. static void viper_unmask_irq(unsigned int irq)
  212. {
  213. viper_irq_enabled_mask |= viper_irq_to_bitmask(irq);
  214. }
  215. static inline unsigned long viper_irq_pending(void)
  216. {
  217. return (VIPER_HI_IRQ_STATUS << 8 | VIPER_LO_IRQ_STATUS) &
  218. viper_irq_enabled_mask;
  219. }
  220. static void viper_irq_handler(unsigned int irq, struct irq_desc *desc)
  221. {
  222. unsigned long pending;
  223. pending = viper_irq_pending();
  224. do {
  225. /* we're in a chained irq handler,
  226. * so ack the interrupt by hand */
  227. GEDR(VIPER_CPLD_GPIO) = GPIO_bit(VIPER_CPLD_GPIO);
  228. if (likely(pending)) {
  229. irq = viper_bit_to_irq(__ffs(pending));
  230. generic_handle_irq(irq);
  231. }
  232. pending = viper_irq_pending();
  233. } while (pending);
  234. }
  235. static struct irq_chip viper_irq_chip = {
  236. .name = "ISA",
  237. .ack = viper_ack_irq,
  238. .mask = viper_mask_irq,
  239. .unmask = viper_unmask_irq
  240. };
  241. static void __init viper_init_irq(void)
  242. {
  243. int level;
  244. int isa_irq;
  245. pxa25x_init_irq();
  246. /* setup ISA IRQs */
  247. for (level = 0; level < ARRAY_SIZE(viper_isa_irqs); level++) {
  248. isa_irq = viper_bit_to_irq(level);
  249. set_irq_chip(isa_irq, &viper_irq_chip);
  250. set_irq_handler(isa_irq, handle_edge_irq);
  251. set_irq_flags(isa_irq, IRQF_VALID | IRQF_PROBE);
  252. }
  253. set_irq_chained_handler(gpio_to_irq(VIPER_CPLD_GPIO),
  254. viper_irq_handler);
  255. set_irq_type(gpio_to_irq(VIPER_CPLD_GPIO), IRQ_TYPE_EDGE_BOTH);
  256. #ifndef CONFIG_SERIAL_PXA
  257. /*
  258. * 8250 doesn't support IRQ_TYPE being passed as part
  259. * of the plat_serial8250_port structure...
  260. */
  261. set_irq_type(gpio_to_irq(VIPER_UARTA_GPIO), IRQ_TYPE_EDGE_RISING);
  262. set_irq_type(gpio_to_irq(VIPER_UARTB_GPIO), IRQ_TYPE_EDGE_RISING);
  263. #endif
  264. }
  265. /* Flat Panel */
  266. static struct pxafb_mode_info fb_mode_info[] = {
  267. {
  268. .pixclock = 157500,
  269. .xres = 320,
  270. .yres = 240,
  271. .bpp = 16,
  272. .hsync_len = 63,
  273. .left_margin = 7,
  274. .right_margin = 13,
  275. .vsync_len = 20,
  276. .upper_margin = 0,
  277. .lower_margin = 0,
  278. .sync = 0,
  279. },
  280. };
  281. static struct pxafb_mach_info fb_info = {
  282. .modes = fb_mode_info,
  283. .num_modes = 1,
  284. .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL,
  285. };
  286. static int viper_backlight_init(struct device *dev)
  287. {
  288. int ret;
  289. /* GPIO9 and 10 control FB backlight. Initialise to off */
  290. ret = gpio_request(VIPER_BCKLIGHT_EN_GPIO, "Backlight");
  291. if (ret)
  292. goto err_request_bckl;
  293. ret = gpio_request(VIPER_LCD_EN_GPIO, "LCD");
  294. if (ret)
  295. goto err_request_lcd;
  296. ret = gpio_direction_output(VIPER_BCKLIGHT_EN_GPIO, 0);
  297. if (ret)
  298. goto err_dir;
  299. ret = gpio_direction_output(VIPER_LCD_EN_GPIO, 0);
  300. if (ret)
  301. goto err_dir;
  302. return 0;
  303. err_dir:
  304. gpio_free(VIPER_LCD_EN_GPIO);
  305. err_request_lcd:
  306. gpio_free(VIPER_BCKLIGHT_EN_GPIO);
  307. err_request_bckl:
  308. dev_err(dev, "Failed to setup LCD GPIOs\n");
  309. return ret;
  310. }
  311. static int viper_backlight_notify(int brightness)
  312. {
  313. gpio_set_value(VIPER_LCD_EN_GPIO, !!brightness);
  314. gpio_set_value(VIPER_BCKLIGHT_EN_GPIO, !!brightness);
  315. return brightness;
  316. }
  317. static void viper_backlight_exit(struct device *dev)
  318. {
  319. gpio_free(VIPER_LCD_EN_GPIO);
  320. gpio_free(VIPER_BCKLIGHT_EN_GPIO);
  321. }
  322. static struct platform_pwm_backlight_data viper_backlight_data = {
  323. .pwm_id = 0,
  324. .max_brightness = 100,
  325. .dft_brightness = 100,
  326. .pwm_period_ns = 1000000,
  327. .init = viper_backlight_init,
  328. .notify = viper_backlight_notify,
  329. .exit = viper_backlight_exit,
  330. };
  331. static struct platform_device viper_backlight_device = {
  332. .name = "pwm-backlight",
  333. .dev = {
  334. .parent = &pxa25x_device_pwm0.dev,
  335. .platform_data = &viper_backlight_data,
  336. },
  337. };
  338. /* Ethernet */
  339. static struct resource smc91x_resources[] = {
  340. [0] = {
  341. .name = "smc91x-regs",
  342. .start = VIPER_ETH_PHYS + 0x300,
  343. .end = VIPER_ETH_PHYS + 0x30f,
  344. .flags = IORESOURCE_MEM,
  345. },
  346. [1] = {
  347. .start = gpio_to_irq(VIPER_ETH_GPIO),
  348. .end = gpio_to_irq(VIPER_ETH_GPIO),
  349. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
  350. },
  351. [2] = {
  352. .name = "smc91x-data32",
  353. .start = VIPER_ETH_DATA_PHYS,
  354. .end = VIPER_ETH_DATA_PHYS + 3,
  355. .flags = IORESOURCE_MEM,
  356. },
  357. };
  358. static struct smc91x_platdata viper_smc91x_info = {
  359. .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
  360. .leda = RPC_LED_100_10,
  361. .ledb = RPC_LED_TX_RX,
  362. };
  363. static struct platform_device smc91x_device = {
  364. .name = "smc91x",
  365. .id = -1,
  366. .num_resources = ARRAY_SIZE(smc91x_resources),
  367. .resource = smc91x_resources,
  368. .dev = {
  369. .platform_data = &viper_smc91x_info,
  370. },
  371. };
  372. /* i2c */
  373. static struct i2c_gpio_platform_data i2c_bus_data = {
  374. .sda_pin = VIPER_RTC_I2C_SDA_GPIO,
  375. .scl_pin = VIPER_RTC_I2C_SCL_GPIO,
  376. .udelay = 10,
  377. .timeout = 100,
  378. };
  379. static struct platform_device i2c_bus_device = {
  380. .name = "i2c-gpio",
  381. .id = 1, /* pxa2xx-i2c is bus 0, so start at 1 */
  382. .dev = {
  383. .platform_data = &i2c_bus_data,
  384. }
  385. };
  386. static struct i2c_board_info __initdata viper_i2c_devices[] = {
  387. {
  388. I2C_BOARD_INFO("ds1338", 0x68),
  389. },
  390. };
  391. /*
  392. * Serial configuration:
  393. * You can either have the standard PXA ports driven by the PXA driver,
  394. * or all the ports (PXA + 16850) driven by the 8250 driver.
  395. * Choose your poison.
  396. */
  397. static struct resource viper_serial_resources[] = {
  398. #ifndef CONFIG_SERIAL_PXA
  399. {
  400. .start = 0x40100000,
  401. .end = 0x4010001f,
  402. .flags = IORESOURCE_MEM,
  403. },
  404. {
  405. .start = 0x40200000,
  406. .end = 0x4020001f,
  407. .flags = IORESOURCE_MEM,
  408. },
  409. {
  410. .start = 0x40700000,
  411. .end = 0x4070001f,
  412. .flags = IORESOURCE_MEM,
  413. },
  414. {
  415. .start = VIPER_UARTA_PHYS,
  416. .end = VIPER_UARTA_PHYS + 0xf,
  417. .flags = IORESOURCE_MEM,
  418. },
  419. {
  420. .start = VIPER_UARTB_PHYS,
  421. .end = VIPER_UARTB_PHYS + 0xf,
  422. .flags = IORESOURCE_MEM,
  423. },
  424. #else
  425. {
  426. 0,
  427. },
  428. #endif
  429. };
  430. static struct plat_serial8250_port serial_platform_data[] = {
  431. #ifndef CONFIG_SERIAL_PXA
  432. /* Internal UARTs */
  433. {
  434. .membase = (void *)&FFUART,
  435. .mapbase = __PREG(FFUART),
  436. .irq = IRQ_FFUART,
  437. .uartclk = 921600 * 16,
  438. .regshift = 2,
  439. .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
  440. .iotype = UPIO_MEM,
  441. },
  442. {
  443. .membase = (void *)&BTUART,
  444. .mapbase = __PREG(BTUART),
  445. .irq = IRQ_BTUART,
  446. .uartclk = 921600 * 16,
  447. .regshift = 2,
  448. .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
  449. .iotype = UPIO_MEM,
  450. },
  451. {
  452. .membase = (void *)&STUART,
  453. .mapbase = __PREG(STUART),
  454. .irq = IRQ_STUART,
  455. .uartclk = 921600 * 16,
  456. .regshift = 2,
  457. .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
  458. .iotype = UPIO_MEM,
  459. },
  460. /* External UARTs */
  461. {
  462. .mapbase = VIPER_UARTA_PHYS,
  463. .irq = gpio_to_irq(VIPER_UARTA_GPIO),
  464. .uartclk = 1843200,
  465. .regshift = 1,
  466. .iotype = UPIO_MEM,
  467. .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP |
  468. UPF_SKIP_TEST,
  469. },
  470. {
  471. .mapbase = VIPER_UARTB_PHYS,
  472. .irq = gpio_to_irq(VIPER_UARTB_GPIO),
  473. .uartclk = 1843200,
  474. .regshift = 1,
  475. .iotype = UPIO_MEM,
  476. .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP |
  477. UPF_SKIP_TEST,
  478. },
  479. #endif
  480. { },
  481. };
  482. static struct platform_device serial_device = {
  483. .name = "serial8250",
  484. .id = 0,
  485. .dev = {
  486. .platform_data = serial_platform_data,
  487. },
  488. .num_resources = ARRAY_SIZE(viper_serial_resources),
  489. .resource = viper_serial_resources,
  490. };
  491. /* USB */
  492. static void isp116x_delay(struct device *dev, int delay)
  493. {
  494. ndelay(delay);
  495. }
  496. static struct resource isp116x_resources[] = {
  497. [0] = { /* DATA */
  498. .start = VIPER_USB_PHYS + 0,
  499. .end = VIPER_USB_PHYS + 1,
  500. .flags = IORESOURCE_MEM,
  501. },
  502. [1] = { /* ADDR */
  503. .start = VIPER_USB_PHYS + 2,
  504. .end = VIPER_USB_PHYS + 3,
  505. .flags = IORESOURCE_MEM,
  506. },
  507. [2] = {
  508. .start = gpio_to_irq(VIPER_USB_GPIO),
  509. .end = gpio_to_irq(VIPER_USB_GPIO),
  510. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
  511. },
  512. };
  513. /* (DataBusWidth16|AnalogOCEnable|DREQOutputPolarity|DownstreamPort15KRSel ) */
  514. static struct isp116x_platform_data isp116x_platform_data = {
  515. /* Enable internal resistors on downstream ports */
  516. .sel15Kres = 1,
  517. /* On-chip overcurrent protection */
  518. .oc_enable = 1,
  519. /* INT output polarity */
  520. .int_act_high = 1,
  521. /* INT edge or level triggered */
  522. .int_edge_triggered = 0,
  523. /* WAKEUP pin connected - NOT SUPPORTED */
  524. /* .remote_wakeup_connected = 0, */
  525. /* Wakeup by devices on usb bus enabled */
  526. .remote_wakeup_enable = 0,
  527. .delay = isp116x_delay,
  528. };
  529. static struct platform_device isp116x_device = {
  530. .name = "isp116x-hcd",
  531. .id = -1,
  532. .num_resources = ARRAY_SIZE(isp116x_resources),
  533. .resource = isp116x_resources,
  534. .dev = {
  535. .platform_data = &isp116x_platform_data,
  536. },
  537. };
  538. /* MTD */
  539. static struct resource mtd_resources[] = {
  540. [0] = { /* RedBoot config + filesystem flash */
  541. .start = VIPER_FLASH_PHYS,
  542. .end = VIPER_FLASH_PHYS + SZ_32M - 1,
  543. .flags = IORESOURCE_MEM,
  544. },
  545. [1] = { /* Boot flash */
  546. .start = VIPER_BOOT_PHYS,
  547. .end = VIPER_BOOT_PHYS + SZ_1M - 1,
  548. .flags = IORESOURCE_MEM,
  549. },
  550. [2] = { /*
  551. * SRAM size is actually 256KB, 8bits, with a sparse mapping
  552. * (each byte is on a 16bit boundary).
  553. */
  554. .start = _VIPER_SRAM_BASE,
  555. .end = _VIPER_SRAM_BASE + SZ_512K - 1,
  556. .flags = IORESOURCE_MEM,
  557. },
  558. };
  559. static struct mtd_partition viper_boot_flash_partition = {
  560. .name = "RedBoot",
  561. .size = SZ_1M,
  562. .offset = 0,
  563. .mask_flags = MTD_WRITEABLE, /* force R/O */
  564. };
  565. static struct physmap_flash_data viper_flash_data[] = {
  566. [0] = {
  567. .width = 2,
  568. .parts = NULL,
  569. .nr_parts = 0,
  570. },
  571. [1] = {
  572. .width = 2,
  573. .parts = &viper_boot_flash_partition,
  574. .nr_parts = 1,
  575. },
  576. };
  577. static struct platform_device viper_mtd_devices[] = {
  578. [0] = {
  579. .name = "physmap-flash",
  580. .id = 0,
  581. .dev = {
  582. .platform_data = &viper_flash_data[0],
  583. },
  584. .resource = &mtd_resources[0],
  585. .num_resources = 1,
  586. },
  587. [1] = {
  588. .name = "physmap-flash",
  589. .id = 1,
  590. .dev = {
  591. .platform_data = &viper_flash_data[1],
  592. },
  593. .resource = &mtd_resources[1],
  594. .num_resources = 1,
  595. },
  596. };
  597. static struct platform_device *viper_devs[] __initdata = {
  598. &smc91x_device,
  599. &i2c_bus_device,
  600. &serial_device,
  601. &isp116x_device,
  602. &viper_mtd_devices[0],
  603. &viper_mtd_devices[1],
  604. &viper_backlight_device,
  605. };
  606. static mfp_cfg_t viper_pin_config[] __initdata = {
  607. /* Chip selects */
  608. GPIO15_nCS_1,
  609. GPIO78_nCS_2,
  610. GPIO79_nCS_3,
  611. GPIO80_nCS_4,
  612. GPIO33_nCS_5,
  613. /* FP Backlight */
  614. GPIO9_GPIO, /* VIPER_BCKLIGHT_EN_GPIO */
  615. GPIO10_GPIO, /* VIPER_LCD_EN_GPIO */
  616. GPIO16_PWM0_OUT,
  617. /* Ethernet PHY Ready */
  618. GPIO18_RDY,
  619. /* Serial shutdown */
  620. GPIO12_GPIO | MFP_LPM_DRIVE_HIGH, /* VIPER_UART_SHDN_GPIO */
  621. /* Compact-Flash / PC104 */
  622. GPIO48_nPOE,
  623. GPIO49_nPWE,
  624. GPIO50_nPIOR,
  625. GPIO51_nPIOW,
  626. GPIO52_nPCE_1,
  627. GPIO53_nPCE_2,
  628. GPIO54_nPSKTSEL,
  629. GPIO55_nPREG,
  630. GPIO56_nPWAIT,
  631. GPIO57_nIOIS16,
  632. GPIO8_GPIO, /* VIPER_CF_RDY_GPIO */
  633. GPIO32_GPIO, /* VIPER_CF_CD_GPIO */
  634. GPIO82_GPIO, /* VIPER_CF_POWER_GPIO */
  635. /* Integrated UPS control */
  636. GPIO20_GPIO, /* VIPER_UPS_GPIO */
  637. /* Vcc regulator control */
  638. GPIO6_GPIO, /* VIPER_PSU_DATA_GPIO */
  639. GPIO11_GPIO, /* VIPER_PSU_CLK_GPIO */
  640. GPIO19_GPIO, /* VIPER_PSU_nCS_LD_GPIO */
  641. /* i2c busses */
  642. GPIO26_GPIO, /* VIPER_TPM_I2C_SDA_GPIO */
  643. GPIO27_GPIO, /* VIPER_TPM_I2C_SCL_GPIO */
  644. GPIO83_GPIO, /* VIPER_RTC_I2C_SDA_GPIO */
  645. GPIO84_GPIO, /* VIPER_RTC_I2C_SCL_GPIO */
  646. /* PC/104 Interrupt */
  647. GPIO1_GPIO | WAKEUP_ON_EDGE_RISE, /* VIPER_CPLD_GPIO */
  648. };
  649. static unsigned long viper_tpm;
  650. static int __init viper_tpm_setup(char *str)
  651. {
  652. strict_strtoul(str, 10, &viper_tpm);
  653. return 1;
  654. }
  655. __setup("tpm=", viper_tpm_setup);
  656. static void __init viper_tpm_init(void)
  657. {
  658. struct platform_device *tpm_device;
  659. struct i2c_gpio_platform_data i2c_tpm_data = {
  660. .sda_pin = VIPER_TPM_I2C_SDA_GPIO,
  661. .scl_pin = VIPER_TPM_I2C_SCL_GPIO,
  662. .udelay = 10,
  663. .timeout = 100,
  664. };
  665. char *errstr;
  666. /* Allocate TPM i2c bus if requested */
  667. if (!viper_tpm)
  668. return;
  669. tpm_device = platform_device_alloc("i2c-gpio", 2);
  670. if (tpm_device) {
  671. if (!platform_device_add_data(tpm_device,
  672. &i2c_tpm_data,
  673. sizeof(i2c_tpm_data))) {
  674. if (platform_device_add(tpm_device)) {
  675. errstr = "register TPM i2c bus";
  676. goto error_free_tpm;
  677. }
  678. } else {
  679. errstr = "allocate TPM i2c bus data";
  680. goto error_free_tpm;
  681. }
  682. } else {
  683. errstr = "allocate TPM i2c device";
  684. goto error_tpm;
  685. }
  686. return;
  687. error_free_tpm:
  688. kfree(tpm_device);
  689. error_tpm:
  690. pr_err("viper: Couldn't %s, giving up\n", errstr);
  691. }
  692. static void __init viper_init_vcore_gpios(void)
  693. {
  694. if (gpio_request(VIPER_PSU_DATA_GPIO, "PSU data"))
  695. goto err_request_data;
  696. if (gpio_request(VIPER_PSU_CLK_GPIO, "PSU clock"))
  697. goto err_request_clk;
  698. if (gpio_request(VIPER_PSU_nCS_LD_GPIO, "PSU cs"))
  699. goto err_request_cs;
  700. if (gpio_direction_output(VIPER_PSU_DATA_GPIO, 0) ||
  701. gpio_direction_output(VIPER_PSU_CLK_GPIO, 0) ||
  702. gpio_direction_output(VIPER_PSU_nCS_LD_GPIO, 0))
  703. goto err_dir;
  704. /* c/should assume redboot set the correct level ??? */
  705. viper_set_core_cpu_voltage(get_clk_frequency_khz(0), 1);
  706. return;
  707. err_dir:
  708. gpio_free(VIPER_PSU_nCS_LD_GPIO);
  709. err_request_cs:
  710. gpio_free(VIPER_PSU_CLK_GPIO);
  711. err_request_clk:
  712. gpio_free(VIPER_PSU_DATA_GPIO);
  713. err_request_data:
  714. pr_err("viper: Failed to setup vcore control GPIOs\n");
  715. }
  716. static void __init viper_init_serial_gpio(void)
  717. {
  718. if (gpio_request(VIPER_UART_SHDN_GPIO, "UARTs shutdown"))
  719. goto err_request;
  720. if (gpio_direction_output(VIPER_UART_SHDN_GPIO, 0))
  721. goto err_dir;
  722. return;
  723. err_dir:
  724. gpio_free(VIPER_UART_SHDN_GPIO);
  725. err_request:
  726. pr_err("viper: Failed to setup UART shutdown GPIO\n");
  727. }
  728. #ifdef CONFIG_CPU_FREQ
  729. static int viper_cpufreq_notifier(struct notifier_block *nb,
  730. unsigned long val, void *data)
  731. {
  732. struct cpufreq_freqs *freq = data;
  733. /* TODO: Adjust timings??? */
  734. switch (val) {
  735. case CPUFREQ_PRECHANGE:
  736. if (freq->old < freq->new) {
  737. /* we are getting faster so raise the voltage
  738. * before we change freq */
  739. viper_set_core_cpu_voltage(freq->new, 0);
  740. }
  741. break;
  742. case CPUFREQ_POSTCHANGE:
  743. if (freq->old > freq->new) {
  744. /* we are slowing down so drop the power
  745. * after we change freq */
  746. viper_set_core_cpu_voltage(freq->new, 0);
  747. }
  748. break;
  749. case CPUFREQ_RESUMECHANGE:
  750. viper_set_core_cpu_voltage(freq->new, 0);
  751. break;
  752. default:
  753. /* ignore */
  754. break;
  755. }
  756. return 0;
  757. }
  758. static struct notifier_block viper_cpufreq_notifier_block = {
  759. .notifier_call = viper_cpufreq_notifier
  760. };
  761. static void __init viper_init_cpufreq(void)
  762. {
  763. if (cpufreq_register_notifier(&viper_cpufreq_notifier_block,
  764. CPUFREQ_TRANSITION_NOTIFIER))
  765. pr_err("viper: Failed to setup cpufreq notifier\n");
  766. }
  767. #else
  768. static inline void viper_init_cpufreq(void) {}
  769. #endif
  770. static void viper_power_off(void)
  771. {
  772. pr_notice("Shutting off UPS\n");
  773. gpio_set_value(VIPER_UPS_GPIO, 1);
  774. /* Spin to death... */
  775. while (1);
  776. }
  777. static void __init viper_init(void)
  778. {
  779. u8 version;
  780. pm_power_off = viper_power_off;
  781. pxa2xx_mfp_config(ARRAY_AND_SIZE(viper_pin_config));
  782. /* Wake-up serial console */
  783. viper_init_serial_gpio();
  784. set_pxa_fb_info(&fb_info);
  785. /* v1 hardware cannot use the datacs line */
  786. version = viper_hw_version();
  787. if (version == 0)
  788. smc91x_device.num_resources--;
  789. pxa_set_i2c_info(NULL);
  790. platform_add_devices(viper_devs, ARRAY_SIZE(viper_devs));
  791. viper_init_vcore_gpios();
  792. viper_init_cpufreq();
  793. sysdev_driver_register(&cpu_sysdev_class, &viper_cpu_sysdev_driver);
  794. if (version) {
  795. pr_info("viper: hardware v%di%d detected. "
  796. "CPLD revision %d.\n",
  797. VIPER_BOARD_VERSION(version),
  798. VIPER_BOARD_ISSUE(version),
  799. VIPER_CPLD_REVISION(version));
  800. system_rev = (VIPER_BOARD_VERSION(version) << 8) |
  801. (VIPER_BOARD_ISSUE(version) << 4) |
  802. VIPER_CPLD_REVISION(version);
  803. } else {
  804. pr_info("viper: No version register.\n");
  805. }
  806. i2c_register_board_info(1, ARRAY_AND_SIZE(viper_i2c_devices));
  807. viper_tpm_init();
  808. pxa_set_ac97_info(NULL);
  809. }
  810. static struct map_desc viper_io_desc[] __initdata = {
  811. {
  812. .virtual = VIPER_CPLD_BASE,
  813. .pfn = __phys_to_pfn(VIPER_CPLD_PHYS),
  814. .length = 0x00300000,
  815. .type = MT_DEVICE,
  816. },
  817. {
  818. .virtual = VIPER_PC104IO_BASE,
  819. .pfn = __phys_to_pfn(0x30000000),
  820. .length = 0x00800000,
  821. .type = MT_DEVICE,
  822. },
  823. };
  824. static void __init viper_map_io(void)
  825. {
  826. pxa_map_io();
  827. iotable_init(viper_io_desc, ARRAY_SIZE(viper_io_desc));
  828. PCFR |= PCFR_OPDE;
  829. }
  830. MACHINE_START(VIPER, "Arcom/Eurotech VIPER SBC")
  831. /* Maintainer: Marc Zyngier <maz@misterjones.org> */
  832. .phys_io = 0x40000000,
  833. .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
  834. .boot_params = 0xa0000100,
  835. .map_io = viper_map_io,
  836. .init_irq = viper_init_irq,
  837. .timer = &pxa_timer,
  838. .init_machine = viper_init,
  839. MACHINE_END