cs4231.c 57 KB

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  1. /*
  2. * Driver for CS4231 sound chips found on Sparcs.
  3. * Copyright (C) 2002, 2008 David S. Miller <davem@davemloft.net>
  4. *
  5. * Based entirely upon drivers/sbus/audio/cs4231.c which is:
  6. * Copyright (C) 1996, 1997, 1998 Derrick J Brashear (shadow@andrew.cmu.edu)
  7. * and also sound/isa/cs423x/cs4231_lib.c which is:
  8. * Copyright (c) by Jaroslav Kysela <perex@perex.cz>
  9. */
  10. #include <linux/module.h>
  11. #include <linux/kernel.h>
  12. #include <linux/slab.h>
  13. #include <linux/delay.h>
  14. #include <linux/init.h>
  15. #include <linux/interrupt.h>
  16. #include <linux/moduleparam.h>
  17. #include <linux/irq.h>
  18. #include <linux/io.h>
  19. #include <linux/of.h>
  20. #include <linux/of_device.h>
  21. #include <sound/core.h>
  22. #include <sound/pcm.h>
  23. #include <sound/info.h>
  24. #include <sound/control.h>
  25. #include <sound/timer.h>
  26. #include <sound/initval.h>
  27. #include <sound/pcm_params.h>
  28. #ifdef CONFIG_SBUS
  29. #define SBUS_SUPPORT
  30. #endif
  31. #if defined(CONFIG_PCI) && defined(CONFIG_SPARC64)
  32. #define EBUS_SUPPORT
  33. #include <linux/pci.h>
  34. #include <asm/ebus.h>
  35. #include <asm/ebus_dma.h>
  36. #endif
  37. static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
  38. static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
  39. /* Enable this card */
  40. static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;
  41. module_param_array(index, int, NULL, 0444);
  42. MODULE_PARM_DESC(index, "Index value for Sun CS4231 soundcard.");
  43. module_param_array(id, charp, NULL, 0444);
  44. MODULE_PARM_DESC(id, "ID string for Sun CS4231 soundcard.");
  45. module_param_array(enable, bool, NULL, 0444);
  46. MODULE_PARM_DESC(enable, "Enable Sun CS4231 soundcard.");
  47. MODULE_AUTHOR("Jaroslav Kysela, Derrick J. Brashear and David S. Miller");
  48. MODULE_DESCRIPTION("Sun CS4231");
  49. MODULE_LICENSE("GPL");
  50. MODULE_SUPPORTED_DEVICE("{{Sun,CS4231}}");
  51. #ifdef SBUS_SUPPORT
  52. struct sbus_dma_info {
  53. spinlock_t lock; /* DMA access lock */
  54. int dir;
  55. void __iomem *regs;
  56. };
  57. #endif
  58. struct snd_cs4231;
  59. struct cs4231_dma_control {
  60. void (*prepare)(struct cs4231_dma_control *dma_cont,
  61. int dir);
  62. void (*enable)(struct cs4231_dma_control *dma_cont, int on);
  63. int (*request)(struct cs4231_dma_control *dma_cont,
  64. dma_addr_t bus_addr, size_t len);
  65. unsigned int (*address)(struct cs4231_dma_control *dma_cont);
  66. void (*preallocate)(struct snd_cs4231 *chip,
  67. struct snd_pcm *pcm);
  68. #ifdef EBUS_SUPPORT
  69. struct ebus_dma_info ebus_info;
  70. #endif
  71. #ifdef SBUS_SUPPORT
  72. struct sbus_dma_info sbus_info;
  73. #endif
  74. };
  75. struct snd_cs4231 {
  76. spinlock_t lock; /* registers access lock */
  77. void __iomem *port;
  78. struct cs4231_dma_control p_dma;
  79. struct cs4231_dma_control c_dma;
  80. u32 flags;
  81. #define CS4231_FLAG_EBUS 0x00000001
  82. #define CS4231_FLAG_PLAYBACK 0x00000002
  83. #define CS4231_FLAG_CAPTURE 0x00000004
  84. struct snd_card *card;
  85. struct snd_pcm *pcm;
  86. struct snd_pcm_substream *playback_substream;
  87. unsigned int p_periods_sent;
  88. struct snd_pcm_substream *capture_substream;
  89. unsigned int c_periods_sent;
  90. struct snd_timer *timer;
  91. unsigned short mode;
  92. #define CS4231_MODE_NONE 0x0000
  93. #define CS4231_MODE_PLAY 0x0001
  94. #define CS4231_MODE_RECORD 0x0002
  95. #define CS4231_MODE_TIMER 0x0004
  96. #define CS4231_MODE_OPEN (CS4231_MODE_PLAY | CS4231_MODE_RECORD | \
  97. CS4231_MODE_TIMER)
  98. unsigned char image[32]; /* registers image */
  99. int mce_bit;
  100. int calibrate_mute;
  101. struct mutex mce_mutex; /* mutex for mce register */
  102. struct mutex open_mutex; /* mutex for ALSA open/close */
  103. union {
  104. #ifdef SBUS_SUPPORT
  105. struct of_device *op;
  106. #endif
  107. #ifdef EBUS_SUPPORT
  108. struct pci_dev *pdev;
  109. #endif
  110. } dev_u;
  111. unsigned int irq[2];
  112. unsigned int regs_size;
  113. struct snd_cs4231 *next;
  114. };
  115. static struct snd_cs4231 *cs4231_list;
  116. /* Eventually we can use sound/isa/cs423x/cs4231_lib.c directly, but for
  117. * now.... -DaveM
  118. */
  119. /* IO ports */
  120. #include <sound/cs4231-regs.h>
  121. /* XXX offsets are different than PC ISA chips... */
  122. #define CS4231U(chip, x) ((chip)->port + ((c_d_c_CS4231##x) << 2))
  123. /* SBUS DMA register defines. */
  124. #define APCCSR 0x10UL /* APC DMA CSR */
  125. #define APCCVA 0x20UL /* APC Capture DMA Address */
  126. #define APCCC 0x24UL /* APC Capture Count */
  127. #define APCCNVA 0x28UL /* APC Capture DMA Next Address */
  128. #define APCCNC 0x2cUL /* APC Capture Next Count */
  129. #define APCPVA 0x30UL /* APC Play DMA Address */
  130. #define APCPC 0x34UL /* APC Play Count */
  131. #define APCPNVA 0x38UL /* APC Play DMA Next Address */
  132. #define APCPNC 0x3cUL /* APC Play Next Count */
  133. /* Defines for SBUS DMA-routines */
  134. #define APCVA 0x0UL /* APC DMA Address */
  135. #define APCC 0x4UL /* APC Count */
  136. #define APCNVA 0x8UL /* APC DMA Next Address */
  137. #define APCNC 0xcUL /* APC Next Count */
  138. #define APC_PLAY 0x30UL /* Play registers start at 0x30 */
  139. #define APC_RECORD 0x20UL /* Record registers start at 0x20 */
  140. /* APCCSR bits */
  141. #define APC_INT_PENDING 0x800000 /* Interrupt Pending */
  142. #define APC_PLAY_INT 0x400000 /* Playback interrupt */
  143. #define APC_CAPT_INT 0x200000 /* Capture interrupt */
  144. #define APC_GENL_INT 0x100000 /* General interrupt */
  145. #define APC_XINT_ENA 0x80000 /* General ext int. enable */
  146. #define APC_XINT_PLAY 0x40000 /* Playback ext intr */
  147. #define APC_XINT_CAPT 0x20000 /* Capture ext intr */
  148. #define APC_XINT_GENL 0x10000 /* Error ext intr */
  149. #define APC_XINT_EMPT 0x8000 /* Pipe empty interrupt (0 write to pva) */
  150. #define APC_XINT_PEMP 0x4000 /* Play pipe empty (pva and pnva not set) */
  151. #define APC_XINT_PNVA 0x2000 /* Playback NVA dirty */
  152. #define APC_XINT_PENA 0x1000 /* play pipe empty Int enable */
  153. #define APC_XINT_COVF 0x800 /* Cap data dropped on floor */
  154. #define APC_XINT_CNVA 0x400 /* Capture NVA dirty */
  155. #define APC_XINT_CEMP 0x200 /* Capture pipe empty (cva and cnva not set) */
  156. #define APC_XINT_CENA 0x100 /* Cap. pipe empty int enable */
  157. #define APC_PPAUSE 0x80 /* Pause the play DMA */
  158. #define APC_CPAUSE 0x40 /* Pause the capture DMA */
  159. #define APC_CDC_RESET 0x20 /* CODEC RESET */
  160. #define APC_PDMA_READY 0x08 /* Play DMA Go */
  161. #define APC_CDMA_READY 0x04 /* Capture DMA Go */
  162. #define APC_CHIP_RESET 0x01 /* Reset the chip */
  163. /* EBUS DMA register offsets */
  164. #define EBDMA_CSR 0x00UL /* Control/Status */
  165. #define EBDMA_ADDR 0x04UL /* DMA Address */
  166. #define EBDMA_COUNT 0x08UL /* DMA Count */
  167. /*
  168. * Some variables
  169. */
  170. static unsigned char freq_bits[14] = {
  171. /* 5510 */ 0x00 | CS4231_XTAL2,
  172. /* 6620 */ 0x0E | CS4231_XTAL2,
  173. /* 8000 */ 0x00 | CS4231_XTAL1,
  174. /* 9600 */ 0x0E | CS4231_XTAL1,
  175. /* 11025 */ 0x02 | CS4231_XTAL2,
  176. /* 16000 */ 0x02 | CS4231_XTAL1,
  177. /* 18900 */ 0x04 | CS4231_XTAL2,
  178. /* 22050 */ 0x06 | CS4231_XTAL2,
  179. /* 27042 */ 0x04 | CS4231_XTAL1,
  180. /* 32000 */ 0x06 | CS4231_XTAL1,
  181. /* 33075 */ 0x0C | CS4231_XTAL2,
  182. /* 37800 */ 0x08 | CS4231_XTAL2,
  183. /* 44100 */ 0x0A | CS4231_XTAL2,
  184. /* 48000 */ 0x0C | CS4231_XTAL1
  185. };
  186. static unsigned int rates[14] = {
  187. 5510, 6620, 8000, 9600, 11025, 16000, 18900, 22050,
  188. 27042, 32000, 33075, 37800, 44100, 48000
  189. };
  190. static struct snd_pcm_hw_constraint_list hw_constraints_rates = {
  191. .count = ARRAY_SIZE(rates),
  192. .list = rates,
  193. };
  194. static int snd_cs4231_xrate(struct snd_pcm_runtime *runtime)
  195. {
  196. return snd_pcm_hw_constraint_list(runtime, 0,
  197. SNDRV_PCM_HW_PARAM_RATE,
  198. &hw_constraints_rates);
  199. }
  200. static unsigned char snd_cs4231_original_image[32] =
  201. {
  202. 0x00, /* 00/00 - lic */
  203. 0x00, /* 01/01 - ric */
  204. 0x9f, /* 02/02 - la1ic */
  205. 0x9f, /* 03/03 - ra1ic */
  206. 0x9f, /* 04/04 - la2ic */
  207. 0x9f, /* 05/05 - ra2ic */
  208. 0xbf, /* 06/06 - loc */
  209. 0xbf, /* 07/07 - roc */
  210. 0x20, /* 08/08 - pdfr */
  211. CS4231_AUTOCALIB, /* 09/09 - ic */
  212. 0x00, /* 0a/10 - pc */
  213. 0x00, /* 0b/11 - ti */
  214. CS4231_MODE2, /* 0c/12 - mi */
  215. 0x00, /* 0d/13 - lbc */
  216. 0x00, /* 0e/14 - pbru */
  217. 0x00, /* 0f/15 - pbrl */
  218. 0x80, /* 10/16 - afei */
  219. 0x01, /* 11/17 - afeii */
  220. 0x9f, /* 12/18 - llic */
  221. 0x9f, /* 13/19 - rlic */
  222. 0x00, /* 14/20 - tlb */
  223. 0x00, /* 15/21 - thb */
  224. 0x00, /* 16/22 - la3mic/reserved */
  225. 0x00, /* 17/23 - ra3mic/reserved */
  226. 0x00, /* 18/24 - afs */
  227. 0x00, /* 19/25 - lamoc/version */
  228. 0x00, /* 1a/26 - mioc */
  229. 0x00, /* 1b/27 - ramoc/reserved */
  230. 0x20, /* 1c/28 - cdfr */
  231. 0x00, /* 1d/29 - res4 */
  232. 0x00, /* 1e/30 - cbru */
  233. 0x00, /* 1f/31 - cbrl */
  234. };
  235. static u8 __cs4231_readb(struct snd_cs4231 *cp, void __iomem *reg_addr)
  236. {
  237. #ifdef EBUS_SUPPORT
  238. if (cp->flags & CS4231_FLAG_EBUS)
  239. return readb(reg_addr);
  240. else
  241. #endif
  242. #ifdef SBUS_SUPPORT
  243. return sbus_readb(reg_addr);
  244. #endif
  245. }
  246. static void __cs4231_writeb(struct snd_cs4231 *cp, u8 val,
  247. void __iomem *reg_addr)
  248. {
  249. #ifdef EBUS_SUPPORT
  250. if (cp->flags & CS4231_FLAG_EBUS)
  251. return writeb(val, reg_addr);
  252. else
  253. #endif
  254. #ifdef SBUS_SUPPORT
  255. return sbus_writeb(val, reg_addr);
  256. #endif
  257. }
  258. /*
  259. * Basic I/O functions
  260. */
  261. static void snd_cs4231_ready(struct snd_cs4231 *chip)
  262. {
  263. int timeout;
  264. for (timeout = 250; timeout > 0; timeout--) {
  265. int val = __cs4231_readb(chip, CS4231U(chip, REGSEL));
  266. if ((val & CS4231_INIT) == 0)
  267. break;
  268. udelay(100);
  269. }
  270. }
  271. static void snd_cs4231_dout(struct snd_cs4231 *chip, unsigned char reg,
  272. unsigned char value)
  273. {
  274. snd_cs4231_ready(chip);
  275. #ifdef CONFIG_SND_DEBUG
  276. if (__cs4231_readb(chip, CS4231U(chip, REGSEL)) & CS4231_INIT)
  277. snd_printdd("out: auto calibration time out - reg = 0x%x, "
  278. "value = 0x%x\n",
  279. reg, value);
  280. #endif
  281. __cs4231_writeb(chip, chip->mce_bit | reg, CS4231U(chip, REGSEL));
  282. wmb();
  283. __cs4231_writeb(chip, value, CS4231U(chip, REG));
  284. mb();
  285. }
  286. static inline void snd_cs4231_outm(struct snd_cs4231 *chip, unsigned char reg,
  287. unsigned char mask, unsigned char value)
  288. {
  289. unsigned char tmp = (chip->image[reg] & mask) | value;
  290. chip->image[reg] = tmp;
  291. if (!chip->calibrate_mute)
  292. snd_cs4231_dout(chip, reg, tmp);
  293. }
  294. static void snd_cs4231_out(struct snd_cs4231 *chip, unsigned char reg,
  295. unsigned char value)
  296. {
  297. snd_cs4231_dout(chip, reg, value);
  298. chip->image[reg] = value;
  299. mb();
  300. }
  301. static unsigned char snd_cs4231_in(struct snd_cs4231 *chip, unsigned char reg)
  302. {
  303. snd_cs4231_ready(chip);
  304. #ifdef CONFIG_SND_DEBUG
  305. if (__cs4231_readb(chip, CS4231U(chip, REGSEL)) & CS4231_INIT)
  306. snd_printdd("in: auto calibration time out - reg = 0x%x\n",
  307. reg);
  308. #endif
  309. __cs4231_writeb(chip, chip->mce_bit | reg, CS4231U(chip, REGSEL));
  310. mb();
  311. return __cs4231_readb(chip, CS4231U(chip, REG));
  312. }
  313. /*
  314. * CS4231 detection / MCE routines
  315. */
  316. static void snd_cs4231_busy_wait(struct snd_cs4231 *chip)
  317. {
  318. int timeout;
  319. /* looks like this sequence is proper for CS4231A chip (GUS MAX) */
  320. for (timeout = 5; timeout > 0; timeout--)
  321. __cs4231_readb(chip, CS4231U(chip, REGSEL));
  322. /* end of cleanup sequence */
  323. for (timeout = 500; timeout > 0; timeout--) {
  324. int val = __cs4231_readb(chip, CS4231U(chip, REGSEL));
  325. if ((val & CS4231_INIT) == 0)
  326. break;
  327. msleep(1);
  328. }
  329. }
  330. static void snd_cs4231_mce_up(struct snd_cs4231 *chip)
  331. {
  332. unsigned long flags;
  333. int timeout;
  334. spin_lock_irqsave(&chip->lock, flags);
  335. snd_cs4231_ready(chip);
  336. #ifdef CONFIG_SND_DEBUG
  337. if (__cs4231_readb(chip, CS4231U(chip, REGSEL)) & CS4231_INIT)
  338. snd_printdd("mce_up - auto calibration time out (0)\n");
  339. #endif
  340. chip->mce_bit |= CS4231_MCE;
  341. timeout = __cs4231_readb(chip, CS4231U(chip, REGSEL));
  342. if (timeout == 0x80)
  343. snd_printdd("mce_up [%p]: serious init problem - "
  344. "codec still busy\n",
  345. chip->port);
  346. if (!(timeout & CS4231_MCE))
  347. __cs4231_writeb(chip, chip->mce_bit | (timeout & 0x1f),
  348. CS4231U(chip, REGSEL));
  349. spin_unlock_irqrestore(&chip->lock, flags);
  350. }
  351. static void snd_cs4231_mce_down(struct snd_cs4231 *chip)
  352. {
  353. unsigned long flags, timeout;
  354. int reg;
  355. snd_cs4231_busy_wait(chip);
  356. spin_lock_irqsave(&chip->lock, flags);
  357. #ifdef CONFIG_SND_DEBUG
  358. if (__cs4231_readb(chip, CS4231U(chip, REGSEL)) & CS4231_INIT)
  359. snd_printdd("mce_down [%p] - auto calibration time out (0)\n",
  360. CS4231U(chip, REGSEL));
  361. #endif
  362. chip->mce_bit &= ~CS4231_MCE;
  363. reg = __cs4231_readb(chip, CS4231U(chip, REGSEL));
  364. __cs4231_writeb(chip, chip->mce_bit | (reg & 0x1f),
  365. CS4231U(chip, REGSEL));
  366. if (reg == 0x80)
  367. snd_printdd("mce_down [%p]: serious init problem "
  368. "- codec still busy\n", chip->port);
  369. if ((reg & CS4231_MCE) == 0) {
  370. spin_unlock_irqrestore(&chip->lock, flags);
  371. return;
  372. }
  373. /*
  374. * Wait for auto-calibration (AC) process to finish, i.e. ACI to go low.
  375. */
  376. timeout = jiffies + msecs_to_jiffies(250);
  377. do {
  378. spin_unlock_irqrestore(&chip->lock, flags);
  379. msleep(1);
  380. spin_lock_irqsave(&chip->lock, flags);
  381. reg = snd_cs4231_in(chip, CS4231_TEST_INIT);
  382. reg &= CS4231_CALIB_IN_PROGRESS;
  383. } while (reg && time_before(jiffies, timeout));
  384. spin_unlock_irqrestore(&chip->lock, flags);
  385. if (reg)
  386. snd_printk(KERN_ERR
  387. "mce_down - auto calibration time out (2)\n");
  388. }
  389. static void snd_cs4231_advance_dma(struct cs4231_dma_control *dma_cont,
  390. struct snd_pcm_substream *substream,
  391. unsigned int *periods_sent)
  392. {
  393. struct snd_pcm_runtime *runtime = substream->runtime;
  394. while (1) {
  395. unsigned int period_size = snd_pcm_lib_period_bytes(substream);
  396. unsigned int offset = period_size * (*periods_sent);
  397. BUG_ON(period_size >= (1 << 24));
  398. if (dma_cont->request(dma_cont,
  399. runtime->dma_addr + offset, period_size))
  400. return;
  401. (*periods_sent) = ((*periods_sent) + 1) % runtime->periods;
  402. }
  403. }
  404. static void cs4231_dma_trigger(struct snd_pcm_substream *substream,
  405. unsigned int what, int on)
  406. {
  407. struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
  408. struct cs4231_dma_control *dma_cont;
  409. if (what & CS4231_PLAYBACK_ENABLE) {
  410. dma_cont = &chip->p_dma;
  411. if (on) {
  412. dma_cont->prepare(dma_cont, 0);
  413. dma_cont->enable(dma_cont, 1);
  414. snd_cs4231_advance_dma(dma_cont,
  415. chip->playback_substream,
  416. &chip->p_periods_sent);
  417. } else {
  418. dma_cont->enable(dma_cont, 0);
  419. }
  420. }
  421. if (what & CS4231_RECORD_ENABLE) {
  422. dma_cont = &chip->c_dma;
  423. if (on) {
  424. dma_cont->prepare(dma_cont, 1);
  425. dma_cont->enable(dma_cont, 1);
  426. snd_cs4231_advance_dma(dma_cont,
  427. chip->capture_substream,
  428. &chip->c_periods_sent);
  429. } else {
  430. dma_cont->enable(dma_cont, 0);
  431. }
  432. }
  433. }
  434. static int snd_cs4231_trigger(struct snd_pcm_substream *substream, int cmd)
  435. {
  436. struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
  437. int result = 0;
  438. switch (cmd) {
  439. case SNDRV_PCM_TRIGGER_START:
  440. case SNDRV_PCM_TRIGGER_STOP:
  441. {
  442. unsigned int what = 0;
  443. struct snd_pcm_substream *s;
  444. unsigned long flags;
  445. snd_pcm_group_for_each_entry(s, substream) {
  446. if (s == chip->playback_substream) {
  447. what |= CS4231_PLAYBACK_ENABLE;
  448. snd_pcm_trigger_done(s, substream);
  449. } else if (s == chip->capture_substream) {
  450. what |= CS4231_RECORD_ENABLE;
  451. snd_pcm_trigger_done(s, substream);
  452. }
  453. }
  454. spin_lock_irqsave(&chip->lock, flags);
  455. if (cmd == SNDRV_PCM_TRIGGER_START) {
  456. cs4231_dma_trigger(substream, what, 1);
  457. chip->image[CS4231_IFACE_CTRL] |= what;
  458. } else {
  459. cs4231_dma_trigger(substream, what, 0);
  460. chip->image[CS4231_IFACE_CTRL] &= ~what;
  461. }
  462. snd_cs4231_out(chip, CS4231_IFACE_CTRL,
  463. chip->image[CS4231_IFACE_CTRL]);
  464. spin_unlock_irqrestore(&chip->lock, flags);
  465. break;
  466. }
  467. default:
  468. result = -EINVAL;
  469. break;
  470. }
  471. return result;
  472. }
  473. /*
  474. * CODEC I/O
  475. */
  476. static unsigned char snd_cs4231_get_rate(unsigned int rate)
  477. {
  478. int i;
  479. for (i = 0; i < 14; i++)
  480. if (rate == rates[i])
  481. return freq_bits[i];
  482. return freq_bits[13];
  483. }
  484. static unsigned char snd_cs4231_get_format(struct snd_cs4231 *chip, int format,
  485. int channels)
  486. {
  487. unsigned char rformat;
  488. rformat = CS4231_LINEAR_8;
  489. switch (format) {
  490. case SNDRV_PCM_FORMAT_MU_LAW:
  491. rformat = CS4231_ULAW_8;
  492. break;
  493. case SNDRV_PCM_FORMAT_A_LAW:
  494. rformat = CS4231_ALAW_8;
  495. break;
  496. case SNDRV_PCM_FORMAT_S16_LE:
  497. rformat = CS4231_LINEAR_16;
  498. break;
  499. case SNDRV_PCM_FORMAT_S16_BE:
  500. rformat = CS4231_LINEAR_16_BIG;
  501. break;
  502. case SNDRV_PCM_FORMAT_IMA_ADPCM:
  503. rformat = CS4231_ADPCM_16;
  504. break;
  505. }
  506. if (channels > 1)
  507. rformat |= CS4231_STEREO;
  508. return rformat;
  509. }
  510. static void snd_cs4231_calibrate_mute(struct snd_cs4231 *chip, int mute)
  511. {
  512. unsigned long flags;
  513. mute = mute ? 1 : 0;
  514. spin_lock_irqsave(&chip->lock, flags);
  515. if (chip->calibrate_mute == mute) {
  516. spin_unlock_irqrestore(&chip->lock, flags);
  517. return;
  518. }
  519. if (!mute) {
  520. snd_cs4231_dout(chip, CS4231_LEFT_INPUT,
  521. chip->image[CS4231_LEFT_INPUT]);
  522. snd_cs4231_dout(chip, CS4231_RIGHT_INPUT,
  523. chip->image[CS4231_RIGHT_INPUT]);
  524. snd_cs4231_dout(chip, CS4231_LOOPBACK,
  525. chip->image[CS4231_LOOPBACK]);
  526. }
  527. snd_cs4231_dout(chip, CS4231_AUX1_LEFT_INPUT,
  528. mute ? 0x80 : chip->image[CS4231_AUX1_LEFT_INPUT]);
  529. snd_cs4231_dout(chip, CS4231_AUX1_RIGHT_INPUT,
  530. mute ? 0x80 : chip->image[CS4231_AUX1_RIGHT_INPUT]);
  531. snd_cs4231_dout(chip, CS4231_AUX2_LEFT_INPUT,
  532. mute ? 0x80 : chip->image[CS4231_AUX2_LEFT_INPUT]);
  533. snd_cs4231_dout(chip, CS4231_AUX2_RIGHT_INPUT,
  534. mute ? 0x80 : chip->image[CS4231_AUX2_RIGHT_INPUT]);
  535. snd_cs4231_dout(chip, CS4231_LEFT_OUTPUT,
  536. mute ? 0x80 : chip->image[CS4231_LEFT_OUTPUT]);
  537. snd_cs4231_dout(chip, CS4231_RIGHT_OUTPUT,
  538. mute ? 0x80 : chip->image[CS4231_RIGHT_OUTPUT]);
  539. snd_cs4231_dout(chip, CS4231_LEFT_LINE_IN,
  540. mute ? 0x80 : chip->image[CS4231_LEFT_LINE_IN]);
  541. snd_cs4231_dout(chip, CS4231_RIGHT_LINE_IN,
  542. mute ? 0x80 : chip->image[CS4231_RIGHT_LINE_IN]);
  543. snd_cs4231_dout(chip, CS4231_MONO_CTRL,
  544. mute ? 0xc0 : chip->image[CS4231_MONO_CTRL]);
  545. chip->calibrate_mute = mute;
  546. spin_unlock_irqrestore(&chip->lock, flags);
  547. }
  548. static void snd_cs4231_playback_format(struct snd_cs4231 *chip,
  549. struct snd_pcm_hw_params *params,
  550. unsigned char pdfr)
  551. {
  552. unsigned long flags;
  553. mutex_lock(&chip->mce_mutex);
  554. snd_cs4231_calibrate_mute(chip, 1);
  555. snd_cs4231_mce_up(chip);
  556. spin_lock_irqsave(&chip->lock, flags);
  557. snd_cs4231_out(chip, CS4231_PLAYBK_FORMAT,
  558. (chip->image[CS4231_IFACE_CTRL] & CS4231_RECORD_ENABLE) ?
  559. (pdfr & 0xf0) | (chip->image[CS4231_REC_FORMAT] & 0x0f) :
  560. pdfr);
  561. spin_unlock_irqrestore(&chip->lock, flags);
  562. snd_cs4231_mce_down(chip);
  563. snd_cs4231_calibrate_mute(chip, 0);
  564. mutex_unlock(&chip->mce_mutex);
  565. }
  566. static void snd_cs4231_capture_format(struct snd_cs4231 *chip,
  567. struct snd_pcm_hw_params *params,
  568. unsigned char cdfr)
  569. {
  570. unsigned long flags;
  571. mutex_lock(&chip->mce_mutex);
  572. snd_cs4231_calibrate_mute(chip, 1);
  573. snd_cs4231_mce_up(chip);
  574. spin_lock_irqsave(&chip->lock, flags);
  575. if (!(chip->image[CS4231_IFACE_CTRL] & CS4231_PLAYBACK_ENABLE)) {
  576. snd_cs4231_out(chip, CS4231_PLAYBK_FORMAT,
  577. ((chip->image[CS4231_PLAYBK_FORMAT]) & 0xf0) |
  578. (cdfr & 0x0f));
  579. spin_unlock_irqrestore(&chip->lock, flags);
  580. snd_cs4231_mce_down(chip);
  581. snd_cs4231_mce_up(chip);
  582. spin_lock_irqsave(&chip->lock, flags);
  583. }
  584. snd_cs4231_out(chip, CS4231_REC_FORMAT, cdfr);
  585. spin_unlock_irqrestore(&chip->lock, flags);
  586. snd_cs4231_mce_down(chip);
  587. snd_cs4231_calibrate_mute(chip, 0);
  588. mutex_unlock(&chip->mce_mutex);
  589. }
  590. /*
  591. * Timer interface
  592. */
  593. static unsigned long snd_cs4231_timer_resolution(struct snd_timer *timer)
  594. {
  595. struct snd_cs4231 *chip = snd_timer_chip(timer);
  596. return chip->image[CS4231_PLAYBK_FORMAT] & 1 ? 9969 : 9920;
  597. }
  598. static int snd_cs4231_timer_start(struct snd_timer *timer)
  599. {
  600. unsigned long flags;
  601. unsigned int ticks;
  602. struct snd_cs4231 *chip = snd_timer_chip(timer);
  603. spin_lock_irqsave(&chip->lock, flags);
  604. ticks = timer->sticks;
  605. if ((chip->image[CS4231_ALT_FEATURE_1] & CS4231_TIMER_ENABLE) == 0 ||
  606. (unsigned char)(ticks >> 8) != chip->image[CS4231_TIMER_HIGH] ||
  607. (unsigned char)ticks != chip->image[CS4231_TIMER_LOW]) {
  608. snd_cs4231_out(chip, CS4231_TIMER_HIGH,
  609. chip->image[CS4231_TIMER_HIGH] =
  610. (unsigned char) (ticks >> 8));
  611. snd_cs4231_out(chip, CS4231_TIMER_LOW,
  612. chip->image[CS4231_TIMER_LOW] =
  613. (unsigned char) ticks);
  614. snd_cs4231_out(chip, CS4231_ALT_FEATURE_1,
  615. chip->image[CS4231_ALT_FEATURE_1] |
  616. CS4231_TIMER_ENABLE);
  617. }
  618. spin_unlock_irqrestore(&chip->lock, flags);
  619. return 0;
  620. }
  621. static int snd_cs4231_timer_stop(struct snd_timer *timer)
  622. {
  623. unsigned long flags;
  624. struct snd_cs4231 *chip = snd_timer_chip(timer);
  625. spin_lock_irqsave(&chip->lock, flags);
  626. chip->image[CS4231_ALT_FEATURE_1] &= ~CS4231_TIMER_ENABLE;
  627. snd_cs4231_out(chip, CS4231_ALT_FEATURE_1,
  628. chip->image[CS4231_ALT_FEATURE_1]);
  629. spin_unlock_irqrestore(&chip->lock, flags);
  630. return 0;
  631. }
  632. static void __init snd_cs4231_init(struct snd_cs4231 *chip)
  633. {
  634. unsigned long flags;
  635. snd_cs4231_mce_down(chip);
  636. #ifdef SNDRV_DEBUG_MCE
  637. snd_printdd("init: (1)\n");
  638. #endif
  639. snd_cs4231_mce_up(chip);
  640. spin_lock_irqsave(&chip->lock, flags);
  641. chip->image[CS4231_IFACE_CTRL] &= ~(CS4231_PLAYBACK_ENABLE |
  642. CS4231_PLAYBACK_PIO |
  643. CS4231_RECORD_ENABLE |
  644. CS4231_RECORD_PIO |
  645. CS4231_CALIB_MODE);
  646. chip->image[CS4231_IFACE_CTRL] |= CS4231_AUTOCALIB;
  647. snd_cs4231_out(chip, CS4231_IFACE_CTRL, chip->image[CS4231_IFACE_CTRL]);
  648. spin_unlock_irqrestore(&chip->lock, flags);
  649. snd_cs4231_mce_down(chip);
  650. #ifdef SNDRV_DEBUG_MCE
  651. snd_printdd("init: (2)\n");
  652. #endif
  653. snd_cs4231_mce_up(chip);
  654. spin_lock_irqsave(&chip->lock, flags);
  655. snd_cs4231_out(chip, CS4231_ALT_FEATURE_1,
  656. chip->image[CS4231_ALT_FEATURE_1]);
  657. spin_unlock_irqrestore(&chip->lock, flags);
  658. snd_cs4231_mce_down(chip);
  659. #ifdef SNDRV_DEBUG_MCE
  660. snd_printdd("init: (3) - afei = 0x%x\n",
  661. chip->image[CS4231_ALT_FEATURE_1]);
  662. #endif
  663. spin_lock_irqsave(&chip->lock, flags);
  664. snd_cs4231_out(chip, CS4231_ALT_FEATURE_2,
  665. chip->image[CS4231_ALT_FEATURE_2]);
  666. spin_unlock_irqrestore(&chip->lock, flags);
  667. snd_cs4231_mce_up(chip);
  668. spin_lock_irqsave(&chip->lock, flags);
  669. snd_cs4231_out(chip, CS4231_PLAYBK_FORMAT,
  670. chip->image[CS4231_PLAYBK_FORMAT]);
  671. spin_unlock_irqrestore(&chip->lock, flags);
  672. snd_cs4231_mce_down(chip);
  673. #ifdef SNDRV_DEBUG_MCE
  674. snd_printdd("init: (4)\n");
  675. #endif
  676. snd_cs4231_mce_up(chip);
  677. spin_lock_irqsave(&chip->lock, flags);
  678. snd_cs4231_out(chip, CS4231_REC_FORMAT, chip->image[CS4231_REC_FORMAT]);
  679. spin_unlock_irqrestore(&chip->lock, flags);
  680. snd_cs4231_mce_down(chip);
  681. #ifdef SNDRV_DEBUG_MCE
  682. snd_printdd("init: (5)\n");
  683. #endif
  684. }
  685. static int snd_cs4231_open(struct snd_cs4231 *chip, unsigned int mode)
  686. {
  687. unsigned long flags;
  688. mutex_lock(&chip->open_mutex);
  689. if ((chip->mode & mode)) {
  690. mutex_unlock(&chip->open_mutex);
  691. return -EAGAIN;
  692. }
  693. if (chip->mode & CS4231_MODE_OPEN) {
  694. chip->mode |= mode;
  695. mutex_unlock(&chip->open_mutex);
  696. return 0;
  697. }
  698. /* ok. now enable and ack CODEC IRQ */
  699. spin_lock_irqsave(&chip->lock, flags);
  700. snd_cs4231_out(chip, CS4231_IRQ_STATUS, CS4231_PLAYBACK_IRQ |
  701. CS4231_RECORD_IRQ |
  702. CS4231_TIMER_IRQ);
  703. snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0);
  704. __cs4231_writeb(chip, 0, CS4231U(chip, STATUS)); /* clear IRQ */
  705. __cs4231_writeb(chip, 0, CS4231U(chip, STATUS)); /* clear IRQ */
  706. snd_cs4231_out(chip, CS4231_IRQ_STATUS, CS4231_PLAYBACK_IRQ |
  707. CS4231_RECORD_IRQ |
  708. CS4231_TIMER_IRQ);
  709. snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0);
  710. spin_unlock_irqrestore(&chip->lock, flags);
  711. chip->mode = mode;
  712. mutex_unlock(&chip->open_mutex);
  713. return 0;
  714. }
  715. static void snd_cs4231_close(struct snd_cs4231 *chip, unsigned int mode)
  716. {
  717. unsigned long flags;
  718. mutex_lock(&chip->open_mutex);
  719. chip->mode &= ~mode;
  720. if (chip->mode & CS4231_MODE_OPEN) {
  721. mutex_unlock(&chip->open_mutex);
  722. return;
  723. }
  724. snd_cs4231_calibrate_mute(chip, 1);
  725. /* disable IRQ */
  726. spin_lock_irqsave(&chip->lock, flags);
  727. snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0);
  728. __cs4231_writeb(chip, 0, CS4231U(chip, STATUS)); /* clear IRQ */
  729. __cs4231_writeb(chip, 0, CS4231U(chip, STATUS)); /* clear IRQ */
  730. /* now disable record & playback */
  731. if (chip->image[CS4231_IFACE_CTRL] &
  732. (CS4231_PLAYBACK_ENABLE | CS4231_PLAYBACK_PIO |
  733. CS4231_RECORD_ENABLE | CS4231_RECORD_PIO)) {
  734. spin_unlock_irqrestore(&chip->lock, flags);
  735. snd_cs4231_mce_up(chip);
  736. spin_lock_irqsave(&chip->lock, flags);
  737. chip->image[CS4231_IFACE_CTRL] &=
  738. ~(CS4231_PLAYBACK_ENABLE | CS4231_PLAYBACK_PIO |
  739. CS4231_RECORD_ENABLE | CS4231_RECORD_PIO);
  740. snd_cs4231_out(chip, CS4231_IFACE_CTRL,
  741. chip->image[CS4231_IFACE_CTRL]);
  742. spin_unlock_irqrestore(&chip->lock, flags);
  743. snd_cs4231_mce_down(chip);
  744. spin_lock_irqsave(&chip->lock, flags);
  745. }
  746. /* clear IRQ again */
  747. snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0);
  748. __cs4231_writeb(chip, 0, CS4231U(chip, STATUS)); /* clear IRQ */
  749. __cs4231_writeb(chip, 0, CS4231U(chip, STATUS)); /* clear IRQ */
  750. spin_unlock_irqrestore(&chip->lock, flags);
  751. snd_cs4231_calibrate_mute(chip, 0);
  752. chip->mode = 0;
  753. mutex_unlock(&chip->open_mutex);
  754. }
  755. /*
  756. * timer open/close
  757. */
  758. static int snd_cs4231_timer_open(struct snd_timer *timer)
  759. {
  760. struct snd_cs4231 *chip = snd_timer_chip(timer);
  761. snd_cs4231_open(chip, CS4231_MODE_TIMER);
  762. return 0;
  763. }
  764. static int snd_cs4231_timer_close(struct snd_timer *timer)
  765. {
  766. struct snd_cs4231 *chip = snd_timer_chip(timer);
  767. snd_cs4231_close(chip, CS4231_MODE_TIMER);
  768. return 0;
  769. }
  770. static struct snd_timer_hardware snd_cs4231_timer_table = {
  771. .flags = SNDRV_TIMER_HW_AUTO,
  772. .resolution = 9945,
  773. .ticks = 65535,
  774. .open = snd_cs4231_timer_open,
  775. .close = snd_cs4231_timer_close,
  776. .c_resolution = snd_cs4231_timer_resolution,
  777. .start = snd_cs4231_timer_start,
  778. .stop = snd_cs4231_timer_stop,
  779. };
  780. /*
  781. * ok.. exported functions..
  782. */
  783. static int snd_cs4231_playback_hw_params(struct snd_pcm_substream *substream,
  784. struct snd_pcm_hw_params *hw_params)
  785. {
  786. struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
  787. unsigned char new_pdfr;
  788. int err;
  789. err = snd_pcm_lib_malloc_pages(substream,
  790. params_buffer_bytes(hw_params));
  791. if (err < 0)
  792. return err;
  793. new_pdfr = snd_cs4231_get_format(chip, params_format(hw_params),
  794. params_channels(hw_params)) |
  795. snd_cs4231_get_rate(params_rate(hw_params));
  796. snd_cs4231_playback_format(chip, hw_params, new_pdfr);
  797. return 0;
  798. }
  799. static int snd_cs4231_playback_prepare(struct snd_pcm_substream *substream)
  800. {
  801. struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
  802. struct snd_pcm_runtime *runtime = substream->runtime;
  803. unsigned long flags;
  804. spin_lock_irqsave(&chip->lock, flags);
  805. chip->image[CS4231_IFACE_CTRL] &= ~(CS4231_PLAYBACK_ENABLE |
  806. CS4231_PLAYBACK_PIO);
  807. BUG_ON(runtime->period_size > 0xffff + 1);
  808. chip->p_periods_sent = 0;
  809. spin_unlock_irqrestore(&chip->lock, flags);
  810. return 0;
  811. }
  812. static int snd_cs4231_capture_hw_params(struct snd_pcm_substream *substream,
  813. struct snd_pcm_hw_params *hw_params)
  814. {
  815. struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
  816. unsigned char new_cdfr;
  817. int err;
  818. err = snd_pcm_lib_malloc_pages(substream,
  819. params_buffer_bytes(hw_params));
  820. if (err < 0)
  821. return err;
  822. new_cdfr = snd_cs4231_get_format(chip, params_format(hw_params),
  823. params_channels(hw_params)) |
  824. snd_cs4231_get_rate(params_rate(hw_params));
  825. snd_cs4231_capture_format(chip, hw_params, new_cdfr);
  826. return 0;
  827. }
  828. static int snd_cs4231_capture_prepare(struct snd_pcm_substream *substream)
  829. {
  830. struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
  831. unsigned long flags;
  832. spin_lock_irqsave(&chip->lock, flags);
  833. chip->image[CS4231_IFACE_CTRL] &= ~(CS4231_RECORD_ENABLE |
  834. CS4231_RECORD_PIO);
  835. chip->c_periods_sent = 0;
  836. spin_unlock_irqrestore(&chip->lock, flags);
  837. return 0;
  838. }
  839. static void snd_cs4231_overrange(struct snd_cs4231 *chip)
  840. {
  841. unsigned long flags;
  842. unsigned char res;
  843. spin_lock_irqsave(&chip->lock, flags);
  844. res = snd_cs4231_in(chip, CS4231_TEST_INIT);
  845. spin_unlock_irqrestore(&chip->lock, flags);
  846. /* detect overrange only above 0dB; may be user selectable? */
  847. if (res & (0x08 | 0x02))
  848. chip->capture_substream->runtime->overrange++;
  849. }
  850. static void snd_cs4231_play_callback(struct snd_cs4231 *chip)
  851. {
  852. if (chip->image[CS4231_IFACE_CTRL] & CS4231_PLAYBACK_ENABLE) {
  853. snd_pcm_period_elapsed(chip->playback_substream);
  854. snd_cs4231_advance_dma(&chip->p_dma, chip->playback_substream,
  855. &chip->p_periods_sent);
  856. }
  857. }
  858. static void snd_cs4231_capture_callback(struct snd_cs4231 *chip)
  859. {
  860. if (chip->image[CS4231_IFACE_CTRL] & CS4231_RECORD_ENABLE) {
  861. snd_pcm_period_elapsed(chip->capture_substream);
  862. snd_cs4231_advance_dma(&chip->c_dma, chip->capture_substream,
  863. &chip->c_periods_sent);
  864. }
  865. }
  866. static snd_pcm_uframes_t snd_cs4231_playback_pointer(
  867. struct snd_pcm_substream *substream)
  868. {
  869. struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
  870. struct cs4231_dma_control *dma_cont = &chip->p_dma;
  871. size_t ptr;
  872. if (!(chip->image[CS4231_IFACE_CTRL] & CS4231_PLAYBACK_ENABLE))
  873. return 0;
  874. ptr = dma_cont->address(dma_cont);
  875. if (ptr != 0)
  876. ptr -= substream->runtime->dma_addr;
  877. return bytes_to_frames(substream->runtime, ptr);
  878. }
  879. static snd_pcm_uframes_t snd_cs4231_capture_pointer(
  880. struct snd_pcm_substream *substream)
  881. {
  882. struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
  883. struct cs4231_dma_control *dma_cont = &chip->c_dma;
  884. size_t ptr;
  885. if (!(chip->image[CS4231_IFACE_CTRL] & CS4231_RECORD_ENABLE))
  886. return 0;
  887. ptr = dma_cont->address(dma_cont);
  888. if (ptr != 0)
  889. ptr -= substream->runtime->dma_addr;
  890. return bytes_to_frames(substream->runtime, ptr);
  891. }
  892. static int __init snd_cs4231_probe(struct snd_cs4231 *chip)
  893. {
  894. unsigned long flags;
  895. int i;
  896. int id = 0;
  897. int vers = 0;
  898. unsigned char *ptr;
  899. for (i = 0; i < 50; i++) {
  900. mb();
  901. if (__cs4231_readb(chip, CS4231U(chip, REGSEL)) & CS4231_INIT)
  902. msleep(2);
  903. else {
  904. spin_lock_irqsave(&chip->lock, flags);
  905. snd_cs4231_out(chip, CS4231_MISC_INFO, CS4231_MODE2);
  906. id = snd_cs4231_in(chip, CS4231_MISC_INFO) & 0x0f;
  907. vers = snd_cs4231_in(chip, CS4231_VERSION);
  908. spin_unlock_irqrestore(&chip->lock, flags);
  909. if (id == 0x0a)
  910. break; /* this is valid value */
  911. }
  912. }
  913. snd_printdd("cs4231: port = %p, id = 0x%x\n", chip->port, id);
  914. if (id != 0x0a)
  915. return -ENODEV; /* no valid device found */
  916. spin_lock_irqsave(&chip->lock, flags);
  917. /* clear any pendings IRQ */
  918. __cs4231_readb(chip, CS4231U(chip, STATUS));
  919. __cs4231_writeb(chip, 0, CS4231U(chip, STATUS));
  920. mb();
  921. spin_unlock_irqrestore(&chip->lock, flags);
  922. chip->image[CS4231_MISC_INFO] = CS4231_MODE2;
  923. chip->image[CS4231_IFACE_CTRL] =
  924. chip->image[CS4231_IFACE_CTRL] & ~CS4231_SINGLE_DMA;
  925. chip->image[CS4231_ALT_FEATURE_1] = 0x80;
  926. chip->image[CS4231_ALT_FEATURE_2] = 0x01;
  927. if (vers & 0x20)
  928. chip->image[CS4231_ALT_FEATURE_2] |= 0x02;
  929. ptr = (unsigned char *) &chip->image;
  930. snd_cs4231_mce_down(chip);
  931. spin_lock_irqsave(&chip->lock, flags);
  932. for (i = 0; i < 32; i++) /* ok.. fill all CS4231 registers */
  933. snd_cs4231_out(chip, i, *ptr++);
  934. spin_unlock_irqrestore(&chip->lock, flags);
  935. snd_cs4231_mce_up(chip);
  936. snd_cs4231_mce_down(chip);
  937. mdelay(2);
  938. return 0; /* all things are ok.. */
  939. }
  940. static struct snd_pcm_hardware snd_cs4231_playback = {
  941. .info = SNDRV_PCM_INFO_MMAP |
  942. SNDRV_PCM_INFO_INTERLEAVED |
  943. SNDRV_PCM_INFO_MMAP_VALID |
  944. SNDRV_PCM_INFO_SYNC_START,
  945. .formats = SNDRV_PCM_FMTBIT_MU_LAW |
  946. SNDRV_PCM_FMTBIT_A_LAW |
  947. SNDRV_PCM_FMTBIT_IMA_ADPCM |
  948. SNDRV_PCM_FMTBIT_U8 |
  949. SNDRV_PCM_FMTBIT_S16_LE |
  950. SNDRV_PCM_FMTBIT_S16_BE,
  951. .rates = SNDRV_PCM_RATE_KNOT |
  952. SNDRV_PCM_RATE_8000_48000,
  953. .rate_min = 5510,
  954. .rate_max = 48000,
  955. .channels_min = 1,
  956. .channels_max = 2,
  957. .buffer_bytes_max = 32 * 1024,
  958. .period_bytes_min = 64,
  959. .period_bytes_max = 32 * 1024,
  960. .periods_min = 1,
  961. .periods_max = 1024,
  962. };
  963. static struct snd_pcm_hardware snd_cs4231_capture = {
  964. .info = SNDRV_PCM_INFO_MMAP |
  965. SNDRV_PCM_INFO_INTERLEAVED |
  966. SNDRV_PCM_INFO_MMAP_VALID |
  967. SNDRV_PCM_INFO_SYNC_START,
  968. .formats = SNDRV_PCM_FMTBIT_MU_LAW |
  969. SNDRV_PCM_FMTBIT_A_LAW |
  970. SNDRV_PCM_FMTBIT_IMA_ADPCM |
  971. SNDRV_PCM_FMTBIT_U8 |
  972. SNDRV_PCM_FMTBIT_S16_LE |
  973. SNDRV_PCM_FMTBIT_S16_BE,
  974. .rates = SNDRV_PCM_RATE_KNOT |
  975. SNDRV_PCM_RATE_8000_48000,
  976. .rate_min = 5510,
  977. .rate_max = 48000,
  978. .channels_min = 1,
  979. .channels_max = 2,
  980. .buffer_bytes_max = 32 * 1024,
  981. .period_bytes_min = 64,
  982. .period_bytes_max = 32 * 1024,
  983. .periods_min = 1,
  984. .periods_max = 1024,
  985. };
  986. static int snd_cs4231_playback_open(struct snd_pcm_substream *substream)
  987. {
  988. struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
  989. struct snd_pcm_runtime *runtime = substream->runtime;
  990. int err;
  991. runtime->hw = snd_cs4231_playback;
  992. err = snd_cs4231_open(chip, CS4231_MODE_PLAY);
  993. if (err < 0) {
  994. snd_free_pages(runtime->dma_area, runtime->dma_bytes);
  995. return err;
  996. }
  997. chip->playback_substream = substream;
  998. chip->p_periods_sent = 0;
  999. snd_pcm_set_sync(substream);
  1000. snd_cs4231_xrate(runtime);
  1001. return 0;
  1002. }
  1003. static int snd_cs4231_capture_open(struct snd_pcm_substream *substream)
  1004. {
  1005. struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
  1006. struct snd_pcm_runtime *runtime = substream->runtime;
  1007. int err;
  1008. runtime->hw = snd_cs4231_capture;
  1009. err = snd_cs4231_open(chip, CS4231_MODE_RECORD);
  1010. if (err < 0) {
  1011. snd_free_pages(runtime->dma_area, runtime->dma_bytes);
  1012. return err;
  1013. }
  1014. chip->capture_substream = substream;
  1015. chip->c_periods_sent = 0;
  1016. snd_pcm_set_sync(substream);
  1017. snd_cs4231_xrate(runtime);
  1018. return 0;
  1019. }
  1020. static int snd_cs4231_playback_close(struct snd_pcm_substream *substream)
  1021. {
  1022. struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
  1023. snd_cs4231_close(chip, CS4231_MODE_PLAY);
  1024. chip->playback_substream = NULL;
  1025. return 0;
  1026. }
  1027. static int snd_cs4231_capture_close(struct snd_pcm_substream *substream)
  1028. {
  1029. struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
  1030. snd_cs4231_close(chip, CS4231_MODE_RECORD);
  1031. chip->capture_substream = NULL;
  1032. return 0;
  1033. }
  1034. /* XXX We can do some power-management, in particular on EBUS using
  1035. * XXX the audio AUXIO register...
  1036. */
  1037. static struct snd_pcm_ops snd_cs4231_playback_ops = {
  1038. .open = snd_cs4231_playback_open,
  1039. .close = snd_cs4231_playback_close,
  1040. .ioctl = snd_pcm_lib_ioctl,
  1041. .hw_params = snd_cs4231_playback_hw_params,
  1042. .hw_free = snd_pcm_lib_free_pages,
  1043. .prepare = snd_cs4231_playback_prepare,
  1044. .trigger = snd_cs4231_trigger,
  1045. .pointer = snd_cs4231_playback_pointer,
  1046. };
  1047. static struct snd_pcm_ops snd_cs4231_capture_ops = {
  1048. .open = snd_cs4231_capture_open,
  1049. .close = snd_cs4231_capture_close,
  1050. .ioctl = snd_pcm_lib_ioctl,
  1051. .hw_params = snd_cs4231_capture_hw_params,
  1052. .hw_free = snd_pcm_lib_free_pages,
  1053. .prepare = snd_cs4231_capture_prepare,
  1054. .trigger = snd_cs4231_trigger,
  1055. .pointer = snd_cs4231_capture_pointer,
  1056. };
  1057. static int __init snd_cs4231_pcm(struct snd_card *card)
  1058. {
  1059. struct snd_cs4231 *chip = card->private_data;
  1060. struct snd_pcm *pcm;
  1061. int err;
  1062. err = snd_pcm_new(card, "CS4231", 0, 1, 1, &pcm);
  1063. if (err < 0)
  1064. return err;
  1065. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
  1066. &snd_cs4231_playback_ops);
  1067. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE,
  1068. &snd_cs4231_capture_ops);
  1069. /* global setup */
  1070. pcm->private_data = chip;
  1071. pcm->info_flags = SNDRV_PCM_INFO_JOINT_DUPLEX;
  1072. strcpy(pcm->name, "CS4231");
  1073. chip->p_dma.preallocate(chip, pcm);
  1074. chip->pcm = pcm;
  1075. return 0;
  1076. }
  1077. static int __init snd_cs4231_timer(struct snd_card *card)
  1078. {
  1079. struct snd_cs4231 *chip = card->private_data;
  1080. struct snd_timer *timer;
  1081. struct snd_timer_id tid;
  1082. int err;
  1083. /* Timer initialization */
  1084. tid.dev_class = SNDRV_TIMER_CLASS_CARD;
  1085. tid.dev_sclass = SNDRV_TIMER_SCLASS_NONE;
  1086. tid.card = card->number;
  1087. tid.device = 0;
  1088. tid.subdevice = 0;
  1089. err = snd_timer_new(card, "CS4231", &tid, &timer);
  1090. if (err < 0)
  1091. return err;
  1092. strcpy(timer->name, "CS4231");
  1093. timer->private_data = chip;
  1094. timer->hw = snd_cs4231_timer_table;
  1095. chip->timer = timer;
  1096. return 0;
  1097. }
  1098. /*
  1099. * MIXER part
  1100. */
  1101. static int snd_cs4231_info_mux(struct snd_kcontrol *kcontrol,
  1102. struct snd_ctl_elem_info *uinfo)
  1103. {
  1104. static char *texts[4] = {
  1105. "Line", "CD", "Mic", "Mix"
  1106. };
  1107. uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
  1108. uinfo->count = 2;
  1109. uinfo->value.enumerated.items = 4;
  1110. if (uinfo->value.enumerated.item > 3)
  1111. uinfo->value.enumerated.item = 3;
  1112. strcpy(uinfo->value.enumerated.name,
  1113. texts[uinfo->value.enumerated.item]);
  1114. return 0;
  1115. }
  1116. static int snd_cs4231_get_mux(struct snd_kcontrol *kcontrol,
  1117. struct snd_ctl_elem_value *ucontrol)
  1118. {
  1119. struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
  1120. unsigned long flags;
  1121. spin_lock_irqsave(&chip->lock, flags);
  1122. ucontrol->value.enumerated.item[0] =
  1123. (chip->image[CS4231_LEFT_INPUT] & CS4231_MIXS_ALL) >> 6;
  1124. ucontrol->value.enumerated.item[1] =
  1125. (chip->image[CS4231_RIGHT_INPUT] & CS4231_MIXS_ALL) >> 6;
  1126. spin_unlock_irqrestore(&chip->lock, flags);
  1127. return 0;
  1128. }
  1129. static int snd_cs4231_put_mux(struct snd_kcontrol *kcontrol,
  1130. struct snd_ctl_elem_value *ucontrol)
  1131. {
  1132. struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
  1133. unsigned long flags;
  1134. unsigned short left, right;
  1135. int change;
  1136. if (ucontrol->value.enumerated.item[0] > 3 ||
  1137. ucontrol->value.enumerated.item[1] > 3)
  1138. return -EINVAL;
  1139. left = ucontrol->value.enumerated.item[0] << 6;
  1140. right = ucontrol->value.enumerated.item[1] << 6;
  1141. spin_lock_irqsave(&chip->lock, flags);
  1142. left = (chip->image[CS4231_LEFT_INPUT] & ~CS4231_MIXS_ALL) | left;
  1143. right = (chip->image[CS4231_RIGHT_INPUT] & ~CS4231_MIXS_ALL) | right;
  1144. change = left != chip->image[CS4231_LEFT_INPUT] ||
  1145. right != chip->image[CS4231_RIGHT_INPUT];
  1146. snd_cs4231_out(chip, CS4231_LEFT_INPUT, left);
  1147. snd_cs4231_out(chip, CS4231_RIGHT_INPUT, right);
  1148. spin_unlock_irqrestore(&chip->lock, flags);
  1149. return change;
  1150. }
  1151. static int snd_cs4231_info_single(struct snd_kcontrol *kcontrol,
  1152. struct snd_ctl_elem_info *uinfo)
  1153. {
  1154. int mask = (kcontrol->private_value >> 16) & 0xff;
  1155. uinfo->type = (mask == 1) ?
  1156. SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
  1157. uinfo->count = 1;
  1158. uinfo->value.integer.min = 0;
  1159. uinfo->value.integer.max = mask;
  1160. return 0;
  1161. }
  1162. static int snd_cs4231_get_single(struct snd_kcontrol *kcontrol,
  1163. struct snd_ctl_elem_value *ucontrol)
  1164. {
  1165. struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
  1166. unsigned long flags;
  1167. int reg = kcontrol->private_value & 0xff;
  1168. int shift = (kcontrol->private_value >> 8) & 0xff;
  1169. int mask = (kcontrol->private_value >> 16) & 0xff;
  1170. int invert = (kcontrol->private_value >> 24) & 0xff;
  1171. spin_lock_irqsave(&chip->lock, flags);
  1172. ucontrol->value.integer.value[0] = (chip->image[reg] >> shift) & mask;
  1173. spin_unlock_irqrestore(&chip->lock, flags);
  1174. if (invert)
  1175. ucontrol->value.integer.value[0] =
  1176. (mask - ucontrol->value.integer.value[0]);
  1177. return 0;
  1178. }
  1179. static int snd_cs4231_put_single(struct snd_kcontrol *kcontrol,
  1180. struct snd_ctl_elem_value *ucontrol)
  1181. {
  1182. struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
  1183. unsigned long flags;
  1184. int reg = kcontrol->private_value & 0xff;
  1185. int shift = (kcontrol->private_value >> 8) & 0xff;
  1186. int mask = (kcontrol->private_value >> 16) & 0xff;
  1187. int invert = (kcontrol->private_value >> 24) & 0xff;
  1188. int change;
  1189. unsigned short val;
  1190. val = (ucontrol->value.integer.value[0] & mask);
  1191. if (invert)
  1192. val = mask - val;
  1193. val <<= shift;
  1194. spin_lock_irqsave(&chip->lock, flags);
  1195. val = (chip->image[reg] & ~(mask << shift)) | val;
  1196. change = val != chip->image[reg];
  1197. snd_cs4231_out(chip, reg, val);
  1198. spin_unlock_irqrestore(&chip->lock, flags);
  1199. return change;
  1200. }
  1201. static int snd_cs4231_info_double(struct snd_kcontrol *kcontrol,
  1202. struct snd_ctl_elem_info *uinfo)
  1203. {
  1204. int mask = (kcontrol->private_value >> 24) & 0xff;
  1205. uinfo->type = mask == 1 ?
  1206. SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
  1207. uinfo->count = 2;
  1208. uinfo->value.integer.min = 0;
  1209. uinfo->value.integer.max = mask;
  1210. return 0;
  1211. }
  1212. static int snd_cs4231_get_double(struct snd_kcontrol *kcontrol,
  1213. struct snd_ctl_elem_value *ucontrol)
  1214. {
  1215. struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
  1216. unsigned long flags;
  1217. int left_reg = kcontrol->private_value & 0xff;
  1218. int right_reg = (kcontrol->private_value >> 8) & 0xff;
  1219. int shift_left = (kcontrol->private_value >> 16) & 0x07;
  1220. int shift_right = (kcontrol->private_value >> 19) & 0x07;
  1221. int mask = (kcontrol->private_value >> 24) & 0xff;
  1222. int invert = (kcontrol->private_value >> 22) & 1;
  1223. spin_lock_irqsave(&chip->lock, flags);
  1224. ucontrol->value.integer.value[0] =
  1225. (chip->image[left_reg] >> shift_left) & mask;
  1226. ucontrol->value.integer.value[1] =
  1227. (chip->image[right_reg] >> shift_right) & mask;
  1228. spin_unlock_irqrestore(&chip->lock, flags);
  1229. if (invert) {
  1230. ucontrol->value.integer.value[0] =
  1231. (mask - ucontrol->value.integer.value[0]);
  1232. ucontrol->value.integer.value[1] =
  1233. (mask - ucontrol->value.integer.value[1]);
  1234. }
  1235. return 0;
  1236. }
  1237. static int snd_cs4231_put_double(struct snd_kcontrol *kcontrol,
  1238. struct snd_ctl_elem_value *ucontrol)
  1239. {
  1240. struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
  1241. unsigned long flags;
  1242. int left_reg = kcontrol->private_value & 0xff;
  1243. int right_reg = (kcontrol->private_value >> 8) & 0xff;
  1244. int shift_left = (kcontrol->private_value >> 16) & 0x07;
  1245. int shift_right = (kcontrol->private_value >> 19) & 0x07;
  1246. int mask = (kcontrol->private_value >> 24) & 0xff;
  1247. int invert = (kcontrol->private_value >> 22) & 1;
  1248. int change;
  1249. unsigned short val1, val2;
  1250. val1 = ucontrol->value.integer.value[0] & mask;
  1251. val2 = ucontrol->value.integer.value[1] & mask;
  1252. if (invert) {
  1253. val1 = mask - val1;
  1254. val2 = mask - val2;
  1255. }
  1256. val1 <<= shift_left;
  1257. val2 <<= shift_right;
  1258. spin_lock_irqsave(&chip->lock, flags);
  1259. val1 = (chip->image[left_reg] & ~(mask << shift_left)) | val1;
  1260. val2 = (chip->image[right_reg] & ~(mask << shift_right)) | val2;
  1261. change = val1 != chip->image[left_reg];
  1262. change |= val2 != chip->image[right_reg];
  1263. snd_cs4231_out(chip, left_reg, val1);
  1264. snd_cs4231_out(chip, right_reg, val2);
  1265. spin_unlock_irqrestore(&chip->lock, flags);
  1266. return change;
  1267. }
  1268. #define CS4231_SINGLE(xname, xindex, reg, shift, mask, invert) \
  1269. { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), .index = (xindex), \
  1270. .info = snd_cs4231_info_single, \
  1271. .get = snd_cs4231_get_single, .put = snd_cs4231_put_single, \
  1272. .private_value = (reg) | ((shift) << 8) | ((mask) << 16) | ((invert) << 24) }
  1273. #define CS4231_DOUBLE(xname, xindex, left_reg, right_reg, shift_left, \
  1274. shift_right, mask, invert) \
  1275. { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), .index = (xindex), \
  1276. .info = snd_cs4231_info_double, \
  1277. .get = snd_cs4231_get_double, .put = snd_cs4231_put_double, \
  1278. .private_value = (left_reg) | ((right_reg) << 8) | ((shift_left) << 16) | \
  1279. ((shift_right) << 19) | ((mask) << 24) | ((invert) << 22) }
  1280. static struct snd_kcontrol_new snd_cs4231_controls[] __initdata = {
  1281. CS4231_DOUBLE("PCM Playback Switch", 0, CS4231_LEFT_OUTPUT,
  1282. CS4231_RIGHT_OUTPUT, 7, 7, 1, 1),
  1283. CS4231_DOUBLE("PCM Playback Volume", 0, CS4231_LEFT_OUTPUT,
  1284. CS4231_RIGHT_OUTPUT, 0, 0, 63, 1),
  1285. CS4231_DOUBLE("Line Playback Switch", 0, CS4231_LEFT_LINE_IN,
  1286. CS4231_RIGHT_LINE_IN, 7, 7, 1, 1),
  1287. CS4231_DOUBLE("Line Playback Volume", 0, CS4231_LEFT_LINE_IN,
  1288. CS4231_RIGHT_LINE_IN, 0, 0, 31, 1),
  1289. CS4231_DOUBLE("Aux Playback Switch", 0, CS4231_AUX1_LEFT_INPUT,
  1290. CS4231_AUX1_RIGHT_INPUT, 7, 7, 1, 1),
  1291. CS4231_DOUBLE("Aux Playback Volume", 0, CS4231_AUX1_LEFT_INPUT,
  1292. CS4231_AUX1_RIGHT_INPUT, 0, 0, 31, 1),
  1293. CS4231_DOUBLE("Aux Playback Switch", 1, CS4231_AUX2_LEFT_INPUT,
  1294. CS4231_AUX2_RIGHT_INPUT, 7, 7, 1, 1),
  1295. CS4231_DOUBLE("Aux Playback Volume", 1, CS4231_AUX2_LEFT_INPUT,
  1296. CS4231_AUX2_RIGHT_INPUT, 0, 0, 31, 1),
  1297. CS4231_SINGLE("Mono Playback Switch", 0, CS4231_MONO_CTRL, 7, 1, 1),
  1298. CS4231_SINGLE("Mono Playback Volume", 0, CS4231_MONO_CTRL, 0, 15, 1),
  1299. CS4231_SINGLE("Mono Output Playback Switch", 0, CS4231_MONO_CTRL, 6, 1, 1),
  1300. CS4231_SINGLE("Mono Output Playback Bypass", 0, CS4231_MONO_CTRL, 5, 1, 0),
  1301. CS4231_DOUBLE("Capture Volume", 0, CS4231_LEFT_INPUT, CS4231_RIGHT_INPUT, 0, 0,
  1302. 15, 0),
  1303. {
  1304. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1305. .name = "Capture Source",
  1306. .info = snd_cs4231_info_mux,
  1307. .get = snd_cs4231_get_mux,
  1308. .put = snd_cs4231_put_mux,
  1309. },
  1310. CS4231_DOUBLE("Mic Boost", 0, CS4231_LEFT_INPUT, CS4231_RIGHT_INPUT, 5, 5,
  1311. 1, 0),
  1312. CS4231_SINGLE("Loopback Capture Switch", 0, CS4231_LOOPBACK, 0, 1, 0),
  1313. CS4231_SINGLE("Loopback Capture Volume", 0, CS4231_LOOPBACK, 2, 63, 1),
  1314. /* SPARC specific uses of XCTL{0,1} general purpose outputs. */
  1315. CS4231_SINGLE("Line Out Switch", 0, CS4231_PIN_CTRL, 6, 1, 1),
  1316. CS4231_SINGLE("Headphone Out Switch", 0, CS4231_PIN_CTRL, 7, 1, 1)
  1317. };
  1318. static int __init snd_cs4231_mixer(struct snd_card *card)
  1319. {
  1320. struct snd_cs4231 *chip = card->private_data;
  1321. int err, idx;
  1322. snd_assert(chip != NULL && chip->pcm != NULL, return -EINVAL);
  1323. strcpy(card->mixername, chip->pcm->name);
  1324. for (idx = 0; idx < ARRAY_SIZE(snd_cs4231_controls); idx++) {
  1325. err = snd_ctl_add(card,
  1326. snd_ctl_new1(&snd_cs4231_controls[idx], chip));
  1327. if (err < 0)
  1328. return err;
  1329. }
  1330. return 0;
  1331. }
  1332. static int dev;
  1333. static int __init cs4231_attach_begin(struct snd_card **rcard)
  1334. {
  1335. struct snd_card *card;
  1336. struct snd_cs4231 *chip;
  1337. *rcard = NULL;
  1338. if (dev >= SNDRV_CARDS)
  1339. return -ENODEV;
  1340. if (!enable[dev]) {
  1341. dev++;
  1342. return -ENOENT;
  1343. }
  1344. card = snd_card_new(index[dev], id[dev], THIS_MODULE,
  1345. sizeof(struct snd_cs4231));
  1346. if (card == NULL)
  1347. return -ENOMEM;
  1348. strcpy(card->driver, "CS4231");
  1349. strcpy(card->shortname, "Sun CS4231");
  1350. chip = card->private_data;
  1351. chip->card = card;
  1352. *rcard = card;
  1353. return 0;
  1354. }
  1355. static int __init cs4231_attach_finish(struct snd_card *card)
  1356. {
  1357. struct snd_cs4231 *chip = card->private_data;
  1358. int err;
  1359. err = snd_cs4231_pcm(card);
  1360. if (err < 0)
  1361. goto out_err;
  1362. err = snd_cs4231_mixer(card);
  1363. if (err < 0)
  1364. goto out_err;
  1365. err = snd_cs4231_timer(card);
  1366. if (err < 0)
  1367. goto out_err;
  1368. err = snd_card_register(card);
  1369. if (err < 0)
  1370. goto out_err;
  1371. chip->next = cs4231_list;
  1372. cs4231_list = chip;
  1373. dev++;
  1374. return 0;
  1375. out_err:
  1376. snd_card_free(card);
  1377. return err;
  1378. }
  1379. #ifdef SBUS_SUPPORT
  1380. static irqreturn_t snd_cs4231_sbus_interrupt(int irq, void *dev_id)
  1381. {
  1382. unsigned long flags;
  1383. unsigned char status;
  1384. u32 csr;
  1385. struct snd_cs4231 *chip = dev_id;
  1386. /*This is IRQ is not raised by the cs4231*/
  1387. if (!(__cs4231_readb(chip, CS4231U(chip, STATUS)) & CS4231_GLOBALIRQ))
  1388. return IRQ_NONE;
  1389. /* ACK the APC interrupt. */
  1390. csr = sbus_readl(chip->port + APCCSR);
  1391. sbus_writel(csr, chip->port + APCCSR);
  1392. if ((csr & APC_PDMA_READY) &&
  1393. (csr & APC_PLAY_INT) &&
  1394. (csr & APC_XINT_PNVA) &&
  1395. !(csr & APC_XINT_EMPT))
  1396. snd_cs4231_play_callback(chip);
  1397. if ((csr & APC_CDMA_READY) &&
  1398. (csr & APC_CAPT_INT) &&
  1399. (csr & APC_XINT_CNVA) &&
  1400. !(csr & APC_XINT_EMPT))
  1401. snd_cs4231_capture_callback(chip);
  1402. status = snd_cs4231_in(chip, CS4231_IRQ_STATUS);
  1403. if (status & CS4231_TIMER_IRQ) {
  1404. if (chip->timer)
  1405. snd_timer_interrupt(chip->timer, chip->timer->sticks);
  1406. }
  1407. if ((status & CS4231_RECORD_IRQ) && (csr & APC_CDMA_READY))
  1408. snd_cs4231_overrange(chip);
  1409. /* ACK the CS4231 interrupt. */
  1410. spin_lock_irqsave(&chip->lock, flags);
  1411. snd_cs4231_outm(chip, CS4231_IRQ_STATUS, ~CS4231_ALL_IRQS | ~status, 0);
  1412. spin_unlock_irqrestore(&chip->lock, flags);
  1413. return IRQ_HANDLED;
  1414. }
  1415. /*
  1416. * SBUS DMA routines
  1417. */
  1418. static int sbus_dma_request(struct cs4231_dma_control *dma_cont,
  1419. dma_addr_t bus_addr, size_t len)
  1420. {
  1421. unsigned long flags;
  1422. u32 test, csr;
  1423. int err;
  1424. struct sbus_dma_info *base = &dma_cont->sbus_info;
  1425. if (len >= (1 << 24))
  1426. return -EINVAL;
  1427. spin_lock_irqsave(&base->lock, flags);
  1428. csr = sbus_readl(base->regs + APCCSR);
  1429. err = -EINVAL;
  1430. test = APC_CDMA_READY;
  1431. if (base->dir == APC_PLAY)
  1432. test = APC_PDMA_READY;
  1433. if (!(csr & test))
  1434. goto out;
  1435. err = -EBUSY;
  1436. test = APC_XINT_CNVA;
  1437. if (base->dir == APC_PLAY)
  1438. test = APC_XINT_PNVA;
  1439. if (!(csr & test))
  1440. goto out;
  1441. err = 0;
  1442. sbus_writel(bus_addr, base->regs + base->dir + APCNVA);
  1443. sbus_writel(len, base->regs + base->dir + APCNC);
  1444. out:
  1445. spin_unlock_irqrestore(&base->lock, flags);
  1446. return err;
  1447. }
  1448. static void sbus_dma_prepare(struct cs4231_dma_control *dma_cont, int d)
  1449. {
  1450. unsigned long flags;
  1451. u32 csr, test;
  1452. struct sbus_dma_info *base = &dma_cont->sbus_info;
  1453. spin_lock_irqsave(&base->lock, flags);
  1454. csr = sbus_readl(base->regs + APCCSR);
  1455. test = APC_GENL_INT | APC_PLAY_INT | APC_XINT_ENA |
  1456. APC_XINT_PLAY | APC_XINT_PEMP | APC_XINT_GENL |
  1457. APC_XINT_PENA;
  1458. if (base->dir == APC_RECORD)
  1459. test = APC_GENL_INT | APC_CAPT_INT | APC_XINT_ENA |
  1460. APC_XINT_CAPT | APC_XINT_CEMP | APC_XINT_GENL;
  1461. csr |= test;
  1462. sbus_writel(csr, base->regs + APCCSR);
  1463. spin_unlock_irqrestore(&base->lock, flags);
  1464. }
  1465. static void sbus_dma_enable(struct cs4231_dma_control *dma_cont, int on)
  1466. {
  1467. unsigned long flags;
  1468. u32 csr, shift;
  1469. struct sbus_dma_info *base = &dma_cont->sbus_info;
  1470. spin_lock_irqsave(&base->lock, flags);
  1471. if (!on) {
  1472. sbus_writel(0, base->regs + base->dir + APCNC);
  1473. sbus_writel(0, base->regs + base->dir + APCNVA);
  1474. if (base->dir == APC_PLAY) {
  1475. sbus_writel(0, base->regs + base->dir + APCC);
  1476. sbus_writel(0, base->regs + base->dir + APCVA);
  1477. }
  1478. udelay(1200);
  1479. }
  1480. csr = sbus_readl(base->regs + APCCSR);
  1481. shift = 0;
  1482. if (base->dir == APC_PLAY)
  1483. shift = 1;
  1484. if (on)
  1485. csr &= ~(APC_CPAUSE << shift);
  1486. else
  1487. csr |= (APC_CPAUSE << shift);
  1488. sbus_writel(csr, base->regs + APCCSR);
  1489. if (on)
  1490. csr |= (APC_CDMA_READY << shift);
  1491. else
  1492. csr &= ~(APC_CDMA_READY << shift);
  1493. sbus_writel(csr, base->regs + APCCSR);
  1494. spin_unlock_irqrestore(&base->lock, flags);
  1495. }
  1496. static unsigned int sbus_dma_addr(struct cs4231_dma_control *dma_cont)
  1497. {
  1498. struct sbus_dma_info *base = &dma_cont->sbus_info;
  1499. return sbus_readl(base->regs + base->dir + APCVA);
  1500. }
  1501. static void sbus_dma_preallocate(struct snd_cs4231 *chip, struct snd_pcm *pcm)
  1502. {
  1503. snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
  1504. &chip->dev_u.op->dev,
  1505. 64 * 1024, 128 * 1024);
  1506. }
  1507. /*
  1508. * Init and exit routines
  1509. */
  1510. static int snd_cs4231_sbus_free(struct snd_cs4231 *chip)
  1511. {
  1512. struct of_device *op = chip->dev_u.op;
  1513. if (chip->irq[0])
  1514. free_irq(chip->irq[0], chip);
  1515. if (chip->port)
  1516. of_iounmap(&op->resource[0], chip->port, chip->regs_size);
  1517. return 0;
  1518. }
  1519. static int snd_cs4231_sbus_dev_free(struct snd_device *device)
  1520. {
  1521. struct snd_cs4231 *cp = device->device_data;
  1522. return snd_cs4231_sbus_free(cp);
  1523. }
  1524. static struct snd_device_ops snd_cs4231_sbus_dev_ops = {
  1525. .dev_free = snd_cs4231_sbus_dev_free,
  1526. };
  1527. static int __init snd_cs4231_sbus_create(struct snd_card *card,
  1528. struct of_device *op,
  1529. int dev)
  1530. {
  1531. struct snd_cs4231 *chip = card->private_data;
  1532. int err;
  1533. spin_lock_init(&chip->lock);
  1534. spin_lock_init(&chip->c_dma.sbus_info.lock);
  1535. spin_lock_init(&chip->p_dma.sbus_info.lock);
  1536. mutex_init(&chip->mce_mutex);
  1537. mutex_init(&chip->open_mutex);
  1538. chip->dev_u.op = op;
  1539. chip->regs_size = resource_size(&op->resource[0]);
  1540. memcpy(&chip->image, &snd_cs4231_original_image,
  1541. sizeof(snd_cs4231_original_image));
  1542. chip->port = of_ioremap(&op->resource[0], 0,
  1543. chip->regs_size, "cs4231");
  1544. if (!chip->port) {
  1545. snd_printdd("cs4231-%d: Unable to map chip registers.\n", dev);
  1546. return -EIO;
  1547. }
  1548. chip->c_dma.sbus_info.regs = chip->port;
  1549. chip->p_dma.sbus_info.regs = chip->port;
  1550. chip->c_dma.sbus_info.dir = APC_RECORD;
  1551. chip->p_dma.sbus_info.dir = APC_PLAY;
  1552. chip->p_dma.prepare = sbus_dma_prepare;
  1553. chip->p_dma.enable = sbus_dma_enable;
  1554. chip->p_dma.request = sbus_dma_request;
  1555. chip->p_dma.address = sbus_dma_addr;
  1556. chip->p_dma.preallocate = sbus_dma_preallocate;
  1557. chip->c_dma.prepare = sbus_dma_prepare;
  1558. chip->c_dma.enable = sbus_dma_enable;
  1559. chip->c_dma.request = sbus_dma_request;
  1560. chip->c_dma.address = sbus_dma_addr;
  1561. chip->c_dma.preallocate = sbus_dma_preallocate;
  1562. if (request_irq(op->irqs[0], snd_cs4231_sbus_interrupt,
  1563. IRQF_SHARED, "cs4231", chip)) {
  1564. snd_printdd("cs4231-%d: Unable to grab SBUS IRQ %d\n",
  1565. dev, op->irqs[0]);
  1566. snd_cs4231_sbus_free(chip);
  1567. return -EBUSY;
  1568. }
  1569. chip->irq[0] = op->irqs[0];
  1570. if (snd_cs4231_probe(chip) < 0) {
  1571. snd_cs4231_sbus_free(chip);
  1572. return -ENODEV;
  1573. }
  1574. snd_cs4231_init(chip);
  1575. if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL,
  1576. chip, &snd_cs4231_sbus_dev_ops)) < 0) {
  1577. snd_cs4231_sbus_free(chip);
  1578. return err;
  1579. }
  1580. return 0;
  1581. }
  1582. static int __devinit cs4231_probe(struct of_device *op, const struct of_device_id *match)
  1583. {
  1584. struct resource *rp = &op->resource[0];
  1585. struct snd_card *card;
  1586. int err;
  1587. if (strcmp(op->node->parent->name, "sbus") &&
  1588. strcmp(op->node->parent->name, "sbi"))
  1589. return -ENODEV;
  1590. err = cs4231_attach_begin(&card);
  1591. if (err)
  1592. return err;
  1593. sprintf(card->longname, "%s at 0x%02lx:0x%016Lx, irq %d",
  1594. card->shortname,
  1595. rp->flags & 0xffL,
  1596. (unsigned long long)rp->start,
  1597. op->irqs[0]);
  1598. err = snd_cs4231_sbus_create(card, op, dev);
  1599. if (err < 0) {
  1600. snd_card_free(card);
  1601. return err;
  1602. }
  1603. return cs4231_attach_finish(card);
  1604. }
  1605. #endif
  1606. #ifdef EBUS_SUPPORT
  1607. static void snd_cs4231_ebus_play_callback(struct ebus_dma_info *p, int event,
  1608. void *cookie)
  1609. {
  1610. struct snd_cs4231 *chip = cookie;
  1611. snd_cs4231_play_callback(chip);
  1612. }
  1613. static void snd_cs4231_ebus_capture_callback(struct ebus_dma_info *p,
  1614. int event, void *cookie)
  1615. {
  1616. struct snd_cs4231 *chip = cookie;
  1617. snd_cs4231_capture_callback(chip);
  1618. }
  1619. /*
  1620. * EBUS DMA wrappers
  1621. */
  1622. static int _ebus_dma_request(struct cs4231_dma_control *dma_cont,
  1623. dma_addr_t bus_addr, size_t len)
  1624. {
  1625. return ebus_dma_request(&dma_cont->ebus_info, bus_addr, len);
  1626. }
  1627. static void _ebus_dma_enable(struct cs4231_dma_control *dma_cont, int on)
  1628. {
  1629. ebus_dma_enable(&dma_cont->ebus_info, on);
  1630. }
  1631. static void _ebus_dma_prepare(struct cs4231_dma_control *dma_cont, int dir)
  1632. {
  1633. ebus_dma_prepare(&dma_cont->ebus_info, dir);
  1634. }
  1635. static unsigned int _ebus_dma_addr(struct cs4231_dma_control *dma_cont)
  1636. {
  1637. return ebus_dma_addr(&dma_cont->ebus_info);
  1638. }
  1639. static void _ebus_dma_preallocate(struct snd_cs4231 *chip, struct snd_pcm *pcm)
  1640. {
  1641. snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
  1642. snd_dma_pci_data(chip->dev_u.pdev),
  1643. 64*1024, 128*1024);
  1644. }
  1645. /*
  1646. * Init and exit routines
  1647. */
  1648. static int snd_cs4231_ebus_free(struct snd_cs4231 *chip)
  1649. {
  1650. if (chip->c_dma.ebus_info.regs) {
  1651. ebus_dma_unregister(&chip->c_dma.ebus_info);
  1652. iounmap(chip->c_dma.ebus_info.regs);
  1653. }
  1654. if (chip->p_dma.ebus_info.regs) {
  1655. ebus_dma_unregister(&chip->p_dma.ebus_info);
  1656. iounmap(chip->p_dma.ebus_info.regs);
  1657. }
  1658. if (chip->port)
  1659. iounmap(chip->port);
  1660. return 0;
  1661. }
  1662. static int snd_cs4231_ebus_dev_free(struct snd_device *device)
  1663. {
  1664. struct snd_cs4231 *cp = device->device_data;
  1665. return snd_cs4231_ebus_free(cp);
  1666. }
  1667. static struct snd_device_ops snd_cs4231_ebus_dev_ops = {
  1668. .dev_free = snd_cs4231_ebus_dev_free,
  1669. };
  1670. static int __init snd_cs4231_ebus_create(struct snd_card *card,
  1671. struct linux_ebus_device *edev,
  1672. int dev)
  1673. {
  1674. struct snd_cs4231 *chip = card->private_data;
  1675. int err;
  1676. spin_lock_init(&chip->lock);
  1677. spin_lock_init(&chip->c_dma.ebus_info.lock);
  1678. spin_lock_init(&chip->p_dma.ebus_info.lock);
  1679. mutex_init(&chip->mce_mutex);
  1680. mutex_init(&chip->open_mutex);
  1681. chip->flags |= CS4231_FLAG_EBUS;
  1682. chip->dev_u.pdev = edev->bus->self;
  1683. memcpy(&chip->image, &snd_cs4231_original_image,
  1684. sizeof(snd_cs4231_original_image));
  1685. strcpy(chip->c_dma.ebus_info.name, "cs4231(capture)");
  1686. chip->c_dma.ebus_info.flags = EBUS_DMA_FLAG_USE_EBDMA_HANDLER;
  1687. chip->c_dma.ebus_info.callback = snd_cs4231_ebus_capture_callback;
  1688. chip->c_dma.ebus_info.client_cookie = chip;
  1689. chip->c_dma.ebus_info.irq = edev->irqs[0];
  1690. strcpy(chip->p_dma.ebus_info.name, "cs4231(play)");
  1691. chip->p_dma.ebus_info.flags = EBUS_DMA_FLAG_USE_EBDMA_HANDLER;
  1692. chip->p_dma.ebus_info.callback = snd_cs4231_ebus_play_callback;
  1693. chip->p_dma.ebus_info.client_cookie = chip;
  1694. chip->p_dma.ebus_info.irq = edev->irqs[1];
  1695. chip->p_dma.prepare = _ebus_dma_prepare;
  1696. chip->p_dma.enable = _ebus_dma_enable;
  1697. chip->p_dma.request = _ebus_dma_request;
  1698. chip->p_dma.address = _ebus_dma_addr;
  1699. chip->p_dma.preallocate = _ebus_dma_preallocate;
  1700. chip->c_dma.prepare = _ebus_dma_prepare;
  1701. chip->c_dma.enable = _ebus_dma_enable;
  1702. chip->c_dma.request = _ebus_dma_request;
  1703. chip->c_dma.address = _ebus_dma_addr;
  1704. chip->c_dma.preallocate = _ebus_dma_preallocate;
  1705. chip->port = ioremap(edev->resource[0].start, 0x10);
  1706. chip->p_dma.ebus_info.regs = ioremap(edev->resource[1].start, 0x10);
  1707. chip->c_dma.ebus_info.regs = ioremap(edev->resource[2].start, 0x10);
  1708. if (!chip->port || !chip->p_dma.ebus_info.regs ||
  1709. !chip->c_dma.ebus_info.regs) {
  1710. snd_cs4231_ebus_free(chip);
  1711. snd_printdd("cs4231-%d: Unable to map chip registers.\n", dev);
  1712. return -EIO;
  1713. }
  1714. if (ebus_dma_register(&chip->c_dma.ebus_info)) {
  1715. snd_cs4231_ebus_free(chip);
  1716. snd_printdd("cs4231-%d: Unable to register EBUS capture DMA\n",
  1717. dev);
  1718. return -EBUSY;
  1719. }
  1720. if (ebus_dma_irq_enable(&chip->c_dma.ebus_info, 1)) {
  1721. snd_cs4231_ebus_free(chip);
  1722. snd_printdd("cs4231-%d: Unable to enable EBUS capture IRQ\n",
  1723. dev);
  1724. return -EBUSY;
  1725. }
  1726. if (ebus_dma_register(&chip->p_dma.ebus_info)) {
  1727. snd_cs4231_ebus_free(chip);
  1728. snd_printdd("cs4231-%d: Unable to register EBUS play DMA\n",
  1729. dev);
  1730. return -EBUSY;
  1731. }
  1732. if (ebus_dma_irq_enable(&chip->p_dma.ebus_info, 1)) {
  1733. snd_cs4231_ebus_free(chip);
  1734. snd_printdd("cs4231-%d: Unable to enable EBUS play IRQ\n", dev);
  1735. return -EBUSY;
  1736. }
  1737. if (snd_cs4231_probe(chip) < 0) {
  1738. snd_cs4231_ebus_free(chip);
  1739. return -ENODEV;
  1740. }
  1741. snd_cs4231_init(chip);
  1742. if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL,
  1743. chip, &snd_cs4231_ebus_dev_ops)) < 0) {
  1744. snd_cs4231_ebus_free(chip);
  1745. return err;
  1746. }
  1747. return 0;
  1748. }
  1749. static int __init cs4231_ebus_attach(struct linux_ebus_device *edev)
  1750. {
  1751. struct snd_card *card;
  1752. int err;
  1753. err = cs4231_attach_begin(&card);
  1754. if (err)
  1755. return err;
  1756. sprintf(card->longname, "%s at 0x%lx, irq %d",
  1757. card->shortname,
  1758. edev->resource[0].start,
  1759. edev->irqs[0]);
  1760. err = snd_cs4231_ebus_create(card, edev, dev);
  1761. if (err < 0) {
  1762. snd_card_free(card);
  1763. return err;
  1764. }
  1765. return cs4231_attach_finish(card);
  1766. }
  1767. #endif
  1768. #ifdef SBUS_SUPPORT
  1769. static struct of_device_id cs4231_match[] = {
  1770. {
  1771. .name = "SUNW,CS4231",
  1772. },
  1773. {},
  1774. };
  1775. MODULE_DEVICE_TABLE(of, cs4231_match);
  1776. static struct of_platform_driver cs4231_driver = {
  1777. .name = "audio",
  1778. .match_table = cs4231_match,
  1779. .probe = cs4231_probe,
  1780. };
  1781. #endif
  1782. static int __init cs4231_init(void)
  1783. {
  1784. #ifdef EBUS_SUPPORT
  1785. struct linux_ebus *ebus;
  1786. struct linux_ebus_device *edev;
  1787. #endif
  1788. int found;
  1789. found = 0;
  1790. #ifdef SBUS_SUPPORT
  1791. {
  1792. int err = of_register_driver(&cs4231_driver, &of_bus_type);
  1793. if (err)
  1794. return err;
  1795. }
  1796. #endif
  1797. #ifdef EBUS_SUPPORT
  1798. for_each_ebus(ebus) {
  1799. for_each_ebusdev(edev, ebus) {
  1800. int match = 0;
  1801. if (!strcmp(edev->prom_node->name, "SUNW,CS4231")) {
  1802. match = 1;
  1803. } else if (!strcmp(edev->prom_node->name, "audio")) {
  1804. const char *compat;
  1805. compat = of_get_property(edev->prom_node,
  1806. "compatible", NULL);
  1807. if (compat && !strcmp(compat, "SUNW,CS4231"))
  1808. match = 1;
  1809. }
  1810. if (match &&
  1811. cs4231_ebus_attach(edev) == 0)
  1812. found++;
  1813. }
  1814. }
  1815. #endif
  1816. return 0;
  1817. }
  1818. static void __exit cs4231_exit(void)
  1819. {
  1820. struct snd_cs4231 *p = cs4231_list;
  1821. #ifdef SBUS_SUPPORT
  1822. of_unregister_driver(&cs4231_driver);
  1823. #endif
  1824. while (p != NULL) {
  1825. struct snd_cs4231 *next = p->next;
  1826. snd_card_free(p->card);
  1827. p = next;
  1828. }
  1829. cs4231_list = NULL;
  1830. }
  1831. module_init(cs4231_init);
  1832. module_exit(cs4231_exit);