head-nommu.S 2.2 KB

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  1. /*
  2. * linux/arch/arm/kernel/head-nommu.S
  3. *
  4. * Copyright (C) 1994-2002 Russell King
  5. * Copyright (C) 2003-2006 Hyok S. Choi
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * published by the Free Software Foundation.
  10. *
  11. * Common kernel startup code (non-paged MM)
  12. * for 32-bit CPUs which has a process ID register(CP15).
  13. *
  14. */
  15. #include <linux/config.h>
  16. #include <linux/linkage.h>
  17. #include <linux/init.h>
  18. #include <asm/assembler.h>
  19. #include <asm/mach-types.h>
  20. #include <asm/procinfo.h>
  21. #include <asm/ptrace.h>
  22. #include <asm/thread_info.h>
  23. #include <asm/system.h>
  24. #define PROCINFO_INITFUNC 12
  25. #define MACHINFO_TYPE 0
  26. /*
  27. * Kernel startup entry point.
  28. * ---------------------------
  29. *
  30. * This is normally called from the decompressor code. The requirements
  31. * are: MMU = off, D-cache = off, I-cache = dont care, r0 = 0,
  32. * r1 = machine nr.
  33. *
  34. * See linux/arch/arm/tools/mach-types for the complete list of machine
  35. * numbers for r1.
  36. *
  37. */
  38. __INIT
  39. .type stext, %function
  40. ENTRY(stext)
  41. msr cpsr_c, #PSR_F_BIT | PSR_I_BIT | MODE_SVC @ ensure svc mode
  42. @ and irqs disabled
  43. mrc p15, 0, r9, c0, c0 @ get processor id
  44. bl __lookup_processor_type @ r5=procinfo r9=cpuid
  45. movs r10, r5 @ invalid processor (r5=0)?
  46. beq __error_p @ yes, error 'p'
  47. bl __lookup_machine_type @ r5=machinfo
  48. movs r8, r5 @ invalid machine (r5=0)?
  49. beq __error_a @ yes, error 'a'
  50. ldr r13, __switch_data @ address to jump to after
  51. @ the initialization is done
  52. adr lr, __after_proc_init @ return (PIC) address
  53. add pc, r10, #PROCINFO_INITFUNC
  54. /*
  55. * Set the Control Register and Read the process ID.
  56. */
  57. .type __after_proc_init, %function
  58. __after_proc_init:
  59. mrc p15, 0, r0, c1, c0, 0 @ read control reg
  60. #ifdef CONFIG_ALIGNMENT_TRAP
  61. orr r0, r0, #CR_A
  62. #else
  63. bic r0, r0, #CR_A
  64. #endif
  65. #ifdef CONFIG_CPU_DCACHE_DISABLE
  66. bic r0, r0, #CR_C
  67. #endif
  68. #ifdef CONFIG_CPU_BPREDICT_DISABLE
  69. bic r0, r0, #CR_Z
  70. #endif
  71. #ifdef CONFIG_CPU_ICACHE_DISABLE
  72. bic r0, r0, #CR_I
  73. #endif
  74. mcr p15, 0, r0, c1, c0, 0 @ write control reg
  75. mov pc, r13 @ clear the BSS and jump
  76. @ to start_kernel
  77. .ltorg
  78. #include "head-common.S"