pm8001_sas.h 20 KB

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  1. /*
  2. * PMC-Sierra PM8001/8081/8088/8089 SAS/SATA based host adapters driver
  3. *
  4. * Copyright (c) 2008-2009 USI Co., Ltd.
  5. * All rights reserved.
  6. *
  7. * Redistribution and use in source and binary forms, with or without
  8. * modification, are permitted provided that the following conditions
  9. * are met:
  10. * 1. Redistributions of source code must retain the above copyright
  11. * notice, this list of conditions, and the following disclaimer,
  12. * without modification.
  13. * 2. Redistributions in binary form must reproduce at minimum a disclaimer
  14. * substantially similar to the "NO WARRANTY" disclaimer below
  15. * ("Disclaimer") and any redistribution must be conditioned upon
  16. * including a substantially similar Disclaimer requirement for further
  17. * binary redistribution.
  18. * 3. Neither the names of the above-listed copyright holders nor the names
  19. * of any contributors may be used to endorse or promote products derived
  20. * from this software without specific prior written permission.
  21. *
  22. * Alternatively, this software may be distributed under the terms of the
  23. * GNU General Public License ("GPL") version 2 as published by the Free
  24. * Software Foundation.
  25. *
  26. * NO WARRANTY
  27. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  28. * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  29. * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR
  30. * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  31. * HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  32. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  33. * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  34. * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
  35. * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
  36. * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  37. * POSSIBILITY OF SUCH DAMAGES.
  38. *
  39. */
  40. #ifndef _PM8001_SAS_H_
  41. #define _PM8001_SAS_H_
  42. #include <linux/kernel.h>
  43. #include <linux/module.h>
  44. #include <linux/spinlock.h>
  45. #include <linux/delay.h>
  46. #include <linux/types.h>
  47. #include <linux/ctype.h>
  48. #include <linux/dma-mapping.h>
  49. #include <linux/pci.h>
  50. #include <linux/interrupt.h>
  51. #include <linux/workqueue.h>
  52. #include <scsi/libsas.h>
  53. #include <scsi/scsi_tcq.h>
  54. #include <scsi/sas_ata.h>
  55. #include <linux/atomic.h>
  56. #include "pm8001_defs.h"
  57. #define DRV_NAME "pm80xx"
  58. #define DRV_VERSION "0.1.37"
  59. #define PM8001_FAIL_LOGGING 0x01 /* Error message logging */
  60. #define PM8001_INIT_LOGGING 0x02 /* driver init logging */
  61. #define PM8001_DISC_LOGGING 0x04 /* discovery layer logging */
  62. #define PM8001_IO_LOGGING 0x08 /* I/O path logging */
  63. #define PM8001_EH_LOGGING 0x10 /* libsas EH function logging*/
  64. #define PM8001_IOCTL_LOGGING 0x20 /* IOCTL message logging */
  65. #define PM8001_MSG_LOGGING 0x40 /* misc message logging */
  66. #define pm8001_printk(format, arg...) printk(KERN_INFO "pm80xx %s %d:" \
  67. format, __func__, __LINE__, ## arg)
  68. #define PM8001_CHECK_LOGGING(HBA, LEVEL, CMD) \
  69. do { \
  70. if (unlikely(HBA->logging_level & LEVEL)) \
  71. do { \
  72. CMD; \
  73. } while (0); \
  74. } while (0);
  75. #define PM8001_EH_DBG(HBA, CMD) \
  76. PM8001_CHECK_LOGGING(HBA, PM8001_EH_LOGGING, CMD)
  77. #define PM8001_INIT_DBG(HBA, CMD) \
  78. PM8001_CHECK_LOGGING(HBA, PM8001_INIT_LOGGING, CMD)
  79. #define PM8001_DISC_DBG(HBA, CMD) \
  80. PM8001_CHECK_LOGGING(HBA, PM8001_DISC_LOGGING, CMD)
  81. #define PM8001_IO_DBG(HBA, CMD) \
  82. PM8001_CHECK_LOGGING(HBA, PM8001_IO_LOGGING, CMD)
  83. #define PM8001_FAIL_DBG(HBA, CMD) \
  84. PM8001_CHECK_LOGGING(HBA, PM8001_FAIL_LOGGING, CMD)
  85. #define PM8001_IOCTL_DBG(HBA, CMD) \
  86. PM8001_CHECK_LOGGING(HBA, PM8001_IOCTL_LOGGING, CMD)
  87. #define PM8001_MSG_DBG(HBA, CMD) \
  88. PM8001_CHECK_LOGGING(HBA, PM8001_MSG_LOGGING, CMD)
  89. #define PM8001_USE_TASKLET
  90. #define PM8001_USE_MSIX
  91. #define PM8001_READ_VPD
  92. #define DEV_IS_EXPANDER(type) ((type == SAS_EDGE_EXPANDER_DEVICE) || (type == SAS_FANOUT_EXPANDER_DEVICE))
  93. #define PM8001_NAME_LENGTH 32/* generic length of strings */
  94. extern struct list_head hba_list;
  95. extern const struct pm8001_dispatch pm8001_8001_dispatch;
  96. extern const struct pm8001_dispatch pm8001_80xx_dispatch;
  97. struct pm8001_hba_info;
  98. struct pm8001_ccb_info;
  99. struct pm8001_device;
  100. /* define task management IU */
  101. struct pm8001_tmf_task {
  102. u8 tmf;
  103. u32 tag_of_task_to_be_managed;
  104. };
  105. struct pm8001_ioctl_payload {
  106. u32 signature;
  107. u16 major_function;
  108. u16 minor_function;
  109. u16 length;
  110. u16 status;
  111. u16 offset;
  112. u16 id;
  113. u8 *func_specific;
  114. };
  115. struct pm8001_dispatch {
  116. char *name;
  117. int (*chip_init)(struct pm8001_hba_info *pm8001_ha);
  118. int (*chip_soft_rst)(struct pm8001_hba_info *pm8001_ha);
  119. void (*chip_rst)(struct pm8001_hba_info *pm8001_ha);
  120. int (*chip_ioremap)(struct pm8001_hba_info *pm8001_ha);
  121. void (*chip_iounmap)(struct pm8001_hba_info *pm8001_ha);
  122. irqreturn_t (*isr)(struct pm8001_hba_info *pm8001_ha, u8 vec);
  123. u32 (*is_our_interupt)(struct pm8001_hba_info *pm8001_ha);
  124. int (*isr_process_oq)(struct pm8001_hba_info *pm8001_ha, u8 vec);
  125. void (*interrupt_enable)(struct pm8001_hba_info *pm8001_ha, u8 vec);
  126. void (*interrupt_disable)(struct pm8001_hba_info *pm8001_ha, u8 vec);
  127. void (*make_prd)(struct scatterlist *scatter, int nr, void *prd);
  128. int (*smp_req)(struct pm8001_hba_info *pm8001_ha,
  129. struct pm8001_ccb_info *ccb);
  130. int (*ssp_io_req)(struct pm8001_hba_info *pm8001_ha,
  131. struct pm8001_ccb_info *ccb);
  132. int (*sata_req)(struct pm8001_hba_info *pm8001_ha,
  133. struct pm8001_ccb_info *ccb);
  134. int (*phy_start_req)(struct pm8001_hba_info *pm8001_ha, u8 phy_id);
  135. int (*phy_stop_req)(struct pm8001_hba_info *pm8001_ha, u8 phy_id);
  136. int (*reg_dev_req)(struct pm8001_hba_info *pm8001_ha,
  137. struct pm8001_device *pm8001_dev, u32 flag);
  138. int (*dereg_dev_req)(struct pm8001_hba_info *pm8001_ha, u32 device_id);
  139. int (*phy_ctl_req)(struct pm8001_hba_info *pm8001_ha,
  140. u32 phy_id, u32 phy_op);
  141. int (*task_abort)(struct pm8001_hba_info *pm8001_ha,
  142. struct pm8001_device *pm8001_dev, u8 flag, u32 task_tag,
  143. u32 cmd_tag);
  144. int (*ssp_tm_req)(struct pm8001_hba_info *pm8001_ha,
  145. struct pm8001_ccb_info *ccb, struct pm8001_tmf_task *tmf);
  146. int (*get_nvmd_req)(struct pm8001_hba_info *pm8001_ha, void *payload);
  147. int (*set_nvmd_req)(struct pm8001_hba_info *pm8001_ha, void *payload);
  148. int (*fw_flash_update_req)(struct pm8001_hba_info *pm8001_ha,
  149. void *payload);
  150. int (*set_dev_state_req)(struct pm8001_hba_info *pm8001_ha,
  151. struct pm8001_device *pm8001_dev, u32 state);
  152. int (*sas_diag_start_end_req)(struct pm8001_hba_info *pm8001_ha,
  153. u32 state);
  154. int (*sas_diag_execute_req)(struct pm8001_hba_info *pm8001_ha,
  155. u32 state);
  156. int (*sas_re_init_req)(struct pm8001_hba_info *pm8001_ha);
  157. };
  158. struct pm8001_chip_info {
  159. u32 encrypt;
  160. u32 n_phy;
  161. const struct pm8001_dispatch *dispatch;
  162. };
  163. #define PM8001_CHIP_DISP (pm8001_ha->chip->dispatch)
  164. struct pm8001_port {
  165. struct asd_sas_port sas_port;
  166. u8 port_attached;
  167. u8 wide_port_phymap;
  168. u8 port_state;
  169. struct list_head list;
  170. };
  171. struct pm8001_phy {
  172. struct pm8001_hba_info *pm8001_ha;
  173. struct pm8001_port *port;
  174. struct asd_sas_phy sas_phy;
  175. struct sas_identify identify;
  176. struct scsi_device *sdev;
  177. u64 dev_sas_addr;
  178. u32 phy_type;
  179. struct completion *enable_completion;
  180. u32 frame_rcvd_size;
  181. u8 frame_rcvd[32];
  182. u8 phy_attached;
  183. u8 phy_state;
  184. enum sas_linkrate minimum_linkrate;
  185. enum sas_linkrate maximum_linkrate;
  186. };
  187. struct pm8001_device {
  188. enum sas_device_type dev_type;
  189. struct domain_device *sas_device;
  190. u32 attached_phy;
  191. u32 id;
  192. struct completion *dcompletion;
  193. struct completion *setds_completion;
  194. u32 device_id;
  195. u32 running_req;
  196. };
  197. struct pm8001_prd_imt {
  198. __le32 len;
  199. __le32 e;
  200. };
  201. struct pm8001_prd {
  202. __le64 addr; /* 64-bit buffer address */
  203. struct pm8001_prd_imt im_len; /* 64-bit length */
  204. } __attribute__ ((packed));
  205. /*
  206. * CCB(Command Control Block)
  207. */
  208. struct pm8001_ccb_info {
  209. struct list_head entry;
  210. struct sas_task *task;
  211. u32 n_elem;
  212. u32 ccb_tag;
  213. dma_addr_t ccb_dma_handle;
  214. struct pm8001_device *device;
  215. struct pm8001_prd buf_prd[PM8001_MAX_DMA_SG];
  216. struct fw_control_ex *fw_control_context;
  217. u8 open_retry;
  218. };
  219. struct mpi_mem {
  220. void *virt_ptr;
  221. dma_addr_t phys_addr;
  222. u32 phys_addr_hi;
  223. u32 phys_addr_lo;
  224. u32 total_len;
  225. u32 num_elements;
  226. u32 element_size;
  227. u32 alignment;
  228. };
  229. struct mpi_mem_req {
  230. /* The number of element in the mpiMemory array */
  231. u32 count;
  232. /* The array of structures that define memroy regions*/
  233. struct mpi_mem region[USI_MAX_MEMCNT];
  234. };
  235. struct encrypt {
  236. u32 cipher_mode;
  237. u32 sec_mode;
  238. u32 status;
  239. u32 flag;
  240. };
  241. struct sas_phy_attribute_table {
  242. u32 phystart1_16[16];
  243. u32 outbound_hw_event_pid1_16[16];
  244. };
  245. union main_cfg_table {
  246. struct {
  247. u32 signature;
  248. u32 interface_rev;
  249. u32 firmware_rev;
  250. u32 max_out_io;
  251. u32 max_sgl;
  252. u32 ctrl_cap_flag;
  253. u32 gst_offset;
  254. u32 inbound_queue_offset;
  255. u32 outbound_queue_offset;
  256. u32 inbound_q_nppd_hppd;
  257. u32 outbound_hw_event_pid0_3;
  258. u32 outbound_hw_event_pid4_7;
  259. u32 outbound_ncq_event_pid0_3;
  260. u32 outbound_ncq_event_pid4_7;
  261. u32 outbound_tgt_ITNexus_event_pid0_3;
  262. u32 outbound_tgt_ITNexus_event_pid4_7;
  263. u32 outbound_tgt_ssp_event_pid0_3;
  264. u32 outbound_tgt_ssp_event_pid4_7;
  265. u32 outbound_tgt_smp_event_pid0_3;
  266. u32 outbound_tgt_smp_event_pid4_7;
  267. u32 upper_event_log_addr;
  268. u32 lower_event_log_addr;
  269. u32 event_log_size;
  270. u32 event_log_option;
  271. u32 upper_iop_event_log_addr;
  272. u32 lower_iop_event_log_addr;
  273. u32 iop_event_log_size;
  274. u32 iop_event_log_option;
  275. u32 fatal_err_interrupt;
  276. u32 fatal_err_dump_offset0;
  277. u32 fatal_err_dump_length0;
  278. u32 fatal_err_dump_offset1;
  279. u32 fatal_err_dump_length1;
  280. u32 hda_mode_flag;
  281. u32 anolog_setup_table_offset;
  282. u32 rsvd[4];
  283. } pm8001_tbl;
  284. struct {
  285. u32 signature;
  286. u32 interface_rev;
  287. u32 firmware_rev;
  288. u32 max_out_io;
  289. u32 max_sgl;
  290. u32 ctrl_cap_flag;
  291. u32 gst_offset;
  292. u32 inbound_queue_offset;
  293. u32 outbound_queue_offset;
  294. u32 inbound_q_nppd_hppd;
  295. u32 rsvd[8];
  296. u32 crc_core_dump;
  297. u32 rsvd1;
  298. u32 upper_event_log_addr;
  299. u32 lower_event_log_addr;
  300. u32 event_log_size;
  301. u32 event_log_severity;
  302. u32 upper_pcs_event_log_addr;
  303. u32 lower_pcs_event_log_addr;
  304. u32 pcs_event_log_size;
  305. u32 pcs_event_log_severity;
  306. u32 fatal_err_interrupt;
  307. u32 fatal_err_dump_offset0;
  308. u32 fatal_err_dump_length0;
  309. u32 fatal_err_dump_offset1;
  310. u32 fatal_err_dump_length1;
  311. u32 gpio_led_mapping;
  312. u32 analog_setup_table_offset;
  313. u32 int_vec_table_offset;
  314. u32 phy_attr_table_offset;
  315. u32 port_recovery_timer;
  316. u32 interrupt_reassertion_delay;
  317. } pm80xx_tbl;
  318. };
  319. union general_status_table {
  320. struct {
  321. u32 gst_len_mpistate;
  322. u32 iq_freeze_state0;
  323. u32 iq_freeze_state1;
  324. u32 msgu_tcnt;
  325. u32 iop_tcnt;
  326. u32 rsvd;
  327. u32 phy_state[8];
  328. u32 gpio_input_val;
  329. u32 rsvd1[2];
  330. u32 recover_err_info[8];
  331. } pm8001_tbl;
  332. struct {
  333. u32 gst_len_mpistate;
  334. u32 iq_freeze_state0;
  335. u32 iq_freeze_state1;
  336. u32 msgu_tcnt;
  337. u32 iop_tcnt;
  338. u32 rsvd[9];
  339. u32 gpio_input_val;
  340. u32 rsvd1[2];
  341. u32 recover_err_info[8];
  342. } pm80xx_tbl;
  343. };
  344. struct inbound_queue_table {
  345. u32 element_pri_size_cnt;
  346. u32 upper_base_addr;
  347. u32 lower_base_addr;
  348. u32 ci_upper_base_addr;
  349. u32 ci_lower_base_addr;
  350. u32 pi_pci_bar;
  351. u32 pi_offset;
  352. u32 total_length;
  353. void *base_virt;
  354. void *ci_virt;
  355. u32 reserved;
  356. __le32 consumer_index;
  357. u32 producer_idx;
  358. };
  359. struct outbound_queue_table {
  360. u32 element_size_cnt;
  361. u32 upper_base_addr;
  362. u32 lower_base_addr;
  363. void *base_virt;
  364. u32 pi_upper_base_addr;
  365. u32 pi_lower_base_addr;
  366. u32 ci_pci_bar;
  367. u32 ci_offset;
  368. u32 total_length;
  369. void *pi_virt;
  370. u32 interrup_vec_cnt_delay;
  371. u32 dinterrup_to_pci_offset;
  372. __le32 producer_index;
  373. u32 consumer_idx;
  374. };
  375. struct pm8001_hba_memspace {
  376. void __iomem *memvirtaddr;
  377. u64 membase;
  378. u32 memsize;
  379. };
  380. struct pm8001_hba_info {
  381. char name[PM8001_NAME_LENGTH];
  382. struct list_head list;
  383. unsigned long flags;
  384. spinlock_t lock;/* host-wide lock */
  385. struct pci_dev *pdev;/* our device */
  386. struct device *dev;
  387. struct pm8001_hba_memspace io_mem[6];
  388. struct mpi_mem_req memoryMap;
  389. struct encrypt encrypt_info; /* support encryption */
  390. void __iomem *msg_unit_tbl_addr;/*Message Unit Table Addr*/
  391. void __iomem *main_cfg_tbl_addr;/*Main Config Table Addr*/
  392. void __iomem *general_stat_tbl_addr;/*General Status Table Addr*/
  393. void __iomem *inbnd_q_tbl_addr;/*Inbound Queue Config Table Addr*/
  394. void __iomem *outbnd_q_tbl_addr;/*Outbound Queue Config Table Addr*/
  395. void __iomem *pspa_q_tbl_addr;
  396. /*MPI SAS PHY attributes Queue Config Table Addr*/
  397. void __iomem *ivt_tbl_addr; /*MPI IVT Table Addr */
  398. union main_cfg_table main_cfg_tbl;
  399. union general_status_table gs_tbl;
  400. struct inbound_queue_table inbnd_q_tbl[PM8001_MAX_SPCV_INB_NUM];
  401. struct outbound_queue_table outbnd_q_tbl[PM8001_MAX_SPCV_OUTB_NUM];
  402. struct sas_phy_attribute_table phy_attr_table;
  403. /* MPI SAS PHY attributes */
  404. u8 sas_addr[SAS_ADDR_SIZE];
  405. struct sas_ha_struct *sas;/* SCSI/SAS glue */
  406. struct Scsi_Host *shost;
  407. u32 chip_id;
  408. const struct pm8001_chip_info *chip;
  409. struct completion *nvmd_completion;
  410. int tags_num;
  411. unsigned long *tags;
  412. struct pm8001_phy phy[PM8001_MAX_PHYS];
  413. struct pm8001_port port[PM8001_MAX_PHYS];
  414. u32 id;
  415. u32 irq;
  416. u32 iomb_size; /* SPC and SPCV IOMB size */
  417. struct pm8001_device *devices;
  418. struct pm8001_ccb_info *ccb_info;
  419. #ifdef PM8001_USE_MSIX
  420. struct msix_entry msix_entries[PM8001_MAX_MSIX_VEC];
  421. /*for msi-x interrupt*/
  422. int number_of_intr;/*will be used in remove()*/
  423. #endif
  424. #ifdef PM8001_USE_TASKLET
  425. struct tasklet_struct tasklet;
  426. #endif
  427. u32 logging_level;
  428. u32 fw_status;
  429. u32 smp_exp_mode;
  430. u32 int_vector;
  431. const struct firmware *fw_image;
  432. u8 outq[PM8001_MAX_MSIX_VEC];
  433. };
  434. struct pm8001_work {
  435. struct work_struct work;
  436. struct pm8001_hba_info *pm8001_ha;
  437. void *data;
  438. int handler;
  439. };
  440. struct pm8001_fw_image_header {
  441. u8 vender_id[8];
  442. u8 product_id;
  443. u8 hardware_rev;
  444. u8 dest_partition;
  445. u8 reserved;
  446. u8 fw_rev[4];
  447. __be32 image_length;
  448. __be32 image_crc;
  449. __be32 startup_entry;
  450. } __attribute__((packed, aligned(4)));
  451. /**
  452. * FW Flash Update status values
  453. */
  454. #define FLASH_UPDATE_COMPLETE_PENDING_REBOOT 0x00
  455. #define FLASH_UPDATE_IN_PROGRESS 0x01
  456. #define FLASH_UPDATE_HDR_ERR 0x02
  457. #define FLASH_UPDATE_OFFSET_ERR 0x03
  458. #define FLASH_UPDATE_CRC_ERR 0x04
  459. #define FLASH_UPDATE_LENGTH_ERR 0x05
  460. #define FLASH_UPDATE_HW_ERR 0x06
  461. #define FLASH_UPDATE_DNLD_NOT_SUPPORTED 0x10
  462. #define FLASH_UPDATE_DISABLED 0x11
  463. #define NCQ_READ_LOG_FLAG 0x80000000
  464. #define NCQ_ABORT_ALL_FLAG 0x40000000
  465. #define NCQ_2ND_RLE_FLAG 0x20000000
  466. /**
  467. * brief param structure for firmware flash update.
  468. */
  469. struct fw_flash_updata_info {
  470. u32 cur_image_offset;
  471. u32 cur_image_len;
  472. u32 total_image_len;
  473. struct pm8001_prd sgl;
  474. };
  475. struct fw_control_info {
  476. u32 retcode;/*ret code (status)*/
  477. u32 phase;/*ret code phase*/
  478. u32 phaseCmplt;/*percent complete for the current
  479. update phase */
  480. u32 version;/*Hex encoded firmware version number*/
  481. u32 offset;/*Used for downloading firmware */
  482. u32 len; /*len of buffer*/
  483. u32 size;/* Used in OS VPD and Trace get size
  484. operations.*/
  485. u32 reserved;/* padding required for 64 bit
  486. alignment */
  487. u8 buffer[1];/* Start of buffer */
  488. };
  489. struct fw_control_ex {
  490. struct fw_control_info *fw_control;
  491. void *buffer;/* keep buffer pointer to be
  492. freed when the response comes*/
  493. void *virtAddr;/* keep virtual address of the data */
  494. void *usrAddr;/* keep virtual address of the
  495. user data */
  496. dma_addr_t phys_addr;
  497. u32 len; /* len of buffer */
  498. void *payload; /* pointer to IOCTL Payload */
  499. u8 inProgress;/*if 1 - the IOCTL request is in
  500. progress */
  501. void *param1;
  502. void *param2;
  503. void *param3;
  504. };
  505. /* pm8001 workqueue */
  506. extern struct workqueue_struct *pm8001_wq;
  507. /******************** function prototype *********************/
  508. int pm8001_tag_alloc(struct pm8001_hba_info *pm8001_ha, u32 *tag_out);
  509. void pm8001_tag_init(struct pm8001_hba_info *pm8001_ha);
  510. u32 pm8001_get_ncq_tag(struct sas_task *task, u32 *tag);
  511. void pm8001_ccb_free(struct pm8001_hba_info *pm8001_ha, u32 ccb_idx);
  512. void pm8001_ccb_task_free(struct pm8001_hba_info *pm8001_ha,
  513. struct sas_task *task, struct pm8001_ccb_info *ccb, u32 ccb_idx);
  514. int pm8001_phy_control(struct asd_sas_phy *sas_phy, enum phy_func func,
  515. void *funcdata);
  516. void pm8001_scan_start(struct Scsi_Host *shost);
  517. int pm8001_scan_finished(struct Scsi_Host *shost, unsigned long time);
  518. int pm8001_queue_command(struct sas_task *task, const int num,
  519. gfp_t gfp_flags);
  520. int pm8001_abort_task(struct sas_task *task);
  521. int pm8001_abort_task_set(struct domain_device *dev, u8 *lun);
  522. int pm8001_clear_aca(struct domain_device *dev, u8 *lun);
  523. int pm8001_clear_task_set(struct domain_device *dev, u8 *lun);
  524. int pm8001_dev_found(struct domain_device *dev);
  525. void pm8001_dev_gone(struct domain_device *dev);
  526. int pm8001_lu_reset(struct domain_device *dev, u8 *lun);
  527. int pm8001_I_T_nexus_reset(struct domain_device *dev);
  528. int pm8001_I_T_nexus_event_handler(struct domain_device *dev);
  529. int pm8001_query_task(struct sas_task *task);
  530. void pm8001_open_reject_retry(
  531. struct pm8001_hba_info *pm8001_ha,
  532. struct sas_task *task_to_close,
  533. struct pm8001_device *device_to_close);
  534. int pm8001_mem_alloc(struct pci_dev *pdev, void **virt_addr,
  535. dma_addr_t *pphys_addr, u32 *pphys_addr_hi, u32 *pphys_addr_lo,
  536. u32 mem_size, u32 align);
  537. void pm8001_chip_iounmap(struct pm8001_hba_info *pm8001_ha);
  538. int pm8001_mpi_build_cmd(struct pm8001_hba_info *pm8001_ha,
  539. struct inbound_queue_table *circularQ,
  540. u32 opCode, void *payload, u32 responseQueue);
  541. int pm8001_mpi_msg_free_get(struct inbound_queue_table *circularQ,
  542. u16 messageSize, void **messagePtr);
  543. u32 pm8001_mpi_msg_free_set(struct pm8001_hba_info *pm8001_ha, void *pMsg,
  544. struct outbound_queue_table *circularQ, u8 bc);
  545. u32 pm8001_mpi_msg_consume(struct pm8001_hba_info *pm8001_ha,
  546. struct outbound_queue_table *circularQ,
  547. void **messagePtr1, u8 *pBC);
  548. int pm8001_chip_set_dev_state_req(struct pm8001_hba_info *pm8001_ha,
  549. struct pm8001_device *pm8001_dev, u32 state);
  550. int pm8001_chip_fw_flash_update_req(struct pm8001_hba_info *pm8001_ha,
  551. void *payload);
  552. int pm8001_chip_fw_flash_update_build(struct pm8001_hba_info *pm8001_ha,
  553. void *fw_flash_updata_info, u32 tag);
  554. int pm8001_chip_set_nvmd_req(struct pm8001_hba_info *pm8001_ha, void *payload);
  555. int pm8001_chip_get_nvmd_req(struct pm8001_hba_info *pm8001_ha, void *payload);
  556. int pm8001_chip_ssp_tm_req(struct pm8001_hba_info *pm8001_ha,
  557. struct pm8001_ccb_info *ccb,
  558. struct pm8001_tmf_task *tmf);
  559. int pm8001_chip_abort_task(struct pm8001_hba_info *pm8001_ha,
  560. struct pm8001_device *pm8001_dev,
  561. u8 flag, u32 task_tag, u32 cmd_tag);
  562. int pm8001_chip_dereg_dev_req(struct pm8001_hba_info *pm8001_ha, u32 device_id);
  563. void pm8001_chip_make_sg(struct scatterlist *scatter, int nr, void *prd);
  564. void pm8001_work_fn(struct work_struct *work);
  565. int pm8001_handle_event(struct pm8001_hba_info *pm8001_ha,
  566. void *data, int handler);
  567. void pm8001_mpi_set_dev_state_resp(struct pm8001_hba_info *pm8001_ha,
  568. void *piomb);
  569. void pm8001_mpi_set_nvmd_resp(struct pm8001_hba_info *pm8001_ha,
  570. void *piomb);
  571. void pm8001_mpi_get_nvmd_resp(struct pm8001_hba_info *pm8001_ha,
  572. void *piomb);
  573. int pm8001_mpi_local_phy_ctl(struct pm8001_hba_info *pm8001_ha,
  574. void *piomb);
  575. void pm8001_get_lrate_mode(struct pm8001_phy *phy, u8 link_rate);
  576. void pm8001_get_attached_sas_addr(struct pm8001_phy *phy, u8 *sas_addr);
  577. void pm8001_bytes_dmaed(struct pm8001_hba_info *pm8001_ha, int i);
  578. int pm8001_mpi_reg_resp(struct pm8001_hba_info *pm8001_ha, void *piomb);
  579. int pm8001_mpi_dereg_resp(struct pm8001_hba_info *pm8001_ha, void *piomb);
  580. int pm8001_mpi_fw_flash_update_resp(struct pm8001_hba_info *pm8001_ha,
  581. void *piomb);
  582. int pm8001_mpi_general_event(struct pm8001_hba_info *pm8001_ha , void *piomb);
  583. int pm8001_mpi_task_abort_resp(struct pm8001_hba_info *pm8001_ha, void *piomb);
  584. struct sas_task *pm8001_alloc_task(void);
  585. void pm8001_task_done(struct sas_task *task);
  586. void pm8001_free_task(struct sas_task *task);
  587. void pm8001_tag_free(struct pm8001_hba_info *pm8001_ha, u32 tag);
  588. struct pm8001_device *pm8001_find_dev(struct pm8001_hba_info *pm8001_ha,
  589. u32 device_id);
  590. int pm80xx_set_thermal_config(struct pm8001_hba_info *pm8001_ha);
  591. int pm8001_bar4_shift(struct pm8001_hba_info *pm8001_ha, u32 shiftValue);
  592. /* ctl shared API */
  593. extern struct device_attribute *pm8001_host_attrs[];
  594. #endif