p54common.c 28 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697989910010110210310410510610710810911011111211311411511611711811912012112212312412512612712812913013113213313413513613713813914014114214314414514614714814915015115215315415515615715815916016116216316416516616716816917017117217317417517617717817918018118218318418518618718818919019119219319419519619719819920020120220320420520620720820921021121221321421521621721821922022122222322422522622722822923023123223323423523623723823924024124224324424524624724824925025125225325425525625725825926026126226326426526626726826927027127227327427527627727827928028128228328428528628728828929029129229329429529629729829930030130230330430530630730830931031131231331431531631731831932032132232332432532632732832933033133233333433533633733833934034134234334434534634734834935035135235335435535635735835936036136236336436536636736836937037137237337437537637737837938038138238338438538638738838939039139239339439539639739839940040140240340440540640740840941041141241341441541641741841942042142242342442542642742842943043143243343443543643743843944044144244344444544644744844945045145245345445545645745845946046146246346446546646746846947047147247347447547647747847948048148248348448548648748848949049149249349449549649749849950050150250350450550650750850951051151251351451551651751851952052152252352452552652752852953053153253353453553653753853954054154254354454554654754854955055155255355455555655755855956056156256356456556656756856957057157257357457557657757857958058158258358458558658758858959059159259359459559659759859960060160260360460560660760860961061161261361461561661761861962062162262362462562662762862963063163263363463563663763863964064164264364464564664764864965065165265365465565665765865966066166266366466566666766866967067167267367467567667767867968068168268368468568668768868969069169269369469569669769869970070170270370470570670770870971071171271371471571671771871972072172272372472572672772872973073173273373473573673773873974074174274374474574674774874975075175275375475575675775875976076176276376476576676776876977077177277377477577677777877978078178278378478578678778878979079179279379479579679779879980080180280380480580680780880981081181281381481581681781881982082182282382482582682782882983083183283383483583683783883984084184284384484584684784884985085185285385485585685785885986086186286386486586686786886987087187287387487587687787887988088188288388488588688788888989089189289389489589689789889990090190290390490590690790890991091191291391491591691791891992092192292392492592692792892993093193293393493593693793893994094194294394494594694794894995095195295395495595695795895996096196296396496596696796896997097197297397497597697797897998098198298398498598698798898999099199299399499599699799899910001001100210031004100510061007100810091010101110121013101410151016101710181019102010211022102310241025
  1. /*
  2. * Common code for mac80211 Prism54 drivers
  3. *
  4. * Copyright (c) 2006, Michael Wu <flamingice@sourmilk.net>
  5. * Copyright (c) 2007, Christian Lamparter <chunkeey@web.de>
  6. *
  7. * Based on the islsm (softmac prism54) driver, which is:
  8. * Copyright 2004-2006 Jean-Baptiste Note <jbnote@gmail.com>, et al.
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License version 2 as
  12. * published by the Free Software Foundation.
  13. */
  14. #include <linux/init.h>
  15. #include <linux/firmware.h>
  16. #include <linux/etherdevice.h>
  17. #include <net/mac80211.h>
  18. #include "p54.h"
  19. #include "p54common.h"
  20. MODULE_AUTHOR("Michael Wu <flamingice@sourmilk.net>");
  21. MODULE_DESCRIPTION("Softmac Prism54 common code");
  22. MODULE_LICENSE("GPL");
  23. MODULE_ALIAS("prism54common");
  24. void p54_parse_firmware(struct ieee80211_hw *dev, const struct firmware *fw)
  25. {
  26. struct p54_common *priv = dev->priv;
  27. struct bootrec_exp_if *exp_if;
  28. struct bootrec *bootrec;
  29. u32 *data = (u32 *)fw->data;
  30. u32 *end_data = (u32 *)fw->data + (fw->size >> 2);
  31. u8 *fw_version = NULL;
  32. size_t len;
  33. int i;
  34. if (priv->rx_start)
  35. return;
  36. while (data < end_data && *data)
  37. data++;
  38. while (data < end_data && !*data)
  39. data++;
  40. bootrec = (struct bootrec *) data;
  41. while (bootrec->data <= end_data &&
  42. (bootrec->data + (len = le32_to_cpu(bootrec->len))) <= end_data) {
  43. u32 code = le32_to_cpu(bootrec->code);
  44. switch (code) {
  45. case BR_CODE_COMPONENT_ID:
  46. switch (be32_to_cpu(*(__be32 *)bootrec->data)) {
  47. case FW_FMAC:
  48. printk(KERN_INFO "p54: FreeMAC firmware\n");
  49. break;
  50. case FW_LM20:
  51. printk(KERN_INFO "p54: LM20 firmware\n");
  52. break;
  53. case FW_LM86:
  54. printk(KERN_INFO "p54: LM86 firmware\n");
  55. break;
  56. case FW_LM87:
  57. printk(KERN_INFO "p54: LM87 firmware - not supported yet!\n");
  58. break;
  59. default:
  60. printk(KERN_INFO "p54: unknown firmware\n");
  61. break;
  62. }
  63. break;
  64. case BR_CODE_COMPONENT_VERSION:
  65. /* 24 bytes should be enough for all firmwares */
  66. if (strnlen((unsigned char*)bootrec->data, 24) < 24)
  67. fw_version = (unsigned char*)bootrec->data;
  68. break;
  69. case BR_CODE_DESCR:
  70. priv->rx_start = le32_to_cpu(((__le32 *)bootrec->data)[1]);
  71. /* FIXME add sanity checking */
  72. priv->rx_end = le32_to_cpu(((__le32 *)bootrec->data)[2]) - 0x3500;
  73. break;
  74. case BR_CODE_EXPOSED_IF:
  75. exp_if = (struct bootrec_exp_if *) bootrec->data;
  76. for (i = 0; i < (len * sizeof(*exp_if) / 4); i++)
  77. if (exp_if[i].if_id == cpu_to_le16(0x1a))
  78. priv->fw_var = le16_to_cpu(exp_if[i].variant);
  79. break;
  80. case BR_CODE_DEPENDENT_IF:
  81. break;
  82. case BR_CODE_END_OF_BRA:
  83. case LEGACY_BR_CODE_END_OF_BRA:
  84. end_data = NULL;
  85. break;
  86. default:
  87. break;
  88. }
  89. bootrec = (struct bootrec *)&bootrec->data[len];
  90. }
  91. if (fw_version)
  92. printk(KERN_INFO "p54: FW rev %s - Softmac protocol %x.%x\n",
  93. fw_version, priv->fw_var >> 8, priv->fw_var & 0xff);
  94. if (priv->fw_var >= 0x300) {
  95. /* Firmware supports QoS, use it! */
  96. priv->tx_stats.data[0].limit = 3;
  97. priv->tx_stats.data[1].limit = 4;
  98. priv->tx_stats.data[2].limit = 3;
  99. priv->tx_stats.data[3].limit = 1;
  100. dev->queues = 4;
  101. }
  102. }
  103. EXPORT_SYMBOL_GPL(p54_parse_firmware);
  104. static int p54_convert_rev0_to_rev1(struct ieee80211_hw *dev,
  105. struct pda_pa_curve_data *curve_data)
  106. {
  107. struct p54_common *priv = dev->priv;
  108. struct pda_pa_curve_data_sample_rev1 *rev1;
  109. struct pda_pa_curve_data_sample_rev0 *rev0;
  110. size_t cd_len = sizeof(*curve_data) +
  111. (curve_data->points_per_channel*sizeof(*rev1) + 2) *
  112. curve_data->channels;
  113. unsigned int i, j;
  114. void *source, *target;
  115. priv->curve_data = kmalloc(cd_len, GFP_KERNEL);
  116. if (!priv->curve_data)
  117. return -ENOMEM;
  118. memcpy(priv->curve_data, curve_data, sizeof(*curve_data));
  119. source = curve_data->data;
  120. target = priv->curve_data->data;
  121. for (i = 0; i < curve_data->channels; i++) {
  122. __le16 *freq = source;
  123. source += sizeof(__le16);
  124. *((__le16 *)target) = *freq;
  125. target += sizeof(__le16);
  126. for (j = 0; j < curve_data->points_per_channel; j++) {
  127. rev1 = target;
  128. rev0 = source;
  129. rev1->rf_power = rev0->rf_power;
  130. rev1->pa_detector = rev0->pa_detector;
  131. rev1->data_64qam = rev0->pcv;
  132. /* "invent" the points for the other modulations */
  133. #define SUB(x,y) (u8)((x) - (y)) > (x) ? 0 : (x) - (y)
  134. rev1->data_16qam = SUB(rev0->pcv, 12);
  135. rev1->data_qpsk = SUB(rev1->data_16qam, 12);
  136. rev1->data_bpsk = SUB(rev1->data_qpsk, 12);
  137. rev1->data_barker= SUB(rev1->data_bpsk, 14);
  138. #undef SUB
  139. target += sizeof(*rev1);
  140. source += sizeof(*rev0);
  141. }
  142. }
  143. return 0;
  144. }
  145. int p54_parse_eeprom(struct ieee80211_hw *dev, void *eeprom, int len)
  146. {
  147. struct p54_common *priv = dev->priv;
  148. struct eeprom_pda_wrap *wrap = NULL;
  149. struct pda_entry *entry;
  150. unsigned int data_len, entry_len;
  151. void *tmp;
  152. int err;
  153. u8 *end = (u8 *)eeprom + len;
  154. wrap = (struct eeprom_pda_wrap *) eeprom;
  155. entry = (void *)wrap->data + le16_to_cpu(wrap->len);
  156. /* verify that at least the entry length/code fits */
  157. while ((u8 *)entry <= end - sizeof(*entry)) {
  158. entry_len = le16_to_cpu(entry->len);
  159. data_len = ((entry_len - 1) << 1);
  160. /* abort if entry exceeds whole structure */
  161. if ((u8 *)entry + sizeof(*entry) + data_len > end)
  162. break;
  163. switch (le16_to_cpu(entry->code)) {
  164. case PDR_MAC_ADDRESS:
  165. SET_IEEE80211_PERM_ADDR(dev, entry->data);
  166. break;
  167. case PDR_PRISM_PA_CAL_OUTPUT_POWER_LIMITS:
  168. if (data_len < 2) {
  169. err = -EINVAL;
  170. goto err;
  171. }
  172. if (2 + entry->data[1]*sizeof(*priv->output_limit) > data_len) {
  173. err = -EINVAL;
  174. goto err;
  175. }
  176. priv->output_limit = kmalloc(entry->data[1] *
  177. sizeof(*priv->output_limit), GFP_KERNEL);
  178. if (!priv->output_limit) {
  179. err = -ENOMEM;
  180. goto err;
  181. }
  182. memcpy(priv->output_limit, &entry->data[2],
  183. entry->data[1]*sizeof(*priv->output_limit));
  184. priv->output_limit_len = entry->data[1];
  185. break;
  186. case PDR_PRISM_PA_CAL_CURVE_DATA:
  187. if (data_len < sizeof(struct pda_pa_curve_data)) {
  188. err = -EINVAL;
  189. goto err;
  190. }
  191. if (((struct pda_pa_curve_data *)entry->data)->cal_method_rev) {
  192. priv->curve_data = kmalloc(data_len, GFP_KERNEL);
  193. if (!priv->curve_data) {
  194. err = -ENOMEM;
  195. goto err;
  196. }
  197. memcpy(priv->curve_data, entry->data, data_len);
  198. } else {
  199. err = p54_convert_rev0_to_rev1(dev, (struct pda_pa_curve_data *)entry->data);
  200. if (err)
  201. goto err;
  202. }
  203. break;
  204. case PDR_PRISM_ZIF_TX_IQ_CALIBRATION:
  205. priv->iq_autocal = kmalloc(data_len, GFP_KERNEL);
  206. if (!priv->iq_autocal) {
  207. err = -ENOMEM;
  208. goto err;
  209. }
  210. memcpy(priv->iq_autocal, entry->data, data_len);
  211. priv->iq_autocal_len = data_len / sizeof(struct pda_iq_autocal_entry);
  212. break;
  213. case PDR_INTERFACE_LIST:
  214. tmp = entry->data;
  215. while ((u8 *)tmp < entry->data + data_len) {
  216. struct bootrec_exp_if *exp_if = tmp;
  217. if (le16_to_cpu(exp_if->if_id) == 0xF)
  218. priv->rxhw = exp_if->variant & cpu_to_le16(0x07);
  219. tmp += sizeof(struct bootrec_exp_if);
  220. }
  221. break;
  222. case PDR_HARDWARE_PLATFORM_COMPONENT_ID:
  223. priv->version = *(u8 *)(entry->data + 1);
  224. break;
  225. case PDR_END:
  226. /* make it overrun */
  227. entry_len = len;
  228. break;
  229. }
  230. entry = (void *)entry + (entry_len + 1)*2;
  231. }
  232. if (!priv->iq_autocal || !priv->output_limit || !priv->curve_data) {
  233. printk(KERN_ERR "p54: not all required entries found in eeprom!\n");
  234. err = -EINVAL;
  235. goto err;
  236. }
  237. return 0;
  238. err:
  239. if (priv->iq_autocal) {
  240. kfree(priv->iq_autocal);
  241. priv->iq_autocal = NULL;
  242. }
  243. if (priv->output_limit) {
  244. kfree(priv->output_limit);
  245. priv->output_limit = NULL;
  246. }
  247. if (priv->curve_data) {
  248. kfree(priv->curve_data);
  249. priv->curve_data = NULL;
  250. }
  251. printk(KERN_ERR "p54: eeprom parse failed!\n");
  252. return err;
  253. }
  254. EXPORT_SYMBOL_GPL(p54_parse_eeprom);
  255. void p54_fill_eeprom_readback(struct p54_control_hdr *hdr)
  256. {
  257. struct p54_eeprom_lm86 *eeprom_hdr;
  258. hdr->magic1 = cpu_to_le16(0x8000);
  259. hdr->len = cpu_to_le16(sizeof(*eeprom_hdr) + 0x2000);
  260. hdr->type = cpu_to_le16(P54_CONTROL_TYPE_EEPROM_READBACK);
  261. hdr->retry1 = hdr->retry2 = 0;
  262. eeprom_hdr = (struct p54_eeprom_lm86 *) hdr->data;
  263. eeprom_hdr->offset = 0x0;
  264. eeprom_hdr->len = cpu_to_le16(0x2000);
  265. }
  266. EXPORT_SYMBOL_GPL(p54_fill_eeprom_readback);
  267. static void p54_rx_data(struct ieee80211_hw *dev, struct sk_buff *skb)
  268. {
  269. struct p54_rx_hdr *hdr = (struct p54_rx_hdr *) skb->data;
  270. struct ieee80211_rx_status rx_status = {0};
  271. u16 freq = le16_to_cpu(hdr->freq);
  272. rx_status.ssi = hdr->rssi;
  273. rx_status.rate = hdr->rate & 0x1f; /* report short preambles & CCK too */
  274. rx_status.channel = freq == 2484 ? 14 : (freq - 2407)/5;
  275. rx_status.freq = freq;
  276. rx_status.phymode = MODE_IEEE80211G;
  277. rx_status.antenna = hdr->antenna;
  278. rx_status.mactime = le64_to_cpu(hdr->timestamp);
  279. rx_status.flag |= RX_FLAG_TSFT;
  280. skb_pull(skb, sizeof(*hdr));
  281. skb_trim(skb, le16_to_cpu(hdr->len));
  282. ieee80211_rx_irqsafe(dev, skb, &rx_status);
  283. }
  284. static void inline p54_wake_free_queues(struct ieee80211_hw *dev)
  285. {
  286. struct p54_common *priv = dev->priv;
  287. int i;
  288. /* ieee80211_start_queues is great if all queues are really empty.
  289. * But, what if some are full? */
  290. for (i = 0; i < dev->queues; i++)
  291. if (priv->tx_stats.data[i].len < priv->tx_stats.data[i].limit)
  292. ieee80211_wake_queue(dev, i);
  293. }
  294. static void p54_rx_frame_sent(struct ieee80211_hw *dev, struct sk_buff *skb)
  295. {
  296. struct p54_common *priv = dev->priv;
  297. struct p54_control_hdr *hdr = (struct p54_control_hdr *) skb->data;
  298. struct p54_frame_sent_hdr *payload = (struct p54_frame_sent_hdr *) hdr->data;
  299. struct sk_buff *entry = (struct sk_buff *) priv->tx_queue.next;
  300. u32 addr = le32_to_cpu(hdr->req_id) - 0x70;
  301. struct memrecord *range = NULL;
  302. u32 freed = 0;
  303. u32 last_addr = priv->rx_start;
  304. while (entry != (struct sk_buff *)&priv->tx_queue) {
  305. range = (struct memrecord *)&entry->cb;
  306. if (range->start_addr == addr) {
  307. struct ieee80211_tx_status status = {{0}};
  308. struct p54_control_hdr *entry_hdr;
  309. struct p54_tx_control_allocdata *entry_data;
  310. int pad = 0;
  311. if (entry->next != (struct sk_buff *)&priv->tx_queue)
  312. freed = ((struct memrecord *)&entry->next->cb)->start_addr - last_addr;
  313. else
  314. freed = priv->rx_end - last_addr;
  315. last_addr = range->end_addr;
  316. __skb_unlink(entry, &priv->tx_queue);
  317. if (!range->control) {
  318. kfree_skb(entry);
  319. break;
  320. }
  321. memcpy(&status.control, range->control,
  322. sizeof(status.control));
  323. kfree(range->control);
  324. priv->tx_stats.data[status.control.queue].len--;
  325. entry_hdr = (struct p54_control_hdr *) entry->data;
  326. entry_data = (struct p54_tx_control_allocdata *) entry_hdr->data;
  327. if ((entry_hdr->magic1 & cpu_to_le16(0x4000)) != 0)
  328. pad = entry_data->align[0];
  329. if (!(status.control.flags & IEEE80211_TXCTL_NO_ACK)) {
  330. if (!(payload->status & 0x01))
  331. status.flags |= IEEE80211_TX_STATUS_ACK;
  332. else
  333. status.excessive_retries = 1;
  334. }
  335. status.retry_count = payload->retries - 1;
  336. status.ack_signal = le16_to_cpu(payload->ack_rssi);
  337. skb_pull(entry, sizeof(*hdr) + pad + sizeof(*entry_data));
  338. ieee80211_tx_status_irqsafe(dev, entry, &status);
  339. break;
  340. } else
  341. last_addr = range->end_addr;
  342. entry = entry->next;
  343. }
  344. if (freed >= IEEE80211_MAX_RTS_THRESHOLD + 0x170 +
  345. sizeof(struct p54_control_hdr))
  346. p54_wake_free_queues(dev);
  347. }
  348. static void p54_rx_control(struct ieee80211_hw *dev, struct sk_buff *skb)
  349. {
  350. struct p54_control_hdr *hdr = (struct p54_control_hdr *) skb->data;
  351. switch (le16_to_cpu(hdr->type)) {
  352. case P54_CONTROL_TYPE_TXDONE:
  353. p54_rx_frame_sent(dev, skb);
  354. break;
  355. case P54_CONTROL_TYPE_BBP:
  356. break;
  357. default:
  358. printk(KERN_DEBUG "%s: not handling 0x%02x type control frame\n",
  359. wiphy_name(dev->wiphy), le16_to_cpu(hdr->type));
  360. break;
  361. }
  362. }
  363. /* returns zero if skb can be reused */
  364. int p54_rx(struct ieee80211_hw *dev, struct sk_buff *skb)
  365. {
  366. u8 type = le16_to_cpu(*((__le16 *)skb->data)) >> 8;
  367. switch (type) {
  368. case 0x00:
  369. case 0x01:
  370. p54_rx_data(dev, skb);
  371. return -1;
  372. case 0x4d:
  373. /* TODO: do something better... but then again, I've never seen this happen */
  374. printk(KERN_ERR "%s: Received fault. Probably need to restart hardware now..\n",
  375. wiphy_name(dev->wiphy));
  376. break;
  377. case 0x80:
  378. p54_rx_control(dev, skb);
  379. break;
  380. default:
  381. printk(KERN_ERR "%s: unknown frame RXed (0x%02x)\n",
  382. wiphy_name(dev->wiphy), type);
  383. break;
  384. }
  385. return 0;
  386. }
  387. EXPORT_SYMBOL_GPL(p54_rx);
  388. /*
  389. * So, the firmware is somewhat stupid and doesn't know what places in its
  390. * memory incoming data should go to. By poking around in the firmware, we
  391. * can find some unused memory to upload our packets to. However, data that we
  392. * want the card to TX needs to stay intact until the card has told us that
  393. * it is done with it. This function finds empty places we can upload to and
  394. * marks allocated areas as reserved if necessary. p54_rx_frame_sent frees
  395. * allocated areas.
  396. */
  397. static void p54_assign_address(struct ieee80211_hw *dev, struct sk_buff *skb,
  398. struct p54_control_hdr *data, u32 len,
  399. struct ieee80211_tx_control *control)
  400. {
  401. struct p54_common *priv = dev->priv;
  402. struct sk_buff *entry = priv->tx_queue.next;
  403. struct sk_buff *target_skb = NULL;
  404. struct memrecord *range;
  405. u32 last_addr = priv->rx_start;
  406. u32 largest_hole = 0;
  407. u32 target_addr = priv->rx_start;
  408. unsigned long flags;
  409. unsigned int left;
  410. len = (len + 0x170 + 3) & ~0x3; /* 0x70 headroom, 0x100 tailroom */
  411. spin_lock_irqsave(&priv->tx_queue.lock, flags);
  412. left = skb_queue_len(&priv->tx_queue);
  413. while (left--) {
  414. u32 hole_size;
  415. range = (struct memrecord *)&entry->cb;
  416. hole_size = range->start_addr - last_addr;
  417. if (!target_skb && hole_size >= len) {
  418. target_skb = entry->prev;
  419. hole_size -= len;
  420. target_addr = last_addr;
  421. }
  422. largest_hole = max(largest_hole, hole_size);
  423. last_addr = range->end_addr;
  424. entry = entry->next;
  425. }
  426. if (!target_skb && priv->rx_end - last_addr >= len) {
  427. target_skb = priv->tx_queue.prev;
  428. largest_hole = max(largest_hole, priv->rx_end - last_addr - len);
  429. if (!skb_queue_empty(&priv->tx_queue)) {
  430. range = (struct memrecord *)&target_skb->cb;
  431. target_addr = range->end_addr;
  432. }
  433. } else
  434. largest_hole = max(largest_hole, priv->rx_end - last_addr);
  435. if (skb) {
  436. range = (struct memrecord *)&skb->cb;
  437. range->start_addr = target_addr;
  438. range->end_addr = target_addr + len;
  439. range->control = control;
  440. __skb_queue_after(&priv->tx_queue, target_skb, skb);
  441. if (largest_hole < IEEE80211_MAX_RTS_THRESHOLD + 0x170 +
  442. sizeof(struct p54_control_hdr))
  443. ieee80211_stop_queues(dev);
  444. }
  445. spin_unlock_irqrestore(&priv->tx_queue.lock, flags);
  446. data->req_id = cpu_to_le32(target_addr + 0x70);
  447. }
  448. static int p54_tx(struct ieee80211_hw *dev, struct sk_buff *skb,
  449. struct ieee80211_tx_control *control)
  450. {
  451. struct ieee80211_tx_queue_stats_data *current_queue;
  452. struct p54_common *priv = dev->priv;
  453. struct p54_control_hdr *hdr;
  454. struct p54_tx_control_allocdata *txhdr;
  455. struct ieee80211_tx_control *control_copy;
  456. size_t padding, len;
  457. u8 rate;
  458. current_queue = &priv->tx_stats.data[control->queue];
  459. if (unlikely(current_queue->len > current_queue->limit))
  460. return NETDEV_TX_BUSY;
  461. current_queue->len++;
  462. current_queue->count++;
  463. if (current_queue->len == current_queue->limit)
  464. ieee80211_stop_queue(dev, control->queue);
  465. padding = (unsigned long)(skb->data - (sizeof(*hdr) + sizeof(*txhdr))) & 3;
  466. len = skb->len;
  467. control_copy = kmalloc(sizeof(*control), GFP_ATOMIC);
  468. if (control_copy)
  469. memcpy(control_copy, control, sizeof(*control));
  470. txhdr = (struct p54_tx_control_allocdata *)
  471. skb_push(skb, sizeof(*txhdr) + padding);
  472. hdr = (struct p54_control_hdr *) skb_push(skb, sizeof(*hdr));
  473. if (padding)
  474. hdr->magic1 = cpu_to_le16(0x4010);
  475. else
  476. hdr->magic1 = cpu_to_le16(0x0010);
  477. hdr->len = cpu_to_le16(len);
  478. hdr->type = (control->flags & IEEE80211_TXCTL_NO_ACK) ? 0 : cpu_to_le16(1);
  479. hdr->retry1 = hdr->retry2 = control->retry_limit;
  480. p54_assign_address(dev, skb, hdr, skb->len, control_copy);
  481. memset(txhdr->wep_key, 0x0, 16);
  482. txhdr->padding = 0;
  483. txhdr->padding2 = 0;
  484. /* TODO: add support for alternate retry TX rates */
  485. rate = control->tx_rate;
  486. if (control->flags & IEEE80211_TXCTL_USE_RTS_CTS)
  487. rate |= 0x40;
  488. else if (control->flags & IEEE80211_TXCTL_USE_CTS_PROTECT)
  489. rate |= 0x20;
  490. memset(txhdr->rateset, rate, 8);
  491. txhdr->wep_key_present = 0;
  492. txhdr->wep_key_len = 0;
  493. txhdr->frame_type = cpu_to_le32(control->queue + 4);
  494. txhdr->magic4 = 0;
  495. txhdr->antenna = (control->antenna_sel_tx == 0) ?
  496. 2 : control->antenna_sel_tx - 1;
  497. txhdr->output_power = 0x7f; // HW Maximum
  498. txhdr->magic5 = (control->flags & IEEE80211_TXCTL_NO_ACK) ?
  499. 0 : ((rate > 0x3) ? cpu_to_le32(0x33) : cpu_to_le32(0x23));
  500. if (padding)
  501. txhdr->align[0] = padding;
  502. priv->tx(dev, hdr, skb->len, 0);
  503. return 0;
  504. }
  505. static int p54_set_filter(struct ieee80211_hw *dev, u16 filter_type,
  506. const u8 *dst, const u8 *src, u8 antenna,
  507. u32 magic3, u32 magic8, u32 magic9)
  508. {
  509. struct p54_common *priv = dev->priv;
  510. struct p54_control_hdr *hdr;
  511. struct p54_tx_control_filter *filter;
  512. hdr = kzalloc(sizeof(*hdr) + sizeof(*filter) +
  513. priv->tx_hdr_len, GFP_ATOMIC);
  514. if (!hdr)
  515. return -ENOMEM;
  516. hdr = (void *)hdr + priv->tx_hdr_len;
  517. filter = (struct p54_tx_control_filter *) hdr->data;
  518. hdr->magic1 = cpu_to_le16(0x8001);
  519. hdr->len = cpu_to_le16(sizeof(*filter));
  520. p54_assign_address(dev, NULL, hdr, sizeof(*hdr) + sizeof(*filter), NULL);
  521. hdr->type = cpu_to_le16(P54_CONTROL_TYPE_FILTER_SET);
  522. filter->filter_type = cpu_to_le16(filter_type);
  523. memcpy(filter->dst, dst, ETH_ALEN);
  524. if (!src)
  525. memset(filter->src, ~0, ETH_ALEN);
  526. else
  527. memcpy(filter->src, src, ETH_ALEN);
  528. filter->antenna = antenna;
  529. filter->magic3 = cpu_to_le32(magic3);
  530. filter->rx_addr = cpu_to_le32(priv->rx_end);
  531. filter->max_rx = cpu_to_le16(0x0620); /* FIXME: for usb ver 1.. maybe */
  532. filter->rxhw = priv->rxhw;
  533. filter->magic8 = cpu_to_le16(magic8);
  534. filter->magic9 = cpu_to_le16(magic9);
  535. priv->tx(dev, hdr, sizeof(*hdr) + sizeof(*filter), 1);
  536. return 0;
  537. }
  538. static int p54_set_freq(struct ieee80211_hw *dev, __le16 freq)
  539. {
  540. struct p54_common *priv = dev->priv;
  541. struct p54_control_hdr *hdr;
  542. struct p54_tx_control_channel *chan;
  543. unsigned int i;
  544. size_t payload_len = sizeof(*chan) + sizeof(u32)*2 +
  545. sizeof(*chan->curve_data) *
  546. priv->curve_data->points_per_channel;
  547. void *entry;
  548. hdr = kzalloc(sizeof(*hdr) + payload_len +
  549. priv->tx_hdr_len, GFP_KERNEL);
  550. if (!hdr)
  551. return -ENOMEM;
  552. hdr = (void *)hdr + priv->tx_hdr_len;
  553. chan = (struct p54_tx_control_channel *) hdr->data;
  554. hdr->magic1 = cpu_to_le16(0x8001);
  555. hdr->len = cpu_to_le16(sizeof(*chan));
  556. hdr->type = cpu_to_le16(P54_CONTROL_TYPE_CHANNEL_CHANGE);
  557. p54_assign_address(dev, NULL, hdr, sizeof(*hdr) + payload_len, NULL);
  558. chan->magic1 = cpu_to_le16(0x1);
  559. chan->magic2 = cpu_to_le16(0x0);
  560. for (i = 0; i < priv->iq_autocal_len; i++) {
  561. if (priv->iq_autocal[i].freq != freq)
  562. continue;
  563. memcpy(&chan->iq_autocal, &priv->iq_autocal[i],
  564. sizeof(*priv->iq_autocal));
  565. break;
  566. }
  567. if (i == priv->iq_autocal_len)
  568. goto err;
  569. for (i = 0; i < priv->output_limit_len; i++) {
  570. if (priv->output_limit[i].freq != freq)
  571. continue;
  572. chan->val_barker = 0x38;
  573. chan->val_bpsk = priv->output_limit[i].val_bpsk;
  574. chan->val_qpsk = priv->output_limit[i].val_qpsk;
  575. chan->val_16qam = priv->output_limit[i].val_16qam;
  576. chan->val_64qam = priv->output_limit[i].val_64qam;
  577. break;
  578. }
  579. if (i == priv->output_limit_len)
  580. goto err;
  581. chan->pa_points_per_curve = priv->curve_data->points_per_channel;
  582. entry = priv->curve_data->data;
  583. for (i = 0; i < priv->curve_data->channels; i++) {
  584. if (*((__le16 *)entry) != freq) {
  585. entry += sizeof(__le16);
  586. entry += sizeof(struct pda_pa_curve_data_sample_rev1) *
  587. chan->pa_points_per_curve;
  588. continue;
  589. }
  590. entry += sizeof(__le16);
  591. memcpy(chan->curve_data, entry, sizeof(*chan->curve_data) *
  592. chan->pa_points_per_curve);
  593. break;
  594. }
  595. memcpy(hdr->data + payload_len - 4, &chan->val_bpsk, 4);
  596. priv->tx(dev, hdr, sizeof(*hdr) + payload_len, 1);
  597. return 0;
  598. err:
  599. printk(KERN_ERR "%s: frequency change failed\n", wiphy_name(dev->wiphy));
  600. kfree(hdr);
  601. return -EINVAL;
  602. }
  603. static int p54_set_leds(struct ieee80211_hw *dev, int mode, int link, int act)
  604. {
  605. struct p54_common *priv = dev->priv;
  606. struct p54_control_hdr *hdr;
  607. struct p54_tx_control_led *led;
  608. hdr = kzalloc(sizeof(*hdr) + sizeof(*led) +
  609. priv->tx_hdr_len, GFP_KERNEL);
  610. if (!hdr)
  611. return -ENOMEM;
  612. hdr = (void *)hdr + priv->tx_hdr_len;
  613. hdr->magic1 = cpu_to_le16(0x8001);
  614. hdr->len = cpu_to_le16(sizeof(*led));
  615. hdr->type = cpu_to_le16(P54_CONTROL_TYPE_LED);
  616. p54_assign_address(dev, NULL, hdr, sizeof(*hdr) + sizeof(*led), NULL);
  617. led = (struct p54_tx_control_led *) hdr->data;
  618. led->mode = cpu_to_le16(mode);
  619. led->led_permanent = cpu_to_le16(link);
  620. led->led_temporary = cpu_to_le16(act);
  621. led->duration = cpu_to_le16(1000);
  622. priv->tx(dev, hdr, sizeof(*hdr) + sizeof(*led), 1);
  623. return 0;
  624. }
  625. #define P54_SET_QUEUE(queue, ai_fs, cw_min, cw_max, burst) \
  626. do { \
  627. queue.aifs = cpu_to_le16(ai_fs); \
  628. queue.cwmin = cpu_to_le16(cw_min); \
  629. queue.cwmax = cpu_to_le16(cw_max); \
  630. queue.txop = (burst == 0) ? \
  631. 0 : cpu_to_le16((burst * 100) / 32 + 1); \
  632. } while(0)
  633. static void p54_init_vdcf(struct ieee80211_hw *dev)
  634. {
  635. struct p54_common *priv = dev->priv;
  636. struct p54_control_hdr *hdr;
  637. struct p54_tx_control_vdcf *vdcf;
  638. /* all USB V1 adapters need a extra headroom */
  639. hdr = (void *)priv->cached_vdcf + priv->tx_hdr_len;
  640. hdr->magic1 = cpu_to_le16(0x8001);
  641. hdr->len = cpu_to_le16(sizeof(*vdcf));
  642. hdr->type = cpu_to_le16(P54_CONTROL_TYPE_DCFINIT);
  643. hdr->req_id = cpu_to_le32(priv->rx_start);
  644. vdcf = (struct p54_tx_control_vdcf *) hdr->data;
  645. P54_SET_QUEUE(vdcf->queue[0], 0x0002, 0x0003, 0x0007, 0x000f);
  646. P54_SET_QUEUE(vdcf->queue[1], 0x0002, 0x0007, 0x000f, 0x001e);
  647. P54_SET_QUEUE(vdcf->queue[2], 0x0002, 0x000f, 0x03ff, 0x0014);
  648. P54_SET_QUEUE(vdcf->queue[3], 0x0007, 0x000f, 0x03ff, 0x0000);
  649. }
  650. static void p54_set_vdcf(struct ieee80211_hw *dev)
  651. {
  652. struct p54_common *priv = dev->priv;
  653. struct p54_control_hdr *hdr;
  654. struct p54_tx_control_vdcf *vdcf;
  655. hdr = (void *)priv->cached_vdcf + priv->tx_hdr_len;
  656. p54_assign_address(dev, NULL, hdr, sizeof(*hdr) + sizeof(*vdcf), NULL);
  657. vdcf = (struct p54_tx_control_vdcf *) hdr->data;
  658. if (dev->conf.flags & IEEE80211_CONF_SHORT_SLOT_TIME) {
  659. vdcf->slottime = 9;
  660. vdcf->magic1 = 0x00;
  661. vdcf->magic2 = 0x10;
  662. } else {
  663. vdcf->slottime = 20;
  664. vdcf->magic1 = 0x0a;
  665. vdcf->magic2 = 0x06;
  666. }
  667. /* (see prism54/isl_oid.h for further details) */
  668. vdcf->frameburst = cpu_to_le16(0);
  669. priv->tx(dev, hdr, sizeof(*hdr) + sizeof(*vdcf), 0);
  670. }
  671. static int p54_start(struct ieee80211_hw *dev)
  672. {
  673. struct p54_common *priv = dev->priv;
  674. int err;
  675. err = priv->open(dev);
  676. if (!err)
  677. priv->mode = IEEE80211_IF_TYPE_MNTR;
  678. return err;
  679. }
  680. static void p54_stop(struct ieee80211_hw *dev)
  681. {
  682. struct p54_common *priv = dev->priv;
  683. struct sk_buff *skb;
  684. while ((skb = skb_dequeue(&priv->tx_queue))) {
  685. struct memrecord *range = (struct memrecord *)&skb->cb;
  686. if (range->control)
  687. kfree(range->control);
  688. kfree_skb(skb);
  689. }
  690. priv->stop(dev);
  691. priv->mode = IEEE80211_IF_TYPE_INVALID;
  692. }
  693. static int p54_add_interface(struct ieee80211_hw *dev,
  694. struct ieee80211_if_init_conf *conf)
  695. {
  696. struct p54_common *priv = dev->priv;
  697. if (priv->mode != IEEE80211_IF_TYPE_MNTR)
  698. return -EOPNOTSUPP;
  699. switch (conf->type) {
  700. case IEEE80211_IF_TYPE_STA:
  701. priv->mode = conf->type;
  702. break;
  703. default:
  704. return -EOPNOTSUPP;
  705. }
  706. memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
  707. p54_set_filter(dev, 0, priv->mac_addr, NULL, 0, 1, 0, 0xF642);
  708. p54_set_filter(dev, 0, priv->mac_addr, NULL, 1, 0, 0, 0xF642);
  709. switch (conf->type) {
  710. case IEEE80211_IF_TYPE_STA:
  711. p54_set_filter(dev, 1, priv->mac_addr, NULL, 0, 0x15F, 0x1F4, 0);
  712. break;
  713. default:
  714. BUG(); /* impossible */
  715. break;
  716. }
  717. p54_set_leds(dev, 1, 0, 0);
  718. return 0;
  719. }
  720. static void p54_remove_interface(struct ieee80211_hw *dev,
  721. struct ieee80211_if_init_conf *conf)
  722. {
  723. struct p54_common *priv = dev->priv;
  724. priv->mode = IEEE80211_IF_TYPE_MNTR;
  725. memset(priv->mac_addr, 0, ETH_ALEN);
  726. p54_set_filter(dev, 0, priv->mac_addr, NULL, 2, 0, 0, 0);
  727. }
  728. static int p54_config(struct ieee80211_hw *dev, struct ieee80211_conf *conf)
  729. {
  730. int ret;
  731. ret = p54_set_freq(dev, cpu_to_le16(conf->freq));
  732. p54_set_vdcf(dev);
  733. return ret;
  734. }
  735. static int p54_config_interface(struct ieee80211_hw *dev,
  736. struct ieee80211_vif *vif,
  737. struct ieee80211_if_conf *conf)
  738. {
  739. struct p54_common *priv = dev->priv;
  740. p54_set_filter(dev, 0, priv->mac_addr, conf->bssid, 0, 1, 0, 0xF642);
  741. p54_set_filter(dev, 0, priv->mac_addr, conf->bssid, 2, 0, 0, 0);
  742. p54_set_leds(dev, 1, !is_multicast_ether_addr(conf->bssid), 0);
  743. memcpy(priv->bssid, conf->bssid, ETH_ALEN);
  744. return 0;
  745. }
  746. static void p54_configure_filter(struct ieee80211_hw *dev,
  747. unsigned int changed_flags,
  748. unsigned int *total_flags,
  749. int mc_count, struct dev_mc_list *mclist)
  750. {
  751. struct p54_common *priv = dev->priv;
  752. *total_flags &= FIF_BCN_PRBRESP_PROMISC;
  753. if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
  754. if (*total_flags & FIF_BCN_PRBRESP_PROMISC)
  755. p54_set_filter(dev, 0, priv->mac_addr,
  756. NULL, 2, 0, 0, 0);
  757. else
  758. p54_set_filter(dev, 0, priv->mac_addr,
  759. priv->bssid, 2, 0, 0, 0);
  760. }
  761. }
  762. static int p54_conf_tx(struct ieee80211_hw *dev, int queue,
  763. const struct ieee80211_tx_queue_params *params)
  764. {
  765. struct p54_common *priv = dev->priv;
  766. struct p54_tx_control_vdcf *vdcf;
  767. vdcf = (struct p54_tx_control_vdcf *)(((struct p54_control_hdr *)
  768. ((void *)priv->cached_vdcf + priv->tx_hdr_len))->data);
  769. if ((params) && !((queue < 0) || (queue > 4))) {
  770. P54_SET_QUEUE(vdcf->queue[queue], params->aifs,
  771. params->cw_min, params->cw_max, params->burst_time);
  772. } else
  773. return -EINVAL;
  774. p54_set_vdcf(dev);
  775. return 0;
  776. }
  777. static int p54_get_stats(struct ieee80211_hw *dev,
  778. struct ieee80211_low_level_stats *stats)
  779. {
  780. /* TODO */
  781. return 0;
  782. }
  783. static int p54_get_tx_stats(struct ieee80211_hw *dev,
  784. struct ieee80211_tx_queue_stats *stats)
  785. {
  786. struct p54_common *priv = dev->priv;
  787. unsigned int i;
  788. for (i = 0; i < dev->queues; i++)
  789. memcpy(&stats->data[i], &priv->tx_stats.data[i],
  790. sizeof(stats->data[i]));
  791. return 0;
  792. }
  793. static const struct ieee80211_ops p54_ops = {
  794. .tx = p54_tx,
  795. .start = p54_start,
  796. .stop = p54_stop,
  797. .add_interface = p54_add_interface,
  798. .remove_interface = p54_remove_interface,
  799. .config = p54_config,
  800. .config_interface = p54_config_interface,
  801. .configure_filter = p54_configure_filter,
  802. .conf_tx = p54_conf_tx,
  803. .get_stats = p54_get_stats,
  804. .get_tx_stats = p54_get_tx_stats
  805. };
  806. struct ieee80211_hw *p54_init_common(size_t priv_data_len)
  807. {
  808. struct ieee80211_hw *dev;
  809. struct p54_common *priv;
  810. int i;
  811. dev = ieee80211_alloc_hw(priv_data_len, &p54_ops);
  812. if (!dev)
  813. return NULL;
  814. priv = dev->priv;
  815. priv->mode = IEEE80211_IF_TYPE_INVALID;
  816. skb_queue_head_init(&priv->tx_queue);
  817. memcpy(priv->channels, p54_channels, sizeof(p54_channels));
  818. memcpy(priv->rates, p54_rates, sizeof(p54_rates));
  819. priv->modes[1].mode = MODE_IEEE80211B;
  820. priv->modes[1].num_rates = 4;
  821. priv->modes[1].rates = priv->rates;
  822. priv->modes[1].num_channels = ARRAY_SIZE(p54_channels);
  823. priv->modes[1].channels = priv->channels;
  824. priv->modes[0].mode = MODE_IEEE80211G;
  825. priv->modes[0].num_rates = ARRAY_SIZE(p54_rates);
  826. priv->modes[0].rates = priv->rates;
  827. priv->modes[0].num_channels = ARRAY_SIZE(p54_channels);
  828. priv->modes[0].channels = priv->channels;
  829. dev->flags = IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING | /* not sure */
  830. IEEE80211_HW_RX_INCLUDES_FCS;
  831. dev->channel_change_time = 1000; /* TODO: find actual value */
  832. dev->max_rssi = 127;
  833. priv->tx_stats.data[0].limit = 5;
  834. dev->queues = 1;
  835. dev->extra_tx_headroom = sizeof(struct p54_control_hdr) + 4 +
  836. sizeof(struct p54_tx_control_allocdata);
  837. priv->cached_vdcf = kzalloc(sizeof(struct p54_tx_control_vdcf) +
  838. priv->tx_hdr_len + sizeof(struct p54_control_hdr), GFP_KERNEL);
  839. if (!priv->cached_vdcf) {
  840. ieee80211_free_hw(dev);
  841. return NULL;
  842. }
  843. p54_init_vdcf(dev);
  844. for (i = 0; i < 2; i++) {
  845. if (ieee80211_register_hwmode(dev, &priv->modes[i])) {
  846. kfree(priv->cached_vdcf);
  847. ieee80211_free_hw(dev);
  848. return NULL;
  849. }
  850. }
  851. return dev;
  852. }
  853. EXPORT_SYMBOL_GPL(p54_init_common);
  854. void p54_free_common(struct ieee80211_hw *dev)
  855. {
  856. struct p54_common *priv = dev->priv;
  857. kfree(priv->iq_autocal);
  858. kfree(priv->output_limit);
  859. kfree(priv->curve_data);
  860. kfree(priv->cached_vdcf);
  861. }
  862. EXPORT_SYMBOL_GPL(p54_free_common);
  863. static int __init p54_init(void)
  864. {
  865. return 0;
  866. }
  867. static void __exit p54_exit(void)
  868. {
  869. }
  870. module_init(p54_init);
  871. module_exit(p54_exit);