nm256.c 43 KB

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  1. /*
  2. * Driver for NeoMagic 256AV and 256ZX chipsets.
  3. * Copyright (c) 2000 by Takashi Iwai <tiwai@suse.de>
  4. *
  5. * Based on nm256_audio.c OSS driver in linux kernel.
  6. * The original author of OSS nm256 driver wishes to remain anonymous,
  7. * so I just put my acknoledgment to him/her here.
  8. * The original author's web page is found at
  9. * http://www.uglx.org/sony.html
  10. *
  11. *
  12. * This program is free software; you can redistribute it and/or modify
  13. * it under the terms of the GNU General Public License as published by
  14. * the Free Software Foundation; either version 2 of the License, or
  15. * (at your option) any later version.
  16. *
  17. * This program is distributed in the hope that it will be useful,
  18. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  19. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  20. * GNU General Public License for more details.
  21. *
  22. * You should have received a copy of the GNU General Public License
  23. * along with this program; if not, write to the Free Software
  24. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  25. */
  26. #include <sound/driver.h>
  27. #include <asm/io.h>
  28. #include <linux/delay.h>
  29. #include <linux/interrupt.h>
  30. #include <linux/init.h>
  31. #include <linux/pci.h>
  32. #include <linux/slab.h>
  33. #include <linux/moduleparam.h>
  34. #include <sound/core.h>
  35. #include <sound/info.h>
  36. #include <sound/control.h>
  37. #include <sound/pcm.h>
  38. #include <sound/ac97_codec.h>
  39. #include <sound/initval.h>
  40. #define CARD_NAME "NeoMagic 256AV/ZX"
  41. #define DRIVER_NAME "NM256"
  42. MODULE_AUTHOR("Takashi Iwai <tiwai@suse.de>");
  43. MODULE_DESCRIPTION("NeoMagic NM256AV/ZX");
  44. MODULE_LICENSE("GPL");
  45. MODULE_SUPPORTED_DEVICE("{{NeoMagic,NM256AV},"
  46. "{NeoMagic,NM256ZX}}");
  47. /*
  48. * some compile conditions.
  49. */
  50. static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
  51. static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
  52. static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;
  53. static int playback_bufsize[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = 16};
  54. static int capture_bufsize[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = 16};
  55. static int force_ac97[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = 0}; /* disabled as default */
  56. static int buffer_top[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = 0}; /* not specified */
  57. static int use_cache[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = 0}; /* disabled */
  58. static int vaio_hack[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = 0}; /* disabled */
  59. static int reset_workaround[SNDRV_CARDS];
  60. module_param_array(index, int, NULL, 0444);
  61. MODULE_PARM_DESC(index, "Index value for " CARD_NAME " soundcard.");
  62. module_param_array(id, charp, NULL, 0444);
  63. MODULE_PARM_DESC(id, "ID string for " CARD_NAME " soundcard.");
  64. module_param_array(enable, bool, NULL, 0444);
  65. MODULE_PARM_DESC(enable, "Enable this soundcard.");
  66. module_param_array(playback_bufsize, int, NULL, 0444);
  67. MODULE_PARM_DESC(playback_bufsize, "DAC frame size in kB for " CARD_NAME " soundcard.");
  68. module_param_array(capture_bufsize, int, NULL, 0444);
  69. MODULE_PARM_DESC(capture_bufsize, "ADC frame size in kB for " CARD_NAME " soundcard.");
  70. module_param_array(force_ac97, bool, NULL, 0444);
  71. MODULE_PARM_DESC(force_ac97, "Force to use AC97 codec for " CARD_NAME " soundcard.");
  72. module_param_array(buffer_top, int, NULL, 0444);
  73. MODULE_PARM_DESC(buffer_top, "Set the top address of audio buffer for " CARD_NAME " soundcard.");
  74. module_param_array(use_cache, bool, NULL, 0444);
  75. MODULE_PARM_DESC(use_cache, "Enable the cache for coefficient table access.");
  76. module_param_array(vaio_hack, bool, NULL, 0444);
  77. MODULE_PARM_DESC(vaio_hack, "Enable workaround for Sony VAIO notebooks.");
  78. module_param_array(reset_workaround, bool, NULL, 0444);
  79. MODULE_PARM_DESC(reset_workaround, "Enable AC97 RESET workaround for some laptops.");
  80. /*
  81. * hw definitions
  82. */
  83. /* The BIOS signature. */
  84. #define NM_SIGNATURE 0x4e4d0000
  85. /* Signature mask. */
  86. #define NM_SIG_MASK 0xffff0000
  87. /* Size of the second memory area. */
  88. #define NM_PORT2_SIZE 4096
  89. /* The base offset of the mixer in the second memory area. */
  90. #define NM_MIXER_OFFSET 0x600
  91. /* The maximum size of a coefficient entry. */
  92. #define NM_MAX_PLAYBACK_COEF_SIZE 0x5000
  93. #define NM_MAX_RECORD_COEF_SIZE 0x1260
  94. /* The interrupt register. */
  95. #define NM_INT_REG 0xa04
  96. /* And its bits. */
  97. #define NM_PLAYBACK_INT 0x40
  98. #define NM_RECORD_INT 0x100
  99. #define NM_MISC_INT_1 0x4000
  100. #define NM_MISC_INT_2 0x1
  101. #define NM_ACK_INT(chip, X) snd_nm256_writew(chip, NM_INT_REG, (X) << 1)
  102. /* The AV's "mixer ready" status bit and location. */
  103. #define NM_MIXER_STATUS_OFFSET 0xa04
  104. #define NM_MIXER_READY_MASK 0x0800
  105. #define NM_MIXER_PRESENCE 0xa06
  106. #define NM_PRESENCE_MASK 0x0050
  107. #define NM_PRESENCE_VALUE 0x0040
  108. /*
  109. * For the ZX. It uses the same interrupt register, but it holds 32
  110. * bits instead of 16.
  111. */
  112. #define NM2_PLAYBACK_INT 0x10000
  113. #define NM2_RECORD_INT 0x80000
  114. #define NM2_MISC_INT_1 0x8
  115. #define NM2_MISC_INT_2 0x2
  116. #define NM2_ACK_INT(chip, X) snd_nm256_writel(chip, NM_INT_REG, (X))
  117. /* The ZX's "mixer ready" status bit and location. */
  118. #define NM2_MIXER_STATUS_OFFSET 0xa06
  119. #define NM2_MIXER_READY_MASK 0x0800
  120. /* The playback registers start from here. */
  121. #define NM_PLAYBACK_REG_OFFSET 0x0
  122. /* The record registers start from here. */
  123. #define NM_RECORD_REG_OFFSET 0x200
  124. /* The rate register is located 2 bytes from the start of the register area. */
  125. #define NM_RATE_REG_OFFSET 2
  126. /* Mono/stereo flag, number of bits on playback, and rate mask. */
  127. #define NM_RATE_STEREO 1
  128. #define NM_RATE_BITS_16 2
  129. #define NM_RATE_MASK 0xf0
  130. /* Playback enable register. */
  131. #define NM_PLAYBACK_ENABLE_REG (NM_PLAYBACK_REG_OFFSET + 0x1)
  132. #define NM_PLAYBACK_ENABLE_FLAG 1
  133. #define NM_PLAYBACK_ONESHOT 2
  134. #define NM_PLAYBACK_FREERUN 4
  135. /* Mutes the audio output. */
  136. #define NM_AUDIO_MUTE_REG (NM_PLAYBACK_REG_OFFSET + 0x18)
  137. #define NM_AUDIO_MUTE_LEFT 0x8000
  138. #define NM_AUDIO_MUTE_RIGHT 0x0080
  139. /* Recording enable register. */
  140. #define NM_RECORD_ENABLE_REG (NM_RECORD_REG_OFFSET + 0)
  141. #define NM_RECORD_ENABLE_FLAG 1
  142. #define NM_RECORD_FREERUN 2
  143. /* coefficient buffer pointer */
  144. #define NM_COEFF_START_OFFSET 0x1c
  145. #define NM_COEFF_END_OFFSET 0x20
  146. /* DMA buffer offsets */
  147. #define NM_RBUFFER_START (NM_RECORD_REG_OFFSET + 0x4)
  148. #define NM_RBUFFER_END (NM_RECORD_REG_OFFSET + 0x10)
  149. #define NM_RBUFFER_WMARK (NM_RECORD_REG_OFFSET + 0xc)
  150. #define NM_RBUFFER_CURRP (NM_RECORD_REG_OFFSET + 0x8)
  151. #define NM_PBUFFER_START (NM_PLAYBACK_REG_OFFSET + 0x4)
  152. #define NM_PBUFFER_END (NM_PLAYBACK_REG_OFFSET + 0x14)
  153. #define NM_PBUFFER_WMARK (NM_PLAYBACK_REG_OFFSET + 0xc)
  154. #define NM_PBUFFER_CURRP (NM_PLAYBACK_REG_OFFSET + 0x8)
  155. /*
  156. * type definitions
  157. */
  158. typedef struct snd_nm256 nm256_t;
  159. typedef struct snd_nm256_stream nm256_stream_t;
  160. struct snd_nm256_stream {
  161. nm256_t *chip;
  162. snd_pcm_substream_t *substream;
  163. int running;
  164. u32 buf; /* offset from chip->buffer */
  165. int bufsize; /* buffer size in bytes */
  166. void __iomem *bufptr; /* mapped pointer */
  167. unsigned long bufptr_addr; /* physical address of the mapped pointer */
  168. int dma_size; /* buffer size of the substream in bytes */
  169. int period_size; /* period size in bytes */
  170. int periods; /* # of periods */
  171. int shift; /* bit shifts */
  172. int cur_period; /* current period # */
  173. };
  174. struct snd_nm256 {
  175. snd_card_t *card;
  176. void __iomem *cport; /* control port */
  177. struct resource *res_cport; /* its resource */
  178. unsigned long cport_addr; /* physical address */
  179. void __iomem *buffer; /* buffer */
  180. struct resource *res_buffer; /* its resource */
  181. unsigned long buffer_addr; /* buffer phyiscal address */
  182. u32 buffer_start; /* start offset from pci resource 0 */
  183. u32 buffer_end; /* end offset */
  184. u32 buffer_size; /* total buffer size */
  185. u32 all_coeff_buf; /* coefficient buffer */
  186. u32 coeff_buf[2]; /* coefficient buffer for each stream */
  187. unsigned int coeffs_current: 1; /* coeff. table is loaded? */
  188. unsigned int use_cache: 1; /* use one big coef. table */
  189. unsigned int reset_workaround: 1; /* Workaround for some laptops to avoid freeze */
  190. int mixer_base; /* register offset of ac97 mixer */
  191. int mixer_status_offset; /* offset of mixer status reg. */
  192. int mixer_status_mask; /* bit mask to test the mixer status */
  193. int irq;
  194. irqreturn_t (*interrupt)(int, void *, struct pt_regs *);
  195. int badintrcount; /* counter to check bogus interrupts */
  196. nm256_stream_t streams[2];
  197. ac97_t *ac97;
  198. snd_pcm_t *pcm;
  199. struct pci_dev *pci;
  200. spinlock_t reg_lock;
  201. };
  202. /*
  203. * include coefficient table
  204. */
  205. #include "nm256_coef.c"
  206. /*
  207. * PCI ids
  208. */
  209. #ifndef PCI_VENDOR_ID_NEOMAGIC
  210. #define PCI_VENDOR_ID_NEOMEGIC 0x10c8
  211. #endif
  212. #ifndef PCI_DEVICE_ID_NEOMAGIC_NM256AV_AUDIO
  213. #define PCI_DEVICE_ID_NEOMAGIC_NM256AV_AUDIO 0x8005
  214. #endif
  215. #ifndef PCI_DEVICE_ID_NEOMAGIC_NM256ZX_AUDIO
  216. #define PCI_DEVICE_ID_NEOMAGIC_NM256ZX_AUDIO 0x8006
  217. #endif
  218. #ifndef PCI_DEVICE_ID_NEOMAGIC_NM256XL_PLUS_AUDIO
  219. #define PCI_DEVICE_ID_NEOMAGIC_NM256XL_PLUS_AUDIO 0x8016
  220. #endif
  221. static struct pci_device_id snd_nm256_ids[] = {
  222. {PCI_VENDOR_ID_NEOMAGIC, PCI_DEVICE_ID_NEOMAGIC_NM256AV_AUDIO, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
  223. {PCI_VENDOR_ID_NEOMAGIC, PCI_DEVICE_ID_NEOMAGIC_NM256ZX_AUDIO, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
  224. {PCI_VENDOR_ID_NEOMAGIC, PCI_DEVICE_ID_NEOMAGIC_NM256XL_PLUS_AUDIO, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
  225. {0,},
  226. };
  227. MODULE_DEVICE_TABLE(pci, snd_nm256_ids);
  228. /*
  229. * lowlvel stuffs
  230. */
  231. inline static u8
  232. snd_nm256_readb(nm256_t *chip, int offset)
  233. {
  234. return readb(chip->cport + offset);
  235. }
  236. inline static u16
  237. snd_nm256_readw(nm256_t *chip, int offset)
  238. {
  239. return readw(chip->cport + offset);
  240. }
  241. inline static u32
  242. snd_nm256_readl(nm256_t *chip, int offset)
  243. {
  244. return readl(chip->cport + offset);
  245. }
  246. inline static void
  247. snd_nm256_writeb(nm256_t *chip, int offset, u8 val)
  248. {
  249. writeb(val, chip->cport + offset);
  250. }
  251. inline static void
  252. snd_nm256_writew(nm256_t *chip, int offset, u16 val)
  253. {
  254. writew(val, chip->cport + offset);
  255. }
  256. inline static void
  257. snd_nm256_writel(nm256_t *chip, int offset, u32 val)
  258. {
  259. writel(val, chip->cport + offset);
  260. }
  261. inline static void
  262. snd_nm256_write_buffer(nm256_t *chip, void *src, int offset, int size)
  263. {
  264. offset -= chip->buffer_start;
  265. #ifdef SNDRV_CONFIG_DEBUG
  266. if (offset < 0 || offset >= chip->buffer_size) {
  267. snd_printk("write_buffer invalid offset = %d size = %d\n", offset, size);
  268. return;
  269. }
  270. #endif
  271. memcpy_toio(chip->buffer + offset, src, size);
  272. }
  273. /*
  274. * coefficient handlers -- what a magic!
  275. */
  276. static u16
  277. snd_nm256_get_start_offset(int which)
  278. {
  279. u16 offset = 0;
  280. while (which-- > 0)
  281. offset += coefficient_sizes[which];
  282. return offset;
  283. }
  284. static void
  285. snd_nm256_load_one_coefficient(nm256_t *chip, int stream, u32 port, int which)
  286. {
  287. u32 coeff_buf = chip->coeff_buf[stream];
  288. u16 offset = snd_nm256_get_start_offset(which);
  289. u16 size = coefficient_sizes[which];
  290. snd_nm256_write_buffer(chip, coefficients + offset, coeff_buf, size);
  291. snd_nm256_writel(chip, port, coeff_buf);
  292. /* ??? Record seems to behave differently than playback. */
  293. if (stream == SNDRV_PCM_STREAM_PLAYBACK)
  294. size--;
  295. snd_nm256_writel(chip, port + 4, coeff_buf + size);
  296. }
  297. static void
  298. snd_nm256_load_coefficient(nm256_t *chip, int stream, int number)
  299. {
  300. /* The enable register for the specified engine. */
  301. u32 poffset = (stream == SNDRV_PCM_STREAM_CAPTURE ? NM_RECORD_ENABLE_REG : NM_PLAYBACK_ENABLE_REG);
  302. u32 addr = NM_COEFF_START_OFFSET;
  303. addr += (stream == SNDRV_PCM_STREAM_CAPTURE ? NM_RECORD_REG_OFFSET : NM_PLAYBACK_REG_OFFSET);
  304. if (snd_nm256_readb(chip, poffset) & 1) {
  305. snd_printd("NM256: Engine was enabled while loading coefficients!\n");
  306. return;
  307. }
  308. /* The recording engine uses coefficient values 8-15. */
  309. number &= 7;
  310. if (stream == SNDRV_PCM_STREAM_CAPTURE)
  311. number += 8;
  312. if (! chip->use_cache) {
  313. snd_nm256_load_one_coefficient(chip, stream, addr, number);
  314. return;
  315. }
  316. if (! chip->coeffs_current) {
  317. snd_nm256_write_buffer(chip, coefficients, chip->all_coeff_buf,
  318. NM_TOTAL_COEFF_COUNT * 4);
  319. chip->coeffs_current = 1;
  320. } else {
  321. u32 base = chip->all_coeff_buf;
  322. u32 offset = snd_nm256_get_start_offset(number);
  323. u32 end_offset = offset + coefficient_sizes[number];
  324. snd_nm256_writel(chip, addr, base + offset);
  325. if (stream == SNDRV_PCM_STREAM_PLAYBACK)
  326. end_offset--;
  327. snd_nm256_writel(chip, addr + 4, base + end_offset);
  328. }
  329. }
  330. /* The actual rates supported by the card. */
  331. static unsigned int samplerates[8] = {
  332. 8000, 11025, 16000, 22050, 24000, 32000, 44100, 48000,
  333. };
  334. static snd_pcm_hw_constraint_list_t constraints_rates = {
  335. .count = ARRAY_SIZE(samplerates),
  336. .list = samplerates,
  337. .mask = 0,
  338. };
  339. /*
  340. * return the index of the target rate
  341. */
  342. static int
  343. snd_nm256_fixed_rate(unsigned int rate)
  344. {
  345. unsigned int i;
  346. for (i = 0; i < ARRAY_SIZE(samplerates); i++) {
  347. if (rate == samplerates[i])
  348. return i;
  349. }
  350. snd_BUG();
  351. return 0;
  352. }
  353. /*
  354. * set sample rate and format
  355. */
  356. static void
  357. snd_nm256_set_format(nm256_t *chip, nm256_stream_t *s, snd_pcm_substream_t *substream)
  358. {
  359. snd_pcm_runtime_t *runtime = substream->runtime;
  360. int rate_index = snd_nm256_fixed_rate(runtime->rate);
  361. unsigned char ratebits = (rate_index << 4) & NM_RATE_MASK;
  362. s->shift = 0;
  363. if (snd_pcm_format_width(runtime->format) == 16) {
  364. ratebits |= NM_RATE_BITS_16;
  365. s->shift++;
  366. }
  367. if (runtime->channels > 1) {
  368. ratebits |= NM_RATE_STEREO;
  369. s->shift++;
  370. }
  371. runtime->rate = samplerates[rate_index];
  372. switch (substream->stream) {
  373. case SNDRV_PCM_STREAM_PLAYBACK:
  374. snd_nm256_load_coefficient(chip, 0, rate_index); /* 0 = playback */
  375. snd_nm256_writeb(chip,
  376. NM_PLAYBACK_REG_OFFSET + NM_RATE_REG_OFFSET,
  377. ratebits);
  378. break;
  379. case SNDRV_PCM_STREAM_CAPTURE:
  380. snd_nm256_load_coefficient(chip, 1, rate_index); /* 1 = record */
  381. snd_nm256_writeb(chip,
  382. NM_RECORD_REG_OFFSET + NM_RATE_REG_OFFSET,
  383. ratebits);
  384. break;
  385. }
  386. }
  387. /*
  388. * start / stop
  389. */
  390. /* update the watermark (current period) */
  391. static void snd_nm256_pcm_mark(nm256_t *chip, nm256_stream_t *s, int reg)
  392. {
  393. s->cur_period++;
  394. s->cur_period %= s->periods;
  395. snd_nm256_writel(chip, reg, s->buf + s->cur_period * s->period_size);
  396. }
  397. #define snd_nm256_playback_mark(chip, s) snd_nm256_pcm_mark(chip, s, NM_PBUFFER_WMARK)
  398. #define snd_nm256_capture_mark(chip, s) snd_nm256_pcm_mark(chip, s, NM_RBUFFER_WMARK)
  399. static void
  400. snd_nm256_playback_start(nm256_t *chip, nm256_stream_t *s, snd_pcm_substream_t *substream)
  401. {
  402. /* program buffer pointers */
  403. snd_nm256_writel(chip, NM_PBUFFER_START, s->buf);
  404. snd_nm256_writel(chip, NM_PBUFFER_END, s->buf + s->dma_size - (1 << s->shift));
  405. snd_nm256_writel(chip, NM_PBUFFER_CURRP, s->buf);
  406. snd_nm256_playback_mark(chip, s);
  407. /* Enable playback engine and interrupts. */
  408. snd_nm256_writeb(chip, NM_PLAYBACK_ENABLE_REG,
  409. NM_PLAYBACK_ENABLE_FLAG | NM_PLAYBACK_FREERUN);
  410. /* Enable both channels. */
  411. snd_nm256_writew(chip, NM_AUDIO_MUTE_REG, 0x0);
  412. }
  413. static void
  414. snd_nm256_capture_start(nm256_t *chip, nm256_stream_t *s, snd_pcm_substream_t *substream)
  415. {
  416. /* program buffer pointers */
  417. snd_nm256_writel(chip, NM_RBUFFER_START, s->buf);
  418. snd_nm256_writel(chip, NM_RBUFFER_END, s->buf + s->dma_size);
  419. snd_nm256_writel(chip, NM_RBUFFER_CURRP, s->buf);
  420. snd_nm256_capture_mark(chip, s);
  421. /* Enable playback engine and interrupts. */
  422. snd_nm256_writeb(chip, NM_RECORD_ENABLE_REG,
  423. NM_RECORD_ENABLE_FLAG | NM_RECORD_FREERUN);
  424. }
  425. /* Stop the play engine. */
  426. static void
  427. snd_nm256_playback_stop(nm256_t *chip)
  428. {
  429. /* Shut off sound from both channels. */
  430. snd_nm256_writew(chip, NM_AUDIO_MUTE_REG,
  431. NM_AUDIO_MUTE_LEFT | NM_AUDIO_MUTE_RIGHT);
  432. /* Disable play engine. */
  433. snd_nm256_writeb(chip, NM_PLAYBACK_ENABLE_REG, 0);
  434. }
  435. static void
  436. snd_nm256_capture_stop(nm256_t *chip)
  437. {
  438. /* Disable recording engine. */
  439. snd_nm256_writeb(chip, NM_RECORD_ENABLE_REG, 0);
  440. }
  441. static int
  442. snd_nm256_playback_trigger(snd_pcm_substream_t *substream, int cmd)
  443. {
  444. nm256_t *chip = snd_pcm_substream_chip(substream);
  445. nm256_stream_t *s = (nm256_stream_t*)substream->runtime->private_data;
  446. int err = 0;
  447. snd_assert(s != NULL, return -ENXIO);
  448. spin_lock(&chip->reg_lock);
  449. switch (cmd) {
  450. case SNDRV_PCM_TRIGGER_START:
  451. case SNDRV_PCM_TRIGGER_RESUME:
  452. if (! s->running) {
  453. snd_nm256_playback_start(chip, s, substream);
  454. s->running = 1;
  455. }
  456. break;
  457. case SNDRV_PCM_TRIGGER_STOP:
  458. case SNDRV_PCM_TRIGGER_SUSPEND:
  459. if (s->running) {
  460. snd_nm256_playback_stop(chip);
  461. s->running = 0;
  462. }
  463. break;
  464. default:
  465. err = -EINVAL;
  466. break;
  467. }
  468. spin_unlock(&chip->reg_lock);
  469. return err;
  470. }
  471. static int
  472. snd_nm256_capture_trigger(snd_pcm_substream_t *substream, int cmd)
  473. {
  474. nm256_t *chip = snd_pcm_substream_chip(substream);
  475. nm256_stream_t *s = (nm256_stream_t*)substream->runtime->private_data;
  476. int err = 0;
  477. snd_assert(s != NULL, return -ENXIO);
  478. spin_lock(&chip->reg_lock);
  479. switch (cmd) {
  480. case SNDRV_PCM_TRIGGER_START:
  481. case SNDRV_PCM_TRIGGER_RESUME:
  482. if (! s->running) {
  483. snd_nm256_capture_start(chip, s, substream);
  484. s->running = 1;
  485. }
  486. break;
  487. case SNDRV_PCM_TRIGGER_STOP:
  488. case SNDRV_PCM_TRIGGER_SUSPEND:
  489. if (s->running) {
  490. snd_nm256_capture_stop(chip);
  491. s->running = 0;
  492. }
  493. break;
  494. default:
  495. err = -EINVAL;
  496. break;
  497. }
  498. spin_unlock(&chip->reg_lock);
  499. return err;
  500. }
  501. /*
  502. * prepare playback/capture channel
  503. */
  504. static int snd_nm256_pcm_prepare(snd_pcm_substream_t *substream)
  505. {
  506. nm256_t *chip = snd_pcm_substream_chip(substream);
  507. snd_pcm_runtime_t *runtime = substream->runtime;
  508. nm256_stream_t *s = (nm256_stream_t*)runtime->private_data;
  509. snd_assert(s, return -ENXIO);
  510. s->dma_size = frames_to_bytes(runtime, substream->runtime->buffer_size);
  511. s->period_size = frames_to_bytes(runtime, substream->runtime->period_size);
  512. s->periods = substream->runtime->periods;
  513. s->cur_period = 0;
  514. spin_lock_irq(&chip->reg_lock);
  515. s->running = 0;
  516. snd_nm256_set_format(chip, s, substream);
  517. spin_unlock_irq(&chip->reg_lock);
  518. return 0;
  519. }
  520. /*
  521. * get the current pointer
  522. */
  523. static snd_pcm_uframes_t
  524. snd_nm256_playback_pointer(snd_pcm_substream_t * substream)
  525. {
  526. nm256_t *chip = snd_pcm_substream_chip(substream);
  527. nm256_stream_t *s = (nm256_stream_t*)substream->runtime->private_data;
  528. unsigned long curp;
  529. snd_assert(s, return 0);
  530. curp = snd_nm256_readl(chip, NM_PBUFFER_CURRP) - (unsigned long)s->buf;
  531. curp %= s->dma_size;
  532. return bytes_to_frames(substream->runtime, curp);
  533. }
  534. static snd_pcm_uframes_t
  535. snd_nm256_capture_pointer(snd_pcm_substream_t * substream)
  536. {
  537. nm256_t *chip = snd_pcm_substream_chip(substream);
  538. nm256_stream_t *s = (nm256_stream_t*)substream->runtime->private_data;
  539. unsigned long curp;
  540. snd_assert(s != NULL, return 0);
  541. curp = snd_nm256_readl(chip, NM_RBUFFER_CURRP) - (unsigned long)s->buf;
  542. curp %= s->dma_size;
  543. return bytes_to_frames(substream->runtime, curp);
  544. }
  545. /* Remapped I/O space can be accessible as pointer on i386 */
  546. /* This might be changed in the future */
  547. #ifndef __i386__
  548. /*
  549. * silence / copy for playback
  550. */
  551. static int
  552. snd_nm256_playback_silence(snd_pcm_substream_t *substream,
  553. int channel, /* not used (interleaved data) */
  554. snd_pcm_uframes_t pos,
  555. snd_pcm_uframes_t count)
  556. {
  557. snd_pcm_runtime_t *runtime = substream->runtime;
  558. nm256_stream_t *s = (nm256_stream_t*)runtime->private_data;
  559. count = frames_to_bytes(runtime, count);
  560. pos = frames_to_bytes(runtime, pos);
  561. memset_io(s->bufptr + pos, 0, count);
  562. return 0;
  563. }
  564. static int
  565. snd_nm256_playback_copy(snd_pcm_substream_t *substream,
  566. int channel, /* not used (interleaved data) */
  567. snd_pcm_uframes_t pos,
  568. void __user *src,
  569. snd_pcm_uframes_t count)
  570. {
  571. snd_pcm_runtime_t *runtime = substream->runtime;
  572. nm256_stream_t *s = (nm256_stream_t*)runtime->private_data;
  573. count = frames_to_bytes(runtime, count);
  574. pos = frames_to_bytes(runtime, pos);
  575. if (copy_from_user_toio(s->bufptr + pos, src, count))
  576. return -EFAULT;
  577. return 0;
  578. }
  579. /*
  580. * copy to user
  581. */
  582. static int
  583. snd_nm256_capture_copy(snd_pcm_substream_t *substream,
  584. int channel, /* not used (interleaved data) */
  585. snd_pcm_uframes_t pos,
  586. void __user *dst,
  587. snd_pcm_uframes_t count)
  588. {
  589. snd_pcm_runtime_t *runtime = substream->runtime;
  590. nm256_stream_t *s = (nm256_stream_t*)runtime->private_data;
  591. count = frames_to_bytes(runtime, count);
  592. pos = frames_to_bytes(runtime, pos);
  593. if (copy_to_user_fromio(dst, s->bufptr + pos, count))
  594. return -EFAULT;
  595. return 0;
  596. }
  597. #endif /* !__i386__ */
  598. /*
  599. * update playback/capture watermarks
  600. */
  601. /* spinlock held! */
  602. static void
  603. snd_nm256_playback_update(nm256_t *chip)
  604. {
  605. nm256_stream_t *s;
  606. s = &chip->streams[SNDRV_PCM_STREAM_PLAYBACK];
  607. if (s->running && s->substream) {
  608. spin_unlock(&chip->reg_lock);
  609. snd_pcm_period_elapsed(s->substream);
  610. spin_lock(&chip->reg_lock);
  611. snd_nm256_playback_mark(chip, s);
  612. }
  613. }
  614. /* spinlock held! */
  615. static void
  616. snd_nm256_capture_update(nm256_t *chip)
  617. {
  618. nm256_stream_t *s;
  619. s = &chip->streams[SNDRV_PCM_STREAM_CAPTURE];
  620. if (s->running && s->substream) {
  621. spin_unlock(&chip->reg_lock);
  622. snd_pcm_period_elapsed(s->substream);
  623. spin_lock(&chip->reg_lock);
  624. snd_nm256_capture_mark(chip, s);
  625. }
  626. }
  627. /*
  628. * hardware info
  629. */
  630. static snd_pcm_hardware_t snd_nm256_playback =
  631. {
  632. .info = SNDRV_PCM_INFO_MMAP_IOMEM |SNDRV_PCM_INFO_MMAP_VALID |
  633. SNDRV_PCM_INFO_INTERLEAVED |
  634. /*SNDRV_PCM_INFO_PAUSE |*/
  635. SNDRV_PCM_INFO_RESUME,
  636. .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
  637. .rates = SNDRV_PCM_RATE_KNOT/*24k*/ | SNDRV_PCM_RATE_8000_48000,
  638. .rate_min = 8000,
  639. .rate_max = 48000,
  640. .channels_min = 1,
  641. .channels_max = 2,
  642. .periods_min = 2,
  643. .periods_max = 1024,
  644. .buffer_bytes_max = 128 * 1024,
  645. .period_bytes_min = 256,
  646. .period_bytes_max = 128 * 1024,
  647. };
  648. static snd_pcm_hardware_t snd_nm256_capture =
  649. {
  650. .info = SNDRV_PCM_INFO_MMAP_IOMEM | SNDRV_PCM_INFO_MMAP_VALID |
  651. SNDRV_PCM_INFO_INTERLEAVED |
  652. /*SNDRV_PCM_INFO_PAUSE |*/
  653. SNDRV_PCM_INFO_RESUME,
  654. .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
  655. .rates = SNDRV_PCM_RATE_KNOT/*24k*/ | SNDRV_PCM_RATE_8000_48000,
  656. .rate_min = 8000,
  657. .rate_max = 48000,
  658. .channels_min = 1,
  659. .channels_max = 2,
  660. .periods_min = 2,
  661. .periods_max = 1024,
  662. .buffer_bytes_max = 128 * 1024,
  663. .period_bytes_min = 256,
  664. .period_bytes_max = 128 * 1024,
  665. };
  666. /* set dma transfer size */
  667. static int snd_nm256_pcm_hw_params(snd_pcm_substream_t *substream, snd_pcm_hw_params_t *hw_params)
  668. {
  669. /* area and addr are already set and unchanged */
  670. substream->runtime->dma_bytes = params_buffer_bytes(hw_params);
  671. return 0;
  672. }
  673. /*
  674. * open
  675. */
  676. static void snd_nm256_setup_stream(nm256_t *chip, nm256_stream_t *s,
  677. snd_pcm_substream_t *substream,
  678. snd_pcm_hardware_t *hw_ptr)
  679. {
  680. snd_pcm_runtime_t *runtime = substream->runtime;
  681. s->running = 0;
  682. runtime->hw = *hw_ptr;
  683. runtime->hw.buffer_bytes_max = s->bufsize;
  684. runtime->hw.period_bytes_max = s->bufsize / 2;
  685. runtime->dma_area = (void*) s->bufptr;
  686. runtime->dma_addr = s->bufptr_addr;
  687. runtime->dma_bytes = s->bufsize;
  688. runtime->private_data = s;
  689. s->substream = substream;
  690. snd_pcm_set_sync(substream);
  691. snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
  692. &constraints_rates);
  693. }
  694. static int
  695. snd_nm256_playback_open(snd_pcm_substream_t *substream)
  696. {
  697. nm256_t *chip = snd_pcm_substream_chip(substream);
  698. snd_nm256_setup_stream(chip, &chip->streams[SNDRV_PCM_STREAM_PLAYBACK],
  699. substream, &snd_nm256_playback);
  700. return 0;
  701. }
  702. static int
  703. snd_nm256_capture_open(snd_pcm_substream_t *substream)
  704. {
  705. nm256_t *chip = snd_pcm_substream_chip(substream);
  706. snd_nm256_setup_stream(chip, &chip->streams[SNDRV_PCM_STREAM_CAPTURE],
  707. substream, &snd_nm256_capture);
  708. return 0;
  709. }
  710. /*
  711. * close - we don't have to do special..
  712. */
  713. static int
  714. snd_nm256_playback_close(snd_pcm_substream_t *substream)
  715. {
  716. return 0;
  717. }
  718. static int
  719. snd_nm256_capture_close(snd_pcm_substream_t *substream)
  720. {
  721. return 0;
  722. }
  723. /*
  724. * create a pcm instance
  725. */
  726. static snd_pcm_ops_t snd_nm256_playback_ops = {
  727. .open = snd_nm256_playback_open,
  728. .close = snd_nm256_playback_close,
  729. .ioctl = snd_pcm_lib_ioctl,
  730. .hw_params = snd_nm256_pcm_hw_params,
  731. .prepare = snd_nm256_pcm_prepare,
  732. .trigger = snd_nm256_playback_trigger,
  733. .pointer = snd_nm256_playback_pointer,
  734. #ifndef __i386__
  735. .copy = snd_nm256_playback_copy,
  736. .silence = snd_nm256_playback_silence,
  737. #endif
  738. .mmap = snd_pcm_lib_mmap_iomem,
  739. };
  740. static snd_pcm_ops_t snd_nm256_capture_ops = {
  741. .open = snd_nm256_capture_open,
  742. .close = snd_nm256_capture_close,
  743. .ioctl = snd_pcm_lib_ioctl,
  744. .hw_params = snd_nm256_pcm_hw_params,
  745. .prepare = snd_nm256_pcm_prepare,
  746. .trigger = snd_nm256_capture_trigger,
  747. .pointer = snd_nm256_capture_pointer,
  748. #ifndef __i386__
  749. .copy = snd_nm256_capture_copy,
  750. #endif
  751. .mmap = snd_pcm_lib_mmap_iomem,
  752. };
  753. static int __devinit
  754. snd_nm256_pcm(nm256_t *chip, int device)
  755. {
  756. snd_pcm_t *pcm;
  757. int i, err;
  758. for (i = 0; i < 2; i++) {
  759. nm256_stream_t *s = &chip->streams[i];
  760. s->bufptr = chip->buffer + (s->buf - chip->buffer_start);
  761. s->bufptr_addr = chip->buffer_addr + (s->buf - chip->buffer_start);
  762. }
  763. err = snd_pcm_new(chip->card, chip->card->driver, device,
  764. 1, 1, &pcm);
  765. if (err < 0)
  766. return err;
  767. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_nm256_playback_ops);
  768. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_nm256_capture_ops);
  769. pcm->private_data = chip;
  770. pcm->info_flags = 0;
  771. chip->pcm = pcm;
  772. return 0;
  773. }
  774. /*
  775. * Initialize the hardware.
  776. */
  777. static void
  778. snd_nm256_init_chip(nm256_t *chip)
  779. {
  780. spin_lock_irq(&chip->reg_lock);
  781. /* Reset everything. */
  782. snd_nm256_writeb(chip, 0x0, 0x11);
  783. snd_nm256_writew(chip, 0x214, 0);
  784. /* stop sounds.. */
  785. //snd_nm256_playback_stop(chip);
  786. //snd_nm256_capture_stop(chip);
  787. spin_unlock_irq(&chip->reg_lock);
  788. }
  789. inline static void
  790. snd_nm256_intr_check(nm256_t *chip)
  791. {
  792. if (chip->badintrcount++ > 1000) {
  793. /*
  794. * I'm not sure if the best thing is to stop the card from
  795. * playing or just release the interrupt (after all, we're in
  796. * a bad situation, so doing fancy stuff may not be such a good
  797. * idea).
  798. *
  799. * I worry about the card engine continuing to play noise
  800. * over and over, however--that could become a very
  801. * obnoxious problem. And we know that when this usually
  802. * happens things are fairly safe, it just means the user's
  803. * inserted a PCMCIA card and someone's spamming us with IRQ 9s.
  804. */
  805. if (chip->streams[SNDRV_PCM_STREAM_PLAYBACK].running)
  806. snd_nm256_playback_stop(chip);
  807. if (chip->streams[SNDRV_PCM_STREAM_CAPTURE].running)
  808. snd_nm256_capture_stop(chip);
  809. chip->badintrcount = 0;
  810. }
  811. }
  812. /*
  813. * Handle a potential interrupt for the device referred to by DEV_ID.
  814. *
  815. * I don't like the cut-n-paste job here either between the two routines,
  816. * but there are sufficient differences between the two interrupt handlers
  817. * that parameterizing it isn't all that great either. (Could use a macro,
  818. * I suppose...yucky bleah.)
  819. */
  820. static irqreturn_t
  821. snd_nm256_interrupt(int irq, void *dev_id, struct pt_regs *dummy)
  822. {
  823. nm256_t *chip = dev_id;
  824. u16 status;
  825. u8 cbyte;
  826. status = snd_nm256_readw(chip, NM_INT_REG);
  827. /* Not ours. */
  828. if (status == 0) {
  829. snd_nm256_intr_check(chip);
  830. return IRQ_NONE;
  831. }
  832. chip->badintrcount = 0;
  833. /* Rather boring; check for individual interrupts and process them. */
  834. spin_lock(&chip->reg_lock);
  835. if (status & NM_PLAYBACK_INT) {
  836. status &= ~NM_PLAYBACK_INT;
  837. NM_ACK_INT(chip, NM_PLAYBACK_INT);
  838. snd_nm256_playback_update(chip);
  839. }
  840. if (status & NM_RECORD_INT) {
  841. status &= ~NM_RECORD_INT;
  842. NM_ACK_INT(chip, NM_RECORD_INT);
  843. snd_nm256_capture_update(chip);
  844. }
  845. if (status & NM_MISC_INT_1) {
  846. status &= ~NM_MISC_INT_1;
  847. NM_ACK_INT(chip, NM_MISC_INT_1);
  848. snd_printd("NM256: Got misc interrupt #1\n");
  849. snd_nm256_writew(chip, NM_INT_REG, 0x8000);
  850. cbyte = snd_nm256_readb(chip, 0x400);
  851. snd_nm256_writeb(chip, 0x400, cbyte | 2);
  852. }
  853. if (status & NM_MISC_INT_2) {
  854. status &= ~NM_MISC_INT_2;
  855. NM_ACK_INT(chip, NM_MISC_INT_2);
  856. snd_printd("NM256: Got misc interrupt #2\n");
  857. cbyte = snd_nm256_readb(chip, 0x400);
  858. snd_nm256_writeb(chip, 0x400, cbyte & ~2);
  859. }
  860. /* Unknown interrupt. */
  861. if (status) {
  862. snd_printd("NM256: Fire in the hole! Unknown status 0x%x\n",
  863. status);
  864. /* Pray. */
  865. NM_ACK_INT(chip, status);
  866. }
  867. spin_unlock(&chip->reg_lock);
  868. return IRQ_HANDLED;
  869. }
  870. /*
  871. * Handle a potential interrupt for the device referred to by DEV_ID.
  872. * This handler is for the 256ZX, and is very similar to the non-ZX
  873. * routine.
  874. */
  875. static irqreturn_t
  876. snd_nm256_interrupt_zx(int irq, void *dev_id, struct pt_regs *dummy)
  877. {
  878. nm256_t *chip = dev_id;
  879. u32 status;
  880. u8 cbyte;
  881. status = snd_nm256_readl(chip, NM_INT_REG);
  882. /* Not ours. */
  883. if (status == 0) {
  884. snd_nm256_intr_check(chip);
  885. return IRQ_NONE;
  886. }
  887. chip->badintrcount = 0;
  888. /* Rather boring; check for individual interrupts and process them. */
  889. spin_lock(&chip->reg_lock);
  890. if (status & NM2_PLAYBACK_INT) {
  891. status &= ~NM2_PLAYBACK_INT;
  892. NM2_ACK_INT(chip, NM2_PLAYBACK_INT);
  893. snd_nm256_playback_update(chip);
  894. }
  895. if (status & NM2_RECORD_INT) {
  896. status &= ~NM2_RECORD_INT;
  897. NM2_ACK_INT(chip, NM2_RECORD_INT);
  898. snd_nm256_capture_update(chip);
  899. }
  900. if (status & NM2_MISC_INT_1) {
  901. status &= ~NM2_MISC_INT_1;
  902. NM2_ACK_INT(chip, NM2_MISC_INT_1);
  903. snd_printd("NM256: Got misc interrupt #1\n");
  904. cbyte = snd_nm256_readb(chip, 0x400);
  905. snd_nm256_writeb(chip, 0x400, cbyte | 2);
  906. }
  907. if (status & NM2_MISC_INT_2) {
  908. status &= ~NM2_MISC_INT_2;
  909. NM2_ACK_INT(chip, NM2_MISC_INT_2);
  910. snd_printd("NM256: Got misc interrupt #2\n");
  911. cbyte = snd_nm256_readb(chip, 0x400);
  912. snd_nm256_writeb(chip, 0x400, cbyte & ~2);
  913. }
  914. /* Unknown interrupt. */
  915. if (status) {
  916. snd_printd("NM256: Fire in the hole! Unknown status 0x%x\n",
  917. status);
  918. /* Pray. */
  919. NM2_ACK_INT(chip, status);
  920. }
  921. spin_unlock(&chip->reg_lock);
  922. return IRQ_HANDLED;
  923. }
  924. /*
  925. * AC97 interface
  926. */
  927. /*
  928. * Waits for the mixer to become ready to be written; returns a zero value
  929. * if it timed out.
  930. */
  931. static int
  932. snd_nm256_ac97_ready(nm256_t *chip)
  933. {
  934. int timeout = 10;
  935. u32 testaddr;
  936. u16 testb;
  937. testaddr = chip->mixer_status_offset;
  938. testb = chip->mixer_status_mask;
  939. /*
  940. * Loop around waiting for the mixer to become ready.
  941. */
  942. while (timeout-- > 0) {
  943. if ((snd_nm256_readw(chip, testaddr) & testb) == 0)
  944. return 1;
  945. udelay(100);
  946. }
  947. return 0;
  948. }
  949. /*
  950. */
  951. static unsigned short
  952. snd_nm256_ac97_read(ac97_t *ac97, unsigned short reg)
  953. {
  954. nm256_t *chip = ac97->private_data;
  955. int res;
  956. if (reg >= 128)
  957. return 0;
  958. if (! snd_nm256_ac97_ready(chip))
  959. return 0;
  960. res = snd_nm256_readw(chip, chip->mixer_base + reg);
  961. /* Magic delay. Bleah yucky. */
  962. msleep(1);
  963. return res;
  964. }
  965. /*
  966. */
  967. static void
  968. snd_nm256_ac97_write(ac97_t *ac97,
  969. unsigned short reg, unsigned short val)
  970. {
  971. nm256_t *chip = ac97->private_data;
  972. int tries = 2;
  973. u32 base;
  974. base = chip->mixer_base;
  975. snd_nm256_ac97_ready(chip);
  976. /* Wait for the write to take, too. */
  977. while (tries-- > 0) {
  978. snd_nm256_writew(chip, base + reg, val);
  979. msleep(1); /* a little delay here seems better.. */
  980. if (snd_nm256_ac97_ready(chip))
  981. return;
  982. }
  983. snd_printd("nm256: ac97 codec not ready..\n");
  984. }
  985. /* initialize the ac97 into a known state */
  986. static void
  987. snd_nm256_ac97_reset(ac97_t *ac97)
  988. {
  989. nm256_t *chip = ac97->private_data;
  990. /* Reset the mixer. 'Tis magic! */
  991. snd_nm256_writeb(chip, 0x6c0, 1);
  992. if (! chip->reset_workaround) {
  993. /* Dell latitude LS will lock up by this */
  994. snd_nm256_writeb(chip, 0x6cc, 0x87);
  995. }
  996. snd_nm256_writeb(chip, 0x6cc, 0x80);
  997. snd_nm256_writeb(chip, 0x6cc, 0x0);
  998. }
  999. /* create an ac97 mixer interface */
  1000. static int __devinit
  1001. snd_nm256_mixer(nm256_t *chip)
  1002. {
  1003. ac97_bus_t *pbus;
  1004. ac97_template_t ac97;
  1005. int i, err;
  1006. static ac97_bus_ops_t ops = {
  1007. .reset = snd_nm256_ac97_reset,
  1008. .write = snd_nm256_ac97_write,
  1009. .read = snd_nm256_ac97_read,
  1010. };
  1011. /* looks like nm256 hangs up when unexpected registers are touched... */
  1012. static int mixer_regs[] = {
  1013. AC97_MASTER, AC97_HEADPHONE, AC97_MASTER_MONO,
  1014. AC97_PC_BEEP, AC97_PHONE, AC97_MIC, AC97_LINE, AC97_CD,
  1015. AC97_VIDEO, AC97_AUX, AC97_PCM, AC97_REC_SEL,
  1016. AC97_REC_GAIN, AC97_GENERAL_PURPOSE, AC97_3D_CONTROL,
  1017. AC97_EXTENDED_ID,
  1018. AC97_VENDOR_ID1, AC97_VENDOR_ID2,
  1019. -1
  1020. };
  1021. if ((err = snd_ac97_bus(chip->card, 0, &ops, NULL, &pbus)) < 0)
  1022. return err;
  1023. memset(&ac97, 0, sizeof(ac97));
  1024. ac97.scaps = AC97_SCAP_AUDIO; /* we support audio! */
  1025. ac97.limited_regs = 1;
  1026. for (i = 0; mixer_regs[i] >= 0; i++)
  1027. set_bit(mixer_regs[i], ac97.reg_accessed);
  1028. ac97.private_data = chip;
  1029. err = snd_ac97_mixer(pbus, &ac97, &chip->ac97);
  1030. if (err < 0)
  1031. return err;
  1032. if (! (chip->ac97->id & (0xf0000000))) {
  1033. /* looks like an invalid id */
  1034. sprintf(chip->card->mixername, "%s AC97", chip->card->driver);
  1035. }
  1036. return 0;
  1037. }
  1038. /*
  1039. * See if the signature left by the NM256 BIOS is intact; if so, we use
  1040. * the associated address as the end of our audio buffer in the video
  1041. * RAM.
  1042. */
  1043. static int __devinit
  1044. snd_nm256_peek_for_sig(nm256_t *chip)
  1045. {
  1046. /* The signature is located 1K below the end of video RAM. */
  1047. void __iomem *temp;
  1048. /* Default buffer end is 5120 bytes below the top of RAM. */
  1049. unsigned long pointer_found = chip->buffer_end - 0x1400;
  1050. u32 sig;
  1051. temp = ioremap_nocache(chip->buffer_addr + chip->buffer_end - 0x400, 16);
  1052. if (temp == NULL) {
  1053. snd_printk("Unable to scan for card signature in video RAM\n");
  1054. return -EBUSY;
  1055. }
  1056. sig = readl(temp);
  1057. if ((sig & NM_SIG_MASK) == NM_SIGNATURE) {
  1058. u32 pointer = readl(temp + 4);
  1059. /*
  1060. * If it's obviously invalid, don't use it
  1061. */
  1062. if (pointer == 0xffffffff ||
  1063. pointer < chip->buffer_size ||
  1064. pointer > chip->buffer_end) {
  1065. snd_printk("invalid signature found: 0x%x\n", pointer);
  1066. iounmap(temp);
  1067. return -ENODEV;
  1068. } else {
  1069. pointer_found = pointer;
  1070. printk(KERN_INFO "nm256: found card signature in video RAM: 0x%x\n", pointer);
  1071. }
  1072. }
  1073. iounmap(temp);
  1074. chip->buffer_end = pointer_found;
  1075. return 0;
  1076. }
  1077. #ifdef CONFIG_PM
  1078. /*
  1079. * APM event handler, so the card is properly reinitialized after a power
  1080. * event.
  1081. */
  1082. static int nm256_suspend(snd_card_t *card, pm_message_t state)
  1083. {
  1084. nm256_t *chip = card->pm_private_data;
  1085. snd_pcm_suspend_all(chip->pcm);
  1086. snd_ac97_suspend(chip->ac97);
  1087. chip->coeffs_current = 0;
  1088. pci_disable_device(chip->pci);
  1089. return 0;
  1090. }
  1091. static int nm256_resume(snd_card_t *card)
  1092. {
  1093. nm256_t *chip = card->pm_private_data;
  1094. /* Perform a full reset on the hardware */
  1095. pci_enable_device(chip->pci);
  1096. snd_nm256_init_chip(chip);
  1097. /* restore ac97 */
  1098. snd_ac97_resume(chip->ac97);
  1099. return 0;
  1100. }
  1101. #endif /* CONFIG_PM */
  1102. static int snd_nm256_free(nm256_t *chip)
  1103. {
  1104. if (chip->streams[SNDRV_PCM_STREAM_PLAYBACK].running)
  1105. snd_nm256_playback_stop(chip);
  1106. if (chip->streams[SNDRV_PCM_STREAM_CAPTURE].running)
  1107. snd_nm256_capture_stop(chip);
  1108. if (chip->irq >= 0)
  1109. synchronize_irq(chip->irq);
  1110. if (chip->cport)
  1111. iounmap(chip->cport);
  1112. if (chip->buffer)
  1113. iounmap(chip->buffer);
  1114. if (chip->res_cport) {
  1115. release_resource(chip->res_cport);
  1116. kfree_nocheck(chip->res_cport);
  1117. }
  1118. if (chip->res_buffer) {
  1119. release_resource(chip->res_buffer);
  1120. kfree_nocheck(chip->res_buffer);
  1121. }
  1122. if (chip->irq >= 0)
  1123. free_irq(chip->irq, (void*)chip);
  1124. pci_disable_device(chip->pci);
  1125. kfree(chip);
  1126. return 0;
  1127. }
  1128. static int snd_nm256_dev_free(snd_device_t *device)
  1129. {
  1130. nm256_t *chip = device->device_data;
  1131. return snd_nm256_free(chip);
  1132. }
  1133. static int __devinit
  1134. snd_nm256_create(snd_card_t *card, struct pci_dev *pci,
  1135. int play_bufsize, int capt_bufsize,
  1136. int force_load,
  1137. u32 buffertop,
  1138. int usecache,
  1139. nm256_t **chip_ret)
  1140. {
  1141. nm256_t *chip;
  1142. int err, pval;
  1143. static snd_device_ops_t ops = {
  1144. .dev_free = snd_nm256_dev_free,
  1145. };
  1146. u32 addr;
  1147. *chip_ret = NULL;
  1148. if ((err = pci_enable_device(pci)) < 0)
  1149. return err;
  1150. chip = kcalloc(1, sizeof(*chip), GFP_KERNEL);
  1151. if (chip == NULL) {
  1152. pci_disable_device(pci);
  1153. return -ENOMEM;
  1154. }
  1155. chip->card = card;
  1156. chip->pci = pci;
  1157. chip->use_cache = usecache;
  1158. spin_lock_init(&chip->reg_lock);
  1159. chip->irq = -1;
  1160. chip->streams[SNDRV_PCM_STREAM_PLAYBACK].bufsize = play_bufsize;
  1161. chip->streams[SNDRV_PCM_STREAM_CAPTURE].bufsize = capt_bufsize;
  1162. /*
  1163. * The NM256 has two memory ports. The first port is nothing
  1164. * more than a chunk of video RAM, which is used as the I/O ring
  1165. * buffer. The second port has the actual juicy stuff (like the
  1166. * mixer and the playback engine control registers).
  1167. */
  1168. chip->buffer_addr = pci_resource_start(pci, 0);
  1169. chip->cport_addr = pci_resource_start(pci, 1);
  1170. /* Init the memory port info. */
  1171. /* remap control port (#2) */
  1172. chip->res_cport = request_mem_region(chip->cport_addr, NM_PORT2_SIZE,
  1173. card->driver);
  1174. if (chip->res_cport == NULL) {
  1175. snd_printk("memory region 0x%lx (size 0x%x) busy\n",
  1176. chip->cport_addr, NM_PORT2_SIZE);
  1177. err = -EBUSY;
  1178. goto __error;
  1179. }
  1180. chip->cport = ioremap_nocache(chip->cport_addr, NM_PORT2_SIZE);
  1181. if (chip->cport == NULL) {
  1182. snd_printk("unable to map control port %lx\n", chip->cport_addr);
  1183. err = -ENOMEM;
  1184. goto __error;
  1185. }
  1186. if (!strcmp(card->driver, "NM256AV")) {
  1187. /* Ok, try to see if this is a non-AC97 version of the hardware. */
  1188. pval = snd_nm256_readw(chip, NM_MIXER_PRESENCE);
  1189. if ((pval & NM_PRESENCE_MASK) != NM_PRESENCE_VALUE) {
  1190. if (! force_load) {
  1191. printk(KERN_ERR "nm256: no ac97 is found!\n");
  1192. printk(KERN_ERR " force the driver to load by passing in the module parameter\n");
  1193. printk(KERN_ERR " force_ac97=1\n");
  1194. printk(KERN_ERR " or try sb16 or cs423x drivers instead.\n");
  1195. err = -ENXIO;
  1196. goto __error;
  1197. }
  1198. }
  1199. chip->buffer_end = 2560 * 1024;
  1200. chip->interrupt = snd_nm256_interrupt;
  1201. chip->mixer_status_offset = NM_MIXER_STATUS_OFFSET;
  1202. chip->mixer_status_mask = NM_MIXER_READY_MASK;
  1203. } else {
  1204. /* Not sure if there is any relevant detect for the ZX or not. */
  1205. if (snd_nm256_readb(chip, 0xa0b) != 0)
  1206. chip->buffer_end = 6144 * 1024;
  1207. else
  1208. chip->buffer_end = 4096 * 1024;
  1209. chip->interrupt = snd_nm256_interrupt_zx;
  1210. chip->mixer_status_offset = NM2_MIXER_STATUS_OFFSET;
  1211. chip->mixer_status_mask = NM2_MIXER_READY_MASK;
  1212. }
  1213. chip->buffer_size = chip->streams[SNDRV_PCM_STREAM_PLAYBACK].bufsize + chip->streams[SNDRV_PCM_STREAM_CAPTURE].bufsize;
  1214. if (chip->use_cache)
  1215. chip->buffer_size += NM_TOTAL_COEFF_COUNT * 4;
  1216. else
  1217. chip->buffer_size += NM_MAX_PLAYBACK_COEF_SIZE + NM_MAX_RECORD_COEF_SIZE;
  1218. if (buffertop >= chip->buffer_size && buffertop < chip->buffer_end)
  1219. chip->buffer_end = buffertop;
  1220. else {
  1221. /* get buffer end pointer from signature */
  1222. if ((err = snd_nm256_peek_for_sig(chip)) < 0)
  1223. goto __error;
  1224. }
  1225. chip->buffer_start = chip->buffer_end - chip->buffer_size;
  1226. chip->buffer_addr += chip->buffer_start;
  1227. printk(KERN_INFO "nm256: Mapping port 1 from 0x%x - 0x%x\n",
  1228. chip->buffer_start, chip->buffer_end);
  1229. chip->res_buffer = request_mem_region(chip->buffer_addr,
  1230. chip->buffer_size,
  1231. card->driver);
  1232. if (chip->res_buffer == NULL) {
  1233. snd_printk("nm256: buffer 0x%lx (size 0x%x) busy\n",
  1234. chip->buffer_addr, chip->buffer_size);
  1235. err = -EBUSY;
  1236. goto __error;
  1237. }
  1238. chip->buffer = ioremap_nocache(chip->buffer_addr, chip->buffer_size);
  1239. if (chip->buffer == NULL) {
  1240. err = -ENOMEM;
  1241. snd_printk("unable to map ring buffer at %lx\n", chip->buffer_addr);
  1242. goto __error;
  1243. }
  1244. /* set offsets */
  1245. addr = chip->buffer_start;
  1246. chip->streams[SNDRV_PCM_STREAM_PLAYBACK].buf = addr;
  1247. addr += chip->streams[SNDRV_PCM_STREAM_PLAYBACK].bufsize;
  1248. chip->streams[SNDRV_PCM_STREAM_CAPTURE].buf = addr;
  1249. addr += chip->streams[SNDRV_PCM_STREAM_CAPTURE].bufsize;
  1250. if (chip->use_cache) {
  1251. chip->all_coeff_buf = addr;
  1252. } else {
  1253. chip->coeff_buf[SNDRV_PCM_STREAM_PLAYBACK] = addr;
  1254. addr += NM_MAX_PLAYBACK_COEF_SIZE;
  1255. chip->coeff_buf[SNDRV_PCM_STREAM_CAPTURE] = addr;
  1256. }
  1257. /* acquire interrupt */
  1258. if (request_irq(pci->irq, chip->interrupt, SA_INTERRUPT|SA_SHIRQ,
  1259. card->driver, (void*)chip)) {
  1260. err = -EBUSY;
  1261. snd_printk("unable to grab IRQ %d\n", pci->irq);
  1262. goto __error;
  1263. }
  1264. chip->irq = pci->irq;
  1265. /* Fixed setting. */
  1266. chip->mixer_base = NM_MIXER_OFFSET;
  1267. chip->coeffs_current = 0;
  1268. snd_nm256_init_chip(chip);
  1269. // pci_set_master(pci); /* needed? */
  1270. snd_card_set_pm_callback(card, nm256_suspend, nm256_resume, chip);
  1271. if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0)
  1272. goto __error;
  1273. snd_card_set_dev(card, &pci->dev);
  1274. *chip_ret = chip;
  1275. return 0;
  1276. __error:
  1277. snd_nm256_free(chip);
  1278. return err;
  1279. }
  1280. struct nm256_quirk {
  1281. unsigned short vendor;
  1282. unsigned short device;
  1283. int type;
  1284. };
  1285. enum { NM_BLACKLISTED, NM_RESET_WORKAROUND };
  1286. static struct nm256_quirk nm256_quirks[] __devinitdata = {
  1287. /* HP omnibook 4150 has cs4232 codec internally */
  1288. { .vendor = 0x103c, .device = 0x0007, .type = NM_BLACKLISTED },
  1289. /* Sony PCG-F305 */
  1290. { .vendor = 0x104d, .device = 0x8041, .type = NM_RESET_WORKAROUND },
  1291. /* Dell Latitude LS */
  1292. { .vendor = 0x1028, .device = 0x0080, .type = NM_RESET_WORKAROUND },
  1293. { } /* terminator */
  1294. };
  1295. static int __devinit snd_nm256_probe(struct pci_dev *pci,
  1296. const struct pci_device_id *pci_id)
  1297. {
  1298. static int dev;
  1299. snd_card_t *card;
  1300. nm256_t *chip;
  1301. int err;
  1302. unsigned int xbuffer_top;
  1303. struct nm256_quirk *q;
  1304. u16 subsystem_vendor, subsystem_device;
  1305. if (dev >= SNDRV_CARDS)
  1306. return -ENODEV;
  1307. if (!enable[dev]) {
  1308. dev++;
  1309. return -ENOENT;
  1310. }
  1311. pci_read_config_word(pci, PCI_SUBSYSTEM_VENDOR_ID, &subsystem_vendor);
  1312. pci_read_config_word(pci, PCI_SUBSYSTEM_ID, &subsystem_device);
  1313. for (q = nm256_quirks; q->vendor; q++) {
  1314. if (q->vendor == subsystem_vendor && q->device == subsystem_device) {
  1315. switch (q->type) {
  1316. case NM_BLACKLISTED:
  1317. printk(KERN_INFO "nm256: The device is blacklisted. Loading stopped\n");
  1318. return -ENODEV;
  1319. case NM_RESET_WORKAROUND:
  1320. reset_workaround[dev] = 1;
  1321. break;
  1322. }
  1323. }
  1324. }
  1325. card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0);
  1326. if (card == NULL)
  1327. return -ENOMEM;
  1328. switch (pci->device) {
  1329. case PCI_DEVICE_ID_NEOMAGIC_NM256AV_AUDIO:
  1330. strcpy(card->driver, "NM256AV");
  1331. break;
  1332. case PCI_DEVICE_ID_NEOMAGIC_NM256ZX_AUDIO:
  1333. strcpy(card->driver, "NM256ZX");
  1334. break;
  1335. case PCI_DEVICE_ID_NEOMAGIC_NM256XL_PLUS_AUDIO:
  1336. strcpy(card->driver, "NM256XL+");
  1337. break;
  1338. default:
  1339. snd_printk("invalid device id 0x%x\n", pci->device);
  1340. snd_card_free(card);
  1341. return -EINVAL;
  1342. }
  1343. if (vaio_hack[dev])
  1344. xbuffer_top = 0x25a800; /* this avoids conflicts with XFree86 server */
  1345. else
  1346. xbuffer_top = buffer_top[dev];
  1347. if (playback_bufsize[dev] < 4)
  1348. playback_bufsize[dev] = 4;
  1349. if (playback_bufsize[dev] > 128)
  1350. playback_bufsize[dev] = 128;
  1351. if (capture_bufsize[dev] < 4)
  1352. capture_bufsize[dev] = 4;
  1353. if (capture_bufsize[dev] > 128)
  1354. capture_bufsize[dev] = 128;
  1355. if ((err = snd_nm256_create(card, pci,
  1356. playback_bufsize[dev] * 1024, /* in bytes */
  1357. capture_bufsize[dev] * 1024, /* in bytes */
  1358. force_ac97[dev],
  1359. xbuffer_top,
  1360. use_cache[dev],
  1361. &chip)) < 0) {
  1362. snd_card_free(card);
  1363. return err;
  1364. }
  1365. if (reset_workaround[dev]) {
  1366. snd_printdd(KERN_INFO "nm256: reset_workaround activated\n");
  1367. chip->reset_workaround = 1;
  1368. }
  1369. if ((err = snd_nm256_pcm(chip, 0)) < 0 ||
  1370. (err = snd_nm256_mixer(chip)) < 0) {
  1371. snd_card_free(card);
  1372. return err;
  1373. }
  1374. sprintf(card->shortname, "NeoMagic %s", card->driver);
  1375. sprintf(card->longname, "%s at 0x%lx & 0x%lx, irq %d",
  1376. card->shortname,
  1377. chip->buffer_addr, chip->cport_addr, chip->irq);
  1378. if ((err = snd_card_register(card)) < 0) {
  1379. snd_card_free(card);
  1380. return err;
  1381. }
  1382. pci_set_drvdata(pci, card);
  1383. dev++;
  1384. return 0;
  1385. }
  1386. static void __devexit snd_nm256_remove(struct pci_dev *pci)
  1387. {
  1388. snd_card_free(pci_get_drvdata(pci));
  1389. pci_set_drvdata(pci, NULL);
  1390. }
  1391. static struct pci_driver driver = {
  1392. .name = "NeoMagic 256",
  1393. .id_table = snd_nm256_ids,
  1394. .probe = snd_nm256_probe,
  1395. .remove = __devexit_p(snd_nm256_remove),
  1396. SND_PCI_PM_CALLBACKS
  1397. };
  1398. static int __init alsa_card_nm256_init(void)
  1399. {
  1400. return pci_register_driver(&driver);
  1401. }
  1402. static void __exit alsa_card_nm256_exit(void)
  1403. {
  1404. pci_unregister_driver(&driver);
  1405. }
  1406. module_init(alsa_card_nm256_init)
  1407. module_exit(alsa_card_nm256_exit)