pontis.c 21 KB

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  1. /*
  2. * ALSA driver for ICEnsemble VT1724 (Envy24HT)
  3. *
  4. * Lowlevel functions for Pontis MS300
  5. *
  6. * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; either version 2 of the License, or
  11. * (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  21. *
  22. */
  23. #include <sound/driver.h>
  24. #include <asm/io.h>
  25. #include <linux/delay.h>
  26. #include <linux/interrupt.h>
  27. #include <linux/init.h>
  28. #include <linux/slab.h>
  29. #include <sound/core.h>
  30. #include <sound/info.h>
  31. #include "ice1712.h"
  32. #include "envy24ht.h"
  33. #include "pontis.h"
  34. /* I2C addresses */
  35. #define WM_DEV 0x34
  36. #define CS_DEV 0x20
  37. /* WM8776 registers */
  38. #define WM_HP_ATTEN_L 0x00 /* headphone left attenuation */
  39. #define WM_HP_ATTEN_R 0x01 /* headphone left attenuation */
  40. #define WM_HP_MASTER 0x02 /* headphone master (both channels), override LLR */
  41. #define WM_DAC_ATTEN_L 0x03 /* digital left attenuation */
  42. #define WM_DAC_ATTEN_R 0x04
  43. #define WM_DAC_MASTER 0x05
  44. #define WM_PHASE_SWAP 0x06 /* DAC phase swap */
  45. #define WM_DAC_CTRL1 0x07
  46. #define WM_DAC_MUTE 0x08
  47. #define WM_DAC_CTRL2 0x09
  48. #define WM_DAC_INT 0x0a
  49. #define WM_ADC_INT 0x0b
  50. #define WM_MASTER_CTRL 0x0c
  51. #define WM_POWERDOWN 0x0d
  52. #define WM_ADC_ATTEN_L 0x0e
  53. #define WM_ADC_ATTEN_R 0x0f
  54. #define WM_ALC_CTRL1 0x10
  55. #define WM_ALC_CTRL2 0x11
  56. #define WM_ALC_CTRL3 0x12
  57. #define WM_NOISE_GATE 0x13
  58. #define WM_LIMITER 0x14
  59. #define WM_ADC_MUX 0x15
  60. #define WM_OUT_MUX 0x16
  61. #define WM_RESET 0x17
  62. /*
  63. * GPIO
  64. */
  65. #define PONTIS_CS_CS (1<<4) /* CS */
  66. #define PONTIS_CS_CLK (1<<5) /* CLK */
  67. #define PONTIS_CS_RDATA (1<<6) /* CS8416 -> VT1720 */
  68. #define PONTIS_CS_WDATA (1<<7) /* VT1720 -> CS8416 */
  69. /*
  70. * get the current register value of WM codec
  71. */
  72. static unsigned short wm_get(ice1712_t *ice, int reg)
  73. {
  74. reg <<= 1;
  75. return ((unsigned short)ice->akm[0].images[reg] << 8) |
  76. ice->akm[0].images[reg + 1];
  77. }
  78. /*
  79. * set the register value of WM codec and remember it
  80. */
  81. static void wm_put_nocache(ice1712_t *ice, int reg, unsigned short val)
  82. {
  83. unsigned short cval;
  84. cval = (reg << 9) | val;
  85. snd_vt1724_write_i2c(ice, WM_DEV, cval >> 8, cval & 0xff);
  86. }
  87. static void wm_put(ice1712_t *ice, int reg, unsigned short val)
  88. {
  89. wm_put_nocache(ice, reg, val);
  90. reg <<= 1;
  91. ice->akm[0].images[reg] = val >> 8;
  92. ice->akm[0].images[reg + 1] = val;
  93. }
  94. /*
  95. * DAC volume attenuation mixer control (-64dB to 0dB)
  96. */
  97. #define DAC_0dB 0xff
  98. #define DAC_RES 128
  99. #define DAC_MIN (DAC_0dB - DAC_RES)
  100. static int wm_dac_vol_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t *uinfo)
  101. {
  102. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  103. uinfo->count = 2;
  104. uinfo->value.integer.min = 0; /* mute */
  105. uinfo->value.integer.max = DAC_RES; /* 0dB, 0.5dB step */
  106. return 0;
  107. }
  108. static int wm_dac_vol_get(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t *ucontrol)
  109. {
  110. ice1712_t *ice = snd_kcontrol_chip(kcontrol);
  111. unsigned short val;
  112. int i;
  113. down(&ice->gpio_mutex);
  114. for (i = 0; i < 2; i++) {
  115. val = wm_get(ice, WM_DAC_ATTEN_L + i) & 0xff;
  116. val = val > DAC_MIN ? (val - DAC_MIN) : 0;
  117. ucontrol->value.integer.value[i] = val;
  118. }
  119. up(&ice->gpio_mutex);
  120. return 0;
  121. }
  122. static int wm_dac_vol_put(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t *ucontrol)
  123. {
  124. ice1712_t *ice = snd_kcontrol_chip(kcontrol);
  125. unsigned short oval, nval;
  126. int i, idx, change = 0;
  127. down(&ice->gpio_mutex);
  128. for (i = 0; i < 2; i++) {
  129. nval = ucontrol->value.integer.value[i];
  130. nval = (nval ? (nval + DAC_MIN) : 0) & 0xff;
  131. idx = WM_DAC_ATTEN_L + i;
  132. oval = wm_get(ice, idx) & 0xff;
  133. if (oval != nval) {
  134. wm_put(ice, idx, nval);
  135. wm_put_nocache(ice, idx, nval | 0x100);
  136. change = 1;
  137. }
  138. }
  139. up(&ice->gpio_mutex);
  140. return change;
  141. }
  142. /*
  143. * ADC gain mixer control (-64dB to 0dB)
  144. */
  145. #define ADC_0dB 0xcf
  146. #define ADC_RES 128
  147. #define ADC_MIN (ADC_0dB - ADC_RES)
  148. static int wm_adc_vol_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t *uinfo)
  149. {
  150. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  151. uinfo->count = 2;
  152. uinfo->value.integer.min = 0; /* mute (-64dB) */
  153. uinfo->value.integer.max = ADC_RES; /* 0dB, 0.5dB step */
  154. return 0;
  155. }
  156. static int wm_adc_vol_get(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t *ucontrol)
  157. {
  158. ice1712_t *ice = snd_kcontrol_chip(kcontrol);
  159. unsigned short val;
  160. int i;
  161. down(&ice->gpio_mutex);
  162. for (i = 0; i < 2; i++) {
  163. val = wm_get(ice, WM_ADC_ATTEN_L + i) & 0xff;
  164. val = val > ADC_MIN ? (val - ADC_MIN) : 0;
  165. ucontrol->value.integer.value[i] = val;
  166. }
  167. up(&ice->gpio_mutex);
  168. return 0;
  169. }
  170. static int wm_adc_vol_put(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t *ucontrol)
  171. {
  172. ice1712_t *ice = snd_kcontrol_chip(kcontrol);
  173. unsigned short ovol, nvol;
  174. int i, idx, change = 0;
  175. down(&ice->gpio_mutex);
  176. for (i = 0; i < 2; i++) {
  177. nvol = ucontrol->value.integer.value[i];
  178. nvol = nvol ? (nvol + ADC_MIN) : 0;
  179. idx = WM_ADC_ATTEN_L + i;
  180. ovol = wm_get(ice, idx) & 0xff;
  181. if (ovol != nvol) {
  182. wm_put(ice, idx, nvol);
  183. change = 1;
  184. }
  185. }
  186. up(&ice->gpio_mutex);
  187. return change;
  188. }
  189. /*
  190. * ADC input mux mixer control
  191. */
  192. static int wm_adc_mux_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t *uinfo)
  193. {
  194. uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
  195. uinfo->count = 1;
  196. uinfo->value.integer.min = 0;
  197. uinfo->value.integer.max = 1;
  198. return 0;
  199. }
  200. static int wm_adc_mux_get(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t *ucontrol)
  201. {
  202. ice1712_t *ice = snd_kcontrol_chip(kcontrol);
  203. int bit = kcontrol->private_value;
  204. down(&ice->gpio_mutex);
  205. ucontrol->value.integer.value[0] = (wm_get(ice, WM_ADC_MUX) & (1 << bit)) ? 1 : 0;
  206. up(&ice->gpio_mutex);
  207. return 0;
  208. }
  209. static int wm_adc_mux_put(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t *ucontrol)
  210. {
  211. ice1712_t *ice = snd_kcontrol_chip(kcontrol);
  212. int bit = kcontrol->private_value;
  213. unsigned short oval, nval;
  214. int change;
  215. down(&ice->gpio_mutex);
  216. nval = oval = wm_get(ice, WM_ADC_MUX);
  217. if (ucontrol->value.integer.value[0])
  218. nval |= (1 << bit);
  219. else
  220. nval &= ~(1 << bit);
  221. change = nval != oval;
  222. if (change) {
  223. wm_put(ice, WM_ADC_MUX, nval);
  224. }
  225. up(&ice->gpio_mutex);
  226. return 0;
  227. }
  228. /*
  229. * Analog bypass (In -> Out)
  230. */
  231. static int wm_bypass_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t *uinfo)
  232. {
  233. uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
  234. uinfo->count = 1;
  235. uinfo->value.integer.min = 0;
  236. uinfo->value.integer.max = 1;
  237. return 0;
  238. }
  239. static int wm_bypass_get(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t *ucontrol)
  240. {
  241. ice1712_t *ice = snd_kcontrol_chip(kcontrol);
  242. down(&ice->gpio_mutex);
  243. ucontrol->value.integer.value[0] = (wm_get(ice, WM_OUT_MUX) & 0x04) ? 1 : 0;
  244. up(&ice->gpio_mutex);
  245. return 0;
  246. }
  247. static int wm_bypass_put(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t *ucontrol)
  248. {
  249. ice1712_t *ice = snd_kcontrol_chip(kcontrol);
  250. unsigned short val, oval;
  251. int change = 0;
  252. down(&ice->gpio_mutex);
  253. val = oval = wm_get(ice, WM_OUT_MUX);
  254. if (ucontrol->value.integer.value[0])
  255. val |= 0x04;
  256. else
  257. val &= ~0x04;
  258. if (val != oval) {
  259. wm_put(ice, WM_OUT_MUX, val);
  260. change = 1;
  261. }
  262. up(&ice->gpio_mutex);
  263. return change;
  264. }
  265. /*
  266. * Left/Right swap
  267. */
  268. static int wm_chswap_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t *uinfo)
  269. {
  270. uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
  271. uinfo->count = 1;
  272. uinfo->value.integer.min = 0;
  273. uinfo->value.integer.max = 1;
  274. return 0;
  275. }
  276. static int wm_chswap_get(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t *ucontrol)
  277. {
  278. ice1712_t *ice = snd_kcontrol_chip(kcontrol);
  279. down(&ice->gpio_mutex);
  280. ucontrol->value.integer.value[0] = (wm_get(ice, WM_DAC_CTRL1) & 0xf0) != 0x90;
  281. up(&ice->gpio_mutex);
  282. return 0;
  283. }
  284. static int wm_chswap_put(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t *ucontrol)
  285. {
  286. ice1712_t *ice = snd_kcontrol_chip(kcontrol);
  287. unsigned short val, oval;
  288. int change = 0;
  289. down(&ice->gpio_mutex);
  290. oval = wm_get(ice, WM_DAC_CTRL1);
  291. val = oval & 0x0f;
  292. if (ucontrol->value.integer.value[0])
  293. val |= 0x60;
  294. else
  295. val |= 0x90;
  296. if (val != oval) {
  297. wm_put(ice, WM_DAC_CTRL1, val);
  298. wm_put_nocache(ice, WM_DAC_CTRL1, val);
  299. change = 1;
  300. }
  301. up(&ice->gpio_mutex);
  302. return change;
  303. }
  304. /*
  305. * write data in the SPI mode
  306. */
  307. static void set_gpio_bit(ice1712_t *ice, unsigned int bit, int val)
  308. {
  309. unsigned int tmp = snd_ice1712_gpio_read(ice);
  310. if (val)
  311. tmp |= bit;
  312. else
  313. tmp &= ~bit;
  314. snd_ice1712_gpio_write(ice, tmp);
  315. }
  316. static void spi_send_byte(ice1712_t *ice, unsigned char data)
  317. {
  318. int i;
  319. for (i = 0; i < 8; i++) {
  320. set_gpio_bit(ice, PONTIS_CS_CLK, 0);
  321. udelay(1);
  322. set_gpio_bit(ice, PONTIS_CS_WDATA, data & 0x80);
  323. udelay(1);
  324. set_gpio_bit(ice, PONTIS_CS_CLK, 1);
  325. udelay(1);
  326. data <<= 1;
  327. }
  328. }
  329. static unsigned int spi_read_byte(ice1712_t *ice)
  330. {
  331. int i;
  332. unsigned int val = 0;
  333. for (i = 0; i < 8; i++) {
  334. val <<= 1;
  335. set_gpio_bit(ice, PONTIS_CS_CLK, 0);
  336. udelay(1);
  337. if (snd_ice1712_gpio_read(ice) & PONTIS_CS_RDATA)
  338. val |= 1;
  339. udelay(1);
  340. set_gpio_bit(ice, PONTIS_CS_CLK, 1);
  341. udelay(1);
  342. }
  343. return val;
  344. }
  345. static void spi_write(ice1712_t *ice, unsigned int dev, unsigned int reg, unsigned int data)
  346. {
  347. snd_ice1712_gpio_set_dir(ice, PONTIS_CS_CS|PONTIS_CS_WDATA|PONTIS_CS_CLK);
  348. snd_ice1712_gpio_set_mask(ice, ~(PONTIS_CS_CS|PONTIS_CS_WDATA|PONTIS_CS_CLK));
  349. set_gpio_bit(ice, PONTIS_CS_CS, 0);
  350. spi_send_byte(ice, dev & ~1); /* WRITE */
  351. spi_send_byte(ice, reg); /* MAP */
  352. spi_send_byte(ice, data); /* DATA */
  353. /* trigger */
  354. set_gpio_bit(ice, PONTIS_CS_CS, 1);
  355. udelay(1);
  356. /* restore */
  357. snd_ice1712_gpio_set_mask(ice, ice->gpio.write_mask);
  358. snd_ice1712_gpio_set_dir(ice, ice->gpio.direction);
  359. }
  360. static unsigned int spi_read(ice1712_t *ice, unsigned int dev, unsigned int reg)
  361. {
  362. unsigned int val;
  363. snd_ice1712_gpio_set_dir(ice, PONTIS_CS_CS|PONTIS_CS_WDATA|PONTIS_CS_CLK);
  364. snd_ice1712_gpio_set_mask(ice, ~(PONTIS_CS_CS|PONTIS_CS_WDATA|PONTIS_CS_CLK));
  365. set_gpio_bit(ice, PONTIS_CS_CS, 0);
  366. spi_send_byte(ice, dev & ~1); /* WRITE */
  367. spi_send_byte(ice, reg); /* MAP */
  368. /* trigger */
  369. set_gpio_bit(ice, PONTIS_CS_CS, 1);
  370. udelay(1);
  371. set_gpio_bit(ice, PONTIS_CS_CS, 0);
  372. spi_send_byte(ice, dev | 1); /* READ */
  373. val = spi_read_byte(ice);
  374. /* trigger */
  375. set_gpio_bit(ice, PONTIS_CS_CS, 1);
  376. udelay(1);
  377. /* restore */
  378. snd_ice1712_gpio_set_mask(ice, ice->gpio.write_mask);
  379. snd_ice1712_gpio_set_dir(ice, ice->gpio.direction);
  380. return val;
  381. }
  382. /*
  383. * SPDIF input source
  384. */
  385. static int cs_source_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t *uinfo)
  386. {
  387. static char *texts[] = {
  388. "Coax", /* RXP0 */
  389. "Optical", /* RXP1 */
  390. "CD", /* RXP2 */
  391. };
  392. uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
  393. uinfo->count = 1;
  394. uinfo->value.enumerated.items = 3;
  395. if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
  396. uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
  397. strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
  398. return 0;
  399. }
  400. static int cs_source_get(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t *ucontrol)
  401. {
  402. ice1712_t *ice = snd_kcontrol_chip(kcontrol);
  403. down(&ice->gpio_mutex);
  404. ucontrol->value.enumerated.item[0] = ice->gpio.saved[0];
  405. up(&ice->gpio_mutex);
  406. return 0;
  407. }
  408. static int cs_source_put(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t *ucontrol)
  409. {
  410. ice1712_t *ice = snd_kcontrol_chip(kcontrol);
  411. unsigned char val;
  412. int change = 0;
  413. down(&ice->gpio_mutex);
  414. if (ucontrol->value.enumerated.item[0] != ice->gpio.saved[0]) {
  415. ice->gpio.saved[0] = ucontrol->value.enumerated.item[0] & 3;
  416. val = 0x80 | (ice->gpio.saved[0] << 3);
  417. spi_write(ice, CS_DEV, 0x04, val);
  418. change = 1;
  419. }
  420. up(&ice->gpio_mutex);
  421. return 0;
  422. }
  423. /*
  424. * GPIO controls
  425. */
  426. static int pontis_gpio_mask_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t *uinfo)
  427. {
  428. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  429. uinfo->count = 1;
  430. uinfo->value.integer.min = 0;
  431. uinfo->value.integer.max = 0xffff; /* 16bit */
  432. return 0;
  433. }
  434. static int pontis_gpio_mask_get(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t *ucontrol)
  435. {
  436. ice1712_t *ice = snd_kcontrol_chip(kcontrol);
  437. down(&ice->gpio_mutex);
  438. /* 4-7 reserved */
  439. ucontrol->value.integer.value[0] = (~ice->gpio.write_mask & 0xffff) | 0x00f0;
  440. up(&ice->gpio_mutex);
  441. return 0;
  442. }
  443. static int pontis_gpio_mask_put(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t *ucontrol)
  444. {
  445. ice1712_t *ice = snd_kcontrol_chip(kcontrol);
  446. unsigned int val;
  447. int changed;
  448. down(&ice->gpio_mutex);
  449. /* 4-7 reserved */
  450. val = (~ucontrol->value.integer.value[0] & 0xffff) | 0x00f0;
  451. changed = val != ice->gpio.write_mask;
  452. ice->gpio.write_mask = val;
  453. up(&ice->gpio_mutex);
  454. return changed;
  455. }
  456. static int pontis_gpio_dir_get(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t *ucontrol)
  457. {
  458. ice1712_t *ice = snd_kcontrol_chip(kcontrol);
  459. down(&ice->gpio_mutex);
  460. /* 4-7 reserved */
  461. ucontrol->value.integer.value[0] = ice->gpio.direction & 0xff0f;
  462. up(&ice->gpio_mutex);
  463. return 0;
  464. }
  465. static int pontis_gpio_dir_put(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t *ucontrol)
  466. {
  467. ice1712_t *ice = snd_kcontrol_chip(kcontrol);
  468. unsigned int val;
  469. int changed;
  470. down(&ice->gpio_mutex);
  471. /* 4-7 reserved */
  472. val = ucontrol->value.integer.value[0] & 0xff0f;
  473. changed = (val != ice->gpio.direction);
  474. ice->gpio.direction = val;
  475. up(&ice->gpio_mutex);
  476. return changed;
  477. }
  478. static int pontis_gpio_data_get(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t *ucontrol)
  479. {
  480. ice1712_t *ice = snd_kcontrol_chip(kcontrol);
  481. down(&ice->gpio_mutex);
  482. snd_ice1712_gpio_set_dir(ice, ice->gpio.direction);
  483. snd_ice1712_gpio_set_mask(ice, ice->gpio.write_mask);
  484. ucontrol->value.integer.value[0] = snd_ice1712_gpio_read(ice) & 0xffff;
  485. up(&ice->gpio_mutex);
  486. return 0;
  487. }
  488. static int pontis_gpio_data_put(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t *ucontrol)
  489. {
  490. ice1712_t *ice = snd_kcontrol_chip(kcontrol);
  491. unsigned int val, nval;
  492. int changed = 0;
  493. down(&ice->gpio_mutex);
  494. snd_ice1712_gpio_set_dir(ice, ice->gpio.direction);
  495. snd_ice1712_gpio_set_mask(ice, ice->gpio.write_mask);
  496. val = snd_ice1712_gpio_read(ice) & 0xffff;
  497. nval = ucontrol->value.integer.value[0] & 0xffff;
  498. if (val != nval) {
  499. snd_ice1712_gpio_write(ice, nval);
  500. changed = 1;
  501. }
  502. up(&ice->gpio_mutex);
  503. return changed;
  504. }
  505. /*
  506. * mixers
  507. */
  508. static snd_kcontrol_new_t pontis_controls[] __devinitdata = {
  509. {
  510. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  511. .name = "PCM Playback Volume",
  512. .info = wm_dac_vol_info,
  513. .get = wm_dac_vol_get,
  514. .put = wm_dac_vol_put,
  515. },
  516. {
  517. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  518. .name = "Capture Volume",
  519. .info = wm_adc_vol_info,
  520. .get = wm_adc_vol_get,
  521. .put = wm_adc_vol_put,
  522. },
  523. {
  524. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  525. .name = "CD Capture Switch",
  526. .info = wm_adc_mux_info,
  527. .get = wm_adc_mux_get,
  528. .put = wm_adc_mux_put,
  529. .private_value = 0,
  530. },
  531. {
  532. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  533. .name = "Line Capture Switch",
  534. .info = wm_adc_mux_info,
  535. .get = wm_adc_mux_get,
  536. .put = wm_adc_mux_put,
  537. .private_value = 1,
  538. },
  539. {
  540. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  541. .name = "Analog Bypass Switch",
  542. .info = wm_bypass_info,
  543. .get = wm_bypass_get,
  544. .put = wm_bypass_put,
  545. },
  546. {
  547. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  548. .name = "Swap Output Channels",
  549. .info = wm_chswap_info,
  550. .get = wm_chswap_get,
  551. .put = wm_chswap_put,
  552. },
  553. {
  554. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  555. .name = "IEC958 Input Source",
  556. .info = cs_source_info,
  557. .get = cs_source_get,
  558. .put = cs_source_put,
  559. },
  560. /* FIXME: which interface? */
  561. {
  562. .iface = SNDRV_CTL_ELEM_IFACE_CARD,
  563. .name = "GPIO Mask",
  564. .info = pontis_gpio_mask_info,
  565. .get = pontis_gpio_mask_get,
  566. .put = pontis_gpio_mask_put,
  567. },
  568. {
  569. .iface = SNDRV_CTL_ELEM_IFACE_CARD,
  570. .name = "GPIO Direction",
  571. .info = pontis_gpio_mask_info,
  572. .get = pontis_gpio_dir_get,
  573. .put = pontis_gpio_dir_put,
  574. },
  575. {
  576. .iface = SNDRV_CTL_ELEM_IFACE_CARD,
  577. .name = "GPIO Data",
  578. .info = pontis_gpio_mask_info,
  579. .get = pontis_gpio_data_get,
  580. .put = pontis_gpio_data_put,
  581. },
  582. };
  583. /*
  584. * WM codec registers
  585. */
  586. static void wm_proc_regs_write(snd_info_entry_t *entry, snd_info_buffer_t *buffer)
  587. {
  588. ice1712_t *ice = (ice1712_t *)entry->private_data;
  589. char line[64];
  590. unsigned int reg, val;
  591. down(&ice->gpio_mutex);
  592. while (!snd_info_get_line(buffer, line, sizeof(line))) {
  593. if (sscanf(line, "%x %x", &reg, &val) != 2)
  594. continue;
  595. if (reg <= 0x17 && val <= 0xffff)
  596. wm_put(ice, reg, val);
  597. }
  598. up(&ice->gpio_mutex);
  599. }
  600. static void wm_proc_regs_read(snd_info_entry_t *entry, snd_info_buffer_t *buffer)
  601. {
  602. ice1712_t *ice = (ice1712_t *)entry->private_data;
  603. int reg, val;
  604. down(&ice->gpio_mutex);
  605. for (reg = 0; reg <= 0x17; reg++) {
  606. val = wm_get(ice, reg);
  607. snd_iprintf(buffer, "%02x = %04x\n", reg, val);
  608. }
  609. up(&ice->gpio_mutex);
  610. }
  611. static void wm_proc_init(ice1712_t *ice)
  612. {
  613. snd_info_entry_t *entry;
  614. if (! snd_card_proc_new(ice->card, "wm_codec", &entry)) {
  615. snd_info_set_text_ops(entry, ice, 1024, wm_proc_regs_read);
  616. entry->mode |= S_IWUSR;
  617. entry->c.text.write_size = 1024;
  618. entry->c.text.write = wm_proc_regs_write;
  619. }
  620. }
  621. static void cs_proc_regs_read(snd_info_entry_t *entry, snd_info_buffer_t *buffer)
  622. {
  623. ice1712_t *ice = (ice1712_t *)entry->private_data;
  624. int reg, val;
  625. down(&ice->gpio_mutex);
  626. for (reg = 0; reg <= 0x26; reg++) {
  627. val = spi_read(ice, CS_DEV, reg);
  628. snd_iprintf(buffer, "%02x = %02x\n", reg, val);
  629. }
  630. val = spi_read(ice, CS_DEV, 0x7f);
  631. snd_iprintf(buffer, "%02x = %02x\n", 0x7f, val);
  632. up(&ice->gpio_mutex);
  633. }
  634. static void cs_proc_init(ice1712_t *ice)
  635. {
  636. snd_info_entry_t *entry;
  637. if (! snd_card_proc_new(ice->card, "cs_codec", &entry)) {
  638. snd_info_set_text_ops(entry, ice, 1024, cs_proc_regs_read);
  639. }
  640. }
  641. static int __devinit pontis_add_controls(ice1712_t *ice)
  642. {
  643. unsigned int i;
  644. int err;
  645. for (i = 0; i < ARRAY_SIZE(pontis_controls); i++) {
  646. err = snd_ctl_add(ice->card, snd_ctl_new1(&pontis_controls[i], ice));
  647. if (err < 0)
  648. return err;
  649. }
  650. wm_proc_init(ice);
  651. cs_proc_init(ice);
  652. return 0;
  653. }
  654. /*
  655. * initialize the chip
  656. */
  657. static int __devinit pontis_init(ice1712_t *ice)
  658. {
  659. static unsigned short wm_inits[] = {
  660. /* These come first to reduce init pop noise */
  661. WM_ADC_MUX, 0x00c0, /* ADC mute */
  662. WM_DAC_MUTE, 0x0001, /* DAC softmute */
  663. WM_DAC_CTRL1, 0x0000, /* DAC mute */
  664. WM_POWERDOWN, 0x0008, /* All power-up except HP */
  665. WM_RESET, 0x0000, /* reset */
  666. };
  667. static unsigned short wm_inits2[] = {
  668. WM_MASTER_CTRL, 0x0022, /* 256fs, slave mode */
  669. WM_DAC_INT, 0x0022, /* I2S, normal polarity, 24bit */
  670. WM_ADC_INT, 0x0022, /* I2S, normal polarity, 24bit */
  671. WM_DAC_CTRL1, 0x0090, /* DAC L/R */
  672. WM_OUT_MUX, 0x0001, /* OUT DAC */
  673. WM_HP_ATTEN_L, 0x0179, /* HP 0dB */
  674. WM_HP_ATTEN_R, 0x0179, /* HP 0dB */
  675. WM_DAC_ATTEN_L, 0x0000, /* DAC 0dB */
  676. WM_DAC_ATTEN_L, 0x0100, /* DAC 0dB */
  677. WM_DAC_ATTEN_R, 0x0000, /* DAC 0dB */
  678. WM_DAC_ATTEN_R, 0x0100, /* DAC 0dB */
  679. // WM_DAC_MASTER, 0x0100, /* DAC master muted */
  680. WM_PHASE_SWAP, 0x0000, /* phase normal */
  681. WM_DAC_CTRL2, 0x0000, /* no deemphasis, no ZFLG */
  682. WM_ADC_ATTEN_L, 0x0000, /* ADC muted */
  683. WM_ADC_ATTEN_R, 0x0000, /* ADC muted */
  684. #if 0
  685. WM_ALC_CTRL1, 0x007b, /* */
  686. WM_ALC_CTRL2, 0x0000, /* */
  687. WM_ALC_CTRL3, 0x0000, /* */
  688. WM_NOISE_GATE, 0x0000, /* */
  689. #endif
  690. WM_DAC_MUTE, 0x0000, /* DAC unmute */
  691. WM_ADC_MUX, 0x0003, /* ADC unmute, both CD/Line On */
  692. };
  693. static unsigned char cs_inits[] = {
  694. 0x04, 0x80, /* RUN, RXP0 */
  695. 0x05, 0x05, /* slave, 24bit */
  696. 0x01, 0x00,
  697. 0x02, 0x00,
  698. 0x03, 0x00,
  699. };
  700. unsigned int i;
  701. ice->vt1720 = 1;
  702. ice->num_total_dacs = 2;
  703. ice->num_total_adcs = 2;
  704. /* to remeber the register values */
  705. ice->akm = kcalloc(1, sizeof(akm4xxx_t), GFP_KERNEL);
  706. if (! ice->akm)
  707. return -ENOMEM;
  708. ice->akm_codecs = 1;
  709. /* HACK - use this as the SPDIF source.
  710. * don't call snd_ice1712_gpio_get/put(), otherwise it's overwritten
  711. */
  712. ice->gpio.saved[0] = 0;
  713. /* initialize WM8776 codec */
  714. for (i = 0; i < ARRAY_SIZE(wm_inits); i += 2)
  715. wm_put(ice, wm_inits[i], wm_inits[i+1]);
  716. set_current_state(TASK_UNINTERRUPTIBLE);
  717. schedule_timeout(1);
  718. for (i = 0; i < ARRAY_SIZE(wm_inits2); i += 2)
  719. wm_put(ice, wm_inits2[i], wm_inits2[i+1]);
  720. /* initialize CS8416 codec */
  721. /* assert PRST#; MT05 bit 7 */
  722. outb(inb(ICEMT1724(ice, AC97_CMD)) | 0x80, ICEMT1724(ice, AC97_CMD));
  723. mdelay(5);
  724. /* deassert PRST# */
  725. outb(inb(ICEMT1724(ice, AC97_CMD)) & ~0x80, ICEMT1724(ice, AC97_CMD));
  726. for (i = 0; i < ARRAY_SIZE(cs_inits); i += 2)
  727. spi_write(ice, CS_DEV, cs_inits[i], cs_inits[i+1]);
  728. return 0;
  729. }
  730. /*
  731. * Pontis boards don't provide the EEPROM data at all.
  732. * hence the driver needs to sets up it properly.
  733. */
  734. static unsigned char pontis_eeprom[] __devinitdata = {
  735. 0x08, /* SYSCONF: clock 256, mpu401, spdif-in/ADC, 1DAC */
  736. 0x80, /* ACLINK: I2S */
  737. 0xf8, /* I2S: vol, 96k, 24bit, 192k */
  738. 0xc3, /* SPDIF: out-en, out-int, spdif-in */
  739. 0x07, /* GPIO_DIR */
  740. 0x00, /* GPIO_DIR1 */
  741. 0x00, /* GPIO_DIR2 (ignored) */
  742. 0x0f, /* GPIO_MASK (4-7 reserved for CS8416) */
  743. 0xff, /* GPIO_MASK1 */
  744. 0x00, /* GPIO_MASK2 (ignored) */
  745. 0x06, /* GPIO_STATE (0-low, 1-high, 2-high) */
  746. 0x00, /* GPIO_STATE1 */
  747. 0x00, /* GPIO_STATE2 (ignored) */
  748. };
  749. /* entry point */
  750. struct snd_ice1712_card_info snd_vt1720_pontis_cards[] __devinitdata = {
  751. {
  752. .subvendor = VT1720_SUBDEVICE_PONTIS_MS300,
  753. .name = "Pontis MS300",
  754. .model = "ms300",
  755. .chip_init = pontis_init,
  756. .build_controls = pontis_add_controls,
  757. .eeprom_size = sizeof(pontis_eeprom),
  758. .eeprom_data = pontis_eeprom,
  759. },
  760. { } /* terminator */
  761. };