fm801.c 42 KB

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  1. /*
  2. * The driver for the ForteMedia FM801 based soundcards
  3. * Copyright (c) by Jaroslav Kysela <perex@suse.cz>
  4. *
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  19. *
  20. */
  21. #include <sound/driver.h>
  22. #include <linux/delay.h>
  23. #include <linux/init.h>
  24. #include <linux/interrupt.h>
  25. #include <linux/pci.h>
  26. #include <linux/slab.h>
  27. #include <linux/moduleparam.h>
  28. #include <sound/core.h>
  29. #include <sound/pcm.h>
  30. #include <sound/ac97_codec.h>
  31. #include <sound/mpu401.h>
  32. #include <sound/opl3.h>
  33. #include <sound/initval.h>
  34. #include <asm/io.h>
  35. #if (defined(CONFIG_SND_FM801_TEA575X) || defined(CONFIG_SND_FM801_TEA575X_MODULE)) && (defined(CONFIG_VIDEO_DEV) || defined(CONFIG_VIDEO_DEV_MODULE))
  36. #include <sound/tea575x-tuner.h>
  37. #define TEA575X_RADIO 1
  38. #endif
  39. MODULE_AUTHOR("Jaroslav Kysela <perex@suse.cz>");
  40. MODULE_DESCRIPTION("ForteMedia FM801");
  41. MODULE_LICENSE("GPL");
  42. MODULE_SUPPORTED_DEVICE("{{ForteMedia,FM801},"
  43. "{Genius,SoundMaker Live 5.1}}");
  44. static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
  45. static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
  46. static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */
  47. /*
  48. * Enable TEA575x tuner
  49. * 1 = MediaForte 256-PCS
  50. * 2 = MediaForte 256-PCPR
  51. * 3 = MediaForte 64-PCR
  52. * High 16-bits are video (radio) device number + 1
  53. */
  54. static int tea575x_tuner[SNDRV_CARDS] = { [0 ... (SNDRV_CARDS-1)] = 0 };
  55. module_param_array(index, int, NULL, 0444);
  56. MODULE_PARM_DESC(index, "Index value for the FM801 soundcard.");
  57. module_param_array(id, charp, NULL, 0444);
  58. MODULE_PARM_DESC(id, "ID string for the FM801 soundcard.");
  59. module_param_array(enable, bool, NULL, 0444);
  60. MODULE_PARM_DESC(enable, "Enable FM801 soundcard.");
  61. module_param_array(tea575x_tuner, int, NULL, 0444);
  62. MODULE_PARM_DESC(tea575x_tuner, "Enable TEA575x tuner.");
  63. /*
  64. * Direct registers
  65. */
  66. #define FM801_REG(chip, reg) (chip->port + FM801_##reg)
  67. #define FM801_PCM_VOL 0x00 /* PCM Output Volume */
  68. #define FM801_FM_VOL 0x02 /* FM Output Volume */
  69. #define FM801_I2S_VOL 0x04 /* I2S Volume */
  70. #define FM801_REC_SRC 0x06 /* Record Source */
  71. #define FM801_PLY_CTRL 0x08 /* Playback Control */
  72. #define FM801_PLY_COUNT 0x0a /* Playback Count */
  73. #define FM801_PLY_BUF1 0x0c /* Playback Bufer I */
  74. #define FM801_PLY_BUF2 0x10 /* Playback Buffer II */
  75. #define FM801_CAP_CTRL 0x14 /* Capture Control */
  76. #define FM801_CAP_COUNT 0x16 /* Capture Count */
  77. #define FM801_CAP_BUF1 0x18 /* Capture Buffer I */
  78. #define FM801_CAP_BUF2 0x1c /* Capture Buffer II */
  79. #define FM801_CODEC_CTRL 0x22 /* Codec Control */
  80. #define FM801_I2S_MODE 0x24 /* I2S Mode Control */
  81. #define FM801_VOLUME 0x26 /* Volume Up/Down/Mute Status */
  82. #define FM801_I2C_CTRL 0x29 /* I2C Control */
  83. #define FM801_AC97_CMD 0x2a /* AC'97 Command */
  84. #define FM801_AC97_DATA 0x2c /* AC'97 Data */
  85. #define FM801_MPU401_DATA 0x30 /* MPU401 Data */
  86. #define FM801_MPU401_CMD 0x31 /* MPU401 Command */
  87. #define FM801_GPIO_CTRL 0x52 /* General Purpose I/O Control */
  88. #define FM801_GEN_CTRL 0x54 /* General Control */
  89. #define FM801_IRQ_MASK 0x56 /* Interrupt Mask */
  90. #define FM801_IRQ_STATUS 0x5a /* Interrupt Status */
  91. #define FM801_OPL3_BANK0 0x68 /* OPL3 Status Read / Bank 0 Write */
  92. #define FM801_OPL3_DATA0 0x69 /* OPL3 Data 0 Write */
  93. #define FM801_OPL3_BANK1 0x6a /* OPL3 Bank 1 Write */
  94. #define FM801_OPL3_DATA1 0x6b /* OPL3 Bank 1 Write */
  95. #define FM801_POWERDOWN 0x70 /* Blocks Power Down Control */
  96. #define FM801_AC97_ADDR_SHIFT 10
  97. /* playback and record control register bits */
  98. #define FM801_BUF1_LAST (1<<1)
  99. #define FM801_BUF2_LAST (1<<2)
  100. #define FM801_START (1<<5)
  101. #define FM801_PAUSE (1<<6)
  102. #define FM801_IMMED_STOP (1<<7)
  103. #define FM801_RATE_SHIFT 8
  104. #define FM801_RATE_MASK (15 << FM801_RATE_SHIFT)
  105. #define FM801_CHANNELS_4 (1<<12) /* playback only */
  106. #define FM801_CHANNELS_6 (2<<12) /* playback only */
  107. #define FM801_CHANNELS_6MS (3<<12) /* playback only */
  108. #define FM801_CHANNELS_MASK (3<<12)
  109. #define FM801_16BIT (1<<14)
  110. #define FM801_STEREO (1<<15)
  111. /* IRQ status bits */
  112. #define FM801_IRQ_PLAYBACK (1<<8)
  113. #define FM801_IRQ_CAPTURE (1<<9)
  114. #define FM801_IRQ_VOLUME (1<<14)
  115. #define FM801_IRQ_MPU (1<<15)
  116. /* GPIO control register */
  117. #define FM801_GPIO_GP0 (1<<0) /* read/write */
  118. #define FM801_GPIO_GP1 (1<<1)
  119. #define FM801_GPIO_GP2 (1<<2)
  120. #define FM801_GPIO_GP3 (1<<3)
  121. #define FM801_GPIO_GP(x) (1<<(0+(x)))
  122. #define FM801_GPIO_GD0 (1<<8) /* directions: 1 = input, 0 = output*/
  123. #define FM801_GPIO_GD1 (1<<9)
  124. #define FM801_GPIO_GD2 (1<<10)
  125. #define FM801_GPIO_GD3 (1<<11)
  126. #define FM801_GPIO_GD(x) (1<<(8+(x)))
  127. #define FM801_GPIO_GS0 (1<<12) /* function select: */
  128. #define FM801_GPIO_GS1 (1<<13) /* 1 = GPIO */
  129. #define FM801_GPIO_GS2 (1<<14) /* 0 = other (S/PDIF, VOL) */
  130. #define FM801_GPIO_GS3 (1<<15)
  131. #define FM801_GPIO_GS(x) (1<<(12+(x)))
  132. /*
  133. */
  134. typedef struct _snd_fm801 fm801_t;
  135. struct _snd_fm801 {
  136. int irq;
  137. unsigned long port; /* I/O port number */
  138. unsigned int multichannel: 1, /* multichannel support */
  139. secondary: 1; /* secondary codec */
  140. unsigned char secondary_addr; /* address of the secondary codec */
  141. unsigned short ply_ctrl; /* playback control */
  142. unsigned short cap_ctrl; /* capture control */
  143. unsigned long ply_buffer;
  144. unsigned int ply_buf;
  145. unsigned int ply_count;
  146. unsigned int ply_size;
  147. unsigned int ply_pos;
  148. unsigned long cap_buffer;
  149. unsigned int cap_buf;
  150. unsigned int cap_count;
  151. unsigned int cap_size;
  152. unsigned int cap_pos;
  153. ac97_bus_t *ac97_bus;
  154. ac97_t *ac97;
  155. ac97_t *ac97_sec;
  156. struct pci_dev *pci;
  157. snd_card_t *card;
  158. snd_pcm_t *pcm;
  159. snd_rawmidi_t *rmidi;
  160. snd_pcm_substream_t *playback_substream;
  161. snd_pcm_substream_t *capture_substream;
  162. unsigned int p_dma_size;
  163. unsigned int c_dma_size;
  164. spinlock_t reg_lock;
  165. snd_info_entry_t *proc_entry;
  166. #ifdef TEA575X_RADIO
  167. tea575x_t tea;
  168. #endif
  169. };
  170. static struct pci_device_id snd_fm801_ids[] = {
  171. { 0x1319, 0x0801, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_MULTIMEDIA_AUDIO << 8, 0xffff00, 0, }, /* FM801 */
  172. { 0x5213, 0x0510, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_MULTIMEDIA_AUDIO << 8, 0xffff00, 0, }, /* Gallant Odyssey Sound 4 */
  173. { 0, }
  174. };
  175. MODULE_DEVICE_TABLE(pci, snd_fm801_ids);
  176. /*
  177. * common I/O routines
  178. */
  179. static int snd_fm801_update_bits(fm801_t *chip, unsigned short reg,
  180. unsigned short mask, unsigned short value)
  181. {
  182. int change;
  183. unsigned long flags;
  184. unsigned short old, new;
  185. spin_lock_irqsave(&chip->reg_lock, flags);
  186. old = inw(chip->port + reg);
  187. new = (old & ~mask) | value;
  188. change = old != new;
  189. if (change)
  190. outw(new, chip->port + reg);
  191. spin_unlock_irqrestore(&chip->reg_lock, flags);
  192. return change;
  193. }
  194. static void snd_fm801_codec_write(ac97_t *ac97,
  195. unsigned short reg,
  196. unsigned short val)
  197. {
  198. fm801_t *chip = ac97->private_data;
  199. int idx;
  200. /*
  201. * Wait until the codec interface is not ready..
  202. */
  203. for (idx = 0; idx < 100; idx++) {
  204. if (!(inw(FM801_REG(chip, AC97_CMD)) & (1<<9)))
  205. goto ok1;
  206. udelay(10);
  207. }
  208. snd_printk("AC'97 interface is busy (1)\n");
  209. return;
  210. ok1:
  211. /* write data and address */
  212. outw(val, FM801_REG(chip, AC97_DATA));
  213. outw(reg | (ac97->addr << FM801_AC97_ADDR_SHIFT), FM801_REG(chip, AC97_CMD));
  214. /*
  215. * Wait until the write command is not completed..
  216. */
  217. for (idx = 0; idx < 1000; idx++) {
  218. if (!(inw(FM801_REG(chip, AC97_CMD)) & (1<<9)))
  219. return;
  220. udelay(10);
  221. }
  222. snd_printk("AC'97 interface #%d is busy (2)\n", ac97->num);
  223. }
  224. static unsigned short snd_fm801_codec_read(ac97_t *ac97, unsigned short reg)
  225. {
  226. fm801_t *chip = ac97->private_data;
  227. int idx;
  228. /*
  229. * Wait until the codec interface is not ready..
  230. */
  231. for (idx = 0; idx < 100; idx++) {
  232. if (!(inw(FM801_REG(chip, AC97_CMD)) & (1<<9)))
  233. goto ok1;
  234. udelay(10);
  235. }
  236. snd_printk("AC'97 interface is busy (1)\n");
  237. return 0;
  238. ok1:
  239. /* read command */
  240. outw(reg | (ac97->addr << FM801_AC97_ADDR_SHIFT) | (1<<7), FM801_REG(chip, AC97_CMD));
  241. for (idx = 0; idx < 100; idx++) {
  242. if (!(inw(FM801_REG(chip, AC97_CMD)) & (1<<9)))
  243. goto ok2;
  244. udelay(10);
  245. }
  246. snd_printk("AC'97 interface #%d is busy (2)\n", ac97->num);
  247. return 0;
  248. ok2:
  249. for (idx = 0; idx < 1000; idx++) {
  250. if (inw(FM801_REG(chip, AC97_CMD)) & (1<<8))
  251. goto ok3;
  252. udelay(10);
  253. }
  254. snd_printk("AC'97 interface #%d is not valid (2)\n", ac97->num);
  255. return 0;
  256. ok3:
  257. return inw(FM801_REG(chip, AC97_DATA));
  258. }
  259. static unsigned int rates[] = {
  260. 5500, 8000, 9600, 11025,
  261. 16000, 19200, 22050, 32000,
  262. 38400, 44100, 48000
  263. };
  264. static snd_pcm_hw_constraint_list_t hw_constraints_rates = {
  265. .count = ARRAY_SIZE(rates),
  266. .list = rates,
  267. .mask = 0,
  268. };
  269. static unsigned int channels[] = {
  270. 2, 4, 6
  271. };
  272. #define CHANNELS sizeof(channels) / sizeof(channels[0])
  273. static snd_pcm_hw_constraint_list_t hw_constraints_channels = {
  274. .count = CHANNELS,
  275. .list = channels,
  276. .mask = 0,
  277. };
  278. /*
  279. * Sample rate routines
  280. */
  281. static unsigned short snd_fm801_rate_bits(unsigned int rate)
  282. {
  283. unsigned int idx;
  284. for (idx = 0; idx < ARRAY_SIZE(rates); idx++)
  285. if (rates[idx] == rate)
  286. return idx;
  287. snd_BUG();
  288. return ARRAY_SIZE(rates) - 1;
  289. }
  290. /*
  291. * PCM part
  292. */
  293. static int snd_fm801_playback_trigger(snd_pcm_substream_t * substream,
  294. int cmd)
  295. {
  296. fm801_t *chip = snd_pcm_substream_chip(substream);
  297. spin_lock(&chip->reg_lock);
  298. switch (cmd) {
  299. case SNDRV_PCM_TRIGGER_START:
  300. chip->ply_ctrl &= ~(FM801_BUF1_LAST |
  301. FM801_BUF2_LAST |
  302. FM801_PAUSE);
  303. chip->ply_ctrl |= FM801_START |
  304. FM801_IMMED_STOP;
  305. break;
  306. case SNDRV_PCM_TRIGGER_STOP:
  307. chip->ply_ctrl &= ~(FM801_START | FM801_PAUSE);
  308. break;
  309. case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
  310. chip->ply_ctrl |= FM801_PAUSE;
  311. break;
  312. case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
  313. chip->ply_ctrl &= ~FM801_PAUSE;
  314. break;
  315. default:
  316. spin_unlock(&chip->reg_lock);
  317. snd_BUG();
  318. return -EINVAL;
  319. }
  320. outw(chip->ply_ctrl, FM801_REG(chip, PLY_CTRL));
  321. spin_unlock(&chip->reg_lock);
  322. return 0;
  323. }
  324. static int snd_fm801_capture_trigger(snd_pcm_substream_t * substream,
  325. int cmd)
  326. {
  327. fm801_t *chip = snd_pcm_substream_chip(substream);
  328. spin_lock(&chip->reg_lock);
  329. switch (cmd) {
  330. case SNDRV_PCM_TRIGGER_START:
  331. chip->cap_ctrl &= ~(FM801_BUF1_LAST |
  332. FM801_BUF2_LAST |
  333. FM801_PAUSE);
  334. chip->cap_ctrl |= FM801_START |
  335. FM801_IMMED_STOP;
  336. break;
  337. case SNDRV_PCM_TRIGGER_STOP:
  338. chip->cap_ctrl &= ~(FM801_START | FM801_PAUSE);
  339. break;
  340. case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
  341. chip->cap_ctrl |= FM801_PAUSE;
  342. break;
  343. case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
  344. chip->cap_ctrl &= ~FM801_PAUSE;
  345. break;
  346. default:
  347. spin_unlock(&chip->reg_lock);
  348. snd_BUG();
  349. return -EINVAL;
  350. }
  351. outw(chip->cap_ctrl, FM801_REG(chip, CAP_CTRL));
  352. spin_unlock(&chip->reg_lock);
  353. return 0;
  354. }
  355. static int snd_fm801_hw_params(snd_pcm_substream_t * substream,
  356. snd_pcm_hw_params_t * hw_params)
  357. {
  358. return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
  359. }
  360. static int snd_fm801_hw_free(snd_pcm_substream_t * substream)
  361. {
  362. return snd_pcm_lib_free_pages(substream);
  363. }
  364. static int snd_fm801_playback_prepare(snd_pcm_substream_t * substream)
  365. {
  366. fm801_t *chip = snd_pcm_substream_chip(substream);
  367. snd_pcm_runtime_t *runtime = substream->runtime;
  368. chip->ply_size = snd_pcm_lib_buffer_bytes(substream);
  369. chip->ply_count = snd_pcm_lib_period_bytes(substream);
  370. spin_lock_irq(&chip->reg_lock);
  371. chip->ply_ctrl &= ~(FM801_START | FM801_16BIT |
  372. FM801_STEREO | FM801_RATE_MASK |
  373. FM801_CHANNELS_MASK);
  374. if (snd_pcm_format_width(runtime->format) == 16)
  375. chip->ply_ctrl |= FM801_16BIT;
  376. if (runtime->channels > 1) {
  377. chip->ply_ctrl |= FM801_STEREO;
  378. if (runtime->channels == 4)
  379. chip->ply_ctrl |= FM801_CHANNELS_4;
  380. else if (runtime->channels == 6)
  381. chip->ply_ctrl |= FM801_CHANNELS_6;
  382. }
  383. chip->ply_ctrl |= snd_fm801_rate_bits(runtime->rate) << FM801_RATE_SHIFT;
  384. chip->ply_buf = 0;
  385. outw(chip->ply_ctrl, FM801_REG(chip, PLY_CTRL));
  386. outw(chip->ply_count - 1, FM801_REG(chip, PLY_COUNT));
  387. chip->ply_buffer = runtime->dma_addr;
  388. chip->ply_pos = 0;
  389. outl(chip->ply_buffer, FM801_REG(chip, PLY_BUF1));
  390. outl(chip->ply_buffer + (chip->ply_count % chip->ply_size), FM801_REG(chip, PLY_BUF2));
  391. spin_unlock_irq(&chip->reg_lock);
  392. return 0;
  393. }
  394. static int snd_fm801_capture_prepare(snd_pcm_substream_t * substream)
  395. {
  396. fm801_t *chip = snd_pcm_substream_chip(substream);
  397. snd_pcm_runtime_t *runtime = substream->runtime;
  398. chip->cap_size = snd_pcm_lib_buffer_bytes(substream);
  399. chip->cap_count = snd_pcm_lib_period_bytes(substream);
  400. spin_lock_irq(&chip->reg_lock);
  401. chip->cap_ctrl &= ~(FM801_START | FM801_16BIT |
  402. FM801_STEREO | FM801_RATE_MASK);
  403. if (snd_pcm_format_width(runtime->format) == 16)
  404. chip->cap_ctrl |= FM801_16BIT;
  405. if (runtime->channels > 1)
  406. chip->cap_ctrl |= FM801_STEREO;
  407. chip->cap_ctrl |= snd_fm801_rate_bits(runtime->rate) << FM801_RATE_SHIFT;
  408. chip->cap_buf = 0;
  409. outw(chip->cap_ctrl, FM801_REG(chip, CAP_CTRL));
  410. outw(chip->cap_count - 1, FM801_REG(chip, CAP_COUNT));
  411. chip->cap_buffer = runtime->dma_addr;
  412. chip->cap_pos = 0;
  413. outl(chip->cap_buffer, FM801_REG(chip, CAP_BUF1));
  414. outl(chip->cap_buffer + (chip->cap_count % chip->cap_size), FM801_REG(chip, CAP_BUF2));
  415. spin_unlock_irq(&chip->reg_lock);
  416. return 0;
  417. }
  418. static snd_pcm_uframes_t snd_fm801_playback_pointer(snd_pcm_substream_t * substream)
  419. {
  420. fm801_t *chip = snd_pcm_substream_chip(substream);
  421. size_t ptr;
  422. if (!(chip->ply_ctrl & FM801_START))
  423. return 0;
  424. spin_lock(&chip->reg_lock);
  425. ptr = chip->ply_pos + (chip->ply_count - 1) - inw(FM801_REG(chip, PLY_COUNT));
  426. if (inw(FM801_REG(chip, IRQ_STATUS)) & FM801_IRQ_PLAYBACK) {
  427. ptr += chip->ply_count;
  428. ptr %= chip->ply_size;
  429. }
  430. spin_unlock(&chip->reg_lock);
  431. return bytes_to_frames(substream->runtime, ptr);
  432. }
  433. static snd_pcm_uframes_t snd_fm801_capture_pointer(snd_pcm_substream_t * substream)
  434. {
  435. fm801_t *chip = snd_pcm_substream_chip(substream);
  436. size_t ptr;
  437. if (!(chip->cap_ctrl & FM801_START))
  438. return 0;
  439. spin_lock(&chip->reg_lock);
  440. ptr = chip->cap_pos + (chip->cap_count - 1) - inw(FM801_REG(chip, CAP_COUNT));
  441. if (inw(FM801_REG(chip, IRQ_STATUS)) & FM801_IRQ_CAPTURE) {
  442. ptr += chip->cap_count;
  443. ptr %= chip->cap_size;
  444. }
  445. spin_unlock(&chip->reg_lock);
  446. return bytes_to_frames(substream->runtime, ptr);
  447. }
  448. static irqreturn_t snd_fm801_interrupt(int irq, void *dev_id, struct pt_regs *regs)
  449. {
  450. fm801_t *chip = dev_id;
  451. unsigned short status;
  452. unsigned int tmp;
  453. status = inw(FM801_REG(chip, IRQ_STATUS));
  454. status &= FM801_IRQ_PLAYBACK|FM801_IRQ_CAPTURE|FM801_IRQ_MPU|FM801_IRQ_VOLUME;
  455. if (! status)
  456. return IRQ_NONE;
  457. /* ack first */
  458. outw(status, FM801_REG(chip, IRQ_STATUS));
  459. if (chip->pcm && (status & FM801_IRQ_PLAYBACK) && chip->playback_substream) {
  460. spin_lock(&chip->reg_lock);
  461. chip->ply_buf++;
  462. chip->ply_pos += chip->ply_count;
  463. chip->ply_pos %= chip->ply_size;
  464. tmp = chip->ply_pos + chip->ply_count;
  465. tmp %= chip->ply_size;
  466. outl(chip->ply_buffer + tmp,
  467. (chip->ply_buf & 1) ?
  468. FM801_REG(chip, PLY_BUF1) :
  469. FM801_REG(chip, PLY_BUF2));
  470. spin_unlock(&chip->reg_lock);
  471. snd_pcm_period_elapsed(chip->playback_substream);
  472. }
  473. if (chip->pcm && (status & FM801_IRQ_CAPTURE) && chip->capture_substream) {
  474. spin_lock(&chip->reg_lock);
  475. chip->cap_buf++;
  476. chip->cap_pos += chip->cap_count;
  477. chip->cap_pos %= chip->cap_size;
  478. tmp = chip->cap_pos + chip->cap_count;
  479. tmp %= chip->cap_size;
  480. outl(chip->cap_buffer + tmp,
  481. (chip->cap_buf & 1) ?
  482. FM801_REG(chip, CAP_BUF1) :
  483. FM801_REG(chip, CAP_BUF2));
  484. spin_unlock(&chip->reg_lock);
  485. snd_pcm_period_elapsed(chip->capture_substream);
  486. }
  487. if (chip->rmidi && (status & FM801_IRQ_MPU))
  488. snd_mpu401_uart_interrupt(irq, chip->rmidi->private_data, regs);
  489. if (status & FM801_IRQ_VOLUME)
  490. ;/* TODO */
  491. return IRQ_HANDLED;
  492. }
  493. static snd_pcm_hardware_t snd_fm801_playback =
  494. {
  495. .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
  496. SNDRV_PCM_INFO_BLOCK_TRANSFER |
  497. SNDRV_PCM_INFO_PAUSE |
  498. SNDRV_PCM_INFO_MMAP_VALID),
  499. .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
  500. .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_48000,
  501. .rate_min = 5500,
  502. .rate_max = 48000,
  503. .channels_min = 1,
  504. .channels_max = 2,
  505. .buffer_bytes_max = (128*1024),
  506. .period_bytes_min = 64,
  507. .period_bytes_max = (128*1024),
  508. .periods_min = 1,
  509. .periods_max = 1024,
  510. .fifo_size = 0,
  511. };
  512. static snd_pcm_hardware_t snd_fm801_capture =
  513. {
  514. .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
  515. SNDRV_PCM_INFO_BLOCK_TRANSFER |
  516. SNDRV_PCM_INFO_PAUSE |
  517. SNDRV_PCM_INFO_MMAP_VALID),
  518. .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
  519. .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_48000,
  520. .rate_min = 5500,
  521. .rate_max = 48000,
  522. .channels_min = 1,
  523. .channels_max = 2,
  524. .buffer_bytes_max = (128*1024),
  525. .period_bytes_min = 64,
  526. .period_bytes_max = (128*1024),
  527. .periods_min = 1,
  528. .periods_max = 1024,
  529. .fifo_size = 0,
  530. };
  531. static int snd_fm801_playback_open(snd_pcm_substream_t * substream)
  532. {
  533. fm801_t *chip = snd_pcm_substream_chip(substream);
  534. snd_pcm_runtime_t *runtime = substream->runtime;
  535. int err;
  536. chip->playback_substream = substream;
  537. runtime->hw = snd_fm801_playback;
  538. snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hw_constraints_rates);
  539. if (chip->multichannel) {
  540. runtime->hw.channels_max = 6;
  541. snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS, &hw_constraints_channels);
  542. }
  543. if ((err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS)) < 0)
  544. return err;
  545. return 0;
  546. }
  547. static int snd_fm801_capture_open(snd_pcm_substream_t * substream)
  548. {
  549. fm801_t *chip = snd_pcm_substream_chip(substream);
  550. snd_pcm_runtime_t *runtime = substream->runtime;
  551. int err;
  552. chip->capture_substream = substream;
  553. runtime->hw = snd_fm801_capture;
  554. snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hw_constraints_rates);
  555. if ((err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS)) < 0)
  556. return err;
  557. return 0;
  558. }
  559. static int snd_fm801_playback_close(snd_pcm_substream_t * substream)
  560. {
  561. fm801_t *chip = snd_pcm_substream_chip(substream);
  562. chip->playback_substream = NULL;
  563. return 0;
  564. }
  565. static int snd_fm801_capture_close(snd_pcm_substream_t * substream)
  566. {
  567. fm801_t *chip = snd_pcm_substream_chip(substream);
  568. chip->capture_substream = NULL;
  569. return 0;
  570. }
  571. static snd_pcm_ops_t snd_fm801_playback_ops = {
  572. .open = snd_fm801_playback_open,
  573. .close = snd_fm801_playback_close,
  574. .ioctl = snd_pcm_lib_ioctl,
  575. .hw_params = snd_fm801_hw_params,
  576. .hw_free = snd_fm801_hw_free,
  577. .prepare = snd_fm801_playback_prepare,
  578. .trigger = snd_fm801_playback_trigger,
  579. .pointer = snd_fm801_playback_pointer,
  580. };
  581. static snd_pcm_ops_t snd_fm801_capture_ops = {
  582. .open = snd_fm801_capture_open,
  583. .close = snd_fm801_capture_close,
  584. .ioctl = snd_pcm_lib_ioctl,
  585. .hw_params = snd_fm801_hw_params,
  586. .hw_free = snd_fm801_hw_free,
  587. .prepare = snd_fm801_capture_prepare,
  588. .trigger = snd_fm801_capture_trigger,
  589. .pointer = snd_fm801_capture_pointer,
  590. };
  591. static void snd_fm801_pcm_free(snd_pcm_t *pcm)
  592. {
  593. fm801_t *chip = pcm->private_data;
  594. chip->pcm = NULL;
  595. snd_pcm_lib_preallocate_free_for_all(pcm);
  596. }
  597. static int __devinit snd_fm801_pcm(fm801_t *chip, int device, snd_pcm_t ** rpcm)
  598. {
  599. snd_pcm_t *pcm;
  600. int err;
  601. if (rpcm)
  602. *rpcm = NULL;
  603. if ((err = snd_pcm_new(chip->card, "FM801", device, 1, 1, &pcm)) < 0)
  604. return err;
  605. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_fm801_playback_ops);
  606. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_fm801_capture_ops);
  607. pcm->private_data = chip;
  608. pcm->private_free = snd_fm801_pcm_free;
  609. pcm->info_flags = 0;
  610. strcpy(pcm->name, "FM801");
  611. chip->pcm = pcm;
  612. snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
  613. snd_dma_pci_data(chip->pci),
  614. chip->multichannel ? 128*1024 : 64*1024, 128*1024);
  615. if (rpcm)
  616. *rpcm = pcm;
  617. return 0;
  618. }
  619. /*
  620. * TEA5757 radio
  621. */
  622. #ifdef TEA575X_RADIO
  623. /* 256PCS GPIO numbers */
  624. #define TEA_256PCS_DATA 1
  625. #define TEA_256PCS_WRITE_ENABLE 2 /* inverted */
  626. #define TEA_256PCS_BUS_CLOCK 3
  627. static void snd_fm801_tea575x_256pcs_write(tea575x_t *tea, unsigned int val)
  628. {
  629. fm801_t *chip = tea->private_data;
  630. unsigned short reg;
  631. int i = 25;
  632. spin_lock_irq(&chip->reg_lock);
  633. reg = inw(FM801_REG(chip, GPIO_CTRL));
  634. /* use GPIO lines and set write enable bit */
  635. reg |= FM801_GPIO_GS(TEA_256PCS_DATA) |
  636. FM801_GPIO_GS(TEA_256PCS_WRITE_ENABLE) |
  637. FM801_GPIO_GS(TEA_256PCS_BUS_CLOCK);
  638. /* all of lines are in the write direction */
  639. /* clear data and clock lines */
  640. reg &= ~(FM801_GPIO_GD(TEA_256PCS_DATA) |
  641. FM801_GPIO_GD(TEA_256PCS_WRITE_ENABLE) |
  642. FM801_GPIO_GD(TEA_256PCS_BUS_CLOCK) |
  643. FM801_GPIO_GP(TEA_256PCS_DATA) |
  644. FM801_GPIO_GP(TEA_256PCS_BUS_CLOCK) |
  645. FM801_GPIO_GP(TEA_256PCS_WRITE_ENABLE));
  646. outw(reg, FM801_REG(chip, GPIO_CTRL));
  647. udelay(1);
  648. while (i--) {
  649. if (val & (1 << i))
  650. reg |= FM801_GPIO_GP(TEA_256PCS_DATA);
  651. else
  652. reg &= ~FM801_GPIO_GP(TEA_256PCS_DATA);
  653. outw(reg, FM801_REG(chip, GPIO_CTRL));
  654. udelay(1);
  655. reg |= FM801_GPIO_GP(TEA_256PCS_BUS_CLOCK);
  656. outw(reg, FM801_REG(chip, GPIO_CTRL));
  657. reg &= ~FM801_GPIO_GP(TEA_256PCS_BUS_CLOCK);
  658. outw(reg, FM801_REG(chip, GPIO_CTRL));
  659. udelay(1);
  660. }
  661. /* and reset the write enable bit */
  662. reg |= FM801_GPIO_GP(TEA_256PCS_WRITE_ENABLE) |
  663. FM801_GPIO_GP(TEA_256PCS_DATA);
  664. outw(reg, FM801_REG(chip, GPIO_CTRL));
  665. spin_unlock_irq(&chip->reg_lock);
  666. }
  667. static unsigned int snd_fm801_tea575x_256pcs_read(tea575x_t *tea)
  668. {
  669. fm801_t *chip = tea->private_data;
  670. unsigned short reg;
  671. unsigned int val = 0;
  672. int i;
  673. spin_lock_irq(&chip->reg_lock);
  674. reg = inw(FM801_REG(chip, GPIO_CTRL));
  675. /* use GPIO lines, set data direction to input */
  676. reg |= FM801_GPIO_GS(TEA_256PCS_DATA) |
  677. FM801_GPIO_GS(TEA_256PCS_WRITE_ENABLE) |
  678. FM801_GPIO_GS(TEA_256PCS_BUS_CLOCK) |
  679. FM801_GPIO_GD(TEA_256PCS_DATA) |
  680. FM801_GPIO_GP(TEA_256PCS_DATA) |
  681. FM801_GPIO_GP(TEA_256PCS_WRITE_ENABLE);
  682. /* all of lines are in the write direction, except data */
  683. /* clear data, write enable and clock lines */
  684. reg &= ~(FM801_GPIO_GD(TEA_256PCS_WRITE_ENABLE) |
  685. FM801_GPIO_GD(TEA_256PCS_BUS_CLOCK) |
  686. FM801_GPIO_GP(TEA_256PCS_BUS_CLOCK));
  687. for (i = 0; i < 24; i++) {
  688. reg &= ~FM801_GPIO_GP(TEA_256PCS_BUS_CLOCK);
  689. outw(reg, FM801_REG(chip, GPIO_CTRL));
  690. udelay(1);
  691. reg |= FM801_GPIO_GP(TEA_256PCS_BUS_CLOCK);
  692. outw(reg, FM801_REG(chip, GPIO_CTRL));
  693. udelay(1);
  694. val <<= 1;
  695. if (inw(FM801_REG(chip, GPIO_CTRL)) & FM801_GPIO_GP(TEA_256PCS_DATA))
  696. val |= 1;
  697. }
  698. spin_unlock_irq(&chip->reg_lock);
  699. return val;
  700. }
  701. /* 256PCPR GPIO numbers */
  702. #define TEA_256PCPR_BUS_CLOCK 0
  703. #define TEA_256PCPR_DATA 1
  704. #define TEA_256PCPR_WRITE_ENABLE 2 /* inverted */
  705. static void snd_fm801_tea575x_256pcpr_write(tea575x_t *tea, unsigned int val)
  706. {
  707. fm801_t *chip = tea->private_data;
  708. unsigned short reg;
  709. int i = 25;
  710. spin_lock_irq(&chip->reg_lock);
  711. reg = inw(FM801_REG(chip, GPIO_CTRL));
  712. /* use GPIO lines and set write enable bit */
  713. reg |= FM801_GPIO_GS(TEA_256PCPR_DATA) |
  714. FM801_GPIO_GS(TEA_256PCPR_WRITE_ENABLE) |
  715. FM801_GPIO_GS(TEA_256PCPR_BUS_CLOCK);
  716. /* all of lines are in the write direction */
  717. /* clear data and clock lines */
  718. reg &= ~(FM801_GPIO_GD(TEA_256PCPR_DATA) |
  719. FM801_GPIO_GD(TEA_256PCPR_WRITE_ENABLE) |
  720. FM801_GPIO_GD(TEA_256PCPR_BUS_CLOCK) |
  721. FM801_GPIO_GP(TEA_256PCPR_DATA) |
  722. FM801_GPIO_GP(TEA_256PCPR_BUS_CLOCK) |
  723. FM801_GPIO_GP(TEA_256PCPR_WRITE_ENABLE));
  724. outw(reg, FM801_REG(chip, GPIO_CTRL));
  725. udelay(1);
  726. while (i--) {
  727. if (val & (1 << i))
  728. reg |= FM801_GPIO_GP(TEA_256PCPR_DATA);
  729. else
  730. reg &= ~FM801_GPIO_GP(TEA_256PCPR_DATA);
  731. outw(reg, FM801_REG(chip, GPIO_CTRL));
  732. udelay(1);
  733. reg |= FM801_GPIO_GP(TEA_256PCPR_BUS_CLOCK);
  734. outw(reg, FM801_REG(chip, GPIO_CTRL));
  735. reg &= ~FM801_GPIO_GP(TEA_256PCPR_BUS_CLOCK);
  736. outw(reg, FM801_REG(chip, GPIO_CTRL));
  737. udelay(1);
  738. }
  739. /* and reset the write enable bit */
  740. reg |= FM801_GPIO_GP(TEA_256PCPR_WRITE_ENABLE) |
  741. FM801_GPIO_GP(TEA_256PCPR_DATA);
  742. outw(reg, FM801_REG(chip, GPIO_CTRL));
  743. spin_unlock_irq(&chip->reg_lock);
  744. }
  745. static unsigned int snd_fm801_tea575x_256pcpr_read(tea575x_t *tea)
  746. {
  747. fm801_t *chip = tea->private_data;
  748. unsigned short reg;
  749. unsigned int val = 0;
  750. int i;
  751. spin_lock_irq(&chip->reg_lock);
  752. reg = inw(FM801_REG(chip, GPIO_CTRL));
  753. /* use GPIO lines, set data direction to input */
  754. reg |= FM801_GPIO_GS(TEA_256PCPR_DATA) |
  755. FM801_GPIO_GS(TEA_256PCPR_WRITE_ENABLE) |
  756. FM801_GPIO_GS(TEA_256PCPR_BUS_CLOCK) |
  757. FM801_GPIO_GD(TEA_256PCPR_DATA) |
  758. FM801_GPIO_GP(TEA_256PCPR_DATA) |
  759. FM801_GPIO_GP(TEA_256PCPR_WRITE_ENABLE);
  760. /* all of lines are in the write direction, except data */
  761. /* clear data, write enable and clock lines */
  762. reg &= ~(FM801_GPIO_GD(TEA_256PCPR_WRITE_ENABLE) |
  763. FM801_GPIO_GD(TEA_256PCPR_BUS_CLOCK) |
  764. FM801_GPIO_GP(TEA_256PCPR_BUS_CLOCK));
  765. for (i = 0; i < 24; i++) {
  766. reg &= ~FM801_GPIO_GP(TEA_256PCPR_BUS_CLOCK);
  767. outw(reg, FM801_REG(chip, GPIO_CTRL));
  768. udelay(1);
  769. reg |= FM801_GPIO_GP(TEA_256PCPR_BUS_CLOCK);
  770. outw(reg, FM801_REG(chip, GPIO_CTRL));
  771. udelay(1);
  772. val <<= 1;
  773. if (inw(FM801_REG(chip, GPIO_CTRL)) & FM801_GPIO_GP(TEA_256PCPR_DATA))
  774. val |= 1;
  775. }
  776. spin_unlock_irq(&chip->reg_lock);
  777. return val;
  778. }
  779. /* 64PCR GPIO numbers */
  780. #define TEA_64PCR_BUS_CLOCK 0
  781. #define TEA_64PCR_WRITE_ENABLE 1 /* inverted */
  782. #define TEA_64PCR_DATA 2
  783. static void snd_fm801_tea575x_64pcr_write(tea575x_t *tea, unsigned int val)
  784. {
  785. fm801_t *chip = tea->private_data;
  786. unsigned short reg;
  787. int i = 25;
  788. spin_lock_irq(&chip->reg_lock);
  789. reg = inw(FM801_REG(chip, GPIO_CTRL));
  790. /* use GPIO lines and set write enable bit */
  791. reg |= FM801_GPIO_GS(TEA_64PCR_DATA) |
  792. FM801_GPIO_GS(TEA_64PCR_WRITE_ENABLE) |
  793. FM801_GPIO_GS(TEA_64PCR_BUS_CLOCK);
  794. /* all of lines are in the write direction */
  795. /* clear data and clock lines */
  796. reg &= ~(FM801_GPIO_GD(TEA_64PCR_DATA) |
  797. FM801_GPIO_GD(TEA_64PCR_WRITE_ENABLE) |
  798. FM801_GPIO_GD(TEA_64PCR_BUS_CLOCK) |
  799. FM801_GPIO_GP(TEA_64PCR_DATA) |
  800. FM801_GPIO_GP(TEA_64PCR_BUS_CLOCK) |
  801. FM801_GPIO_GP(TEA_64PCR_WRITE_ENABLE));
  802. outw(reg, FM801_REG(chip, GPIO_CTRL));
  803. udelay(1);
  804. while (i--) {
  805. if (val & (1 << i))
  806. reg |= FM801_GPIO_GP(TEA_64PCR_DATA);
  807. else
  808. reg &= ~FM801_GPIO_GP(TEA_64PCR_DATA);
  809. outw(reg, FM801_REG(chip, GPIO_CTRL));
  810. udelay(1);
  811. reg |= FM801_GPIO_GP(TEA_64PCR_BUS_CLOCK);
  812. outw(reg, FM801_REG(chip, GPIO_CTRL));
  813. reg &= ~FM801_GPIO_GP(TEA_64PCR_BUS_CLOCK);
  814. outw(reg, FM801_REG(chip, GPIO_CTRL));
  815. udelay(1);
  816. }
  817. /* and reset the write enable bit */
  818. reg |= FM801_GPIO_GP(TEA_64PCR_WRITE_ENABLE) |
  819. FM801_GPIO_GP(TEA_64PCR_DATA);
  820. outw(reg, FM801_REG(chip, GPIO_CTRL));
  821. spin_unlock_irq(&chip->reg_lock);
  822. }
  823. static unsigned int snd_fm801_tea575x_64pcr_read(tea575x_t *tea)
  824. {
  825. fm801_t *chip = tea->private_data;
  826. unsigned short reg;
  827. unsigned int val = 0;
  828. int i;
  829. spin_lock_irq(&chip->reg_lock);
  830. reg = inw(FM801_REG(chip, GPIO_CTRL));
  831. /* use GPIO lines, set data direction to input */
  832. reg |= FM801_GPIO_GS(TEA_64PCR_DATA) |
  833. FM801_GPIO_GS(TEA_64PCR_WRITE_ENABLE) |
  834. FM801_GPIO_GS(TEA_64PCR_BUS_CLOCK) |
  835. FM801_GPIO_GD(TEA_64PCR_DATA) |
  836. FM801_GPIO_GP(TEA_64PCR_DATA) |
  837. FM801_GPIO_GP(TEA_64PCR_WRITE_ENABLE);
  838. /* all of lines are in the write direction, except data */
  839. /* clear data, write enable and clock lines */
  840. reg &= ~(FM801_GPIO_GD(TEA_64PCR_WRITE_ENABLE) |
  841. FM801_GPIO_GD(TEA_64PCR_BUS_CLOCK) |
  842. FM801_GPIO_GP(TEA_64PCR_BUS_CLOCK));
  843. for (i = 0; i < 24; i++) {
  844. reg &= ~FM801_GPIO_GP(TEA_64PCR_BUS_CLOCK);
  845. outw(reg, FM801_REG(chip, GPIO_CTRL));
  846. udelay(1);
  847. reg |= FM801_GPIO_GP(TEA_64PCR_BUS_CLOCK);
  848. outw(reg, FM801_REG(chip, GPIO_CTRL));
  849. udelay(1);
  850. val <<= 1;
  851. if (inw(FM801_REG(chip, GPIO_CTRL)) & FM801_GPIO_GP(TEA_64PCR_DATA))
  852. val |= 1;
  853. }
  854. spin_unlock_irq(&chip->reg_lock);
  855. return val;
  856. }
  857. static struct snd_tea575x_ops snd_fm801_tea_ops[3] = {
  858. {
  859. /* 1 = MediaForte 256-PCS */
  860. .write = snd_fm801_tea575x_256pcs_write,
  861. .read = snd_fm801_tea575x_256pcs_read,
  862. },
  863. {
  864. /* 2 = MediaForte 256-PCPR */
  865. .write = snd_fm801_tea575x_256pcpr_write,
  866. .read = snd_fm801_tea575x_256pcpr_read,
  867. },
  868. {
  869. /* 3 = MediaForte 64-PCR */
  870. .write = snd_fm801_tea575x_64pcr_write,
  871. .read = snd_fm801_tea575x_64pcr_read,
  872. }
  873. };
  874. #endif
  875. /*
  876. * Mixer routines
  877. */
  878. #define FM801_SINGLE(xname, reg, shift, mask, invert) \
  879. { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .info = snd_fm801_info_single, \
  880. .get = snd_fm801_get_single, .put = snd_fm801_put_single, \
  881. .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24) }
  882. static int snd_fm801_info_single(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
  883. {
  884. int mask = (kcontrol->private_value >> 16) & 0xff;
  885. uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
  886. uinfo->count = 1;
  887. uinfo->value.integer.min = 0;
  888. uinfo->value.integer.max = mask;
  889. return 0;
  890. }
  891. static int snd_fm801_get_single(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
  892. {
  893. fm801_t *chip = snd_kcontrol_chip(kcontrol);
  894. int reg = kcontrol->private_value & 0xff;
  895. int shift = (kcontrol->private_value >> 8) & 0xff;
  896. int mask = (kcontrol->private_value >> 16) & 0xff;
  897. int invert = (kcontrol->private_value >> 24) & 0xff;
  898. ucontrol->value.integer.value[0] = (inw(chip->port + reg) >> shift) & mask;
  899. if (invert)
  900. ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
  901. return 0;
  902. }
  903. static int snd_fm801_put_single(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
  904. {
  905. fm801_t *chip = snd_kcontrol_chip(kcontrol);
  906. int reg = kcontrol->private_value & 0xff;
  907. int shift = (kcontrol->private_value >> 8) & 0xff;
  908. int mask = (kcontrol->private_value >> 16) & 0xff;
  909. int invert = (kcontrol->private_value >> 24) & 0xff;
  910. unsigned short val;
  911. val = (ucontrol->value.integer.value[0] & mask);
  912. if (invert)
  913. val = mask - val;
  914. return snd_fm801_update_bits(chip, reg, mask << shift, val << shift);
  915. }
  916. #define FM801_DOUBLE(xname, reg, shift_left, shift_right, mask, invert) \
  917. { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .info = snd_fm801_info_double, \
  918. .get = snd_fm801_get_double, .put = snd_fm801_put_double, \
  919. .private_value = reg | (shift_left << 8) | (shift_right << 12) | (mask << 16) | (invert << 24) }
  920. static int snd_fm801_info_double(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
  921. {
  922. int mask = (kcontrol->private_value >> 16) & 0xff;
  923. uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
  924. uinfo->count = 2;
  925. uinfo->value.integer.min = 0;
  926. uinfo->value.integer.max = mask;
  927. return 0;
  928. }
  929. static int snd_fm801_get_double(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
  930. {
  931. fm801_t *chip = snd_kcontrol_chip(kcontrol);
  932. int reg = kcontrol->private_value & 0xff;
  933. int shift_left = (kcontrol->private_value >> 8) & 0x0f;
  934. int shift_right = (kcontrol->private_value >> 12) & 0x0f;
  935. int mask = (kcontrol->private_value >> 16) & 0xff;
  936. int invert = (kcontrol->private_value >> 24) & 0xff;
  937. spin_lock_irq(&chip->reg_lock);
  938. ucontrol->value.integer.value[0] = (inw(chip->port + reg) >> shift_left) & mask;
  939. ucontrol->value.integer.value[1] = (inw(chip->port + reg) >> shift_right) & mask;
  940. spin_unlock_irq(&chip->reg_lock);
  941. if (invert) {
  942. ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
  943. ucontrol->value.integer.value[1] = mask - ucontrol->value.integer.value[1];
  944. }
  945. return 0;
  946. }
  947. static int snd_fm801_put_double(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
  948. {
  949. fm801_t *chip = snd_kcontrol_chip(kcontrol);
  950. int reg = kcontrol->private_value & 0xff;
  951. int shift_left = (kcontrol->private_value >> 8) & 0x0f;
  952. int shift_right = (kcontrol->private_value >> 12) & 0x0f;
  953. int mask = (kcontrol->private_value >> 16) & 0xff;
  954. int invert = (kcontrol->private_value >> 24) & 0xff;
  955. unsigned short val1, val2;
  956. val1 = ucontrol->value.integer.value[0] & mask;
  957. val2 = ucontrol->value.integer.value[1] & mask;
  958. if (invert) {
  959. val1 = mask - val1;
  960. val2 = mask - val2;
  961. }
  962. return snd_fm801_update_bits(chip, reg,
  963. (mask << shift_left) | (mask << shift_right),
  964. (val1 << shift_left ) | (val2 << shift_right));
  965. }
  966. static int snd_fm801_info_mux(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
  967. {
  968. static char *texts[5] = {
  969. "AC97 Primary", "FM", "I2S", "PCM", "AC97 Secondary"
  970. };
  971. uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
  972. uinfo->count = 1;
  973. uinfo->value.enumerated.items = 5;
  974. if (uinfo->value.enumerated.item > 4)
  975. uinfo->value.enumerated.item = 4;
  976. strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
  977. return 0;
  978. }
  979. static int snd_fm801_get_mux(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
  980. {
  981. fm801_t *chip = snd_kcontrol_chip(kcontrol);
  982. unsigned short val;
  983. val = inw(FM801_REG(chip, REC_SRC)) & 7;
  984. if (val > 4)
  985. val = 4;
  986. ucontrol->value.enumerated.item[0] = val;
  987. return 0;
  988. }
  989. static int snd_fm801_put_mux(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
  990. {
  991. fm801_t *chip = snd_kcontrol_chip(kcontrol);
  992. unsigned short val;
  993. if ((val = ucontrol->value.enumerated.item[0]) > 4)
  994. return -EINVAL;
  995. return snd_fm801_update_bits(chip, FM801_REC_SRC, 7, val);
  996. }
  997. #define FM801_CONTROLS (sizeof(snd_fm801_controls)/sizeof(snd_kcontrol_new_t))
  998. static snd_kcontrol_new_t snd_fm801_controls[] __devinitdata = {
  999. FM801_DOUBLE("Wave Playback Volume", FM801_PCM_VOL, 0, 8, 31, 1),
  1000. FM801_SINGLE("Wave Playback Switch", FM801_PCM_VOL, 15, 1, 1),
  1001. FM801_DOUBLE("I2S Playback Volume", FM801_I2S_VOL, 0, 8, 31, 1),
  1002. FM801_SINGLE("I2S Playback Switch", FM801_I2S_VOL, 15, 1, 1),
  1003. FM801_DOUBLE("FM Playback Volume", FM801_FM_VOL, 0, 8, 31, 1),
  1004. FM801_SINGLE("FM Playback Switch", FM801_FM_VOL, 15, 1, 1),
  1005. {
  1006. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1007. .name = "Digital Capture Source",
  1008. .info = snd_fm801_info_mux,
  1009. .get = snd_fm801_get_mux,
  1010. .put = snd_fm801_put_mux,
  1011. }
  1012. };
  1013. #define FM801_CONTROLS_MULTI (sizeof(snd_fm801_controls_multi)/sizeof(snd_kcontrol_new_t))
  1014. static snd_kcontrol_new_t snd_fm801_controls_multi[] __devinitdata = {
  1015. FM801_SINGLE("AC97 2ch->4ch Copy Switch", FM801_CODEC_CTRL, 7, 1, 0),
  1016. FM801_SINGLE("AC97 18-bit Switch", FM801_CODEC_CTRL, 10, 1, 0),
  1017. FM801_SINGLE("IEC958 Capture Switch", FM801_I2S_MODE, 8, 1, 0),
  1018. FM801_SINGLE("IEC958 Raw Data Playback Switch", FM801_I2S_MODE, 9, 1, 0),
  1019. FM801_SINGLE("IEC958 Raw Data Capture Switch", FM801_I2S_MODE, 10, 1, 0),
  1020. FM801_SINGLE("IEC958 Playback Switch", FM801_GEN_CTRL, 2, 1, 0),
  1021. };
  1022. static void snd_fm801_mixer_free_ac97_bus(ac97_bus_t *bus)
  1023. {
  1024. fm801_t *chip = bus->private_data;
  1025. chip->ac97_bus = NULL;
  1026. }
  1027. static void snd_fm801_mixer_free_ac97(ac97_t *ac97)
  1028. {
  1029. fm801_t *chip = ac97->private_data;
  1030. if (ac97->num == 0) {
  1031. chip->ac97 = NULL;
  1032. } else {
  1033. chip->ac97_sec = NULL;
  1034. }
  1035. }
  1036. static int __devinit snd_fm801_mixer(fm801_t *chip)
  1037. {
  1038. ac97_template_t ac97;
  1039. unsigned int i;
  1040. int err;
  1041. static ac97_bus_ops_t ops = {
  1042. .write = snd_fm801_codec_write,
  1043. .read = snd_fm801_codec_read,
  1044. };
  1045. if ((err = snd_ac97_bus(chip->card, 0, &ops, chip, &chip->ac97_bus)) < 0)
  1046. return err;
  1047. chip->ac97_bus->private_free = snd_fm801_mixer_free_ac97_bus;
  1048. memset(&ac97, 0, sizeof(ac97));
  1049. ac97.private_data = chip;
  1050. ac97.private_free = snd_fm801_mixer_free_ac97;
  1051. if ((err = snd_ac97_mixer(chip->ac97_bus, &ac97, &chip->ac97)) < 0)
  1052. return err;
  1053. if (chip->secondary) {
  1054. ac97.num = 1;
  1055. ac97.addr = chip->secondary_addr;
  1056. if ((err = snd_ac97_mixer(chip->ac97_bus, &ac97, &chip->ac97_sec)) < 0)
  1057. return err;
  1058. }
  1059. for (i = 0; i < FM801_CONTROLS; i++)
  1060. snd_ctl_add(chip->card, snd_ctl_new1(&snd_fm801_controls[i], chip));
  1061. if (chip->multichannel) {
  1062. for (i = 0; i < FM801_CONTROLS_MULTI; i++)
  1063. snd_ctl_add(chip->card, snd_ctl_new1(&snd_fm801_controls_multi[i], chip));
  1064. }
  1065. return 0;
  1066. }
  1067. /*
  1068. * initialization routines
  1069. */
  1070. static int snd_fm801_free(fm801_t *chip)
  1071. {
  1072. unsigned short cmdw;
  1073. if (chip->irq < 0)
  1074. goto __end_hw;
  1075. /* interrupt setup - mask everything */
  1076. cmdw = inw(FM801_REG(chip, IRQ_MASK));
  1077. cmdw |= 0x00c3;
  1078. outw(cmdw, FM801_REG(chip, IRQ_MASK));
  1079. __end_hw:
  1080. #ifdef TEA575X_RADIO
  1081. snd_tea575x_exit(&chip->tea);
  1082. #endif
  1083. if (chip->irq >= 0)
  1084. free_irq(chip->irq, (void *)chip);
  1085. pci_release_regions(chip->pci);
  1086. pci_disable_device(chip->pci);
  1087. kfree(chip);
  1088. return 0;
  1089. }
  1090. static int snd_fm801_dev_free(snd_device_t *device)
  1091. {
  1092. fm801_t *chip = device->device_data;
  1093. return snd_fm801_free(chip);
  1094. }
  1095. static int __devinit snd_fm801_create(snd_card_t * card,
  1096. struct pci_dev * pci,
  1097. int tea575x_tuner,
  1098. fm801_t ** rchip)
  1099. {
  1100. fm801_t *chip;
  1101. unsigned char rev, id;
  1102. unsigned short cmdw;
  1103. unsigned long timeout;
  1104. int err;
  1105. static snd_device_ops_t ops = {
  1106. .dev_free = snd_fm801_dev_free,
  1107. };
  1108. *rchip = NULL;
  1109. if ((err = pci_enable_device(pci)) < 0)
  1110. return err;
  1111. chip = kcalloc(1, sizeof(*chip), GFP_KERNEL);
  1112. if (chip == NULL) {
  1113. pci_disable_device(pci);
  1114. return -ENOMEM;
  1115. }
  1116. spin_lock_init(&chip->reg_lock);
  1117. chip->card = card;
  1118. chip->pci = pci;
  1119. chip->irq = -1;
  1120. if ((err = pci_request_regions(pci, "FM801")) < 0) {
  1121. kfree(chip);
  1122. pci_disable_device(pci);
  1123. return err;
  1124. }
  1125. chip->port = pci_resource_start(pci, 0);
  1126. if (request_irq(pci->irq, snd_fm801_interrupt, SA_INTERRUPT|SA_SHIRQ, "FM801", (void *)chip)) {
  1127. snd_printk("unable to grab IRQ %d\n", chip->irq);
  1128. snd_fm801_free(chip);
  1129. return -EBUSY;
  1130. }
  1131. chip->irq = pci->irq;
  1132. pci_set_master(pci);
  1133. pci_read_config_byte(pci, PCI_REVISION_ID, &rev);
  1134. if (rev >= 0xb1) /* FM801-AU */
  1135. chip->multichannel = 1;
  1136. /* codec cold reset + AC'97 warm reset */
  1137. outw((1<<5)|(1<<6), FM801_REG(chip, CODEC_CTRL));
  1138. inw(FM801_REG(chip, CODEC_CTRL)); /* flush posting data */
  1139. udelay(100);
  1140. outw(0, FM801_REG(chip, CODEC_CTRL));
  1141. timeout = (jiffies + (3 * HZ) / 4) + 1; /* min 750ms */
  1142. outw((1<<7) | (0 << FM801_AC97_ADDR_SHIFT), FM801_REG(chip, AC97_CMD));
  1143. udelay(5);
  1144. do {
  1145. if ((inw(FM801_REG(chip, AC97_CMD)) & (3<<8)) == (1<<8))
  1146. goto __ac97_secondary;
  1147. set_current_state(TASK_UNINTERRUPTIBLE);
  1148. schedule_timeout(1);
  1149. } while (time_after(timeout, jiffies));
  1150. snd_printk("Primary AC'97 codec not found\n");
  1151. snd_fm801_free(chip);
  1152. return -EIO;
  1153. __ac97_secondary:
  1154. if (!chip->multichannel) /* lookup is not required */
  1155. goto __ac97_ok;
  1156. for (id = 3; id > 0; id--) { /* my card has the secondary codec */
  1157. /* at address #3, so the loop is inverted */
  1158. timeout = jiffies + HZ / 20;
  1159. outw((1<<7) | (id << FM801_AC97_ADDR_SHIFT) | AC97_VENDOR_ID1, FM801_REG(chip, AC97_CMD));
  1160. udelay(5);
  1161. do {
  1162. if ((inw(FM801_REG(chip, AC97_CMD)) & (3<<8)) == (1<<8)) {
  1163. cmdw = inw(FM801_REG(chip, AC97_DATA));
  1164. if (cmdw != 0xffff && cmdw != 0) {
  1165. chip->secondary = 1;
  1166. chip->secondary_addr = id;
  1167. goto __ac97_ok;
  1168. }
  1169. }
  1170. set_current_state(TASK_UNINTERRUPTIBLE);
  1171. schedule_timeout(1);
  1172. } while (time_after(timeout, jiffies));
  1173. }
  1174. /* the recovery phase, it seems that probing for non-existing codec might */
  1175. /* cause timeout problems */
  1176. timeout = (jiffies + (3 * HZ) / 4) + 1; /* min 750ms */
  1177. outw((1<<7) | (0 << FM801_AC97_ADDR_SHIFT), FM801_REG(chip, AC97_CMD));
  1178. udelay(5);
  1179. do {
  1180. if ((inw(FM801_REG(chip, AC97_CMD)) & (3<<8)) == (1<<8))
  1181. goto __ac97_ok;
  1182. set_current_state(TASK_UNINTERRUPTIBLE);
  1183. schedule_timeout(1);
  1184. } while (time_after(timeout, jiffies));
  1185. snd_printk("Primary AC'97 codec not responding\n");
  1186. snd_fm801_free(chip);
  1187. return -EIO;
  1188. __ac97_ok:
  1189. /* init volume */
  1190. outw(0x0808, FM801_REG(chip, PCM_VOL));
  1191. outw(0x9f1f, FM801_REG(chip, FM_VOL));
  1192. outw(0x8808, FM801_REG(chip, I2S_VOL));
  1193. /* I2S control - I2S mode */
  1194. outw(0x0003, FM801_REG(chip, I2S_MODE));
  1195. /* interrupt setup - unmask MPU, PLAYBACK & CAPTURE */
  1196. cmdw = inw(FM801_REG(chip, IRQ_MASK));
  1197. cmdw &= ~0x0083;
  1198. outw(cmdw, FM801_REG(chip, IRQ_MASK));
  1199. /* interrupt clear */
  1200. outw(FM801_IRQ_PLAYBACK|FM801_IRQ_CAPTURE|FM801_IRQ_MPU, FM801_REG(chip, IRQ_STATUS));
  1201. if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) {
  1202. snd_fm801_free(chip);
  1203. return err;
  1204. }
  1205. snd_card_set_dev(card, &pci->dev);
  1206. #ifdef TEA575X_RADIO
  1207. if (tea575x_tuner > 0 && (tea575x_tuner & 0xffff) < 4) {
  1208. chip->tea.dev_nr = tea575x_tuner >> 16;
  1209. chip->tea.card = card;
  1210. chip->tea.freq_fixup = 10700;
  1211. chip->tea.private_data = chip;
  1212. chip->tea.ops = &snd_fm801_tea_ops[(tea575x_tuner & 0xffff) - 1];
  1213. snd_tea575x_init(&chip->tea);
  1214. }
  1215. #endif
  1216. *rchip = chip;
  1217. return 0;
  1218. }
  1219. static int __devinit snd_card_fm801_probe(struct pci_dev *pci,
  1220. const struct pci_device_id *pci_id)
  1221. {
  1222. static int dev;
  1223. snd_card_t *card;
  1224. fm801_t *chip;
  1225. opl3_t *opl3;
  1226. int err;
  1227. if (dev >= SNDRV_CARDS)
  1228. return -ENODEV;
  1229. if (!enable[dev]) {
  1230. dev++;
  1231. return -ENOENT;
  1232. }
  1233. card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0);
  1234. if (card == NULL)
  1235. return -ENOMEM;
  1236. if ((err = snd_fm801_create(card, pci, tea575x_tuner[dev], &chip)) < 0) {
  1237. snd_card_free(card);
  1238. return err;
  1239. }
  1240. strcpy(card->driver, "FM801");
  1241. strcpy(card->shortname, "ForteMedia FM801-");
  1242. strcat(card->shortname, chip->multichannel ? "AU" : "AS");
  1243. sprintf(card->longname, "%s at 0x%lx, irq %i",
  1244. card->shortname, chip->port, chip->irq);
  1245. if ((err = snd_fm801_pcm(chip, 0, NULL)) < 0) {
  1246. snd_card_free(card);
  1247. return err;
  1248. }
  1249. if ((err = snd_fm801_mixer(chip)) < 0) {
  1250. snd_card_free(card);
  1251. return err;
  1252. }
  1253. if ((err = snd_mpu401_uart_new(card, 0, MPU401_HW_FM801,
  1254. FM801_REG(chip, MPU401_DATA), 1,
  1255. chip->irq, 0, &chip->rmidi)) < 0) {
  1256. snd_card_free(card);
  1257. return err;
  1258. }
  1259. if ((err = snd_opl3_create(card, FM801_REG(chip, OPL3_BANK0),
  1260. FM801_REG(chip, OPL3_BANK1),
  1261. OPL3_HW_OPL3_FM801, 1, &opl3)) < 0) {
  1262. snd_card_free(card);
  1263. return err;
  1264. }
  1265. if ((err = snd_opl3_hwdep_new(opl3, 0, 1, NULL)) < 0) {
  1266. snd_card_free(card);
  1267. return err;
  1268. }
  1269. if ((err = snd_card_register(card)) < 0) {
  1270. snd_card_free(card);
  1271. return err;
  1272. }
  1273. pci_set_drvdata(pci, card);
  1274. dev++;
  1275. return 0;
  1276. }
  1277. static void __devexit snd_card_fm801_remove(struct pci_dev *pci)
  1278. {
  1279. snd_card_free(pci_get_drvdata(pci));
  1280. pci_set_drvdata(pci, NULL);
  1281. }
  1282. static struct pci_driver driver = {
  1283. .name = "FM801",
  1284. .id_table = snd_fm801_ids,
  1285. .probe = snd_card_fm801_probe,
  1286. .remove = __devexit_p(snd_card_fm801_remove),
  1287. };
  1288. static int __init alsa_card_fm801_init(void)
  1289. {
  1290. return pci_register_driver(&driver);
  1291. }
  1292. static void __exit alsa_card_fm801_exit(void)
  1293. {
  1294. pci_unregister_driver(&driver);
  1295. }
  1296. module_init(alsa_card_fm801_init)
  1297. module_exit(alsa_card_fm801_exit)