emu8000.c 35 KB

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  1. /*
  2. * Copyright (c) by Jaroslav Kysela <perex@suse.cz>
  3. * and (c) 1999 Steve Ratcliffe <steve@parabola.demon.co.uk>
  4. * Copyright (C) 1999-2000 Takashi Iwai <tiwai@suse.de>
  5. *
  6. * Routines for control of EMU8000 chip
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; either version 2 of the License, or
  11. * (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  21. */
  22. #include <sound/driver.h>
  23. #include <linux/wait.h>
  24. #include <linux/sched.h>
  25. #include <linux/slab.h>
  26. #include <linux/ioport.h>
  27. #include <linux/delay.h>
  28. #include <sound/core.h>
  29. #include <sound/emu8000.h>
  30. #include <sound/emu8000_reg.h>
  31. #include <asm/io.h>
  32. #include <asm/uaccess.h>
  33. #include <linux/init.h>
  34. #include <sound/control.h>
  35. #include <sound/initval.h>
  36. /*
  37. * emu8000 register controls
  38. */
  39. /*
  40. * The following routines read and write registers on the emu8000. They
  41. * should always be called via the EMU8000*READ/WRITE macros and never
  42. * directly. The macros handle the port number and command word.
  43. */
  44. /* Write a word */
  45. void snd_emu8000_poke(emu8000_t *emu, unsigned int port, unsigned int reg, unsigned int val)
  46. {
  47. unsigned long flags;
  48. spin_lock_irqsave(&emu->reg_lock, flags);
  49. if (reg != emu->last_reg) {
  50. outw((unsigned short)reg, EMU8000_PTR(emu)); /* Set register */
  51. emu->last_reg = reg;
  52. }
  53. outw((unsigned short)val, port); /* Send data */
  54. spin_unlock_irqrestore(&emu->reg_lock, flags);
  55. }
  56. /* Read a word */
  57. unsigned short snd_emu8000_peek(emu8000_t *emu, unsigned int port, unsigned int reg)
  58. {
  59. unsigned short res;
  60. unsigned long flags;
  61. spin_lock_irqsave(&emu->reg_lock, flags);
  62. if (reg != emu->last_reg) {
  63. outw((unsigned short)reg, EMU8000_PTR(emu)); /* Set register */
  64. emu->last_reg = reg;
  65. }
  66. res = inw(port); /* Read data */
  67. spin_unlock_irqrestore(&emu->reg_lock, flags);
  68. return res;
  69. }
  70. /* Write a double word */
  71. void snd_emu8000_poke_dw(emu8000_t *emu, unsigned int port, unsigned int reg, unsigned int val)
  72. {
  73. unsigned long flags;
  74. spin_lock_irqsave(&emu->reg_lock, flags);
  75. if (reg != emu->last_reg) {
  76. outw((unsigned short)reg, EMU8000_PTR(emu)); /* Set register */
  77. emu->last_reg = reg;
  78. }
  79. outw((unsigned short)val, port); /* Send low word of data */
  80. outw((unsigned short)(val>>16), port+2); /* Send high word of data */
  81. spin_unlock_irqrestore(&emu->reg_lock, flags);
  82. }
  83. /* Read a double word */
  84. unsigned int snd_emu8000_peek_dw(emu8000_t *emu, unsigned int port, unsigned int reg)
  85. {
  86. unsigned short low;
  87. unsigned int res;
  88. unsigned long flags;
  89. spin_lock_irqsave(&emu->reg_lock, flags);
  90. if (reg != emu->last_reg) {
  91. outw((unsigned short)reg, EMU8000_PTR(emu)); /* Set register */
  92. emu->last_reg = reg;
  93. }
  94. low = inw(port); /* Read low word of data */
  95. res = low + (inw(port+2) << 16);
  96. spin_unlock_irqrestore(&emu->reg_lock, flags);
  97. return res;
  98. }
  99. /*
  100. * Set up / close a channel to be used for DMA.
  101. */
  102. /*exported*/ void
  103. snd_emu8000_dma_chan(emu8000_t *emu, int ch, int mode)
  104. {
  105. unsigned right_bit = (mode & EMU8000_RAM_RIGHT) ? 0x01000000 : 0;
  106. mode &= EMU8000_RAM_MODE_MASK;
  107. if (mode == EMU8000_RAM_CLOSE) {
  108. EMU8000_CCCA_WRITE(emu, ch, 0);
  109. EMU8000_DCYSUSV_WRITE(emu, ch, 0x807F);
  110. return;
  111. }
  112. EMU8000_DCYSUSV_WRITE(emu, ch, 0x80);
  113. EMU8000_VTFT_WRITE(emu, ch, 0);
  114. EMU8000_CVCF_WRITE(emu, ch, 0);
  115. EMU8000_PTRX_WRITE(emu, ch, 0x40000000);
  116. EMU8000_CPF_WRITE(emu, ch, 0x40000000);
  117. EMU8000_PSST_WRITE(emu, ch, 0);
  118. EMU8000_CSL_WRITE(emu, ch, 0);
  119. if (mode == EMU8000_RAM_WRITE) /* DMA write */
  120. EMU8000_CCCA_WRITE(emu, ch, 0x06000000 | right_bit);
  121. else /* DMA read */
  122. EMU8000_CCCA_WRITE(emu, ch, 0x04000000 | right_bit);
  123. }
  124. /*
  125. */
  126. static void __init
  127. snd_emu8000_read_wait(emu8000_t *emu)
  128. {
  129. while ((EMU8000_SMALR_READ(emu) & 0x80000000) != 0) {
  130. set_current_state(TASK_INTERRUPTIBLE);
  131. schedule_timeout(1);
  132. if (signal_pending(current))
  133. break;
  134. }
  135. }
  136. /*
  137. */
  138. static void __init
  139. snd_emu8000_write_wait(emu8000_t *emu)
  140. {
  141. while ((EMU8000_SMALW_READ(emu) & 0x80000000) != 0) {
  142. set_current_state(TASK_INTERRUPTIBLE);
  143. schedule_timeout(1);
  144. if (signal_pending(current))
  145. break;
  146. }
  147. }
  148. /*
  149. * detect a card at the given port
  150. */
  151. static int __init
  152. snd_emu8000_detect(emu8000_t *emu)
  153. {
  154. /* Initialise */
  155. EMU8000_HWCF1_WRITE(emu, 0x0059);
  156. EMU8000_HWCF2_WRITE(emu, 0x0020);
  157. EMU8000_HWCF3_WRITE(emu, 0x0000);
  158. /* Check for a recognisable emu8000 */
  159. /*
  160. if ((EMU8000_U1_READ(emu) & 0x000f) != 0x000c)
  161. return -ENODEV;
  162. */
  163. if ((EMU8000_HWCF1_READ(emu) & 0x007e) != 0x0058)
  164. return -ENODEV;
  165. if ((EMU8000_HWCF2_READ(emu) & 0x0003) != 0x0003)
  166. return -ENODEV;
  167. snd_printdd("EMU8000 [0x%lx]: Synth chip found\n",
  168. emu->port1);
  169. return 0;
  170. }
  171. /*
  172. * intiailize audio channels
  173. */
  174. static void __init
  175. init_audio(emu8000_t *emu)
  176. {
  177. int ch;
  178. /* turn off envelope engines */
  179. for (ch = 0; ch < EMU8000_CHANNELS; ch++)
  180. EMU8000_DCYSUSV_WRITE(emu, ch, 0x80);
  181. /* reset all other parameters to zero */
  182. for (ch = 0; ch < EMU8000_CHANNELS; ch++) {
  183. EMU8000_ENVVOL_WRITE(emu, ch, 0);
  184. EMU8000_ENVVAL_WRITE(emu, ch, 0);
  185. EMU8000_DCYSUS_WRITE(emu, ch, 0);
  186. EMU8000_ATKHLDV_WRITE(emu, ch, 0);
  187. EMU8000_LFO1VAL_WRITE(emu, ch, 0);
  188. EMU8000_ATKHLD_WRITE(emu, ch, 0);
  189. EMU8000_LFO2VAL_WRITE(emu, ch, 0);
  190. EMU8000_IP_WRITE(emu, ch, 0);
  191. EMU8000_IFATN_WRITE(emu, ch, 0);
  192. EMU8000_PEFE_WRITE(emu, ch, 0);
  193. EMU8000_FMMOD_WRITE(emu, ch, 0);
  194. EMU8000_TREMFRQ_WRITE(emu, ch, 0);
  195. EMU8000_FM2FRQ2_WRITE(emu, ch, 0);
  196. EMU8000_PTRX_WRITE(emu, ch, 0);
  197. EMU8000_VTFT_WRITE(emu, ch, 0);
  198. EMU8000_PSST_WRITE(emu, ch, 0);
  199. EMU8000_CSL_WRITE(emu, ch, 0);
  200. EMU8000_CCCA_WRITE(emu, ch, 0);
  201. }
  202. for (ch = 0; ch < EMU8000_CHANNELS; ch++) {
  203. EMU8000_CPF_WRITE(emu, ch, 0);
  204. EMU8000_CVCF_WRITE(emu, ch, 0);
  205. }
  206. }
  207. /*
  208. * initialize DMA address
  209. */
  210. static void __init
  211. init_dma(emu8000_t *emu)
  212. {
  213. EMU8000_SMALR_WRITE(emu, 0);
  214. EMU8000_SMARR_WRITE(emu, 0);
  215. EMU8000_SMALW_WRITE(emu, 0);
  216. EMU8000_SMARW_WRITE(emu, 0);
  217. }
  218. /*
  219. * initialization arrays; from ADIP
  220. */
  221. static unsigned short init1[128] /*__devinitdata*/ = {
  222. 0x03ff, 0x0030, 0x07ff, 0x0130, 0x0bff, 0x0230, 0x0fff, 0x0330,
  223. 0x13ff, 0x0430, 0x17ff, 0x0530, 0x1bff, 0x0630, 0x1fff, 0x0730,
  224. 0x23ff, 0x0830, 0x27ff, 0x0930, 0x2bff, 0x0a30, 0x2fff, 0x0b30,
  225. 0x33ff, 0x0c30, 0x37ff, 0x0d30, 0x3bff, 0x0e30, 0x3fff, 0x0f30,
  226. 0x43ff, 0x0030, 0x47ff, 0x0130, 0x4bff, 0x0230, 0x4fff, 0x0330,
  227. 0x53ff, 0x0430, 0x57ff, 0x0530, 0x5bff, 0x0630, 0x5fff, 0x0730,
  228. 0x63ff, 0x0830, 0x67ff, 0x0930, 0x6bff, 0x0a30, 0x6fff, 0x0b30,
  229. 0x73ff, 0x0c30, 0x77ff, 0x0d30, 0x7bff, 0x0e30, 0x7fff, 0x0f30,
  230. 0x83ff, 0x0030, 0x87ff, 0x0130, 0x8bff, 0x0230, 0x8fff, 0x0330,
  231. 0x93ff, 0x0430, 0x97ff, 0x0530, 0x9bff, 0x0630, 0x9fff, 0x0730,
  232. 0xa3ff, 0x0830, 0xa7ff, 0x0930, 0xabff, 0x0a30, 0xafff, 0x0b30,
  233. 0xb3ff, 0x0c30, 0xb7ff, 0x0d30, 0xbbff, 0x0e30, 0xbfff, 0x0f30,
  234. 0xc3ff, 0x0030, 0xc7ff, 0x0130, 0xcbff, 0x0230, 0xcfff, 0x0330,
  235. 0xd3ff, 0x0430, 0xd7ff, 0x0530, 0xdbff, 0x0630, 0xdfff, 0x0730,
  236. 0xe3ff, 0x0830, 0xe7ff, 0x0930, 0xebff, 0x0a30, 0xefff, 0x0b30,
  237. 0xf3ff, 0x0c30, 0xf7ff, 0x0d30, 0xfbff, 0x0e30, 0xffff, 0x0f30,
  238. };
  239. static unsigned short init2[128] /*__devinitdata*/ = {
  240. 0x03ff, 0x8030, 0x07ff, 0x8130, 0x0bff, 0x8230, 0x0fff, 0x8330,
  241. 0x13ff, 0x8430, 0x17ff, 0x8530, 0x1bff, 0x8630, 0x1fff, 0x8730,
  242. 0x23ff, 0x8830, 0x27ff, 0x8930, 0x2bff, 0x8a30, 0x2fff, 0x8b30,
  243. 0x33ff, 0x8c30, 0x37ff, 0x8d30, 0x3bff, 0x8e30, 0x3fff, 0x8f30,
  244. 0x43ff, 0x8030, 0x47ff, 0x8130, 0x4bff, 0x8230, 0x4fff, 0x8330,
  245. 0x53ff, 0x8430, 0x57ff, 0x8530, 0x5bff, 0x8630, 0x5fff, 0x8730,
  246. 0x63ff, 0x8830, 0x67ff, 0x8930, 0x6bff, 0x8a30, 0x6fff, 0x8b30,
  247. 0x73ff, 0x8c30, 0x77ff, 0x8d30, 0x7bff, 0x8e30, 0x7fff, 0x8f30,
  248. 0x83ff, 0x8030, 0x87ff, 0x8130, 0x8bff, 0x8230, 0x8fff, 0x8330,
  249. 0x93ff, 0x8430, 0x97ff, 0x8530, 0x9bff, 0x8630, 0x9fff, 0x8730,
  250. 0xa3ff, 0x8830, 0xa7ff, 0x8930, 0xabff, 0x8a30, 0xafff, 0x8b30,
  251. 0xb3ff, 0x8c30, 0xb7ff, 0x8d30, 0xbbff, 0x8e30, 0xbfff, 0x8f30,
  252. 0xc3ff, 0x8030, 0xc7ff, 0x8130, 0xcbff, 0x8230, 0xcfff, 0x8330,
  253. 0xd3ff, 0x8430, 0xd7ff, 0x8530, 0xdbff, 0x8630, 0xdfff, 0x8730,
  254. 0xe3ff, 0x8830, 0xe7ff, 0x8930, 0xebff, 0x8a30, 0xefff, 0x8b30,
  255. 0xf3ff, 0x8c30, 0xf7ff, 0x8d30, 0xfbff, 0x8e30, 0xffff, 0x8f30,
  256. };
  257. static unsigned short init3[128] /*__devinitdata*/ = {
  258. 0x0C10, 0x8470, 0x14FE, 0xB488, 0x167F, 0xA470, 0x18E7, 0x84B5,
  259. 0x1B6E, 0x842A, 0x1F1D, 0x852A, 0x0DA3, 0x8F7C, 0x167E, 0xF254,
  260. 0x0000, 0x842A, 0x0001, 0x852A, 0x18E6, 0x8BAA, 0x1B6D, 0xF234,
  261. 0x229F, 0x8429, 0x2746, 0x8529, 0x1F1C, 0x86E7, 0x229E, 0xF224,
  262. 0x0DA4, 0x8429, 0x2C29, 0x8529, 0x2745, 0x87F6, 0x2C28, 0xF254,
  263. 0x383B, 0x8428, 0x320F, 0x8528, 0x320E, 0x8F02, 0x1341, 0xF264,
  264. 0x3EB6, 0x8428, 0x3EB9, 0x8528, 0x383A, 0x8FA9, 0x3EB5, 0xF294,
  265. 0x3EB7, 0x8474, 0x3EBA, 0x8575, 0x3EB8, 0xC4C3, 0x3EBB, 0xC5C3,
  266. 0x0000, 0xA404, 0x0001, 0xA504, 0x141F, 0x8671, 0x14FD, 0x8287,
  267. 0x3EBC, 0xE610, 0x3EC8, 0x8C7B, 0x031A, 0x87E6, 0x3EC8, 0x86F7,
  268. 0x3EC0, 0x821E, 0x3EBE, 0xD208, 0x3EBD, 0x821F, 0x3ECA, 0x8386,
  269. 0x3EC1, 0x8C03, 0x3EC9, 0x831E, 0x3ECA, 0x8C4C, 0x3EBF, 0x8C55,
  270. 0x3EC9, 0xC208, 0x3EC4, 0xBC84, 0x3EC8, 0x8EAD, 0x3EC8, 0xD308,
  271. 0x3EC2, 0x8F7E, 0x3ECB, 0x8219, 0x3ECB, 0xD26E, 0x3EC5, 0x831F,
  272. 0x3EC6, 0xC308, 0x3EC3, 0xB2FF, 0x3EC9, 0x8265, 0x3EC9, 0x8319,
  273. 0x1342, 0xD36E, 0x3EC7, 0xB3FF, 0x0000, 0x8365, 0x1420, 0x9570,
  274. };
  275. static unsigned short init4[128] /*__devinitdata*/ = {
  276. 0x0C10, 0x8470, 0x14FE, 0xB488, 0x167F, 0xA470, 0x18E7, 0x84B5,
  277. 0x1B6E, 0x842A, 0x1F1D, 0x852A, 0x0DA3, 0x0F7C, 0x167E, 0x7254,
  278. 0x0000, 0x842A, 0x0001, 0x852A, 0x18E6, 0x0BAA, 0x1B6D, 0x7234,
  279. 0x229F, 0x8429, 0x2746, 0x8529, 0x1F1C, 0x06E7, 0x229E, 0x7224,
  280. 0x0DA4, 0x8429, 0x2C29, 0x8529, 0x2745, 0x07F6, 0x2C28, 0x7254,
  281. 0x383B, 0x8428, 0x320F, 0x8528, 0x320E, 0x0F02, 0x1341, 0x7264,
  282. 0x3EB6, 0x8428, 0x3EB9, 0x8528, 0x383A, 0x0FA9, 0x3EB5, 0x7294,
  283. 0x3EB7, 0x8474, 0x3EBA, 0x8575, 0x3EB8, 0x44C3, 0x3EBB, 0x45C3,
  284. 0x0000, 0xA404, 0x0001, 0xA504, 0x141F, 0x0671, 0x14FD, 0x0287,
  285. 0x3EBC, 0xE610, 0x3EC8, 0x0C7B, 0x031A, 0x07E6, 0x3EC8, 0x86F7,
  286. 0x3EC0, 0x821E, 0x3EBE, 0xD208, 0x3EBD, 0x021F, 0x3ECA, 0x0386,
  287. 0x3EC1, 0x0C03, 0x3EC9, 0x031E, 0x3ECA, 0x8C4C, 0x3EBF, 0x0C55,
  288. 0x3EC9, 0xC208, 0x3EC4, 0xBC84, 0x3EC8, 0x0EAD, 0x3EC8, 0xD308,
  289. 0x3EC2, 0x8F7E, 0x3ECB, 0x0219, 0x3ECB, 0xD26E, 0x3EC5, 0x031F,
  290. 0x3EC6, 0xC308, 0x3EC3, 0x32FF, 0x3EC9, 0x0265, 0x3EC9, 0x8319,
  291. 0x1342, 0xD36E, 0x3EC7, 0x33FF, 0x0000, 0x8365, 0x1420, 0x9570,
  292. };
  293. /* send an initialization array
  294. * Taken from the oss driver, not obvious from the doc how this
  295. * is meant to work
  296. */
  297. static void __init
  298. send_array(emu8000_t *emu, unsigned short *data, int size)
  299. {
  300. int i;
  301. unsigned short *p;
  302. p = data;
  303. for (i = 0; i < size; i++, p++)
  304. EMU8000_INIT1_WRITE(emu, i, *p);
  305. for (i = 0; i < size; i++, p++)
  306. EMU8000_INIT2_WRITE(emu, i, *p);
  307. for (i = 0; i < size; i++, p++)
  308. EMU8000_INIT3_WRITE(emu, i, *p);
  309. for (i = 0; i < size; i++, p++)
  310. EMU8000_INIT4_WRITE(emu, i, *p);
  311. }
  312. /*
  313. * Send initialization arrays to start up, this just follows the
  314. * initialisation sequence in the adip.
  315. */
  316. static void __init
  317. init_arrays(emu8000_t *emu)
  318. {
  319. send_array(emu, init1, ARRAY_SIZE(init1)/4);
  320. msleep((1024 * 1000) / 44100); /* wait for 1024 clocks */
  321. send_array(emu, init2, ARRAY_SIZE(init2)/4);
  322. send_array(emu, init3, ARRAY_SIZE(init3)/4);
  323. EMU8000_HWCF4_WRITE(emu, 0);
  324. EMU8000_HWCF5_WRITE(emu, 0x83);
  325. EMU8000_HWCF6_WRITE(emu, 0x8000);
  326. send_array(emu, init4, ARRAY_SIZE(init4)/4);
  327. }
  328. #define UNIQUE_ID1 0xa5b9
  329. #define UNIQUE_ID2 0x9d53
  330. /*
  331. * Size the onboard memory.
  332. * This is written so as not to need arbitary delays after the write. It
  333. * seems that the only way to do this is to use the one channel and keep
  334. * reallocating between read and write.
  335. */
  336. static void __init
  337. size_dram(emu8000_t *emu)
  338. {
  339. int i, size;
  340. if (emu->dram_checked)
  341. return;
  342. size = 0;
  343. /* write out a magic number */
  344. snd_emu8000_dma_chan(emu, 0, EMU8000_RAM_WRITE);
  345. snd_emu8000_dma_chan(emu, 1, EMU8000_RAM_READ);
  346. EMU8000_SMALW_WRITE(emu, EMU8000_DRAM_OFFSET);
  347. EMU8000_SMLD_WRITE(emu, UNIQUE_ID1);
  348. snd_emu8000_init_fm(emu); /* This must really be here and not 2 lines back even */
  349. while (size < EMU8000_MAX_DRAM) {
  350. size += 512 * 1024; /* increment 512kbytes */
  351. /* Write a unique data on the test address.
  352. * if the address is out of range, the data is written on
  353. * 0x200000(=EMU8000_DRAM_OFFSET). Then the id word is
  354. * changed by this data.
  355. */
  356. /*snd_emu8000_dma_chan(emu, 0, EMU8000_RAM_WRITE);*/
  357. EMU8000_SMALW_WRITE(emu, EMU8000_DRAM_OFFSET + (size>>1));
  358. EMU8000_SMLD_WRITE(emu, UNIQUE_ID2);
  359. snd_emu8000_write_wait(emu);
  360. /*
  361. * read the data on the just written DRAM address
  362. * if not the same then we have reached the end of ram.
  363. */
  364. /*snd_emu8000_dma_chan(emu, 0, EMU8000_RAM_READ);*/
  365. EMU8000_SMALR_WRITE(emu, EMU8000_DRAM_OFFSET + (size>>1));
  366. /*snd_emu8000_read_wait(emu);*/
  367. EMU8000_SMLD_READ(emu); /* discard stale data */
  368. if (EMU8000_SMLD_READ(emu) != UNIQUE_ID2)
  369. break; /* we must have wrapped around */
  370. snd_emu8000_read_wait(emu);
  371. /*
  372. * If it is the same it could be that the address just
  373. * wraps back to the beginning; so check to see if the
  374. * initial value has been overwritten.
  375. */
  376. EMU8000_SMALR_WRITE(emu, EMU8000_DRAM_OFFSET);
  377. EMU8000_SMLD_READ(emu); /* discard stale data */
  378. if (EMU8000_SMLD_READ(emu) != UNIQUE_ID1)
  379. break; /* we must have wrapped around */
  380. snd_emu8000_read_wait(emu);
  381. }
  382. /* wait until FULL bit in SMAxW register is false */
  383. for (i = 0; i < 10000; i++) {
  384. if ((EMU8000_SMALW_READ(emu) & 0x80000000) == 0)
  385. break;
  386. set_current_state(TASK_INTERRUPTIBLE);
  387. schedule_timeout(1);
  388. if (signal_pending(current))
  389. break;
  390. }
  391. snd_emu8000_dma_chan(emu, 0, EMU8000_RAM_CLOSE);
  392. snd_emu8000_dma_chan(emu, 1, EMU8000_RAM_CLOSE);
  393. snd_printdd("EMU8000 [0x%lx]: %d Kb on-board memory detected\n",
  394. emu->port1, size/1024);
  395. emu->mem_size = size;
  396. emu->dram_checked = 1;
  397. }
  398. /*
  399. * Initiailise the FM section. You have to do this to use sample RAM
  400. * and therefore lose 2 voices.
  401. */
  402. /*exported*/ void
  403. snd_emu8000_init_fm(emu8000_t *emu)
  404. {
  405. unsigned long flags;
  406. /* Initialize the last two channels for DRAM refresh and producing
  407. the reverb and chorus effects for Yamaha OPL-3 synthesizer */
  408. /* 31: FM left channel, 0xffffe0-0xffffe8 */
  409. EMU8000_DCYSUSV_WRITE(emu, 30, 0x80);
  410. EMU8000_PSST_WRITE(emu, 30, 0xFFFFFFE0); /* full left */
  411. EMU8000_CSL_WRITE(emu, 30, 0x00FFFFE8 | (emu->fm_chorus_depth << 24));
  412. EMU8000_PTRX_WRITE(emu, 30, (emu->fm_reverb_depth << 8));
  413. EMU8000_CPF_WRITE(emu, 30, 0);
  414. EMU8000_CCCA_WRITE(emu, 30, 0x00FFFFE3);
  415. /* 32: FM right channel, 0xfffff0-0xfffff8 */
  416. EMU8000_DCYSUSV_WRITE(emu, 31, 0x80);
  417. EMU8000_PSST_WRITE(emu, 31, 0x00FFFFF0); /* full right */
  418. EMU8000_CSL_WRITE(emu, 31, 0x00FFFFF8 | (emu->fm_chorus_depth << 24));
  419. EMU8000_PTRX_WRITE(emu, 31, (emu->fm_reverb_depth << 8));
  420. EMU8000_CPF_WRITE(emu, 31, 0x8000);
  421. EMU8000_CCCA_WRITE(emu, 31, 0x00FFFFF3);
  422. snd_emu8000_poke((emu), EMU8000_DATA0(emu), EMU8000_CMD(1, (30)), 0);
  423. spin_lock_irqsave(&emu->reg_lock, flags);
  424. while (!(inw(EMU8000_PTR(emu)) & 0x1000))
  425. ;
  426. while ((inw(EMU8000_PTR(emu)) & 0x1000))
  427. ;
  428. spin_unlock_irqrestore(&emu->reg_lock, flags);
  429. snd_emu8000_poke((emu), EMU8000_DATA0(emu), EMU8000_CMD(1, (30)), 0x4828);
  430. /* this is really odd part.. */
  431. outb(0x3C, EMU8000_PTR(emu));
  432. outb(0, EMU8000_DATA1(emu));
  433. /* skew volume & cutoff */
  434. EMU8000_VTFT_WRITE(emu, 30, 0x8000FFFF);
  435. EMU8000_VTFT_WRITE(emu, 31, 0x8000FFFF);
  436. }
  437. /*
  438. * The main initialization routine.
  439. */
  440. static void __init
  441. snd_emu8000_init_hw(emu8000_t *emu)
  442. {
  443. int i;
  444. emu->last_reg = 0xffff; /* reset the last register index */
  445. /* initialize hardware configuration */
  446. EMU8000_HWCF1_WRITE(emu, 0x0059);
  447. EMU8000_HWCF2_WRITE(emu, 0x0020);
  448. /* disable audio; this seems to reduce a clicking noise a bit.. */
  449. EMU8000_HWCF3_WRITE(emu, 0);
  450. /* initialize audio channels */
  451. init_audio(emu);
  452. /* initialize DMA */
  453. init_dma(emu);
  454. /* initialize init arrays */
  455. init_arrays(emu);
  456. /*
  457. * Initialize the FM section of the AWE32, this is needed
  458. * for DRAM refresh as well
  459. */
  460. snd_emu8000_init_fm(emu);
  461. /* terminate all voices */
  462. for (i = 0; i < EMU8000_DRAM_VOICES; i++)
  463. EMU8000_DCYSUSV_WRITE(emu, 0, 0x807F);
  464. /* check DRAM memory size */
  465. size_dram(emu);
  466. /* enable audio */
  467. EMU8000_HWCF3_WRITE(emu, 0x4);
  468. /* set equzlier, chorus and reverb modes */
  469. snd_emu8000_update_equalizer(emu);
  470. snd_emu8000_update_chorus_mode(emu);
  471. snd_emu8000_update_reverb_mode(emu);
  472. }
  473. /*----------------------------------------------------------------
  474. * Bass/Treble Equalizer
  475. *----------------------------------------------------------------*/
  476. static unsigned short bass_parm[12][3] = {
  477. {0xD26A, 0xD36A, 0x0000}, /* -12 dB */
  478. {0xD25B, 0xD35B, 0x0000}, /* -8 */
  479. {0xD24C, 0xD34C, 0x0000}, /* -6 */
  480. {0xD23D, 0xD33D, 0x0000}, /* -4 */
  481. {0xD21F, 0xD31F, 0x0000}, /* -2 */
  482. {0xC208, 0xC308, 0x0001}, /* 0 (HW default) */
  483. {0xC219, 0xC319, 0x0001}, /* +2 */
  484. {0xC22A, 0xC32A, 0x0001}, /* +4 */
  485. {0xC24C, 0xC34C, 0x0001}, /* +6 */
  486. {0xC26E, 0xC36E, 0x0001}, /* +8 */
  487. {0xC248, 0xC384, 0x0002}, /* +10 */
  488. {0xC26A, 0xC36A, 0x0002}, /* +12 dB */
  489. };
  490. static unsigned short treble_parm[12][9] = {
  491. {0x821E, 0xC26A, 0x031E, 0xC36A, 0x021E, 0xD208, 0x831E, 0xD308, 0x0001}, /* -12 dB */
  492. {0x821E, 0xC25B, 0x031E, 0xC35B, 0x021E, 0xD208, 0x831E, 0xD308, 0x0001},
  493. {0x821E, 0xC24C, 0x031E, 0xC34C, 0x021E, 0xD208, 0x831E, 0xD308, 0x0001},
  494. {0x821E, 0xC23D, 0x031E, 0xC33D, 0x021E, 0xD208, 0x831E, 0xD308, 0x0001},
  495. {0x821E, 0xC21F, 0x031E, 0xC31F, 0x021E, 0xD208, 0x831E, 0xD308, 0x0001},
  496. {0x821E, 0xD208, 0x031E, 0xD308, 0x021E, 0xD208, 0x831E, 0xD308, 0x0002},
  497. {0x821E, 0xD208, 0x031E, 0xD308, 0x021D, 0xD219, 0x831D, 0xD319, 0x0002},
  498. {0x821E, 0xD208, 0x031E, 0xD308, 0x021C, 0xD22A, 0x831C, 0xD32A, 0x0002},
  499. {0x821E, 0xD208, 0x031E, 0xD308, 0x021A, 0xD24C, 0x831A, 0xD34C, 0x0002},
  500. {0x821E, 0xD208, 0x031E, 0xD308, 0x0219, 0xD26E, 0x8319, 0xD36E, 0x0002}, /* +8 (HW default) */
  501. {0x821D, 0xD219, 0x031D, 0xD319, 0x0219, 0xD26E, 0x8319, 0xD36E, 0x0002},
  502. {0x821C, 0xD22A, 0x031C, 0xD32A, 0x0219, 0xD26E, 0x8319, 0xD36E, 0x0002} /* +12 dB */
  503. };
  504. /*
  505. * set Emu8000 digital equalizer; from 0 to 11 [-12dB - 12dB]
  506. */
  507. /*exported*/ void
  508. snd_emu8000_update_equalizer(emu8000_t *emu)
  509. {
  510. unsigned short w;
  511. int bass = emu->bass_level;
  512. int treble = emu->treble_level;
  513. if (bass < 0 || bass > 11 || treble < 0 || treble > 11)
  514. return;
  515. EMU8000_INIT4_WRITE(emu, 0x01, bass_parm[bass][0]);
  516. EMU8000_INIT4_WRITE(emu, 0x11, bass_parm[bass][1]);
  517. EMU8000_INIT3_WRITE(emu, 0x11, treble_parm[treble][0]);
  518. EMU8000_INIT3_WRITE(emu, 0x13, treble_parm[treble][1]);
  519. EMU8000_INIT3_WRITE(emu, 0x1b, treble_parm[treble][2]);
  520. EMU8000_INIT4_WRITE(emu, 0x07, treble_parm[treble][3]);
  521. EMU8000_INIT4_WRITE(emu, 0x0b, treble_parm[treble][4]);
  522. EMU8000_INIT4_WRITE(emu, 0x0d, treble_parm[treble][5]);
  523. EMU8000_INIT4_WRITE(emu, 0x17, treble_parm[treble][6]);
  524. EMU8000_INIT4_WRITE(emu, 0x19, treble_parm[treble][7]);
  525. w = bass_parm[bass][2] + treble_parm[treble][8];
  526. EMU8000_INIT4_WRITE(emu, 0x15, (unsigned short)(w + 0x0262));
  527. EMU8000_INIT4_WRITE(emu, 0x1d, (unsigned short)(w + 0x8362));
  528. }
  529. /*----------------------------------------------------------------
  530. * Chorus mode control
  531. *----------------------------------------------------------------*/
  532. /*
  533. * chorus mode parameters
  534. */
  535. #define SNDRV_EMU8000_CHORUS_1 0
  536. #define SNDRV_EMU8000_CHORUS_2 1
  537. #define SNDRV_EMU8000_CHORUS_3 2
  538. #define SNDRV_EMU8000_CHORUS_4 3
  539. #define SNDRV_EMU8000_CHORUS_FEEDBACK 4
  540. #define SNDRV_EMU8000_CHORUS_FLANGER 5
  541. #define SNDRV_EMU8000_CHORUS_SHORTDELAY 6
  542. #define SNDRV_EMU8000_CHORUS_SHORTDELAY2 7
  543. #define SNDRV_EMU8000_CHORUS_PREDEFINED 8
  544. /* user can define chorus modes up to 32 */
  545. #define SNDRV_EMU8000_CHORUS_NUMBERS 32
  546. typedef struct soundfont_chorus_fx_t {
  547. unsigned short feedback; /* feedback level (0xE600-0xE6FF) */
  548. unsigned short delay_offset; /* delay (0-0x0DA3) [1/44100 sec] */
  549. unsigned short lfo_depth; /* LFO depth (0xBC00-0xBCFF) */
  550. unsigned int delay; /* right delay (0-0xFFFFFFFF) [1/256/44100 sec] */
  551. unsigned int lfo_freq; /* LFO freq LFO freq (0-0xFFFFFFFF) */
  552. } soundfont_chorus_fx_t;
  553. /* 5 parameters for each chorus mode; 3 x 16bit, 2 x 32bit */
  554. static char chorus_defined[SNDRV_EMU8000_CHORUS_NUMBERS];
  555. static soundfont_chorus_fx_t chorus_parm[SNDRV_EMU8000_CHORUS_NUMBERS] = {
  556. {0xE600, 0x03F6, 0xBC2C ,0x00000000, 0x0000006D}, /* chorus 1 */
  557. {0xE608, 0x031A, 0xBC6E, 0x00000000, 0x0000017C}, /* chorus 2 */
  558. {0xE610, 0x031A, 0xBC84, 0x00000000, 0x00000083}, /* chorus 3 */
  559. {0xE620, 0x0269, 0xBC6E, 0x00000000, 0x0000017C}, /* chorus 4 */
  560. {0xE680, 0x04D3, 0xBCA6, 0x00000000, 0x0000005B}, /* feedback */
  561. {0xE6E0, 0x044E, 0xBC37, 0x00000000, 0x00000026}, /* flanger */
  562. {0xE600, 0x0B06, 0xBC00, 0x0006E000, 0x00000083}, /* short delay */
  563. {0xE6C0, 0x0B06, 0xBC00, 0x0006E000, 0x00000083}, /* short delay + feedback */
  564. };
  565. /*exported*/ int
  566. snd_emu8000_load_chorus_fx(emu8000_t *emu, int mode, const void __user *buf, long len)
  567. {
  568. soundfont_chorus_fx_t rec;
  569. if (mode < SNDRV_EMU8000_CHORUS_PREDEFINED || mode >= SNDRV_EMU8000_CHORUS_NUMBERS) {
  570. snd_printk(KERN_WARNING "invalid chorus mode %d for uploading\n", mode);
  571. return -EINVAL;
  572. }
  573. if (len < (long)sizeof(rec) || copy_from_user(&rec, buf, sizeof(rec)))
  574. return -EFAULT;
  575. chorus_parm[mode] = rec;
  576. chorus_defined[mode] = 1;
  577. return 0;
  578. }
  579. /*exported*/ void
  580. snd_emu8000_update_chorus_mode(emu8000_t *emu)
  581. {
  582. int effect = emu->chorus_mode;
  583. if (effect < 0 || effect >= SNDRV_EMU8000_CHORUS_NUMBERS ||
  584. (effect >= SNDRV_EMU8000_CHORUS_PREDEFINED && !chorus_defined[effect]))
  585. return;
  586. EMU8000_INIT3_WRITE(emu, 0x09, chorus_parm[effect].feedback);
  587. EMU8000_INIT3_WRITE(emu, 0x0c, chorus_parm[effect].delay_offset);
  588. EMU8000_INIT4_WRITE(emu, 0x03, chorus_parm[effect].lfo_depth);
  589. EMU8000_HWCF4_WRITE(emu, chorus_parm[effect].delay);
  590. EMU8000_HWCF5_WRITE(emu, chorus_parm[effect].lfo_freq);
  591. EMU8000_HWCF6_WRITE(emu, 0x8000);
  592. EMU8000_HWCF7_WRITE(emu, 0x0000);
  593. }
  594. /*----------------------------------------------------------------
  595. * Reverb mode control
  596. *----------------------------------------------------------------*/
  597. /*
  598. * reverb mode parameters
  599. */
  600. #define SNDRV_EMU8000_REVERB_ROOM1 0
  601. #define SNDRV_EMU8000_REVERB_ROOM2 1
  602. #define SNDRV_EMU8000_REVERB_ROOM3 2
  603. #define SNDRV_EMU8000_REVERB_HALL1 3
  604. #define SNDRV_EMU8000_REVERB_HALL2 4
  605. #define SNDRV_EMU8000_REVERB_PLATE 5
  606. #define SNDRV_EMU8000_REVERB_DELAY 6
  607. #define SNDRV_EMU8000_REVERB_PANNINGDELAY 7
  608. #define SNDRV_EMU8000_REVERB_PREDEFINED 8
  609. /* user can define reverb modes up to 32 */
  610. #define SNDRV_EMU8000_REVERB_NUMBERS 32
  611. typedef struct soundfont_reverb_fx_t {
  612. unsigned short parms[28];
  613. } soundfont_reverb_fx_t;
  614. /* reverb mode settings; write the following 28 data of 16 bit length
  615. * on the corresponding ports in the reverb_cmds array
  616. */
  617. static char reverb_defined[SNDRV_EMU8000_CHORUS_NUMBERS];
  618. static soundfont_reverb_fx_t reverb_parm[SNDRV_EMU8000_REVERB_NUMBERS] = {
  619. {{ /* room 1 */
  620. 0xB488, 0xA450, 0x9550, 0x84B5, 0x383A, 0x3EB5, 0x72F4,
  621. 0x72A4, 0x7254, 0x7204, 0x7204, 0x7204, 0x4416, 0x4516,
  622. 0xA490, 0xA590, 0x842A, 0x852A, 0x842A, 0x852A, 0x8429,
  623. 0x8529, 0x8429, 0x8529, 0x8428, 0x8528, 0x8428, 0x8528,
  624. }},
  625. {{ /* room 2 */
  626. 0xB488, 0xA458, 0x9558, 0x84B5, 0x383A, 0x3EB5, 0x7284,
  627. 0x7254, 0x7224, 0x7224, 0x7254, 0x7284, 0x4448, 0x4548,
  628. 0xA440, 0xA540, 0x842A, 0x852A, 0x842A, 0x852A, 0x8429,
  629. 0x8529, 0x8429, 0x8529, 0x8428, 0x8528, 0x8428, 0x8528,
  630. }},
  631. {{ /* room 3 */
  632. 0xB488, 0xA460, 0x9560, 0x84B5, 0x383A, 0x3EB5, 0x7284,
  633. 0x7254, 0x7224, 0x7224, 0x7254, 0x7284, 0x4416, 0x4516,
  634. 0xA490, 0xA590, 0x842C, 0x852C, 0x842C, 0x852C, 0x842B,
  635. 0x852B, 0x842B, 0x852B, 0x842A, 0x852A, 0x842A, 0x852A,
  636. }},
  637. {{ /* hall 1 */
  638. 0xB488, 0xA470, 0x9570, 0x84B5, 0x383A, 0x3EB5, 0x7284,
  639. 0x7254, 0x7224, 0x7224, 0x7254, 0x7284, 0x4448, 0x4548,
  640. 0xA440, 0xA540, 0x842B, 0x852B, 0x842B, 0x852B, 0x842A,
  641. 0x852A, 0x842A, 0x852A, 0x8429, 0x8529, 0x8429, 0x8529,
  642. }},
  643. {{ /* hall 2 */
  644. 0xB488, 0xA470, 0x9570, 0x84B5, 0x383A, 0x3EB5, 0x7254,
  645. 0x7234, 0x7224, 0x7254, 0x7264, 0x7294, 0x44C3, 0x45C3,
  646. 0xA404, 0xA504, 0x842A, 0x852A, 0x842A, 0x852A, 0x8429,
  647. 0x8529, 0x8429, 0x8529, 0x8428, 0x8528, 0x8428, 0x8528,
  648. }},
  649. {{ /* plate */
  650. 0xB4FF, 0xA470, 0x9570, 0x84B5, 0x383A, 0x3EB5, 0x7234,
  651. 0x7234, 0x7234, 0x7234, 0x7234, 0x7234, 0x4448, 0x4548,
  652. 0xA440, 0xA540, 0x842A, 0x852A, 0x842A, 0x852A, 0x8429,
  653. 0x8529, 0x8429, 0x8529, 0x8428, 0x8528, 0x8428, 0x8528,
  654. }},
  655. {{ /* delay */
  656. 0xB4FF, 0xA470, 0x9500, 0x84B5, 0x333A, 0x39B5, 0x7204,
  657. 0x7204, 0x7204, 0x7204, 0x7204, 0x72F4, 0x4400, 0x4500,
  658. 0xA4FF, 0xA5FF, 0x8420, 0x8520, 0x8420, 0x8520, 0x8420,
  659. 0x8520, 0x8420, 0x8520, 0x8420, 0x8520, 0x8420, 0x8520,
  660. }},
  661. {{ /* panning delay */
  662. 0xB4FF, 0xA490, 0x9590, 0x8474, 0x333A, 0x39B5, 0x7204,
  663. 0x7204, 0x7204, 0x7204, 0x7204, 0x72F4, 0x4400, 0x4500,
  664. 0xA4FF, 0xA5FF, 0x8420, 0x8520, 0x8420, 0x8520, 0x8420,
  665. 0x8520, 0x8420, 0x8520, 0x8420, 0x8520, 0x8420, 0x8520,
  666. }},
  667. };
  668. enum { DATA1, DATA2 };
  669. #define AWE_INIT1(c) EMU8000_CMD(2,c), DATA1
  670. #define AWE_INIT2(c) EMU8000_CMD(2,c), DATA2
  671. #define AWE_INIT3(c) EMU8000_CMD(3,c), DATA1
  672. #define AWE_INIT4(c) EMU8000_CMD(3,c), DATA2
  673. static struct reverb_cmd_pair {
  674. unsigned short cmd, port;
  675. } reverb_cmds[28] = {
  676. {AWE_INIT1(0x03)}, {AWE_INIT1(0x05)}, {AWE_INIT4(0x1F)}, {AWE_INIT1(0x07)},
  677. {AWE_INIT2(0x14)}, {AWE_INIT2(0x16)}, {AWE_INIT1(0x0F)}, {AWE_INIT1(0x17)},
  678. {AWE_INIT1(0x1F)}, {AWE_INIT2(0x07)}, {AWE_INIT2(0x0F)}, {AWE_INIT2(0x17)},
  679. {AWE_INIT2(0x1D)}, {AWE_INIT2(0x1F)}, {AWE_INIT3(0x01)}, {AWE_INIT3(0x03)},
  680. {AWE_INIT1(0x09)}, {AWE_INIT1(0x0B)}, {AWE_INIT1(0x11)}, {AWE_INIT1(0x13)},
  681. {AWE_INIT1(0x19)}, {AWE_INIT1(0x1B)}, {AWE_INIT2(0x01)}, {AWE_INIT2(0x03)},
  682. {AWE_INIT2(0x09)}, {AWE_INIT2(0x0B)}, {AWE_INIT2(0x11)}, {AWE_INIT2(0x13)},
  683. };
  684. /*exported*/ int
  685. snd_emu8000_load_reverb_fx(emu8000_t *emu, int mode, const void __user *buf, long len)
  686. {
  687. soundfont_reverb_fx_t rec;
  688. if (mode < SNDRV_EMU8000_REVERB_PREDEFINED || mode >= SNDRV_EMU8000_REVERB_NUMBERS) {
  689. snd_printk(KERN_WARNING "invalid reverb mode %d for uploading\n", mode);
  690. return -EINVAL;
  691. }
  692. if (len < (long)sizeof(rec) || copy_from_user(&rec, buf, sizeof(rec)))
  693. return -EFAULT;
  694. reverb_parm[mode] = rec;
  695. reverb_defined[mode] = 1;
  696. return 0;
  697. }
  698. /*exported*/ void
  699. snd_emu8000_update_reverb_mode(emu8000_t *emu)
  700. {
  701. int effect = emu->reverb_mode;
  702. int i;
  703. if (effect < 0 || effect >= SNDRV_EMU8000_REVERB_NUMBERS ||
  704. (effect >= SNDRV_EMU8000_REVERB_PREDEFINED && !reverb_defined[effect]))
  705. return;
  706. for (i = 0; i < 28; i++) {
  707. int port;
  708. if (reverb_cmds[i].port == DATA1)
  709. port = EMU8000_DATA1(emu);
  710. else
  711. port = EMU8000_DATA2(emu);
  712. snd_emu8000_poke(emu, port, reverb_cmds[i].cmd, reverb_parm[effect].parms[i]);
  713. }
  714. }
  715. /*----------------------------------------------------------------
  716. * mixer interface
  717. *----------------------------------------------------------------*/
  718. /*
  719. * bass/treble
  720. */
  721. static int mixer_bass_treble_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
  722. {
  723. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  724. uinfo->count = 1;
  725. uinfo->value.integer.min = 0;
  726. uinfo->value.integer.max = 11;
  727. return 0;
  728. }
  729. static int mixer_bass_treble_get(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
  730. {
  731. emu8000_t *emu = snd_kcontrol_chip(kcontrol);
  732. ucontrol->value.integer.value[0] = kcontrol->private_value ? emu->treble_level : emu->bass_level;
  733. return 0;
  734. }
  735. static int mixer_bass_treble_put(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
  736. {
  737. emu8000_t *emu = snd_kcontrol_chip(kcontrol);
  738. unsigned long flags;
  739. int change;
  740. unsigned short val1;
  741. val1 = ucontrol->value.integer.value[0] % 12;
  742. spin_lock_irqsave(&emu->control_lock, flags);
  743. if (kcontrol->private_value) {
  744. change = val1 != emu->treble_level;
  745. emu->treble_level = val1;
  746. } else {
  747. change = val1 != emu->bass_level;
  748. emu->bass_level = val1;
  749. }
  750. spin_unlock_irqrestore(&emu->control_lock, flags);
  751. snd_emu8000_update_equalizer(emu);
  752. return change;
  753. }
  754. static snd_kcontrol_new_t mixer_bass_control =
  755. {
  756. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  757. .name = "Synth Tone Control - Bass",
  758. .info = mixer_bass_treble_info,
  759. .get = mixer_bass_treble_get,
  760. .put = mixer_bass_treble_put,
  761. .private_value = 0,
  762. };
  763. static snd_kcontrol_new_t mixer_treble_control =
  764. {
  765. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  766. .name = "Synth Tone Control - Treble",
  767. .info = mixer_bass_treble_info,
  768. .get = mixer_bass_treble_get,
  769. .put = mixer_bass_treble_put,
  770. .private_value = 1,
  771. };
  772. /*
  773. * chorus/reverb mode
  774. */
  775. static int mixer_chorus_reverb_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
  776. {
  777. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  778. uinfo->count = 1;
  779. uinfo->value.integer.min = 0;
  780. uinfo->value.integer.max = kcontrol->private_value ? (SNDRV_EMU8000_CHORUS_NUMBERS-1) : (SNDRV_EMU8000_REVERB_NUMBERS-1);
  781. return 0;
  782. }
  783. static int mixer_chorus_reverb_get(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
  784. {
  785. emu8000_t *emu = snd_kcontrol_chip(kcontrol);
  786. ucontrol->value.integer.value[0] = kcontrol->private_value ? emu->chorus_mode : emu->reverb_mode;
  787. return 0;
  788. }
  789. static int mixer_chorus_reverb_put(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
  790. {
  791. emu8000_t *emu = snd_kcontrol_chip(kcontrol);
  792. unsigned long flags;
  793. int change;
  794. unsigned short val1;
  795. spin_lock_irqsave(&emu->control_lock, flags);
  796. if (kcontrol->private_value) {
  797. val1 = ucontrol->value.integer.value[0] % SNDRV_EMU8000_CHORUS_NUMBERS;
  798. change = val1 != emu->chorus_mode;
  799. emu->chorus_mode = val1;
  800. } else {
  801. val1 = ucontrol->value.integer.value[0] % SNDRV_EMU8000_REVERB_NUMBERS;
  802. change = val1 != emu->reverb_mode;
  803. emu->reverb_mode = val1;
  804. }
  805. spin_unlock_irqrestore(&emu->control_lock, flags);
  806. if (change) {
  807. if (kcontrol->private_value)
  808. snd_emu8000_update_chorus_mode(emu);
  809. else
  810. snd_emu8000_update_reverb_mode(emu);
  811. }
  812. return change;
  813. }
  814. static snd_kcontrol_new_t mixer_chorus_mode_control =
  815. {
  816. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  817. .name = "Chorus Mode",
  818. .info = mixer_chorus_reverb_info,
  819. .get = mixer_chorus_reverb_get,
  820. .put = mixer_chorus_reverb_put,
  821. .private_value = 1,
  822. };
  823. static snd_kcontrol_new_t mixer_reverb_mode_control =
  824. {
  825. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  826. .name = "Reverb Mode",
  827. .info = mixer_chorus_reverb_info,
  828. .get = mixer_chorus_reverb_get,
  829. .put = mixer_chorus_reverb_put,
  830. .private_value = 0,
  831. };
  832. /*
  833. * FM OPL3 chorus/reverb depth
  834. */
  835. static int mixer_fm_depth_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
  836. {
  837. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  838. uinfo->count = 1;
  839. uinfo->value.integer.min = 0;
  840. uinfo->value.integer.max = 255;
  841. return 0;
  842. }
  843. static int mixer_fm_depth_get(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
  844. {
  845. emu8000_t *emu = snd_kcontrol_chip(kcontrol);
  846. ucontrol->value.integer.value[0] = kcontrol->private_value ? emu->fm_chorus_depth : emu->fm_reverb_depth;
  847. return 0;
  848. }
  849. static int mixer_fm_depth_put(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
  850. {
  851. emu8000_t *emu = snd_kcontrol_chip(kcontrol);
  852. unsigned long flags;
  853. int change;
  854. unsigned short val1;
  855. val1 = ucontrol->value.integer.value[0] % 256;
  856. spin_lock_irqsave(&emu->control_lock, flags);
  857. if (kcontrol->private_value) {
  858. change = val1 != emu->fm_chorus_depth;
  859. emu->fm_chorus_depth = val1;
  860. } else {
  861. change = val1 != emu->fm_reverb_depth;
  862. emu->fm_reverb_depth = val1;
  863. }
  864. spin_unlock_irqrestore(&emu->control_lock, flags);
  865. if (change)
  866. snd_emu8000_init_fm(emu);
  867. return change;
  868. }
  869. static snd_kcontrol_new_t mixer_fm_chorus_depth_control =
  870. {
  871. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  872. .name = "FM Chorus Depth",
  873. .info = mixer_fm_depth_info,
  874. .get = mixer_fm_depth_get,
  875. .put = mixer_fm_depth_put,
  876. .private_value = 1,
  877. };
  878. static snd_kcontrol_new_t mixer_fm_reverb_depth_control =
  879. {
  880. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  881. .name = "FM Reverb Depth",
  882. .info = mixer_fm_depth_info,
  883. .get = mixer_fm_depth_get,
  884. .put = mixer_fm_depth_put,
  885. .private_value = 0,
  886. };
  887. static snd_kcontrol_new_t *mixer_defs[EMU8000_NUM_CONTROLS] = {
  888. &mixer_bass_control,
  889. &mixer_treble_control,
  890. &mixer_chorus_mode_control,
  891. &mixer_reverb_mode_control,
  892. &mixer_fm_chorus_depth_control,
  893. &mixer_fm_reverb_depth_control,
  894. };
  895. /*
  896. * create and attach mixer elements for WaveTable treble/bass controls
  897. */
  898. static int __init
  899. snd_emu8000_create_mixer(snd_card_t *card, emu8000_t *emu)
  900. {
  901. int i, err = 0;
  902. snd_assert(emu != NULL && card != NULL, return -EINVAL);
  903. spin_lock_init(&emu->control_lock);
  904. memset(emu->controls, 0, sizeof(emu->controls));
  905. for (i = 0; i < EMU8000_NUM_CONTROLS; i++) {
  906. if ((err = snd_ctl_add(card, emu->controls[i] = snd_ctl_new1(mixer_defs[i], emu))) < 0)
  907. goto __error;
  908. }
  909. return 0;
  910. __error:
  911. for (i = 0; i < EMU8000_NUM_CONTROLS; i++) {
  912. down_write(&card->controls_rwsem);
  913. if (emu->controls[i])
  914. snd_ctl_remove(card, emu->controls[i]);
  915. up_write(&card->controls_rwsem);
  916. }
  917. return err;
  918. }
  919. /*
  920. * free resources
  921. */
  922. static int snd_emu8000_free(emu8000_t *hw)
  923. {
  924. if (hw->res_port1) {
  925. release_resource(hw->res_port1);
  926. kfree_nocheck(hw->res_port1);
  927. }
  928. if (hw->res_port2) {
  929. release_resource(hw->res_port2);
  930. kfree_nocheck(hw->res_port2);
  931. }
  932. if (hw->res_port3) {
  933. release_resource(hw->res_port3);
  934. kfree_nocheck(hw->res_port3);
  935. }
  936. kfree(hw);
  937. return 0;
  938. }
  939. /*
  940. */
  941. static int snd_emu8000_dev_free(snd_device_t *device)
  942. {
  943. emu8000_t *hw = device->device_data;
  944. return snd_emu8000_free(hw);
  945. }
  946. /*
  947. * initialize and register emu8000 synth device.
  948. */
  949. int __init
  950. snd_emu8000_new(snd_card_t *card, int index, long port, int seq_ports, snd_seq_device_t **awe_ret)
  951. {
  952. snd_seq_device_t *awe;
  953. emu8000_t *hw;
  954. int err;
  955. static snd_device_ops_t ops = {
  956. .dev_free = snd_emu8000_dev_free,
  957. };
  958. if (awe_ret)
  959. *awe_ret = NULL;
  960. if (seq_ports <= 0)
  961. return 0;
  962. hw = kcalloc(1, sizeof(*hw), GFP_KERNEL);
  963. if (hw == NULL)
  964. return -ENOMEM;
  965. spin_lock_init(&hw->reg_lock);
  966. hw->index = index;
  967. hw->port1 = port;
  968. hw->port2 = port + 0x400;
  969. hw->port3 = port + 0x800;
  970. if (!(hw->res_port1 = request_region(hw->port1, 4, "Emu8000-1")) ||
  971. !(hw->res_port2 = request_region(hw->port2, 4, "Emu8000-2")) ||
  972. !(hw->res_port3 = request_region(hw->port3, 4, "Emu8000-3"))) {
  973. snd_printk(KERN_ERR "sbawe: can't grab ports 0x%lx, 0x%lx, 0x%lx\n", hw->port1, hw->port2, hw->port3);
  974. snd_emu8000_free(hw);
  975. return -EBUSY;
  976. }
  977. hw->mem_size = 0;
  978. hw->card = card;
  979. hw->seq_ports = seq_ports;
  980. hw->bass_level = 5;
  981. hw->treble_level = 9;
  982. hw->chorus_mode = 2;
  983. hw->reverb_mode = 4;
  984. hw->fm_chorus_depth = 0;
  985. hw->fm_reverb_depth = 0;
  986. if (snd_emu8000_detect(hw) < 0) {
  987. snd_emu8000_free(hw);
  988. return -ENODEV;
  989. }
  990. snd_emu8000_init_hw(hw);
  991. if ((err = snd_emu8000_create_mixer(card, hw)) < 0) {
  992. snd_emu8000_free(hw);
  993. return err;
  994. }
  995. if ((err = snd_device_new(card, SNDRV_DEV_CODEC, hw, &ops)) < 0) {
  996. snd_emu8000_free(hw);
  997. return err;
  998. }
  999. #if defined(CONFIG_SND_SEQUENCER) || (defined(MODULE) && defined(CONFIG_SND_SEQUENCER_MODULE))
  1000. if (snd_seq_device_new(card, index, SNDRV_SEQ_DEV_ID_EMU8000,
  1001. sizeof(emu8000_t*), &awe) >= 0) {
  1002. strcpy(awe->name, "EMU-8000");
  1003. *(emu8000_t**)SNDRV_SEQ_DEVICE_ARGPTR(awe) = hw;
  1004. }
  1005. #else
  1006. awe = NULL;
  1007. #endif
  1008. if (awe_ret)
  1009. *awe_ret = awe;
  1010. return 0;
  1011. }
  1012. /*
  1013. * exported stuff
  1014. */
  1015. EXPORT_SYMBOL(snd_emu8000_poke);
  1016. EXPORT_SYMBOL(snd_emu8000_peek);
  1017. EXPORT_SYMBOL(snd_emu8000_poke_dw);
  1018. EXPORT_SYMBOL(snd_emu8000_peek_dw);
  1019. EXPORT_SYMBOL(snd_emu8000_dma_chan);
  1020. EXPORT_SYMBOL(snd_emu8000_init_fm);
  1021. EXPORT_SYMBOL(snd_emu8000_load_chorus_fx);
  1022. EXPORT_SYMBOL(snd_emu8000_load_reverb_fx);
  1023. EXPORT_SYMBOL(snd_emu8000_update_chorus_mode);
  1024. EXPORT_SYMBOL(snd_emu8000_update_reverb_mode);
  1025. EXPORT_SYMBOL(snd_emu8000_update_equalizer);