system.h 6.3 KB

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  1. #ifndef __ASM_SH_SYSTEM_H
  2. #define __ASM_SH_SYSTEM_H
  3. /*
  4. * Copyright (C) 1999, 2000 Niibe Yutaka & Kaz Kojima
  5. * Copyright (C) 2002 Paul Mundt
  6. */
  7. #include <linux/config.h>
  8. /*
  9. * switch_to() should switch tasks to task nr n, first
  10. */
  11. #define switch_to(prev, next, last) do { \
  12. task_t *__last; \
  13. register unsigned long *__ts1 __asm__ ("r1") = &prev->thread.sp; \
  14. register unsigned long *__ts2 __asm__ ("r2") = &prev->thread.pc; \
  15. register unsigned long *__ts4 __asm__ ("r4") = (unsigned long *)prev; \
  16. register unsigned long *__ts5 __asm__ ("r5") = (unsigned long *)next; \
  17. register unsigned long *__ts6 __asm__ ("r6") = &next->thread.sp; \
  18. register unsigned long __ts7 __asm__ ("r7") = next->thread.pc; \
  19. __asm__ __volatile__ (".balign 4\n\t" \
  20. "stc.l gbr, @-r15\n\t" \
  21. "sts.l pr, @-r15\n\t" \
  22. "mov.l r8, @-r15\n\t" \
  23. "mov.l r9, @-r15\n\t" \
  24. "mov.l r10, @-r15\n\t" \
  25. "mov.l r11, @-r15\n\t" \
  26. "mov.l r12, @-r15\n\t" \
  27. "mov.l r13, @-r15\n\t" \
  28. "mov.l r14, @-r15\n\t" \
  29. "mov.l r15, @r1 ! save SP\n\t" \
  30. "mov.l @r6, r15 ! change to new stack\n\t" \
  31. "mova 1f, %0\n\t" \
  32. "mov.l %0, @r2 ! save PC\n\t" \
  33. "mov.l 2f, %0\n\t" \
  34. "jmp @%0 ! call __switch_to\n\t" \
  35. " lds r7, pr ! with return to new PC\n\t" \
  36. ".balign 4\n" \
  37. "2:\n\t" \
  38. ".long __switch_to\n" \
  39. "1:\n\t" \
  40. "mov.l @r15+, r14\n\t" \
  41. "mov.l @r15+, r13\n\t" \
  42. "mov.l @r15+, r12\n\t" \
  43. "mov.l @r15+, r11\n\t" \
  44. "mov.l @r15+, r10\n\t" \
  45. "mov.l @r15+, r9\n\t" \
  46. "mov.l @r15+, r8\n\t" \
  47. "lds.l @r15+, pr\n\t" \
  48. "ldc.l @r15+, gbr\n\t" \
  49. : "=z" (__last) \
  50. : "r" (__ts1), "r" (__ts2), "r" (__ts4), \
  51. "r" (__ts5), "r" (__ts6), "r" (__ts7) \
  52. : "r3", "t"); \
  53. last = __last; \
  54. } while (0)
  55. #define nop() __asm__ __volatile__ ("nop")
  56. #define xchg(ptr,x) ((__typeof__(*(ptr)))__xchg((unsigned long)(x),(ptr),sizeof(*(ptr))))
  57. static __inline__ unsigned long tas(volatile int *m)
  58. { /* #define tas(ptr) (xchg((ptr),1)) */
  59. unsigned long retval;
  60. __asm__ __volatile__ ("tas.b @%1\n\t"
  61. "movt %0"
  62. : "=r" (retval): "r" (m): "t", "memory");
  63. return retval;
  64. }
  65. extern void __xchg_called_with_bad_pointer(void);
  66. #define mb() __asm__ __volatile__ ("": : :"memory")
  67. #define rmb() mb()
  68. #define wmb() __asm__ __volatile__ ("": : :"memory")
  69. #define read_barrier_depends() do { } while(0)
  70. #ifdef CONFIG_SMP
  71. #define smp_mb() mb()
  72. #define smp_rmb() rmb()
  73. #define smp_wmb() wmb()
  74. #define smp_read_barrier_depends() read_barrier_depends()
  75. #else
  76. #define smp_mb() barrier()
  77. #define smp_rmb() barrier()
  78. #define smp_wmb() barrier()
  79. #define smp_read_barrier_depends() do { } while(0)
  80. #endif
  81. #define set_mb(var, value) do { xchg(&var, value); } while (0)
  82. #define set_wmb(var, value) do { var = value; wmb(); } while (0)
  83. /* Interrupt Control */
  84. static __inline__ void local_irq_enable(void)
  85. {
  86. unsigned long __dummy0, __dummy1;
  87. __asm__ __volatile__("stc sr, %0\n\t"
  88. "and %1, %0\n\t"
  89. "stc r6_bank, %1\n\t"
  90. "or %1, %0\n\t"
  91. "ldc %0, sr"
  92. : "=&r" (__dummy0), "=r" (__dummy1)
  93. : "1" (~0x000000f0)
  94. : "memory");
  95. }
  96. static __inline__ void local_irq_disable(void)
  97. {
  98. unsigned long __dummy;
  99. __asm__ __volatile__("stc sr, %0\n\t"
  100. "or #0xf0, %0\n\t"
  101. "ldc %0, sr"
  102. : "=&z" (__dummy)
  103. : /* no inputs */
  104. : "memory");
  105. }
  106. #define local_save_flags(x) \
  107. __asm__("stc sr, %0; and #0xf0, %0" : "=&z" (x) :/**/: "memory" )
  108. #define irqs_disabled() \
  109. ({ \
  110. unsigned long flags; \
  111. local_save_flags(flags); \
  112. (flags != 0); \
  113. })
  114. static __inline__ unsigned long local_irq_save(void)
  115. {
  116. unsigned long flags, __dummy;
  117. __asm__ __volatile__("stc sr, %1\n\t"
  118. "mov %1, %0\n\t"
  119. "or #0xf0, %0\n\t"
  120. "ldc %0, sr\n\t"
  121. "mov %1, %0\n\t"
  122. "and #0xf0, %0"
  123. : "=&z" (flags), "=&r" (__dummy)
  124. :/**/
  125. : "memory" );
  126. return flags;
  127. }
  128. #ifdef DEBUG_CLI_STI
  129. static __inline__ void local_irq_restore(unsigned long x)
  130. {
  131. if ((x & 0x000000f0) != 0x000000f0)
  132. local_irq_enable();
  133. else {
  134. unsigned long flags;
  135. local_save_flags(flags);
  136. if (flags == 0) {
  137. extern void dump_stack(void);
  138. printk(KERN_ERR "BUG!\n");
  139. dump_stack();
  140. local_irq_disable();
  141. }
  142. }
  143. }
  144. #else
  145. #define local_irq_restore(x) do { \
  146. if ((x & 0x000000f0) != 0x000000f0) \
  147. local_irq_enable(); \
  148. } while (0)
  149. #endif
  150. #define really_restore_flags(x) do { \
  151. if ((x & 0x000000f0) != 0x000000f0) \
  152. local_irq_enable(); \
  153. else \
  154. local_irq_disable(); \
  155. } while (0)
  156. /*
  157. * Jump to P2 area.
  158. * When handling TLB or caches, we need to do it from P2 area.
  159. */
  160. #define jump_to_P2() \
  161. do { \
  162. unsigned long __dummy; \
  163. __asm__ __volatile__( \
  164. "mov.l 1f, %0\n\t" \
  165. "or %1, %0\n\t" \
  166. "jmp @%0\n\t" \
  167. " nop\n\t" \
  168. ".balign 4\n" \
  169. "1: .long 2f\n" \
  170. "2:" \
  171. : "=&r" (__dummy) \
  172. : "r" (0x20000000)); \
  173. } while (0)
  174. /*
  175. * Back to P1 area.
  176. */
  177. #define back_to_P1() \
  178. do { \
  179. unsigned long __dummy; \
  180. __asm__ __volatile__( \
  181. "nop;nop;nop;nop;nop;nop;nop\n\t" \
  182. "mov.l 1f, %0\n\t" \
  183. "jmp @%0\n\t" \
  184. " nop\n\t" \
  185. ".balign 4\n" \
  186. "1: .long 2f\n" \
  187. "2:" \
  188. : "=&r" (__dummy)); \
  189. } while (0)
  190. /* For spinlocks etc */
  191. #define local_irq_save(x) x = local_irq_save()
  192. static __inline__ unsigned long xchg_u32(volatile int * m, unsigned long val)
  193. {
  194. unsigned long flags, retval;
  195. local_irq_save(flags);
  196. retval = *m;
  197. *m = val;
  198. local_irq_restore(flags);
  199. return retval;
  200. }
  201. static __inline__ unsigned long xchg_u8(volatile unsigned char * m, unsigned long val)
  202. {
  203. unsigned long flags, retval;
  204. local_irq_save(flags);
  205. retval = *m;
  206. *m = val & 0xff;
  207. local_irq_restore(flags);
  208. return retval;
  209. }
  210. static __inline__ unsigned long __xchg(unsigned long x, volatile void * ptr, int size)
  211. {
  212. switch (size) {
  213. case 4:
  214. return xchg_u32(ptr, x);
  215. break;
  216. case 1:
  217. return xchg_u8(ptr, x);
  218. break;
  219. }
  220. __xchg_called_with_bad_pointer();
  221. return x;
  222. }
  223. /* XXX
  224. * disable hlt during certain critical i/o operations
  225. */
  226. #define HAVE_DISABLE_HLT
  227. void disable_hlt(void);
  228. void enable_hlt(void);
  229. #define arch_align_stack(x) (x)
  230. #endif