io.h 11 KB

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  1. #ifndef _ASM_IO_H
  2. #define _ASM_IO_H
  3. #include <linux/config.h>
  4. #include <linux/string.h>
  5. #include <linux/compiler.h>
  6. /*
  7. * This file contains the definitions for the x86 IO instructions
  8. * inb/inw/inl/outb/outw/outl and the "string versions" of the same
  9. * (insb/insw/insl/outsb/outsw/outsl). You can also use "pausing"
  10. * versions of the single-IO instructions (inb_p/inw_p/..).
  11. *
  12. * This file is not meant to be obfuscating: it's just complicated
  13. * to (a) handle it all in a way that makes gcc able to optimize it
  14. * as well as possible and (b) trying to avoid writing the same thing
  15. * over and over again with slight variations and possibly making a
  16. * mistake somewhere.
  17. */
  18. /*
  19. * Thanks to James van Artsdalen for a better timing-fix than
  20. * the two short jumps: using outb's to a nonexistent port seems
  21. * to guarantee better timings even on fast machines.
  22. *
  23. * On the other hand, I'd like to be sure of a non-existent port:
  24. * I feel a bit unsafe about using 0x80 (should be safe, though)
  25. *
  26. * Linus
  27. */
  28. /*
  29. * Bit simplified and optimized by Jan Hubicka
  30. * Support of BIGMEM added by Gerhard Wichert, Siemens AG, July 1999.
  31. *
  32. * isa_memset_io, isa_memcpy_fromio, isa_memcpy_toio added,
  33. * isa_read[wl] and isa_write[wl] fixed
  34. * - Arnaldo Carvalho de Melo <acme@conectiva.com.br>
  35. */
  36. #define IO_SPACE_LIMIT 0xffff
  37. #define XQUAD_PORTIO_BASE 0xfe400000
  38. #define XQUAD_PORTIO_QUAD 0x40000 /* 256k per quad. */
  39. #ifdef __KERNEL__
  40. #include <asm-generic/iomap.h>
  41. #include <linux/vmalloc.h>
  42. /*
  43. * Convert a physical pointer to a virtual kernel pointer for /dev/mem
  44. * access
  45. */
  46. #define xlate_dev_mem_ptr(p) __va(p)
  47. /*
  48. * Convert a virtual cached pointer to an uncached pointer
  49. */
  50. #define xlate_dev_kmem_ptr(p) p
  51. /**
  52. * virt_to_phys - map virtual addresses to physical
  53. * @address: address to remap
  54. *
  55. * The returned physical address is the physical (CPU) mapping for
  56. * the memory address given. It is only valid to use this function on
  57. * addresses directly mapped or allocated via kmalloc.
  58. *
  59. * This function does not give bus mappings for DMA transfers. In
  60. * almost all conceivable cases a device driver should not be using
  61. * this function
  62. */
  63. static inline unsigned long virt_to_phys(volatile void * address)
  64. {
  65. return __pa(address);
  66. }
  67. /**
  68. * phys_to_virt - map physical address to virtual
  69. * @address: address to remap
  70. *
  71. * The returned virtual address is a current CPU mapping for
  72. * the memory address given. It is only valid to use this function on
  73. * addresses that have a kernel mapping
  74. *
  75. * This function does not handle bus mappings for DMA transfers. In
  76. * almost all conceivable cases a device driver should not be using
  77. * this function
  78. */
  79. static inline void * phys_to_virt(unsigned long address)
  80. {
  81. return __va(address);
  82. }
  83. /*
  84. * Change "struct page" to physical address.
  85. */
  86. #define page_to_phys(page) ((dma_addr_t)page_to_pfn(page) << PAGE_SHIFT)
  87. extern void __iomem * __ioremap(unsigned long offset, unsigned long size, unsigned long flags);
  88. /**
  89. * ioremap - map bus memory into CPU space
  90. * @offset: bus address of the memory
  91. * @size: size of the resource to map
  92. *
  93. * ioremap performs a platform specific sequence of operations to
  94. * make bus memory CPU accessible via the readb/readw/readl/writeb/
  95. * writew/writel functions and the other mmio helpers. The returned
  96. * address is not guaranteed to be usable directly as a virtual
  97. * address.
  98. */
  99. static inline void __iomem * ioremap(unsigned long offset, unsigned long size)
  100. {
  101. return __ioremap(offset, size, 0);
  102. }
  103. extern void __iomem * ioremap_nocache(unsigned long offset, unsigned long size);
  104. extern void iounmap(volatile void __iomem *addr);
  105. /*
  106. * bt_ioremap() and bt_iounmap() are for temporary early boot-time
  107. * mappings, before the real ioremap() is functional.
  108. * A boot-time mapping is currently limited to at most 16 pages.
  109. */
  110. extern void *bt_ioremap(unsigned long offset, unsigned long size);
  111. extern void bt_iounmap(void *addr, unsigned long size);
  112. /*
  113. * ISA I/O bus memory addresses are 1:1 with the physical address.
  114. */
  115. #define isa_virt_to_bus virt_to_phys
  116. #define isa_page_to_bus page_to_phys
  117. #define isa_bus_to_virt phys_to_virt
  118. /*
  119. * However PCI ones are not necessarily 1:1 and therefore these interfaces
  120. * are forbidden in portable PCI drivers.
  121. *
  122. * Allow them on x86 for legacy drivers, though.
  123. */
  124. #define virt_to_bus virt_to_phys
  125. #define bus_to_virt phys_to_virt
  126. /*
  127. * readX/writeX() are used to access memory mapped devices. On some
  128. * architectures the memory mapped IO stuff needs to be accessed
  129. * differently. On the x86 architecture, we just read/write the
  130. * memory location directly.
  131. */
  132. static inline unsigned char readb(const volatile void __iomem *addr)
  133. {
  134. return *(volatile unsigned char __force *) addr;
  135. }
  136. static inline unsigned short readw(const volatile void __iomem *addr)
  137. {
  138. return *(volatile unsigned short __force *) addr;
  139. }
  140. static inline unsigned int readl(const volatile void __iomem *addr)
  141. {
  142. return *(volatile unsigned int __force *) addr;
  143. }
  144. #define readb_relaxed(addr) readb(addr)
  145. #define readw_relaxed(addr) readw(addr)
  146. #define readl_relaxed(addr) readl(addr)
  147. #define __raw_readb readb
  148. #define __raw_readw readw
  149. #define __raw_readl readl
  150. static inline void writeb(unsigned char b, volatile void __iomem *addr)
  151. {
  152. *(volatile unsigned char __force *) addr = b;
  153. }
  154. static inline void writew(unsigned short b, volatile void __iomem *addr)
  155. {
  156. *(volatile unsigned short __force *) addr = b;
  157. }
  158. static inline void writel(unsigned int b, volatile void __iomem *addr)
  159. {
  160. *(volatile unsigned int __force *) addr = b;
  161. }
  162. #define __raw_writeb writeb
  163. #define __raw_writew writew
  164. #define __raw_writel writel
  165. #define mmiowb()
  166. static inline void memset_io(volatile void __iomem *addr, unsigned char val, int count)
  167. {
  168. memset((void __force *) addr, val, count);
  169. }
  170. static inline void memcpy_fromio(void *dst, const volatile void __iomem *src, int count)
  171. {
  172. __memcpy(dst, (void __force *) src, count);
  173. }
  174. static inline void memcpy_toio(volatile void __iomem *dst, const void *src, int count)
  175. {
  176. __memcpy((void __force *) dst, src, count);
  177. }
  178. /*
  179. * ISA space is 'always mapped' on a typical x86 system, no need to
  180. * explicitly ioremap() it. The fact that the ISA IO space is mapped
  181. * to PAGE_OFFSET is pure coincidence - it does not mean ISA values
  182. * are physical addresses. The following constant pointer can be
  183. * used as the IO-area pointer (it can be iounmapped as well, so the
  184. * analogy with PCI is quite large):
  185. */
  186. #define __ISA_IO_base ((char __iomem *)(PAGE_OFFSET))
  187. #define isa_readb(a) readb(__ISA_IO_base + (a))
  188. #define isa_readw(a) readw(__ISA_IO_base + (a))
  189. #define isa_readl(a) readl(__ISA_IO_base + (a))
  190. #define isa_writeb(b,a) writeb(b,__ISA_IO_base + (a))
  191. #define isa_writew(w,a) writew(w,__ISA_IO_base + (a))
  192. #define isa_writel(l,a) writel(l,__ISA_IO_base + (a))
  193. #define isa_memset_io(a,b,c) memset_io(__ISA_IO_base + (a),(b),(c))
  194. #define isa_memcpy_fromio(a,b,c) memcpy_fromio((a),__ISA_IO_base + (b),(c))
  195. #define isa_memcpy_toio(a,b,c) memcpy_toio(__ISA_IO_base + (a),(b),(c))
  196. /*
  197. * Again, i386 does not require mem IO specific function.
  198. */
  199. #define eth_io_copy_and_sum(a,b,c,d) eth_copy_and_sum((a),(void __force *)(b),(c),(d))
  200. #define isa_eth_io_copy_and_sum(a,b,c,d) eth_copy_and_sum((a),(void __force *)(__ISA_IO_base + (b)),(c),(d))
  201. /**
  202. * check_signature - find BIOS signatures
  203. * @io_addr: mmio address to check
  204. * @signature: signature block
  205. * @length: length of signature
  206. *
  207. * Perform a signature comparison with the mmio address io_addr. This
  208. * address should have been obtained by ioremap.
  209. * Returns 1 on a match.
  210. */
  211. static inline int check_signature(volatile void __iomem * io_addr,
  212. const unsigned char *signature, int length)
  213. {
  214. int retval = 0;
  215. do {
  216. if (readb(io_addr) != *signature)
  217. goto out;
  218. io_addr++;
  219. signature++;
  220. length--;
  221. } while (length);
  222. retval = 1;
  223. out:
  224. return retval;
  225. }
  226. /*
  227. * Cache management
  228. *
  229. * This needed for two cases
  230. * 1. Out of order aware processors
  231. * 2. Accidentally out of order processors (PPro errata #51)
  232. */
  233. #if defined(CONFIG_X86_OOSTORE) || defined(CONFIG_X86_PPRO_FENCE)
  234. static inline void flush_write_buffers(void)
  235. {
  236. __asm__ __volatile__ ("lock; addl $0,0(%%esp)": : :"memory");
  237. }
  238. #define dma_cache_inv(_start,_size) flush_write_buffers()
  239. #define dma_cache_wback(_start,_size) flush_write_buffers()
  240. #define dma_cache_wback_inv(_start,_size) flush_write_buffers()
  241. #else
  242. /* Nothing to do */
  243. #define dma_cache_inv(_start,_size) do { } while (0)
  244. #define dma_cache_wback(_start,_size) do { } while (0)
  245. #define dma_cache_wback_inv(_start,_size) do { } while (0)
  246. #define flush_write_buffers()
  247. #endif
  248. #endif /* __KERNEL__ */
  249. #ifdef SLOW_IO_BY_JUMPING
  250. #define __SLOW_DOWN_IO "jmp 1f; 1: jmp 1f; 1:"
  251. #else
  252. #define __SLOW_DOWN_IO "outb %%al,$0x80;"
  253. #endif
  254. static inline void slow_down_io(void) {
  255. __asm__ __volatile__(
  256. __SLOW_DOWN_IO
  257. #ifdef REALLY_SLOW_IO
  258. __SLOW_DOWN_IO __SLOW_DOWN_IO __SLOW_DOWN_IO
  259. #endif
  260. : : );
  261. }
  262. #ifdef CONFIG_X86_NUMAQ
  263. extern void *xquad_portio; /* Where the IO area was mapped */
  264. #define XQUAD_PORT_ADDR(port, quad) (xquad_portio + (XQUAD_PORTIO_QUAD*quad) + port)
  265. #define __BUILDIO(bwl,bw,type) \
  266. static inline void out##bwl##_quad(unsigned type value, int port, int quad) { \
  267. if (xquad_portio) \
  268. write##bwl(value, XQUAD_PORT_ADDR(port, quad)); \
  269. else \
  270. out##bwl##_local(value, port); \
  271. } \
  272. static inline void out##bwl(unsigned type value, int port) { \
  273. out##bwl##_quad(value, port, 0); \
  274. } \
  275. static inline unsigned type in##bwl##_quad(int port, int quad) { \
  276. if (xquad_portio) \
  277. return read##bwl(XQUAD_PORT_ADDR(port, quad)); \
  278. else \
  279. return in##bwl##_local(port); \
  280. } \
  281. static inline unsigned type in##bwl(int port) { \
  282. return in##bwl##_quad(port, 0); \
  283. }
  284. #else
  285. #define __BUILDIO(bwl,bw,type) \
  286. static inline void out##bwl(unsigned type value, int port) { \
  287. out##bwl##_local(value, port); \
  288. } \
  289. static inline unsigned type in##bwl(int port) { \
  290. return in##bwl##_local(port); \
  291. }
  292. #endif
  293. #define BUILDIO(bwl,bw,type) \
  294. static inline void out##bwl##_local(unsigned type value, int port) { \
  295. __asm__ __volatile__("out" #bwl " %" #bw "0, %w1" : : "a"(value), "Nd"(port)); \
  296. } \
  297. static inline unsigned type in##bwl##_local(int port) { \
  298. unsigned type value; \
  299. __asm__ __volatile__("in" #bwl " %w1, %" #bw "0" : "=a"(value) : "Nd"(port)); \
  300. return value; \
  301. } \
  302. static inline void out##bwl##_local_p(unsigned type value, int port) { \
  303. out##bwl##_local(value, port); \
  304. slow_down_io(); \
  305. } \
  306. static inline unsigned type in##bwl##_local_p(int port) { \
  307. unsigned type value = in##bwl##_local(port); \
  308. slow_down_io(); \
  309. return value; \
  310. } \
  311. __BUILDIO(bwl,bw,type) \
  312. static inline void out##bwl##_p(unsigned type value, int port) { \
  313. out##bwl(value, port); \
  314. slow_down_io(); \
  315. } \
  316. static inline unsigned type in##bwl##_p(int port) { \
  317. unsigned type value = in##bwl(port); \
  318. slow_down_io(); \
  319. return value; \
  320. } \
  321. static inline void outs##bwl(int port, const void *addr, unsigned long count) { \
  322. __asm__ __volatile__("rep; outs" #bwl : "+S"(addr), "+c"(count) : "d"(port)); \
  323. } \
  324. static inline void ins##bwl(int port, void *addr, unsigned long count) { \
  325. __asm__ __volatile__("rep; ins" #bwl : "+D"(addr), "+c"(count) : "d"(port)); \
  326. }
  327. BUILDIO(b,b,char)
  328. BUILDIO(w,w,short)
  329. BUILDIO(l,,int)
  330. #endif