hardware.h 2.6 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495
  1. /*
  2. * linux/include/asm-arm/arch-pxa/hardware.h
  3. *
  4. * Author: Nicolas Pitre
  5. * Created: Jun 15, 2001
  6. * Copyright: MontaVista Software Inc.
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. */
  12. #ifndef __ASM_ARCH_HARDWARE_H
  13. #define __ASM_ARCH_HARDWARE_H
  14. /*
  15. * We requires absolute addresses.
  16. */
  17. #define PCIO_BASE 0
  18. /*
  19. * Workarounds for at least 2 errata so far require this.
  20. * The mapping is set in mach-pxa/generic.c.
  21. */
  22. #define UNCACHED_PHYS_0 0xff000000
  23. #define UNCACHED_ADDR UNCACHED_PHYS_0
  24. /*
  25. * Intel PXA2xx internal register mapping:
  26. *
  27. * 0x40000000 - 0x41ffffff <--> 0xf2000000 - 0xf3ffffff
  28. * 0x44000000 - 0x45ffffff <--> 0xf4000000 - 0xf5ffffff
  29. * 0x48000000 - 0x49ffffff <--> 0xf6000000 - 0xf7ffffff
  30. * 0x4c000000 - 0x4dffffff <--> 0xf8000000 - 0xf9ffffff
  31. * 0x50000000 - 0x51ffffff <--> 0xfa000000 - 0xfbffffff
  32. * 0x54000000 - 0x55ffffff <--> 0xfc000000 - 0xfdffffff
  33. * 0x58000000 - 0x59ffffff <--> 0xfe000000 - 0xffffffff
  34. *
  35. * Note that not all PXA2xx chips implement all those addresses, and the
  36. * kernel only maps the minimum needed range of this mapping.
  37. */
  38. #define io_p2v(x) (0xf2000000 + ((x) & 0x01ffffff) + (((x) & 0x1c000000) >> 1))
  39. #define io_v2p(x) (0x3c000000 + ((x) & 0x01ffffff) + (((x) & 0x0e000000) << 1))
  40. #ifndef __ASSEMBLY__
  41. #if 0
  42. # define __REG(x) (*((volatile u32 *)io_p2v(x)))
  43. #else
  44. /*
  45. * This __REG() version gives the same results as the one above, except
  46. * that we are fooling gcc somehow so it generates far better and smaller
  47. * assembly code for access to contigous registers. It's a shame that gcc
  48. * doesn't guess this by itself.
  49. */
  50. #include <asm/types.h>
  51. typedef struct { volatile u32 offset[4096]; } __regbase;
  52. # define __REGP(x) ((__regbase *)((x)&~4095))->offset[((x)&4095)>>2]
  53. # define __REG(x) __REGP(io_p2v(x))
  54. #endif
  55. /* With indexed regs we don't want to feed the index through io_p2v()
  56. especially if it is a variable, otherwise horrible code will result. */
  57. # define __REG2(x,y) (*(volatile u32 *)((u32)&__REG(x) + (y)))
  58. # define __PREG(x) (io_v2p((u32)&(x)))
  59. #else
  60. # define __REG(x) io_p2v(x)
  61. # define __PREG(x) io_v2p(x)
  62. #endif
  63. #ifndef __ASSEMBLY__
  64. /*
  65. * Handy routine to set GPIO alternate functions
  66. */
  67. extern void pxa_gpio_mode( int gpio_mode );
  68. /*
  69. * Routine to enable or disable CKEN
  70. */
  71. extern void pxa_set_cken(int clock, int enable);
  72. /*
  73. * return current memory and LCD clock frequency in units of 10kHz
  74. */
  75. extern unsigned int get_memclk_frequency_10khz(void);
  76. extern unsigned int get_lcdclk_frequency_10khz(void);
  77. #endif
  78. #endif /* _ASM_ARCH_HARDWARE_H */