actbl1.h 8.0 KB

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  1. /******************************************************************************
  2. *
  3. * Name: actbl1.h - ACPI 1.0 tables
  4. *
  5. *****************************************************************************/
  6. /*
  7. * Copyright (C) 2000 - 2005, R. Byron Moore
  8. * All rights reserved.
  9. *
  10. * Redistribution and use in source and binary forms, with or without
  11. * modification, are permitted provided that the following conditions
  12. * are met:
  13. * 1. Redistributions of source code must retain the above copyright
  14. * notice, this list of conditions, and the following disclaimer,
  15. * without modification.
  16. * 2. Redistributions in binary form must reproduce at minimum a disclaimer
  17. * substantially similar to the "NO WARRANTY" disclaimer below
  18. * ("Disclaimer") and any redistribution must be conditioned upon
  19. * including a substantially similar Disclaimer requirement for further
  20. * binary redistribution.
  21. * 3. Neither the names of the above-listed copyright holders nor the names
  22. * of any contributors may be used to endorse or promote products derived
  23. * from this software without specific prior written permission.
  24. *
  25. * Alternatively, this software may be distributed under the terms of the
  26. * GNU General Public License ("GPL") version 2 as published by the Free
  27. * Software Foundation.
  28. *
  29. * NO WARRANTY
  30. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  31. * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  32. * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR
  33. * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  34. * HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  35. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  36. * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  37. * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
  38. * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
  39. * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  40. * POSSIBILITY OF SUCH DAMAGES.
  41. */
  42. #ifndef __ACTBL1_H__
  43. #define __ACTBL1_H__
  44. #pragma pack(1)
  45. /*
  46. * ACPI 1.0 Root System Description Table (RSDT)
  47. */
  48. struct rsdt_descriptor_rev1
  49. {
  50. ACPI_TABLE_HEADER_DEF /* ACPI common table header */
  51. u32 table_offset_entry [1]; /* Array of pointers to other */
  52. /* ACPI tables */
  53. };
  54. /*
  55. * ACPI 1.0 Firmware ACPI Control Structure (FACS)
  56. */
  57. struct facs_descriptor_rev1
  58. {
  59. char signature[4]; /* ACPI Signature */
  60. u32 length; /* Length of structure, in bytes */
  61. u32 hardware_signature; /* Hardware configuration signature */
  62. u32 firmware_waking_vector; /* ACPI OS waking vector */
  63. u32 global_lock; /* Global Lock */
  64. u32 S4bios_f : 1; /* Indicates if S4BIOS support is present */
  65. u32 reserved1 : 31; /* Must be 0 */
  66. u8 resverved3 [40]; /* Reserved - must be zero */
  67. };
  68. /*
  69. * ACPI 1.0 Fixed ACPI Description Table (FADT)
  70. */
  71. struct fadt_descriptor_rev1
  72. {
  73. ACPI_TABLE_HEADER_DEF /* ACPI common table header */
  74. u32 firmware_ctrl; /* Physical address of FACS */
  75. u32 dsdt; /* Physical address of DSDT */
  76. u8 model; /* System Interrupt Model */
  77. u8 reserved1; /* Reserved */
  78. u16 sci_int; /* System vector of SCI interrupt */
  79. u32 smi_cmd; /* Port address of SMI command port */
  80. u8 acpi_enable; /* Value to write to smi_cmd to enable ACPI */
  81. u8 acpi_disable; /* Value to write to smi_cmd to disable ACPI */
  82. u8 S4bios_req; /* Value to write to SMI CMD to enter S4BIOS state */
  83. u8 reserved2; /* Reserved - must be zero */
  84. u32 pm1a_evt_blk; /* Port address of Power Mgt 1a acpi_event Reg Blk */
  85. u32 pm1b_evt_blk; /* Port address of Power Mgt 1b acpi_event Reg Blk */
  86. u32 pm1a_cnt_blk; /* Port address of Power Mgt 1a Control Reg Blk */
  87. u32 pm1b_cnt_blk; /* Port address of Power Mgt 1b Control Reg Blk */
  88. u32 pm2_cnt_blk; /* Port address of Power Mgt 2 Control Reg Blk */
  89. u32 pm_tmr_blk; /* Port address of Power Mgt Timer Ctrl Reg Blk */
  90. u32 gpe0_blk; /* Port addr of General Purpose acpi_event 0 Reg Blk */
  91. u32 gpe1_blk; /* Port addr of General Purpose acpi_event 1 Reg Blk */
  92. u8 pm1_evt_len; /* Byte length of ports at pm1_x_evt_blk */
  93. u8 pm1_cnt_len; /* Byte length of ports at pm1_x_cnt_blk */
  94. u8 pm2_cnt_len; /* Byte Length of ports at pm2_cnt_blk */
  95. u8 pm_tm_len; /* Byte Length of ports at pm_tm_blk */
  96. u8 gpe0_blk_len; /* Byte Length of ports at gpe0_blk */
  97. u8 gpe1_blk_len; /* Byte Length of ports at gpe1_blk */
  98. u8 gpe1_base; /* Offset in gpe model where gpe1 events start */
  99. u8 reserved3; /* Reserved */
  100. u16 plvl2_lat; /* Worst case HW latency to enter/exit C2 state */
  101. u16 plvl3_lat; /* Worst case HW latency to enter/exit C3 state */
  102. u16 flush_size; /* Size of area read to flush caches */
  103. u16 flush_stride; /* Stride used in flushing caches */
  104. u8 duty_offset; /* Bit location of duty cycle field in p_cnt reg */
  105. u8 duty_width; /* Bit width of duty cycle field in p_cnt reg */
  106. u8 day_alrm; /* Index to day-of-month alarm in RTC CMOS RAM */
  107. u8 mon_alrm; /* Index to month-of-year alarm in RTC CMOS RAM */
  108. u8 century; /* Index to century in RTC CMOS RAM */
  109. u8 reserved4; /* Reserved */
  110. u8 reserved4a; /* Reserved */
  111. u8 reserved4b; /* Reserved */
  112. u32 wb_invd : 1; /* The wbinvd instruction works properly */
  113. u32 wb_invd_flush : 1; /* The wbinvd flushes but does not invalidate */
  114. u32 proc_c1 : 1; /* All processors support C1 state */
  115. u32 plvl2_up : 1; /* C2 state works on MP system */
  116. u32 pwr_button : 1; /* Power button is handled as a generic feature */
  117. u32 sleep_button : 1; /* Sleep button is handled as a generic feature, or not present */
  118. u32 fixed_rTC : 1; /* RTC wakeup stat not in fixed register space */
  119. u32 rtcs4 : 1; /* RTC wakeup stat not possible from S4 */
  120. u32 tmr_val_ext : 1; /* The tmr_val width is 32 bits (0 = 24 bits) */
  121. u32 reserved5 : 23; /* Reserved - must be zero */
  122. };
  123. #pragma pack()
  124. #endif /* __ACTBL1_H__ */