nv_i2c.c 4.5 KB

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  1. /*
  2. * linux/drivers/video/nvidia/nvidia-i2c.c - nVidia i2c
  3. *
  4. * Copyright 2004 Antonino A. Daplas <adaplas @pol.net>
  5. *
  6. * Based on rivafb-i2c.c
  7. *
  8. * This file is subject to the terms and conditions of the GNU General Public
  9. * License. See the file COPYING in the main directory of this archive
  10. * for more details.
  11. */
  12. #include <linux/config.h>
  13. #include <linux/module.h>
  14. #include <linux/kernel.h>
  15. #include <linux/sched.h>
  16. #include <linux/delay.h>
  17. #include <linux/pci.h>
  18. #include <linux/fb.h>
  19. #include <asm/io.h>
  20. #include "nv_type.h"
  21. #include "nv_local.h"
  22. #include "nv_proto.h"
  23. #include "../edid.h"
  24. static void nvidia_gpio_setscl(void *data, int state)
  25. {
  26. struct nvidia_i2c_chan *chan = data;
  27. struct nvidia_par *par = chan->par;
  28. u32 val;
  29. VGA_WR08(par->PCIO, 0x3d4, chan->ddc_base + 1);
  30. val = VGA_RD08(par->PCIO, 0x3d5) & 0xf0;
  31. if (state)
  32. val |= 0x20;
  33. else
  34. val &= ~0x20;
  35. VGA_WR08(par->PCIO, 0x3d4, chan->ddc_base + 1);
  36. VGA_WR08(par->PCIO, 0x3d5, val | 0x1);
  37. }
  38. static void nvidia_gpio_setsda(void *data, int state)
  39. {
  40. struct nvidia_i2c_chan *chan = (struct nvidia_i2c_chan *)data;
  41. struct nvidia_par *par = chan->par;
  42. u32 val;
  43. VGA_WR08(par->PCIO, 0x3d4, chan->ddc_base + 1);
  44. val = VGA_RD08(par->PCIO, 0x3d5) & 0xf0;
  45. if (state)
  46. val |= 0x10;
  47. else
  48. val &= ~0x10;
  49. VGA_WR08(par->PCIO, 0x3d4, chan->ddc_base + 1);
  50. VGA_WR08(par->PCIO, 0x3d5, val | 0x1);
  51. }
  52. static int nvidia_gpio_getscl(void *data)
  53. {
  54. struct nvidia_i2c_chan *chan = (struct nvidia_i2c_chan *)data;
  55. struct nvidia_par *par = chan->par;
  56. u32 val = 0;
  57. VGA_WR08(par->PCIO, 0x3d4, chan->ddc_base);
  58. if (VGA_RD08(par->PCIO, 0x3d5) & 0x04)
  59. val = 1;
  60. val = VGA_RD08(par->PCIO, 0x3d5);
  61. return val;
  62. }
  63. static int nvidia_gpio_getsda(void *data)
  64. {
  65. struct nvidia_i2c_chan *chan = (struct nvidia_i2c_chan *)data;
  66. struct nvidia_par *par = chan->par;
  67. u32 val = 0;
  68. VGA_WR08(par->PCIO, 0x3d4, chan->ddc_base);
  69. if (VGA_RD08(par->PCIO, 0x3d5) & 0x08)
  70. val = 1;
  71. return val;
  72. }
  73. #define I2C_ALGO_NVIDIA 0x0e0000
  74. static int nvidia_setup_i2c_bus(struct nvidia_i2c_chan *chan, const char *name)
  75. {
  76. int rc;
  77. strcpy(chan->adapter.name, name);
  78. chan->adapter.owner = THIS_MODULE;
  79. chan->adapter.id = I2C_ALGO_NVIDIA;
  80. chan->adapter.algo_data = &chan->algo;
  81. chan->adapter.dev.parent = &chan->par->pci_dev->dev;
  82. chan->algo.setsda = nvidia_gpio_setsda;
  83. chan->algo.setscl = nvidia_gpio_setscl;
  84. chan->algo.getsda = nvidia_gpio_getsda;
  85. chan->algo.getscl = nvidia_gpio_getscl;
  86. chan->algo.udelay = 40;
  87. chan->algo.timeout = msecs_to_jiffies(2);
  88. chan->algo.data = chan;
  89. i2c_set_adapdata(&chan->adapter, chan);
  90. /* Raise SCL and SDA */
  91. nvidia_gpio_setsda(chan, 1);
  92. nvidia_gpio_setscl(chan, 1);
  93. udelay(20);
  94. rc = i2c_bit_add_bus(&chan->adapter);
  95. if (rc == 0)
  96. dev_dbg(&chan->par->pci_dev->dev,
  97. "I2C bus %s registered.\n", name);
  98. else {
  99. dev_warn(&chan->par->pci_dev->dev,
  100. "Failed to register I2C bus %s.\n", name);
  101. chan->par = NULL;
  102. }
  103. return rc;
  104. }
  105. void nvidia_create_i2c_busses(struct nvidia_par *par)
  106. {
  107. par->bus = 3;
  108. par->chan[0].par = par;
  109. par->chan[1].par = par;
  110. par->chan[2].par = par;
  111. par->chan[0].ddc_base = 0x3e;
  112. nvidia_setup_i2c_bus(&par->chan[0], "BUS1");
  113. par->chan[1].ddc_base = 0x36;
  114. nvidia_setup_i2c_bus(&par->chan[1], "BUS2");
  115. par->chan[2].ddc_base = 0x50;
  116. nvidia_setup_i2c_bus(&par->chan[2], "BUS3");
  117. }
  118. void nvidia_delete_i2c_busses(struct nvidia_par *par)
  119. {
  120. if (par->chan[0].par)
  121. i2c_bit_del_bus(&par->chan[0].adapter);
  122. par->chan[0].par = NULL;
  123. if (par->chan[1].par)
  124. i2c_bit_del_bus(&par->chan[1].adapter);
  125. par->chan[1].par = NULL;
  126. if (par->chan[2].par)
  127. i2c_bit_del_bus(&par->chan[2].adapter);
  128. par->chan[2].par = NULL;
  129. }
  130. static u8 *nvidia_do_probe_i2c_edid(struct nvidia_i2c_chan *chan)
  131. {
  132. u8 start = 0x0;
  133. struct i2c_msg msgs[] = {
  134. {
  135. .addr = 0x50,
  136. .len = 1,
  137. .buf = &start,
  138. }, {
  139. .addr = 0x50,
  140. .flags = I2C_M_RD,
  141. .len = EDID_LENGTH,
  142. },
  143. };
  144. u8 *buf;
  145. if (!chan->par)
  146. return NULL;
  147. buf = kmalloc(EDID_LENGTH, GFP_KERNEL);
  148. if (!buf) {
  149. dev_warn(&chan->par->pci_dev->dev, "Out of memory!\n");
  150. return NULL;
  151. }
  152. msgs[1].buf = buf;
  153. if (i2c_transfer(&chan->adapter, msgs, 2) == 2)
  154. return buf;
  155. dev_dbg(&chan->par->pci_dev->dev, "Unable to read EDID block.\n");
  156. kfree(buf);
  157. return NULL;
  158. }
  159. int nvidia_probe_i2c_connector(struct nvidia_par *par, int conn, u8 **out_edid)
  160. {
  161. u8 *edid = NULL;
  162. int i;
  163. for (i = 0; i < 3; i++) {
  164. /* Do the real work */
  165. edid = nvidia_do_probe_i2c_edid(&par->chan[conn - 1]);
  166. if (edid)
  167. break;
  168. }
  169. if (out_edid)
  170. *out_edid = edid;
  171. if (!edid)
  172. return 1;
  173. return 0;
  174. }