ohci-hcd.c 26 KB

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  1. /*
  2. * OHCI HCD (Host Controller Driver) for USB.
  3. *
  4. * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
  5. * (C) Copyright 2000-2004 David Brownell <dbrownell@users.sourceforge.net>
  6. *
  7. * [ Initialisation is based on Linus' ]
  8. * [ uhci code and gregs ohci fragments ]
  9. * [ (C) Copyright 1999 Linus Torvalds ]
  10. * [ (C) Copyright 1999 Gregory P. Smith]
  11. *
  12. *
  13. * OHCI is the main "non-Intel/VIA" standard for USB 1.1 host controller
  14. * interfaces (though some non-x86 Intel chips use it). It supports
  15. * smarter hardware than UHCI. A download link for the spec available
  16. * through the http://www.usb.org website.
  17. *
  18. * History:
  19. *
  20. * 2004/03/24 LH7A404 support (Durgesh Pattamatta & Marc Singer)
  21. * 2004/02/04 use generic dma_* functions instead of pci_* (dsaxena@plexity.net)
  22. * 2003/02/24 show registers in sysfs (Kevin Brosius)
  23. *
  24. * 2002/09/03 get rid of ed hashtables, rework periodic scheduling and
  25. * bandwidth accounting; if debugging, show schedules in driverfs
  26. * 2002/07/19 fixes to management of ED and schedule state.
  27. * 2002/06/09 SA-1111 support (Christopher Hoover)
  28. * 2002/06/01 remember frame when HC won't see EDs any more; use that info
  29. * to fix urb unlink races caused by interrupt latency assumptions;
  30. * minor ED field and function naming updates
  31. * 2002/01/18 package as a patch for 2.5.3; this should match the
  32. * 2.4.17 kernel modulo some bugs being fixed.
  33. *
  34. * 2001/10/18 merge pmac cleanup (Benjamin Herrenschmidt) and bugfixes
  35. * from post-2.4.5 patches.
  36. * 2001/09/20 URB_ZERO_PACKET support; hcca_dma portability, OPTi warning
  37. * 2001/09/07 match PCI PM changes, errnos from Linus' tree
  38. * 2001/05/05 fork 2.4.5 version into "hcd" framework, cleanup, simplify;
  39. * pbook pci quirks gone (please fix pbook pci sw!) (db)
  40. *
  41. * 2001/04/08 Identify version on module load (gb)
  42. * 2001/03/24 td/ed hashing to remove bus_to_virt (Steve Longerbeam);
  43. pci_map_single (db)
  44. * 2001/03/21 td and dev/ed allocation uses new pci_pool API (db)
  45. * 2001/03/07 hcca allocation uses pci_alloc_consistent (Steve Longerbeam)
  46. *
  47. * 2000/09/26 fixed races in removing the private portion of the urb
  48. * 2000/09/07 disable bulk and control lists when unlinking the last
  49. * endpoint descriptor in order to avoid unrecoverable errors on
  50. * the Lucent chips. (rwc@sgi)
  51. * 2000/08/29 use bandwidth claiming hooks (thanks Randy!), fix some
  52. * urb unlink probs, indentation fixes
  53. * 2000/08/11 various oops fixes mostly affecting iso and cleanup from
  54. * device unplugs.
  55. * 2000/06/28 use PCI hotplug framework, for better power management
  56. * and for Cardbus support (David Brownell)
  57. * 2000/earlier: fixes for NEC/Lucent chips; suspend/resume handling
  58. * when the controller loses power; handle UE; cleanup; ...
  59. *
  60. * v5.2 1999/12/07 URB 3rd preview,
  61. * v5.1 1999/11/30 URB 2nd preview, cpia, (usb-scsi)
  62. * v5.0 1999/11/22 URB Technical preview, Paul Mackerras powerbook susp/resume
  63. * i386: HUB, Keyboard, Mouse, Printer
  64. *
  65. * v4.3 1999/10/27 multiple HCs, bulk_request
  66. * v4.2 1999/09/05 ISO API alpha, new dev alloc, neg Error-codes
  67. * v4.1 1999/08/27 Randy Dunlap's - ISO API first impl.
  68. * v4.0 1999/08/18
  69. * v3.0 1999/06/25
  70. * v2.1 1999/05/09 code clean up
  71. * v2.0 1999/05/04
  72. * v1.0 1999/04/27 initial release
  73. *
  74. * This file is licenced under the GPL.
  75. */
  76. #include <linux/config.h>
  77. #ifdef CONFIG_USB_DEBUG
  78. # define DEBUG
  79. #else
  80. # undef DEBUG
  81. #endif
  82. #include <linux/module.h>
  83. #include <linux/moduleparam.h>
  84. #include <linux/pci.h>
  85. #include <linux/kernel.h>
  86. #include <linux/delay.h>
  87. #include <linux/ioport.h>
  88. #include <linux/sched.h>
  89. #include <linux/slab.h>
  90. #include <linux/smp_lock.h>
  91. #include <linux/errno.h>
  92. #include <linux/init.h>
  93. #include <linux/timer.h>
  94. #include <linux/list.h>
  95. #include <linux/usb.h>
  96. #include <linux/usb_otg.h>
  97. #include <linux/dma-mapping.h>
  98. #include <linux/dmapool.h>
  99. #include <linux/reboot.h>
  100. #include <asm/io.h>
  101. #include <asm/irq.h>
  102. #include <asm/system.h>
  103. #include <asm/unaligned.h>
  104. #include <asm/byteorder.h>
  105. #include "../core/hcd.h"
  106. #define DRIVER_VERSION "2005 April 22"
  107. #define DRIVER_AUTHOR "Roman Weissgaerber, David Brownell"
  108. #define DRIVER_DESC "USB 1.1 'Open' Host Controller (OHCI) Driver"
  109. /*-------------------------------------------------------------------------*/
  110. // #define OHCI_VERBOSE_DEBUG /* not always helpful */
  111. /* For initializing controller (mask in an HCFS mode too) */
  112. #define OHCI_CONTROL_INIT OHCI_CTRL_CBSR
  113. #define OHCI_INTR_INIT \
  114. (OHCI_INTR_MIE | OHCI_INTR_UE | OHCI_INTR_RD | OHCI_INTR_WDH)
  115. #ifdef __hppa__
  116. /* On PA-RISC, PDC can leave IR set incorrectly; ignore it there. */
  117. #define IR_DISABLE
  118. #endif
  119. #ifdef CONFIG_ARCH_OMAP
  120. /* OMAP doesn't support IR (no SMM; not needed) */
  121. #define IR_DISABLE
  122. #endif
  123. /*-------------------------------------------------------------------------*/
  124. static const char hcd_name [] = "ohci_hcd";
  125. #include "ohci.h"
  126. static void ohci_dump (struct ohci_hcd *ohci, int verbose);
  127. static int ohci_init (struct ohci_hcd *ohci);
  128. static void ohci_stop (struct usb_hcd *hcd);
  129. static int ohci_reboot (struct notifier_block *, unsigned long , void *);
  130. #include "ohci-hub.c"
  131. #include "ohci-dbg.c"
  132. #include "ohci-mem.c"
  133. #include "ohci-q.c"
  134. /*
  135. * On architectures with edge-triggered interrupts we must never return
  136. * IRQ_NONE.
  137. */
  138. #if defined(CONFIG_SA1111) /* ... or other edge-triggered systems */
  139. #define IRQ_NOTMINE IRQ_HANDLED
  140. #else
  141. #define IRQ_NOTMINE IRQ_NONE
  142. #endif
  143. /* Some boards misreport power switching/overcurrent */
  144. static int distrust_firmware = 1;
  145. module_param (distrust_firmware, bool, 0);
  146. MODULE_PARM_DESC (distrust_firmware,
  147. "true to distrust firmware power/overcurrent setup");
  148. /* Some boards leave IR set wrongly, since they fail BIOS/SMM handshakes */
  149. static int no_handshake = 0;
  150. module_param (no_handshake, bool, 0);
  151. MODULE_PARM_DESC (no_handshake, "true (not default) disables BIOS handshake");
  152. /*-------------------------------------------------------------------------*/
  153. /*
  154. * queue up an urb for anything except the root hub
  155. */
  156. static int ohci_urb_enqueue (
  157. struct usb_hcd *hcd,
  158. struct usb_host_endpoint *ep,
  159. struct urb *urb,
  160. int mem_flags
  161. ) {
  162. struct ohci_hcd *ohci = hcd_to_ohci (hcd);
  163. struct ed *ed;
  164. urb_priv_t *urb_priv;
  165. unsigned int pipe = urb->pipe;
  166. int i, size = 0;
  167. unsigned long flags;
  168. int retval = 0;
  169. #ifdef OHCI_VERBOSE_DEBUG
  170. urb_print (urb, "SUB", usb_pipein (pipe));
  171. #endif
  172. /* every endpoint has a ed, locate and maybe (re)initialize it */
  173. if (! (ed = ed_get (ohci, ep, urb->dev, pipe, urb->interval)))
  174. return -ENOMEM;
  175. /* for the private part of the URB we need the number of TDs (size) */
  176. switch (ed->type) {
  177. case PIPE_CONTROL:
  178. /* td_submit_urb() doesn't yet handle these */
  179. if (urb->transfer_buffer_length > 4096)
  180. return -EMSGSIZE;
  181. /* 1 TD for setup, 1 for ACK, plus ... */
  182. size = 2;
  183. /* FALLTHROUGH */
  184. // case PIPE_INTERRUPT:
  185. // case PIPE_BULK:
  186. default:
  187. /* one TD for every 4096 Bytes (can be upto 8K) */
  188. size += urb->transfer_buffer_length / 4096;
  189. /* ... and for any remaining bytes ... */
  190. if ((urb->transfer_buffer_length % 4096) != 0)
  191. size++;
  192. /* ... and maybe a zero length packet to wrap it up */
  193. if (size == 0)
  194. size++;
  195. else if ((urb->transfer_flags & URB_ZERO_PACKET) != 0
  196. && (urb->transfer_buffer_length
  197. % usb_maxpacket (urb->dev, pipe,
  198. usb_pipeout (pipe))) == 0)
  199. size++;
  200. break;
  201. case PIPE_ISOCHRONOUS: /* number of packets from URB */
  202. size = urb->number_of_packets;
  203. break;
  204. }
  205. /* allocate the private part of the URB */
  206. urb_priv = kmalloc (sizeof (urb_priv_t) + size * sizeof (struct td *),
  207. mem_flags);
  208. if (!urb_priv)
  209. return -ENOMEM;
  210. memset (urb_priv, 0, sizeof (urb_priv_t) + size * sizeof (struct td *));
  211. INIT_LIST_HEAD (&urb_priv->pending);
  212. urb_priv->length = size;
  213. urb_priv->ed = ed;
  214. /* allocate the TDs (deferring hash chain updates) */
  215. for (i = 0; i < size; i++) {
  216. urb_priv->td [i] = td_alloc (ohci, mem_flags);
  217. if (!urb_priv->td [i]) {
  218. urb_priv->length = i;
  219. urb_free_priv (ohci, urb_priv);
  220. return -ENOMEM;
  221. }
  222. }
  223. spin_lock_irqsave (&ohci->lock, flags);
  224. /* don't submit to a dead HC */
  225. if (!HC_IS_RUNNING(hcd->state)) {
  226. retval = -ENODEV;
  227. goto fail;
  228. }
  229. /* in case of unlink-during-submit */
  230. spin_lock (&urb->lock);
  231. if (urb->status != -EINPROGRESS) {
  232. spin_unlock (&urb->lock);
  233. urb->hcpriv = urb_priv;
  234. finish_urb (ohci, urb, NULL);
  235. retval = 0;
  236. goto fail;
  237. }
  238. /* schedule the ed if needed */
  239. if (ed->state == ED_IDLE) {
  240. retval = ed_schedule (ohci, ed);
  241. if (retval < 0)
  242. goto fail0;
  243. if (ed->type == PIPE_ISOCHRONOUS) {
  244. u16 frame = ohci_frame_no(ohci);
  245. /* delay a few frames before the first TD */
  246. frame += max_t (u16, 8, ed->interval);
  247. frame &= ~(ed->interval - 1);
  248. frame |= ed->branch;
  249. urb->start_frame = frame;
  250. /* yes, only URB_ISO_ASAP is supported, and
  251. * urb->start_frame is never used as input.
  252. */
  253. }
  254. } else if (ed->type == PIPE_ISOCHRONOUS)
  255. urb->start_frame = ed->last_iso + ed->interval;
  256. /* fill the TDs and link them to the ed; and
  257. * enable that part of the schedule, if needed
  258. * and update count of queued periodic urbs
  259. */
  260. urb->hcpriv = urb_priv;
  261. td_submit_urb (ohci, urb);
  262. fail0:
  263. spin_unlock (&urb->lock);
  264. fail:
  265. if (retval)
  266. urb_free_priv (ohci, urb_priv);
  267. spin_unlock_irqrestore (&ohci->lock, flags);
  268. return retval;
  269. }
  270. /*
  271. * decouple the URB from the HC queues (TDs, urb_priv); it's
  272. * already marked using urb->status. reporting is always done
  273. * asynchronously, and we might be dealing with an urb that's
  274. * partially transferred, or an ED with other urbs being unlinked.
  275. */
  276. static int ohci_urb_dequeue (struct usb_hcd *hcd, struct urb *urb)
  277. {
  278. struct ohci_hcd *ohci = hcd_to_ohci (hcd);
  279. unsigned long flags;
  280. #ifdef OHCI_VERBOSE_DEBUG
  281. urb_print (urb, "UNLINK", 1);
  282. #endif
  283. spin_lock_irqsave (&ohci->lock, flags);
  284. if (HC_IS_RUNNING(hcd->state)) {
  285. urb_priv_t *urb_priv;
  286. /* Unless an IRQ completed the unlink while it was being
  287. * handed to us, flag it for unlink and giveback, and force
  288. * some upcoming INTR_SF to call finish_unlinks()
  289. */
  290. urb_priv = urb->hcpriv;
  291. if (urb_priv) {
  292. if (urb_priv->ed->state == ED_OPER)
  293. start_ed_unlink (ohci, urb_priv->ed);
  294. }
  295. } else {
  296. /*
  297. * with HC dead, we won't respect hc queue pointers
  298. * any more ... just clean up every urb's memory.
  299. */
  300. if (urb->hcpriv)
  301. finish_urb (ohci, urb, NULL);
  302. }
  303. spin_unlock_irqrestore (&ohci->lock, flags);
  304. return 0;
  305. }
  306. /*-------------------------------------------------------------------------*/
  307. /* frees config/altsetting state for endpoints,
  308. * including ED memory, dummy TD, and bulk/intr data toggle
  309. */
  310. static void
  311. ohci_endpoint_disable (struct usb_hcd *hcd, struct usb_host_endpoint *ep)
  312. {
  313. struct ohci_hcd *ohci = hcd_to_ohci (hcd);
  314. unsigned long flags;
  315. struct ed *ed = ep->hcpriv;
  316. unsigned limit = 1000;
  317. /* ASSERT: any requests/urbs are being unlinked */
  318. /* ASSERT: nobody can be submitting urbs for this any more */
  319. if (!ed)
  320. return;
  321. rescan:
  322. spin_lock_irqsave (&ohci->lock, flags);
  323. if (!HC_IS_RUNNING (hcd->state)) {
  324. sanitize:
  325. ed->state = ED_IDLE;
  326. finish_unlinks (ohci, 0, NULL);
  327. }
  328. switch (ed->state) {
  329. case ED_UNLINK: /* wait for hw to finish? */
  330. /* major IRQ delivery trouble loses INTR_SF too... */
  331. if (limit-- == 0) {
  332. ohci_warn (ohci, "IRQ INTR_SF lossage\n");
  333. goto sanitize;
  334. }
  335. spin_unlock_irqrestore (&ohci->lock, flags);
  336. set_current_state (TASK_UNINTERRUPTIBLE);
  337. schedule_timeout (1);
  338. goto rescan;
  339. case ED_IDLE: /* fully unlinked */
  340. if (list_empty (&ed->td_list)) {
  341. td_free (ohci, ed->dummy);
  342. ed_free (ohci, ed);
  343. break;
  344. }
  345. /* else FALL THROUGH */
  346. default:
  347. /* caller was supposed to have unlinked any requests;
  348. * that's not our job. can't recover; must leak ed.
  349. */
  350. ohci_err (ohci, "leak ed %p (#%02x) state %d%s\n",
  351. ed, ep->desc.bEndpointAddress, ed->state,
  352. list_empty (&ed->td_list) ? "" : " (has tds)");
  353. td_free (ohci, ed->dummy);
  354. break;
  355. }
  356. ep->hcpriv = NULL;
  357. spin_unlock_irqrestore (&ohci->lock, flags);
  358. return;
  359. }
  360. static int ohci_get_frame (struct usb_hcd *hcd)
  361. {
  362. struct ohci_hcd *ohci = hcd_to_ohci (hcd);
  363. return ohci_frame_no(ohci);
  364. }
  365. static void ohci_usb_reset (struct ohci_hcd *ohci)
  366. {
  367. ohci->hc_control = ohci_readl (ohci, &ohci->regs->control);
  368. ohci->hc_control &= OHCI_CTRL_RWC;
  369. ohci_writel (ohci, ohci->hc_control, &ohci->regs->control);
  370. }
  371. /* reboot notifier forcibly disables IRQs and DMA, helping kexec and
  372. * other cases where the next software may expect clean state from the
  373. * "firmware". this is bus-neutral, unlike shutdown() methods.
  374. */
  375. static int
  376. ohci_reboot (struct notifier_block *block, unsigned long code, void *null)
  377. {
  378. struct ohci_hcd *ohci;
  379. ohci = container_of (block, struct ohci_hcd, reboot_notifier);
  380. ohci_writel (ohci, OHCI_INTR_MIE, &ohci->regs->intrdisable);
  381. ohci_usb_reset (ohci);
  382. /* flush the writes */
  383. (void) ohci_readl (ohci, &ohci->regs->control);
  384. return 0;
  385. }
  386. /*-------------------------------------------------------------------------*
  387. * HC functions
  388. *-------------------------------------------------------------------------*/
  389. /* init memory, and kick BIOS/SMM off */
  390. static int ohci_init (struct ohci_hcd *ohci)
  391. {
  392. int ret;
  393. disable (ohci);
  394. ohci->regs = ohci_to_hcd(ohci)->regs;
  395. ohci->next_statechange = jiffies;
  396. #ifndef IR_DISABLE
  397. /* SMM owns the HC? not for long! */
  398. if (!no_handshake && ohci_readl (ohci,
  399. &ohci->regs->control) & OHCI_CTRL_IR) {
  400. u32 temp;
  401. ohci_dbg (ohci, "USB HC TakeOver from BIOS/SMM\n");
  402. /* this timeout is arbitrary. we make it long, so systems
  403. * depending on usb keyboards may be usable even if the
  404. * BIOS/SMM code seems pretty broken.
  405. */
  406. temp = 500; /* arbitrary: five seconds */
  407. ohci_writel (ohci, OHCI_INTR_OC, &ohci->regs->intrenable);
  408. ohci_writel (ohci, OHCI_OCR, &ohci->regs->cmdstatus);
  409. while (ohci_readl (ohci, &ohci->regs->control) & OHCI_CTRL_IR) {
  410. msleep (10);
  411. if (--temp == 0) {
  412. ohci_err (ohci, "USB HC takeover failed!"
  413. " (BIOS/SMM bug)\n");
  414. return -EBUSY;
  415. }
  416. }
  417. ohci_usb_reset (ohci);
  418. }
  419. #endif
  420. /* Disable HC interrupts */
  421. ohci_writel (ohci, OHCI_INTR_MIE, &ohci->regs->intrdisable);
  422. // flush the writes
  423. (void) ohci_readl (ohci, &ohci->regs->control);
  424. if (ohci->hcca)
  425. return 0;
  426. ohci->hcca = dma_alloc_coherent (ohci_to_hcd(ohci)->self.controller,
  427. sizeof *ohci->hcca, &ohci->hcca_dma, 0);
  428. if (!ohci->hcca)
  429. return -ENOMEM;
  430. if ((ret = ohci_mem_init (ohci)) < 0)
  431. ohci_stop (ohci_to_hcd(ohci));
  432. return ret;
  433. }
  434. /*-------------------------------------------------------------------------*/
  435. /* Start an OHCI controller, set the BUS operational
  436. * resets USB and controller
  437. * enable interrupts
  438. */
  439. static int ohci_run (struct ohci_hcd *ohci)
  440. {
  441. u32 mask, temp;
  442. int first = ohci->fminterval == 0;
  443. disable (ohci);
  444. /* boot firmware should have set this up (5.1.1.3.1) */
  445. if (first) {
  446. temp = ohci_readl (ohci, &ohci->regs->fminterval);
  447. ohci->fminterval = temp & 0x3fff;
  448. if (ohci->fminterval != FI)
  449. ohci_dbg (ohci, "fminterval delta %d\n",
  450. ohci->fminterval - FI);
  451. ohci->fminterval |= FSMP (ohci->fminterval) << 16;
  452. /* also: power/overcurrent flags in roothub.a */
  453. }
  454. /* Reset USB nearly "by the book". RemoteWakeupConnected
  455. * saved if boot firmware (BIOS/SMM/...) told us it's connected
  456. * (for OHCI integrated on mainboard, it normally is)
  457. */
  458. ohci->hc_control = ohci_readl (ohci, &ohci->regs->control);
  459. ohci_dbg (ohci, "resetting from state '%s', control = 0x%x\n",
  460. hcfs2string (ohci->hc_control & OHCI_CTRL_HCFS),
  461. ohci->hc_control);
  462. if (ohci->hc_control & OHCI_CTRL_RWC
  463. && !(ohci->flags & OHCI_QUIRK_AMD756))
  464. ohci_to_hcd(ohci)->can_wakeup = 1;
  465. switch (ohci->hc_control & OHCI_CTRL_HCFS) {
  466. case OHCI_USB_OPER:
  467. temp = 0;
  468. break;
  469. case OHCI_USB_SUSPEND:
  470. case OHCI_USB_RESUME:
  471. ohci->hc_control &= OHCI_CTRL_RWC;
  472. ohci->hc_control |= OHCI_USB_RESUME;
  473. temp = 10 /* msec wait */;
  474. break;
  475. // case OHCI_USB_RESET:
  476. default:
  477. ohci->hc_control &= OHCI_CTRL_RWC;
  478. ohci->hc_control |= OHCI_USB_RESET;
  479. temp = 50 /* msec wait */;
  480. break;
  481. }
  482. ohci_writel (ohci, ohci->hc_control, &ohci->regs->control);
  483. // flush the writes
  484. (void) ohci_readl (ohci, &ohci->regs->control);
  485. msleep(temp);
  486. temp = roothub_a (ohci);
  487. if (!(temp & RH_A_NPS)) {
  488. unsigned ports = temp & RH_A_NDP;
  489. /* power down each port */
  490. for (temp = 0; temp < ports; temp++)
  491. ohci_writel (ohci, RH_PS_LSDA,
  492. &ohci->regs->roothub.portstatus [temp]);
  493. }
  494. // flush those writes
  495. (void) ohci_readl (ohci, &ohci->regs->control);
  496. memset (ohci->hcca, 0, sizeof (struct ohci_hcca));
  497. /* 2msec timelimit here means no irqs/preempt */
  498. spin_lock_irq (&ohci->lock);
  499. retry:
  500. /* HC Reset requires max 10 us delay */
  501. ohci_writel (ohci, OHCI_HCR, &ohci->regs->cmdstatus);
  502. temp = 30; /* ... allow extra time */
  503. while ((ohci_readl (ohci, &ohci->regs->cmdstatus) & OHCI_HCR) != 0) {
  504. if (--temp == 0) {
  505. spin_unlock_irq (&ohci->lock);
  506. ohci_err (ohci, "USB HC reset timed out!\n");
  507. return -1;
  508. }
  509. udelay (1);
  510. }
  511. /* now we're in the SUSPEND state ... must go OPERATIONAL
  512. * within 2msec else HC enters RESUME
  513. *
  514. * ... but some hardware won't init fmInterval "by the book"
  515. * (SiS, OPTi ...), so reset again instead. SiS doesn't need
  516. * this if we write fmInterval after we're OPERATIONAL.
  517. * Unclear about ALi, ServerWorks, and others ... this could
  518. * easily be a longstanding bug in chip init on Linux.
  519. */
  520. if (ohci->flags & OHCI_QUIRK_INITRESET) {
  521. ohci_writel (ohci, ohci->hc_control, &ohci->regs->control);
  522. // flush those writes
  523. (void) ohci_readl (ohci, &ohci->regs->control);
  524. }
  525. /* Tell the controller where the control and bulk lists are
  526. * The lists are empty now. */
  527. ohci_writel (ohci, 0, &ohci->regs->ed_controlhead);
  528. ohci_writel (ohci, 0, &ohci->regs->ed_bulkhead);
  529. /* a reset clears this */
  530. ohci_writel (ohci, (u32) ohci->hcca_dma, &ohci->regs->hcca);
  531. periodic_reinit (ohci);
  532. /* some OHCI implementations are finicky about how they init.
  533. * bogus values here mean not even enumeration could work.
  534. */
  535. if ((ohci_readl (ohci, &ohci->regs->fminterval) & 0x3fff0000) == 0
  536. || !ohci_readl (ohci, &ohci->regs->periodicstart)) {
  537. if (!(ohci->flags & OHCI_QUIRK_INITRESET)) {
  538. ohci->flags |= OHCI_QUIRK_INITRESET;
  539. ohci_dbg (ohci, "enabling initreset quirk\n");
  540. goto retry;
  541. }
  542. spin_unlock_irq (&ohci->lock);
  543. ohci_err (ohci, "init err (%08x %04x)\n",
  544. ohci_readl (ohci, &ohci->regs->fminterval),
  545. ohci_readl (ohci, &ohci->regs->periodicstart));
  546. return -EOVERFLOW;
  547. }
  548. /* start controller operations */
  549. ohci->hc_control &= OHCI_CTRL_RWC;
  550. ohci->hc_control |= OHCI_CONTROL_INIT | OHCI_USB_OPER;
  551. ohci_writel (ohci, ohci->hc_control, &ohci->regs->control);
  552. ohci_to_hcd(ohci)->state = HC_STATE_RUNNING;
  553. /* wake on ConnectStatusChange, matching external hubs */
  554. ohci_writel (ohci, RH_HS_DRWE, &ohci->regs->roothub.status);
  555. /* Choose the interrupts we care about now, others later on demand */
  556. mask = OHCI_INTR_INIT;
  557. ohci_writel (ohci, mask, &ohci->regs->intrstatus);
  558. ohci_writel (ohci, mask, &ohci->regs->intrenable);
  559. /* handle root hub init quirks ... */
  560. temp = roothub_a (ohci);
  561. temp &= ~(RH_A_PSM | RH_A_OCPM);
  562. if (ohci->flags & OHCI_QUIRK_SUPERIO) {
  563. /* NSC 87560 and maybe others */
  564. temp |= RH_A_NOCP;
  565. temp &= ~(RH_A_POTPGT | RH_A_NPS);
  566. ohci_writel (ohci, temp, &ohci->regs->roothub.a);
  567. } else if ((ohci->flags & OHCI_QUIRK_AMD756) || distrust_firmware) {
  568. /* hub power always on; required for AMD-756 and some
  569. * Mac platforms. ganged overcurrent reporting, if any.
  570. */
  571. temp |= RH_A_NPS;
  572. ohci_writel (ohci, temp, &ohci->regs->roothub.a);
  573. }
  574. ohci_writel (ohci, RH_HS_LPSC, &ohci->regs->roothub.status);
  575. ohci_writel (ohci, (temp & RH_A_NPS) ? 0 : RH_B_PPCM,
  576. &ohci->regs->roothub.b);
  577. // flush those writes
  578. (void) ohci_readl (ohci, &ohci->regs->control);
  579. spin_unlock_irq (&ohci->lock);
  580. // POTPGT delay is bits 24-31, in 2 ms units.
  581. mdelay ((temp >> 23) & 0x1fe);
  582. ohci_to_hcd(ohci)->state = HC_STATE_RUNNING;
  583. ohci_dump (ohci, 1);
  584. if (ohci_to_hcd(ohci)->self.root_hub == NULL)
  585. create_debug_files (ohci);
  586. return 0;
  587. }
  588. /*-------------------------------------------------------------------------*/
  589. /* an interrupt happens */
  590. static irqreturn_t ohci_irq (struct usb_hcd *hcd, struct pt_regs *ptregs)
  591. {
  592. struct ohci_hcd *ohci = hcd_to_ohci (hcd);
  593. struct ohci_regs __iomem *regs = ohci->regs;
  594. int ints;
  595. /* we can eliminate a (slow) ohci_readl()
  596. if _only_ WDH caused this irq */
  597. if ((ohci->hcca->done_head != 0)
  598. && ! (hc32_to_cpup (ohci, &ohci->hcca->done_head)
  599. & 0x01)) {
  600. ints = OHCI_INTR_WDH;
  601. /* cardbus/... hardware gone before remove() */
  602. } else if ((ints = ohci_readl (ohci, &regs->intrstatus)) == ~(u32)0) {
  603. disable (ohci);
  604. ohci_dbg (ohci, "device removed!\n");
  605. return IRQ_HANDLED;
  606. /* interrupt for some other device? */
  607. } else if ((ints &= ohci_readl (ohci, &regs->intrenable)) == 0) {
  608. return IRQ_NOTMINE;
  609. }
  610. if (ints & OHCI_INTR_UE) {
  611. disable (ohci);
  612. ohci_err (ohci, "OHCI Unrecoverable Error, disabled\n");
  613. // e.g. due to PCI Master/Target Abort
  614. ohci_dump (ohci, 1);
  615. ohci_usb_reset (ohci);
  616. }
  617. if (ints & OHCI_INTR_RD) {
  618. ohci_vdbg (ohci, "resume detect\n");
  619. if (hcd->state != HC_STATE_QUIESCING)
  620. schedule_work(&ohci->rh_resume);
  621. }
  622. if (ints & OHCI_INTR_WDH) {
  623. if (HC_IS_RUNNING(hcd->state))
  624. ohci_writel (ohci, OHCI_INTR_WDH, &regs->intrdisable);
  625. spin_lock (&ohci->lock);
  626. dl_done_list (ohci, ptregs);
  627. spin_unlock (&ohci->lock);
  628. if (HC_IS_RUNNING(hcd->state))
  629. ohci_writel (ohci, OHCI_INTR_WDH, &regs->intrenable);
  630. }
  631. /* could track INTR_SO to reduce available PCI/... bandwidth */
  632. /* handle any pending URB/ED unlinks, leaving INTR_SF enabled
  633. * when there's still unlinking to be done (next frame).
  634. */
  635. spin_lock (&ohci->lock);
  636. if (ohci->ed_rm_list)
  637. finish_unlinks (ohci, ohci_frame_no(ohci), ptregs);
  638. if ((ints & OHCI_INTR_SF) != 0 && !ohci->ed_rm_list
  639. && HC_IS_RUNNING(hcd->state))
  640. ohci_writel (ohci, OHCI_INTR_SF, &regs->intrdisable);
  641. spin_unlock (&ohci->lock);
  642. if (HC_IS_RUNNING(hcd->state)) {
  643. ohci_writel (ohci, ints, &regs->intrstatus);
  644. ohci_writel (ohci, OHCI_INTR_MIE, &regs->intrenable);
  645. // flush those writes
  646. (void) ohci_readl (ohci, &ohci->regs->control);
  647. }
  648. return IRQ_HANDLED;
  649. }
  650. /*-------------------------------------------------------------------------*/
  651. static void ohci_stop (struct usb_hcd *hcd)
  652. {
  653. struct ohci_hcd *ohci = hcd_to_ohci (hcd);
  654. ohci_dbg (ohci, "stop %s controller (state 0x%02x)\n",
  655. hcfs2string (ohci->hc_control & OHCI_CTRL_HCFS),
  656. hcd->state);
  657. ohci_dump (ohci, 1);
  658. flush_scheduled_work();
  659. ohci_usb_reset (ohci);
  660. ohci_writel (ohci, OHCI_INTR_MIE, &ohci->regs->intrdisable);
  661. remove_debug_files (ohci);
  662. unregister_reboot_notifier (&ohci->reboot_notifier);
  663. ohci_mem_cleanup (ohci);
  664. if (ohci->hcca) {
  665. dma_free_coherent (hcd->self.controller,
  666. sizeof *ohci->hcca,
  667. ohci->hcca, ohci->hcca_dma);
  668. ohci->hcca = NULL;
  669. ohci->hcca_dma = 0;
  670. }
  671. }
  672. /*-------------------------------------------------------------------------*/
  673. /* must not be called from interrupt context */
  674. #if defined(CONFIG_USB_SUSPEND) || defined(CONFIG_PM)
  675. static int ohci_restart (struct ohci_hcd *ohci)
  676. {
  677. int temp;
  678. int i;
  679. struct urb_priv *priv;
  680. struct usb_device *root = ohci_to_hcd(ohci)->self.root_hub;
  681. /* mark any devices gone, so they do nothing till khubd disconnects.
  682. * recycle any "live" eds/tds (and urbs) right away.
  683. * later, khubd disconnect processing will recycle the other state,
  684. * (either as disconnect/reconnect, or maybe someday as a reset).
  685. */
  686. spin_lock_irq(&ohci->lock);
  687. disable (ohci);
  688. for (i = 0; i < root->maxchild; i++) {
  689. if (root->children [i])
  690. usb_set_device_state (root->children[i],
  691. USB_STATE_NOTATTACHED);
  692. }
  693. if (!list_empty (&ohci->pending))
  694. ohci_dbg(ohci, "abort schedule...\n");
  695. list_for_each_entry (priv, &ohci->pending, pending) {
  696. struct urb *urb = priv->td[0]->urb;
  697. struct ed *ed = priv->ed;
  698. switch (ed->state) {
  699. case ED_OPER:
  700. ed->state = ED_UNLINK;
  701. ed->hwINFO |= cpu_to_hc32(ohci, ED_DEQUEUE);
  702. ed_deschedule (ohci, ed);
  703. ed->ed_next = ohci->ed_rm_list;
  704. ed->ed_prev = NULL;
  705. ohci->ed_rm_list = ed;
  706. /* FALLTHROUGH */
  707. case ED_UNLINK:
  708. break;
  709. default:
  710. ohci_dbg(ohci, "bogus ed %p state %d\n",
  711. ed, ed->state);
  712. }
  713. spin_lock (&urb->lock);
  714. urb->status = -ESHUTDOWN;
  715. spin_unlock (&urb->lock);
  716. }
  717. finish_unlinks (ohci, 0, NULL);
  718. spin_unlock_irq(&ohci->lock);
  719. /* paranoia, in case that didn't work: */
  720. /* empty the interrupt branches */
  721. for (i = 0; i < NUM_INTS; i++) ohci->load [i] = 0;
  722. for (i = 0; i < NUM_INTS; i++) ohci->hcca->int_table [i] = 0;
  723. /* no EDs to remove */
  724. ohci->ed_rm_list = NULL;
  725. /* empty control and bulk lists */
  726. ohci->ed_controltail = NULL;
  727. ohci->ed_bulktail = NULL;
  728. if ((temp = ohci_run (ohci)) < 0) {
  729. ohci_err (ohci, "can't restart, %d\n", temp);
  730. return temp;
  731. } else {
  732. /* here we "know" root ports should always stay powered,
  733. * and that if we try to turn them back on the root hub
  734. * will respond to CSC processing.
  735. */
  736. i = roothub_a (ohci) & RH_A_NDP;
  737. while (i--)
  738. ohci_writel (ohci, RH_PS_PSS,
  739. &ohci->regs->roothub.portstatus [temp]);
  740. ohci_dbg (ohci, "restart complete\n");
  741. }
  742. return 0;
  743. }
  744. #endif
  745. /*-------------------------------------------------------------------------*/
  746. #define DRIVER_INFO DRIVER_VERSION " " DRIVER_DESC
  747. MODULE_AUTHOR (DRIVER_AUTHOR);
  748. MODULE_DESCRIPTION (DRIVER_INFO);
  749. MODULE_LICENSE ("GPL");
  750. #ifdef CONFIG_PCI
  751. #include "ohci-pci.c"
  752. #endif
  753. #ifdef CONFIG_SA1111
  754. #include "ohci-sa1111.c"
  755. #endif
  756. #ifdef CONFIG_ARCH_OMAP
  757. #include "ohci-omap.c"
  758. #endif
  759. #ifdef CONFIG_ARCH_LH7A404
  760. #include "ohci-lh7a404.c"
  761. #endif
  762. #ifdef CONFIG_PXA27x
  763. #include "ohci-pxa27x.c"
  764. #endif
  765. #ifdef CONFIG_SOC_AU1X00
  766. #include "ohci-au1xxx.c"
  767. #endif
  768. #ifdef CONFIG_USB_OHCI_HCD_PPC_SOC
  769. #include "ohci-ppc-soc.c"
  770. #endif
  771. #if !(defined(CONFIG_PCI) \
  772. || defined(CONFIG_SA1111) \
  773. || defined(CONFIG_ARCH_OMAP) \
  774. || defined (CONFIG_ARCH_LH7A404) \
  775. || defined (CONFIG_PXA27x) \
  776. || defined (CONFIG_SOC_AU1X00) \
  777. || defined (CONFIG_USB_OHCI_HCD_PPC_SOC) \
  778. )
  779. #error "missing bus glue for ohci-hcd"
  780. #endif