nsp32.c 92 KB

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  1. /*
  2. * NinjaSCSI-32Bi Cardbus, NinjaSCSI-32UDE PCI/CardBus SCSI driver
  3. * Copyright (C) 2001, 2002, 2003
  4. * YOKOTA Hiroshi <yokota@netlab.is.tsukuba.ac.jp>
  5. * GOTO Masanori <gotom@debian.or.jp>, <gotom@debian.org>
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published by
  9. * the Free Software Foundation; either version 2, or (at your option)
  10. * any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. *
  18. * Revision History:
  19. * 1.0: Initial Release.
  20. * 1.1: Add /proc SDTR status.
  21. * Remove obsolete error handler nsp32_reset.
  22. * Some clean up.
  23. * 1.2: PowerPC (big endian) support.
  24. */
  25. #include <linux/version.h>
  26. #include <linux/module.h>
  27. #include <linux/init.h>
  28. #include <linux/kernel.h>
  29. #include <linux/sched.h>
  30. #include <linux/slab.h>
  31. #include <linux/string.h>
  32. #include <linux/timer.h>
  33. #include <linux/ioport.h>
  34. #include <linux/major.h>
  35. #include <linux/blkdev.h>
  36. #include <linux/interrupt.h>
  37. #include <linux/pci.h>
  38. #include <linux/delay.h>
  39. #include <linux/ctype.h>
  40. #include <asm/dma.h>
  41. #include <asm/system.h>
  42. #include <asm/io.h>
  43. #include <scsi/scsi.h>
  44. #include <scsi/scsi_cmnd.h>
  45. #include <scsi/scsi_device.h>
  46. #include <scsi/scsi_host.h>
  47. #include <scsi/scsi_ioctl.h>
  48. #if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0))
  49. # include <linux/blk.h>
  50. #endif
  51. #include "nsp32.h"
  52. /***********************************************************************
  53. * Module parameters
  54. */
  55. static int trans_mode = 0; /* default: BIOS */
  56. module_param (trans_mode, int, 0);
  57. MODULE_PARM_DESC(trans_mode, "transfer mode (0: BIOS(default) 1: Async 2: Ultra20M");
  58. #define ASYNC_MODE 1
  59. #define ULTRA20M_MODE 2
  60. static int auto_param = 0; /* default: ON */
  61. module_param (auto_param, bool, 0);
  62. MODULE_PARM_DESC(auto_param, "AutoParameter mode (0: ON(default) 1: OFF)");
  63. static int disc_priv = 1; /* default: OFF */
  64. module_param (disc_priv, bool, 0);
  65. MODULE_PARM_DESC(disc_priv, "disconnection privilege mode (0: ON 1: OFF(default))");
  66. MODULE_AUTHOR("YOKOTA Hiroshi <yokota@netlab.is.tsukuba.ac.jp>, GOTO Masanori <gotom@debian.or.jp>");
  67. MODULE_DESCRIPTION("Workbit NinjaSCSI-32Bi/UDE CardBus/PCI SCSI host bus adapter module");
  68. MODULE_LICENSE("GPL");
  69. static const char *nsp32_release_version = "1.2";
  70. /****************************************************************************
  71. * Supported hardware
  72. */
  73. static struct pci_device_id nsp32_pci_table[] __devinitdata = {
  74. {
  75. .vendor = PCI_VENDOR_ID_IODATA,
  76. .device = PCI_DEVICE_ID_NINJASCSI_32BI_CBSC_II,
  77. .subvendor = PCI_ANY_ID,
  78. .subdevice = PCI_ANY_ID,
  79. .driver_data = MODEL_IODATA,
  80. },
  81. {
  82. .vendor = PCI_VENDOR_ID_WORKBIT,
  83. .device = PCI_DEVICE_ID_NINJASCSI_32BI_KME,
  84. .subvendor = PCI_ANY_ID,
  85. .subdevice = PCI_ANY_ID,
  86. .driver_data = MODEL_KME,
  87. },
  88. {
  89. .vendor = PCI_VENDOR_ID_WORKBIT,
  90. .device = PCI_DEVICE_ID_NINJASCSI_32BI_WBT,
  91. .subvendor = PCI_ANY_ID,
  92. .subdevice = PCI_ANY_ID,
  93. .driver_data = MODEL_WORKBIT,
  94. },
  95. {
  96. .vendor = PCI_VENDOR_ID_WORKBIT,
  97. .device = PCI_DEVICE_ID_WORKBIT_STANDARD,
  98. .subvendor = PCI_ANY_ID,
  99. .subdevice = PCI_ANY_ID,
  100. .driver_data = MODEL_PCI_WORKBIT,
  101. },
  102. {
  103. .vendor = PCI_VENDOR_ID_WORKBIT,
  104. .device = PCI_DEVICE_ID_NINJASCSI_32BI_LOGITEC,
  105. .subvendor = PCI_ANY_ID,
  106. .subdevice = PCI_ANY_ID,
  107. .driver_data = MODEL_LOGITEC,
  108. },
  109. {
  110. .vendor = PCI_VENDOR_ID_WORKBIT,
  111. .device = PCI_DEVICE_ID_NINJASCSI_32BIB_LOGITEC,
  112. .subvendor = PCI_ANY_ID,
  113. .subdevice = PCI_ANY_ID,
  114. .driver_data = MODEL_PCI_LOGITEC,
  115. },
  116. {
  117. .vendor = PCI_VENDOR_ID_WORKBIT,
  118. .device = PCI_DEVICE_ID_NINJASCSI_32UDE_MELCO,
  119. .subvendor = PCI_ANY_ID,
  120. .subdevice = PCI_ANY_ID,
  121. .driver_data = MODEL_PCI_MELCO,
  122. },
  123. {
  124. .vendor = PCI_VENDOR_ID_WORKBIT,
  125. .device = PCI_DEVICE_ID_NINJASCSI_32UDE_MELCO_II,
  126. .subvendor = PCI_ANY_ID,
  127. .subdevice = PCI_ANY_ID,
  128. .driver_data = MODEL_PCI_MELCO,
  129. },
  130. {0,0,},
  131. };
  132. MODULE_DEVICE_TABLE(pci, nsp32_pci_table);
  133. static nsp32_hw_data nsp32_data_base; /* probe <-> detect glue */
  134. /*
  135. * Period/AckWidth speed conversion table
  136. *
  137. * Note: This period/ackwidth speed table must be in descending order.
  138. */
  139. static nsp32_sync_table nsp32_sync_table_40M[] = {
  140. /* {PNo, AW, SP, EP, SREQ smpl} Speed(MB/s) Period AckWidth */
  141. {0x1, 0, 0x0c, 0x0c, SMPL_40M}, /* 20.0 : 50ns, 25ns */
  142. {0x2, 0, 0x0d, 0x18, SMPL_40M}, /* 13.3 : 75ns, 25ns */
  143. {0x3, 1, 0x19, 0x19, SMPL_40M}, /* 10.0 : 100ns, 50ns */
  144. {0x4, 1, 0x1a, 0x1f, SMPL_20M}, /* 8.0 : 125ns, 50ns */
  145. {0x5, 2, 0x20, 0x25, SMPL_20M}, /* 6.7 : 150ns, 75ns */
  146. {0x6, 2, 0x26, 0x31, SMPL_20M}, /* 5.7 : 175ns, 75ns */
  147. {0x7, 3, 0x32, 0x32, SMPL_20M}, /* 5.0 : 200ns, 100ns */
  148. {0x8, 3, 0x33, 0x38, SMPL_10M}, /* 4.4 : 225ns, 100ns */
  149. {0x9, 3, 0x39, 0x3e, SMPL_10M}, /* 4.0 : 250ns, 100ns */
  150. };
  151. static nsp32_sync_table nsp32_sync_table_20M[] = {
  152. {0x1, 0, 0x19, 0x19, SMPL_40M}, /* 10.0 : 100ns, 50ns */
  153. {0x2, 0, 0x1a, 0x25, SMPL_20M}, /* 6.7 : 150ns, 50ns */
  154. {0x3, 1, 0x26, 0x32, SMPL_20M}, /* 5.0 : 200ns, 100ns */
  155. {0x4, 1, 0x33, 0x3e, SMPL_10M}, /* 4.0 : 250ns, 100ns */
  156. {0x5, 2, 0x3f, 0x4b, SMPL_10M}, /* 3.3 : 300ns, 150ns */
  157. {0x6, 2, 0x4c, 0x57, SMPL_10M}, /* 2.8 : 350ns, 150ns */
  158. {0x7, 3, 0x58, 0x64, SMPL_10M}, /* 2.5 : 400ns, 200ns */
  159. {0x8, 3, 0x65, 0x70, SMPL_10M}, /* 2.2 : 450ns, 200ns */
  160. {0x9, 3, 0x71, 0x7d, SMPL_10M}, /* 2.0 : 500ns, 200ns */
  161. };
  162. static nsp32_sync_table nsp32_sync_table_pci[] = {
  163. {0x1, 0, 0x0c, 0x0f, SMPL_40M}, /* 16.6 : 60ns, 30ns */
  164. {0x2, 0, 0x10, 0x16, SMPL_40M}, /* 11.1 : 90ns, 30ns */
  165. {0x3, 1, 0x17, 0x1e, SMPL_20M}, /* 8.3 : 120ns, 60ns */
  166. {0x4, 1, 0x1f, 0x25, SMPL_20M}, /* 6.7 : 150ns, 60ns */
  167. {0x5, 2, 0x26, 0x2d, SMPL_20M}, /* 5.6 : 180ns, 90ns */
  168. {0x6, 2, 0x2e, 0x34, SMPL_10M}, /* 4.8 : 210ns, 90ns */
  169. {0x7, 3, 0x35, 0x3c, SMPL_10M}, /* 4.2 : 240ns, 120ns */
  170. {0x8, 3, 0x3d, 0x43, SMPL_10M}, /* 3.7 : 270ns, 120ns */
  171. {0x9, 3, 0x44, 0x4b, SMPL_10M}, /* 3.3 : 300ns, 120ns */
  172. };
  173. /*
  174. * function declaration
  175. */
  176. /* module entry point */
  177. static int __devinit nsp32_probe (struct pci_dev *, const struct pci_device_id *);
  178. static void __devexit nsp32_remove(struct pci_dev *);
  179. static int __init init_nsp32 (void);
  180. static void __exit exit_nsp32 (void);
  181. /* struct Scsi_Host_Template */
  182. #if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,73))
  183. static int nsp32_proc_info (struct Scsi_Host *, char *, char **, off_t, int, int);
  184. #else
  185. static int nsp32_proc_info (char *, char **, off_t, int, int, int);
  186. #endif
  187. #if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,73))
  188. static int nsp32_detect (struct pci_dev *pdev);
  189. #else
  190. static int nsp32_detect (Scsi_Host_Template *);
  191. #endif
  192. static int nsp32_queuecommand(struct scsi_cmnd *,
  193. void (*done)(struct scsi_cmnd *));
  194. static const char *nsp32_info (struct Scsi_Host *);
  195. static int nsp32_release (struct Scsi_Host *);
  196. /* SCSI error handler */
  197. static int nsp32_eh_abort (struct scsi_cmnd *);
  198. static int nsp32_eh_bus_reset (struct scsi_cmnd *);
  199. static int nsp32_eh_host_reset(struct scsi_cmnd *);
  200. /* generate SCSI message */
  201. static void nsp32_build_identify(struct scsi_cmnd *);
  202. static void nsp32_build_nop (struct scsi_cmnd *);
  203. static void nsp32_build_reject (struct scsi_cmnd *);
  204. static void nsp32_build_sdtr (struct scsi_cmnd *, unsigned char, unsigned char);
  205. /* SCSI message handler */
  206. static int nsp32_busfree_occur(struct scsi_cmnd *, unsigned short);
  207. static void nsp32_msgout_occur (struct scsi_cmnd *);
  208. static void nsp32_msgin_occur (struct scsi_cmnd *, unsigned long, unsigned short);
  209. static int nsp32_setup_sg_table (struct scsi_cmnd *);
  210. static int nsp32_selection_autopara(struct scsi_cmnd *);
  211. static int nsp32_selection_autoscsi(struct scsi_cmnd *);
  212. static void nsp32_scsi_done (struct scsi_cmnd *);
  213. static int nsp32_arbitration (struct scsi_cmnd *, unsigned int);
  214. static int nsp32_reselection (struct scsi_cmnd *, unsigned char);
  215. static void nsp32_adjust_busfree (struct scsi_cmnd *, unsigned int);
  216. static void nsp32_restart_autoscsi (struct scsi_cmnd *, unsigned short);
  217. /* SCSI SDTR */
  218. static void nsp32_analyze_sdtr (struct scsi_cmnd *);
  219. static int nsp32_search_period_entry(nsp32_hw_data *, nsp32_target *, unsigned char);
  220. static void nsp32_set_async (nsp32_hw_data *, nsp32_target *);
  221. static void nsp32_set_max_sync (nsp32_hw_data *, nsp32_target *, unsigned char *, unsigned char *);
  222. static void nsp32_set_sync_entry (nsp32_hw_data *, nsp32_target *, int, unsigned char);
  223. /* SCSI bus status handler */
  224. static void nsp32_wait_req (nsp32_hw_data *, int);
  225. static void nsp32_wait_sack (nsp32_hw_data *, int);
  226. static void nsp32_sack_assert (nsp32_hw_data *);
  227. static void nsp32_sack_negate (nsp32_hw_data *);
  228. static void nsp32_do_bus_reset(nsp32_hw_data *);
  229. /* hardware interrupt handler */
  230. static irqreturn_t do_nsp32_isr(int, void *, struct pt_regs *);
  231. /* initialize hardware */
  232. static int nsp32hw_init(nsp32_hw_data *);
  233. /* EEPROM handler */
  234. static int nsp32_getprom_param (nsp32_hw_data *);
  235. static int nsp32_getprom_at24 (nsp32_hw_data *);
  236. static int nsp32_getprom_c16 (nsp32_hw_data *);
  237. static void nsp32_prom_start (nsp32_hw_data *);
  238. static void nsp32_prom_stop (nsp32_hw_data *);
  239. static int nsp32_prom_read (nsp32_hw_data *, int);
  240. static int nsp32_prom_read_bit (nsp32_hw_data *);
  241. static void nsp32_prom_write_bit(nsp32_hw_data *, int);
  242. static void nsp32_prom_set (nsp32_hw_data *, int, int);
  243. static int nsp32_prom_get (nsp32_hw_data *, int);
  244. /* debug/warning/info message */
  245. static void nsp32_message (const char *, int, char *, char *, ...);
  246. #ifdef NSP32_DEBUG
  247. static void nsp32_dmessage(const char *, int, int, char *, ...);
  248. #endif
  249. /*
  250. * max_sectors is currently limited up to 128.
  251. */
  252. static struct scsi_host_template nsp32_template = {
  253. .proc_name = "nsp32",
  254. .name = "Workbit NinjaSCSI-32Bi/UDE",
  255. .proc_info = nsp32_proc_info,
  256. .info = nsp32_info,
  257. .queuecommand = nsp32_queuecommand,
  258. .can_queue = 1,
  259. .sg_tablesize = NSP32_SG_SIZE,
  260. .max_sectors = 128,
  261. .cmd_per_lun = 1,
  262. .this_id = NSP32_HOST_SCSIID,
  263. .use_clustering = DISABLE_CLUSTERING,
  264. .eh_abort_handler = nsp32_eh_abort,
  265. .eh_bus_reset_handler = nsp32_eh_bus_reset,
  266. .eh_host_reset_handler = nsp32_eh_host_reset,
  267. #if (LINUX_VERSION_CODE < KERNEL_VERSION(2,5,74))
  268. .detect = nsp32_detect,
  269. .release = nsp32_release,
  270. #endif
  271. #if (LINUX_VERSION_CODE < KERNEL_VERSION(2,5,2))
  272. .use_new_eh_code = 1,
  273. #else
  274. /* .highmem_io = 1, */
  275. #endif
  276. };
  277. #include "nsp32_io.h"
  278. /***********************************************************************
  279. * debug, error print
  280. */
  281. #ifndef NSP32_DEBUG
  282. # define NSP32_DEBUG_MASK 0x000000
  283. # define nsp32_msg(type, args...) nsp32_message ("", 0, (type), args)
  284. # define nsp32_dbg(mask, args...) /* */
  285. #else
  286. # define NSP32_DEBUG_MASK 0xffffff
  287. # define nsp32_msg(type, args...) \
  288. nsp32_message (__FUNCTION__, __LINE__, (type), args)
  289. # define nsp32_dbg(mask, args...) \
  290. nsp32_dmessage(__FUNCTION__, __LINE__, (mask), args)
  291. #endif
  292. #define NSP32_DEBUG_QUEUECOMMAND BIT(0)
  293. #define NSP32_DEBUG_REGISTER BIT(1)
  294. #define NSP32_DEBUG_AUTOSCSI BIT(2)
  295. #define NSP32_DEBUG_INTR BIT(3)
  296. #define NSP32_DEBUG_SGLIST BIT(4)
  297. #define NSP32_DEBUG_BUSFREE BIT(5)
  298. #define NSP32_DEBUG_CDB_CONTENTS BIT(6)
  299. #define NSP32_DEBUG_RESELECTION BIT(7)
  300. #define NSP32_DEBUG_MSGINOCCUR BIT(8)
  301. #define NSP32_DEBUG_EEPROM BIT(9)
  302. #define NSP32_DEBUG_MSGOUTOCCUR BIT(10)
  303. #define NSP32_DEBUG_BUSRESET BIT(11)
  304. #define NSP32_DEBUG_RESTART BIT(12)
  305. #define NSP32_DEBUG_SYNC BIT(13)
  306. #define NSP32_DEBUG_WAIT BIT(14)
  307. #define NSP32_DEBUG_TARGETFLAG BIT(15)
  308. #define NSP32_DEBUG_PROC BIT(16)
  309. #define NSP32_DEBUG_INIT BIT(17)
  310. #define NSP32_SPECIAL_PRINT_REGISTER BIT(20)
  311. #define NSP32_DEBUG_BUF_LEN 100
  312. static void nsp32_message(const char *func, int line, char *type, char *fmt, ...)
  313. {
  314. va_list args;
  315. char buf[NSP32_DEBUG_BUF_LEN];
  316. va_start(args, fmt);
  317. vsnprintf(buf, sizeof(buf), fmt, args);
  318. va_end(args);
  319. #ifndef NSP32_DEBUG
  320. printk("%snsp32: %s\n", type, buf);
  321. #else
  322. printk("%snsp32: %s (%d): %s\n", type, func, line, buf);
  323. #endif
  324. }
  325. #ifdef NSP32_DEBUG
  326. static void nsp32_dmessage(const char *func, int line, int mask, char *fmt, ...)
  327. {
  328. va_list args;
  329. char buf[NSP32_DEBUG_BUF_LEN];
  330. va_start(args, fmt);
  331. vsnprintf(buf, sizeof(buf), fmt, args);
  332. va_end(args);
  333. if (mask & NSP32_DEBUG_MASK) {
  334. printk("nsp32-debug: 0x%x %s (%d): %s\n", mask, func, line, buf);
  335. }
  336. }
  337. #endif
  338. #ifdef NSP32_DEBUG
  339. # include "nsp32_debug.c"
  340. #else
  341. # define show_command(arg) /* */
  342. # define show_busphase(arg) /* */
  343. # define show_autophase(arg) /* */
  344. #endif
  345. /*
  346. * IDENTIFY Message
  347. */
  348. static void nsp32_build_identify(struct scsi_cmnd *SCpnt)
  349. {
  350. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  351. int pos = data->msgout_len;
  352. int mode = FALSE;
  353. /* XXX: Auto DiscPriv detection is progressing... */
  354. if (disc_priv == 0) {
  355. /* mode = TRUE; */
  356. }
  357. data->msgoutbuf[pos] = IDENTIFY(mode, SCpnt->device->lun); pos++;
  358. data->msgout_len = pos;
  359. }
  360. /*
  361. * SDTR Message Routine
  362. */
  363. static void nsp32_build_sdtr(struct scsi_cmnd *SCpnt,
  364. unsigned char period,
  365. unsigned char offset)
  366. {
  367. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  368. int pos = data->msgout_len;
  369. data->msgoutbuf[pos] = EXTENDED_MESSAGE; pos++;
  370. data->msgoutbuf[pos] = EXTENDED_SDTR_LEN; pos++;
  371. data->msgoutbuf[pos] = EXTENDED_SDTR; pos++;
  372. data->msgoutbuf[pos] = period; pos++;
  373. data->msgoutbuf[pos] = offset; pos++;
  374. data->msgout_len = pos;
  375. }
  376. /*
  377. * No Operation Message
  378. */
  379. static void nsp32_build_nop(struct scsi_cmnd *SCpnt)
  380. {
  381. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  382. int pos = data->msgout_len;
  383. if (pos != 0) {
  384. nsp32_msg(KERN_WARNING,
  385. "Some messages are already contained!");
  386. return;
  387. }
  388. data->msgoutbuf[pos] = NOP; pos++;
  389. data->msgout_len = pos;
  390. }
  391. /*
  392. * Reject Message
  393. */
  394. static void nsp32_build_reject(struct scsi_cmnd *SCpnt)
  395. {
  396. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  397. int pos = data->msgout_len;
  398. data->msgoutbuf[pos] = MESSAGE_REJECT; pos++;
  399. data->msgout_len = pos;
  400. }
  401. /*
  402. * timer
  403. */
  404. #if 0
  405. static void nsp32_start_timer(struct scsi_cmnd *SCpnt, int time)
  406. {
  407. unsigned int base = SCpnt->host->io_port;
  408. nsp32_dbg(NSP32_DEBUG_INTR, "timer=%d", time);
  409. if (time & (~TIMER_CNT_MASK)) {
  410. nsp32_dbg(NSP32_DEBUG_INTR, "timer set overflow");
  411. }
  412. nsp32_write2(base, TIMER_SET, time & TIMER_CNT_MASK);
  413. }
  414. #endif
  415. /*
  416. * set SCSI command and other parameter to asic, and start selection phase
  417. */
  418. static int nsp32_selection_autopara(struct scsi_cmnd *SCpnt)
  419. {
  420. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  421. unsigned int base = SCpnt->device->host->io_port;
  422. unsigned int host_id = SCpnt->device->host->this_id;
  423. unsigned char target = SCpnt->device->id;
  424. nsp32_autoparam *param = data->autoparam;
  425. unsigned char phase;
  426. int i, ret;
  427. unsigned int msgout;
  428. u16_le s;
  429. nsp32_dbg(NSP32_DEBUG_AUTOSCSI, "in");
  430. /*
  431. * check bus free
  432. */
  433. phase = nsp32_read1(base, SCSI_BUS_MONITOR);
  434. if (phase != BUSMON_BUS_FREE) {
  435. nsp32_msg(KERN_WARNING, "bus busy");
  436. show_busphase(phase & BUSMON_PHASE_MASK);
  437. SCpnt->result = DID_BUS_BUSY << 16;
  438. return FALSE;
  439. }
  440. /*
  441. * message out
  442. *
  443. * Note: If the range of msgout_len is 1 - 3, fill scsi_msgout.
  444. * over 3 messages needs another routine.
  445. */
  446. if (data->msgout_len == 0) {
  447. nsp32_msg(KERN_ERR, "SCSI MsgOut without any message!");
  448. SCpnt->result = DID_ERROR << 16;
  449. return FALSE;
  450. } else if (data->msgout_len > 0 && data->msgout_len <= 3) {
  451. msgout = 0;
  452. for (i = 0; i < data->msgout_len; i++) {
  453. /*
  454. * the sending order of the message is:
  455. * MCNT 3: MSG#0 -> MSG#1 -> MSG#2
  456. * MCNT 2: MSG#1 -> MSG#2
  457. * MCNT 1: MSG#2
  458. */
  459. msgout >>= 8;
  460. msgout |= ((unsigned int)(data->msgoutbuf[i]) << 24);
  461. }
  462. msgout |= MV_VALID; /* MV valid */
  463. msgout |= (unsigned int)data->msgout_len; /* len */
  464. } else {
  465. /* data->msgout_len > 3 */
  466. msgout = 0;
  467. }
  468. // nsp_dbg(NSP32_DEBUG_AUTOSCSI, "sel time out=0x%x\n", nsp32_read2(base, SEL_TIME_OUT));
  469. // nsp32_write2(base, SEL_TIME_OUT, SEL_TIMEOUT_TIME);
  470. /*
  471. * setup asic parameter
  472. */
  473. memset(param, 0, sizeof(nsp32_autoparam));
  474. /* cdb */
  475. for (i = 0; i < SCpnt->cmd_len; i++) {
  476. param->cdb[4 * i] = SCpnt->cmnd[i];
  477. }
  478. /* outgoing messages */
  479. param->msgout = cpu_to_le32(msgout);
  480. /* syncreg, ackwidth, target id, SREQ sampling rate */
  481. param->syncreg = data->cur_target->syncreg;
  482. param->ackwidth = data->cur_target->ackwidth;
  483. param->target_id = BIT(host_id) | BIT(target);
  484. param->sample_reg = data->cur_target->sample_reg;
  485. // nsp32_dbg(NSP32_DEBUG_AUTOSCSI, "sample rate=0x%x\n", data->cur_target->sample_reg);
  486. /* command control */
  487. param->command_control = cpu_to_le16(CLEAR_CDB_FIFO_POINTER |
  488. AUTOSCSI_START |
  489. AUTO_MSGIN_00_OR_04 |
  490. AUTO_MSGIN_02 |
  491. AUTO_ATN );
  492. /* transfer control */
  493. s = 0;
  494. switch (data->trans_method) {
  495. case NSP32_TRANSFER_BUSMASTER:
  496. s |= BM_START;
  497. break;
  498. case NSP32_TRANSFER_MMIO:
  499. s |= CB_MMIO_MODE;
  500. break;
  501. case NSP32_TRANSFER_PIO:
  502. s |= CB_IO_MODE;
  503. break;
  504. default:
  505. nsp32_msg(KERN_ERR, "unknown trans_method");
  506. break;
  507. }
  508. /*
  509. * OR-ed BLIEND_MODE, FIFO intr is decreased, instead of PCI bus waits.
  510. * For bus master transfer, it's taken off.
  511. */
  512. s |= (TRANSFER_GO | ALL_COUNTER_CLR);
  513. param->transfer_control = cpu_to_le16(s);
  514. /* sg table addr */
  515. param->sgt_pointer = cpu_to_le32(data->cur_lunt->sglun_paddr);
  516. /*
  517. * transfer parameter to ASIC
  518. */
  519. nsp32_write4(base, SGT_ADR, data->auto_paddr);
  520. nsp32_write2(base, COMMAND_CONTROL, CLEAR_CDB_FIFO_POINTER |
  521. AUTO_PARAMETER );
  522. /*
  523. * Check arbitration
  524. */
  525. ret = nsp32_arbitration(SCpnt, base);
  526. return ret;
  527. }
  528. /*
  529. * Selection with AUTO SCSI (without AUTO PARAMETER)
  530. */
  531. static int nsp32_selection_autoscsi(struct scsi_cmnd *SCpnt)
  532. {
  533. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  534. unsigned int base = SCpnt->device->host->io_port;
  535. unsigned int host_id = SCpnt->device->host->this_id;
  536. unsigned char target = SCpnt->device->id;
  537. unsigned char phase;
  538. int status;
  539. unsigned short command = 0;
  540. unsigned int msgout = 0;
  541. unsigned short execph;
  542. int i;
  543. nsp32_dbg(NSP32_DEBUG_AUTOSCSI, "in");
  544. /*
  545. * IRQ disable
  546. */
  547. nsp32_write2(base, IRQ_CONTROL, IRQ_CONTROL_ALL_IRQ_MASK);
  548. /*
  549. * check bus line
  550. */
  551. phase = nsp32_read1(base, SCSI_BUS_MONITOR);
  552. if(((phase & BUSMON_BSY) == 1) || (phase & BUSMON_SEL) == 1) {
  553. nsp32_msg(KERN_WARNING, "bus busy");
  554. SCpnt->result = DID_BUS_BUSY << 16;
  555. status = 1;
  556. goto out;
  557. }
  558. /*
  559. * clear execph
  560. */
  561. execph = nsp32_read2(base, SCSI_EXECUTE_PHASE);
  562. /*
  563. * clear FIFO counter to set CDBs
  564. */
  565. nsp32_write2(base, COMMAND_CONTROL, CLEAR_CDB_FIFO_POINTER);
  566. /*
  567. * set CDB0 - CDB15
  568. */
  569. for (i = 0; i < SCpnt->cmd_len; i++) {
  570. nsp32_write1(base, COMMAND_DATA, SCpnt->cmnd[i]);
  571. }
  572. nsp32_dbg(NSP32_DEBUG_CDB_CONTENTS, "CDB[0]=[0x%x]", SCpnt->cmnd[0]);
  573. /*
  574. * set SCSIOUT LATCH(initiator)/TARGET(target) (OR-ed) ID
  575. */
  576. nsp32_write1(base, SCSI_OUT_LATCH_TARGET_ID, BIT(host_id) | BIT(target));
  577. /*
  578. * set SCSI MSGOUT REG
  579. *
  580. * Note: If the range of msgout_len is 1 - 3, fill scsi_msgout.
  581. * over 3 messages needs another routine.
  582. */
  583. if (data->msgout_len == 0) {
  584. nsp32_msg(KERN_ERR, "SCSI MsgOut without any message!");
  585. SCpnt->result = DID_ERROR << 16;
  586. status = 1;
  587. goto out;
  588. } else if (data->msgout_len > 0 && data->msgout_len <= 3) {
  589. msgout = 0;
  590. for (i = 0; i < data->msgout_len; i++) {
  591. /*
  592. * the sending order of the message is:
  593. * MCNT 3: MSG#0 -> MSG#1 -> MSG#2
  594. * MCNT 2: MSG#1 -> MSG#2
  595. * MCNT 1: MSG#2
  596. */
  597. msgout >>= 8;
  598. msgout |= ((unsigned int)(data->msgoutbuf[i]) << 24);
  599. }
  600. msgout |= MV_VALID; /* MV valid */
  601. msgout |= (unsigned int)data->msgout_len; /* len */
  602. nsp32_write4(base, SCSI_MSG_OUT, msgout);
  603. } else {
  604. /* data->msgout_len > 3 */
  605. nsp32_write4(base, SCSI_MSG_OUT, 0);
  606. }
  607. /*
  608. * set selection timeout(= 250ms)
  609. */
  610. nsp32_write2(base, SEL_TIME_OUT, SEL_TIMEOUT_TIME);
  611. /*
  612. * set SREQ hazard killer sampling rate
  613. *
  614. * TODO: sample_rate (BASE+0F) is 0 when internal clock = 40MHz.
  615. * check other internal clock!
  616. */
  617. nsp32_write1(base, SREQ_SMPL_RATE, data->cur_target->sample_reg);
  618. /*
  619. * clear Arbit
  620. */
  621. nsp32_write1(base, SET_ARBIT, ARBIT_CLEAR);
  622. /*
  623. * set SYNCREG
  624. * Don't set BM_START_ADR before setting this register.
  625. */
  626. nsp32_write1(base, SYNC_REG, data->cur_target->syncreg);
  627. /*
  628. * set ACKWIDTH
  629. */
  630. nsp32_write1(base, ACK_WIDTH, data->cur_target->ackwidth);
  631. nsp32_dbg(NSP32_DEBUG_AUTOSCSI,
  632. "syncreg=0x%x, ackwidth=0x%x, sgtpaddr=0x%x, id=0x%x",
  633. nsp32_read1(base, SYNC_REG), nsp32_read1(base, ACK_WIDTH),
  634. nsp32_read4(base, SGT_ADR), nsp32_read1(base, SCSI_OUT_LATCH_TARGET_ID));
  635. nsp32_dbg(NSP32_DEBUG_AUTOSCSI, "msgout_len=%d, msgout=0x%x",
  636. data->msgout_len, msgout);
  637. /*
  638. * set SGT ADDR (physical address)
  639. */
  640. nsp32_write4(base, SGT_ADR, data->cur_lunt->sglun_paddr);
  641. /*
  642. * set TRANSFER CONTROL REG
  643. */
  644. command = 0;
  645. command |= (TRANSFER_GO | ALL_COUNTER_CLR);
  646. if (data->trans_method & NSP32_TRANSFER_BUSMASTER) {
  647. if (SCpnt->request_bufflen > 0) {
  648. command |= BM_START;
  649. }
  650. } else if (data->trans_method & NSP32_TRANSFER_MMIO) {
  651. command |= CB_MMIO_MODE;
  652. } else if (data->trans_method & NSP32_TRANSFER_PIO) {
  653. command |= CB_IO_MODE;
  654. }
  655. nsp32_write2(base, TRANSFER_CONTROL, command);
  656. /*
  657. * start AUTO SCSI, kick off arbitration
  658. */
  659. command = (CLEAR_CDB_FIFO_POINTER |
  660. AUTOSCSI_START |
  661. AUTO_MSGIN_00_OR_04 |
  662. AUTO_MSGIN_02 |
  663. AUTO_ATN );
  664. nsp32_write2(base, COMMAND_CONTROL, command);
  665. /*
  666. * Check arbitration
  667. */
  668. status = nsp32_arbitration(SCpnt, base);
  669. out:
  670. /*
  671. * IRQ enable
  672. */
  673. nsp32_write2(base, IRQ_CONTROL, 0);
  674. return status;
  675. }
  676. /*
  677. * Arbitration Status Check
  678. *
  679. * Note: Arbitration counter is waited during ARBIT_GO is not lifting.
  680. * Using udelay(1) consumes CPU time and system time, but
  681. * arbitration delay time is defined minimal 2.4us in SCSI
  682. * specification, thus udelay works as coarse grained wait timer.
  683. */
  684. static int nsp32_arbitration(struct scsi_cmnd *SCpnt, unsigned int base)
  685. {
  686. unsigned char arbit;
  687. int status = TRUE;
  688. int time = 0;
  689. do {
  690. arbit = nsp32_read1(base, ARBIT_STATUS);
  691. time++;
  692. } while ((arbit & (ARBIT_WIN | ARBIT_FAIL)) == 0 &&
  693. (time <= ARBIT_TIMEOUT_TIME));
  694. nsp32_dbg(NSP32_DEBUG_AUTOSCSI,
  695. "arbit: 0x%x, delay time: %d", arbit, time);
  696. if (arbit & ARBIT_WIN) {
  697. /* Arbitration succeeded */
  698. SCpnt->result = DID_OK << 16;
  699. nsp32_index_write1(base, EXT_PORT, LED_ON); /* PCI LED on */
  700. } else if (arbit & ARBIT_FAIL) {
  701. /* Arbitration failed */
  702. SCpnt->result = DID_BUS_BUSY << 16;
  703. status = FALSE;
  704. } else {
  705. /*
  706. * unknown error or ARBIT_GO timeout,
  707. * something lock up! guess no connection.
  708. */
  709. nsp32_dbg(NSP32_DEBUG_AUTOSCSI, "arbit timeout");
  710. SCpnt->result = DID_NO_CONNECT << 16;
  711. status = FALSE;
  712. }
  713. /*
  714. * clear Arbit
  715. */
  716. nsp32_write1(base, SET_ARBIT, ARBIT_CLEAR);
  717. return status;
  718. }
  719. /*
  720. * reselection
  721. *
  722. * Note: This reselection routine is called from msgin_occur,
  723. * reselection target id&lun must be already set.
  724. * SCSI-2 says IDENTIFY implies RESTORE_POINTER operation.
  725. */
  726. static int nsp32_reselection(struct scsi_cmnd *SCpnt, unsigned char newlun)
  727. {
  728. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  729. unsigned int host_id = SCpnt->device->host->this_id;
  730. unsigned int base = SCpnt->device->host->io_port;
  731. unsigned char tmpid, newid;
  732. nsp32_dbg(NSP32_DEBUG_RESELECTION, "enter");
  733. /*
  734. * calculate reselected SCSI ID
  735. */
  736. tmpid = nsp32_read1(base, RESELECT_ID);
  737. tmpid &= (~BIT(host_id));
  738. newid = 0;
  739. while (tmpid) {
  740. if (tmpid & 1) {
  741. break;
  742. }
  743. tmpid >>= 1;
  744. newid++;
  745. }
  746. /*
  747. * If reselected New ID:LUN is not existed
  748. * or current nexus is not existed, unexpected
  749. * reselection is occurred. Send reject message.
  750. */
  751. if (newid >= ARRAY_SIZE(data->lunt) || newlun >= ARRAY_SIZE(data->lunt[0])) {
  752. nsp32_msg(KERN_WARNING, "unknown id/lun");
  753. return FALSE;
  754. } else if(data->lunt[newid][newlun].SCpnt == NULL) {
  755. nsp32_msg(KERN_WARNING, "no SCSI command is processing");
  756. return FALSE;
  757. }
  758. data->cur_id = newid;
  759. data->cur_lun = newlun;
  760. data->cur_target = &(data->target[newid]);
  761. data->cur_lunt = &(data->lunt[newid][newlun]);
  762. /* reset SACK/SavedACK counter (or ALL clear?) */
  763. nsp32_write4(base, CLR_COUNTER, CLRCOUNTER_ALLMASK);
  764. return TRUE;
  765. }
  766. /*
  767. * nsp32_setup_sg_table - build scatter gather list for transfer data
  768. * with bus master.
  769. *
  770. * Note: NinjaSCSI-32Bi/UDE bus master can not transfer over 64KB at a time.
  771. */
  772. static int nsp32_setup_sg_table(struct scsi_cmnd *SCpnt)
  773. {
  774. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  775. struct scatterlist *sgl;
  776. nsp32_sgtable *sgt = data->cur_lunt->sglun->sgt;
  777. int num, i;
  778. u32_le l;
  779. if (SCpnt->request_bufflen == 0) {
  780. return TRUE;
  781. }
  782. if (sgt == NULL) {
  783. nsp32_dbg(NSP32_DEBUG_SGLIST, "SGT == null");
  784. return FALSE;
  785. }
  786. if (SCpnt->use_sg) {
  787. sgl = (struct scatterlist *)SCpnt->request_buffer;
  788. num = pci_map_sg(data->Pci, sgl, SCpnt->use_sg,
  789. SCpnt->sc_data_direction);
  790. for (i = 0; i < num; i++) {
  791. /*
  792. * Build nsp32_sglist, substitute sg dma addresses.
  793. */
  794. sgt[i].addr = cpu_to_le32(sg_dma_address(sgl));
  795. sgt[i].len = cpu_to_le32(sg_dma_len(sgl));
  796. sgl++;
  797. if (le32_to_cpu(sgt[i].len) > 0x10000) {
  798. nsp32_msg(KERN_ERR,
  799. "can't transfer over 64KB at a time, size=0x%lx", le32_to_cpu(sgt[i].len));
  800. return FALSE;
  801. }
  802. nsp32_dbg(NSP32_DEBUG_SGLIST,
  803. "num 0x%x : addr 0x%lx len 0x%lx",
  804. i,
  805. le32_to_cpu(sgt[i].addr),
  806. le32_to_cpu(sgt[i].len ));
  807. }
  808. /* set end mark */
  809. l = le32_to_cpu(sgt[num-1].len);
  810. sgt[num-1].len = cpu_to_le32(l | SGTEND);
  811. } else {
  812. SCpnt->SCp.have_data_in = pci_map_single(data->Pci,
  813. SCpnt->request_buffer, SCpnt->request_bufflen,
  814. SCpnt->sc_data_direction);
  815. sgt[0].addr = cpu_to_le32(SCpnt->SCp.have_data_in);
  816. sgt[0].len = cpu_to_le32(SCpnt->request_bufflen | SGTEND); /* set end mark */
  817. if (SCpnt->request_bufflen > 0x10000) {
  818. nsp32_msg(KERN_ERR,
  819. "can't transfer over 64KB at a time, size=0x%lx", SCpnt->request_bufflen);
  820. return FALSE;
  821. }
  822. nsp32_dbg(NSP32_DEBUG_SGLIST, "single : addr 0x%lx len=0x%lx",
  823. le32_to_cpu(sgt[0].addr),
  824. le32_to_cpu(sgt[0].len ));
  825. }
  826. return TRUE;
  827. }
  828. static int nsp32_queuecommand(struct scsi_cmnd *SCpnt, void (*done)(struct scsi_cmnd *))
  829. {
  830. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  831. nsp32_target *target;
  832. nsp32_lunt *cur_lunt;
  833. int ret;
  834. nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND,
  835. "enter. target: 0x%x LUN: 0x%x cmnd: 0x%x cmndlen: 0x%x "
  836. "use_sg: 0x%x reqbuf: 0x%lx reqlen: 0x%x",
  837. SCpnt->device->id, SCpnt->device->lun, SCpnt->cmnd[0], SCpnt->cmd_len,
  838. SCpnt->use_sg, SCpnt->request_buffer, SCpnt->request_bufflen);
  839. if (data->CurrentSC != NULL) {
  840. nsp32_msg(KERN_ERR, "Currentsc != NULL. Cancel this command request");
  841. data->CurrentSC = NULL;
  842. SCpnt->result = DID_NO_CONNECT << 16;
  843. done(SCpnt);
  844. return 0;
  845. }
  846. /* check target ID is not same as this initiator ID */
  847. if (SCpnt->device->id == SCpnt->device->host->this_id) {
  848. nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND, "terget==host???");
  849. SCpnt->result = DID_BAD_TARGET << 16;
  850. done(SCpnt);
  851. return 0;
  852. }
  853. /* check target LUN is allowable value */
  854. if (SCpnt->device->lun >= MAX_LUN) {
  855. nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND, "no more lun");
  856. SCpnt->result = DID_BAD_TARGET << 16;
  857. done(SCpnt);
  858. return 0;
  859. }
  860. show_command(SCpnt);
  861. SCpnt->scsi_done = done;
  862. data->CurrentSC = SCpnt;
  863. SCpnt->SCp.Status = CHECK_CONDITION;
  864. SCpnt->SCp.Message = 0;
  865. SCpnt->resid = SCpnt->request_bufflen;
  866. SCpnt->SCp.ptr = (char *) SCpnt->request_buffer;
  867. SCpnt->SCp.this_residual = SCpnt->request_bufflen;
  868. SCpnt->SCp.buffer = NULL;
  869. SCpnt->SCp.buffers_residual = 0;
  870. /* initialize data */
  871. data->msgout_len = 0;
  872. data->msgin_len = 0;
  873. cur_lunt = &(data->lunt[SCpnt->device->id][SCpnt->device->lun]);
  874. cur_lunt->SCpnt = SCpnt;
  875. cur_lunt->save_datp = 0;
  876. cur_lunt->msgin03 = FALSE;
  877. data->cur_lunt = cur_lunt;
  878. data->cur_id = SCpnt->device->id;
  879. data->cur_lun = SCpnt->device->lun;
  880. ret = nsp32_setup_sg_table(SCpnt);
  881. if (ret == FALSE) {
  882. nsp32_msg(KERN_ERR, "SGT fail");
  883. SCpnt->result = DID_ERROR << 16;
  884. nsp32_scsi_done(SCpnt);
  885. return 0;
  886. }
  887. /* Build IDENTIFY */
  888. nsp32_build_identify(SCpnt);
  889. /*
  890. * If target is the first time to transfer after the reset
  891. * (target don't have SDTR_DONE and SDTR_INITIATOR), sync
  892. * message SDTR is needed to do synchronous transfer.
  893. */
  894. target = &data->target[SCpnt->device->id];
  895. data->cur_target = target;
  896. if (!(target->sync_flag & (SDTR_DONE | SDTR_INITIATOR | SDTR_TARGET))) {
  897. unsigned char period, offset;
  898. if (trans_mode != ASYNC_MODE) {
  899. nsp32_set_max_sync(data, target, &period, &offset);
  900. nsp32_build_sdtr(SCpnt, period, offset);
  901. target->sync_flag |= SDTR_INITIATOR;
  902. } else {
  903. nsp32_set_async(data, target);
  904. target->sync_flag |= SDTR_DONE;
  905. }
  906. nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND,
  907. "SDTR: entry: %d start_period: 0x%x offset: 0x%x\n",
  908. target->limit_entry, period, offset);
  909. } else if (target->sync_flag & SDTR_INITIATOR) {
  910. /*
  911. * It was negotiating SDTR with target, sending from the
  912. * initiator, but there are no chance to remove this flag.
  913. * Set async because we don't get proper negotiation.
  914. */
  915. nsp32_set_async(data, target);
  916. target->sync_flag &= ~SDTR_INITIATOR;
  917. target->sync_flag |= SDTR_DONE;
  918. nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND,
  919. "SDTR_INITIATOR: fall back to async");
  920. } else if (target->sync_flag & SDTR_TARGET) {
  921. /*
  922. * It was negotiating SDTR with target, sending from target,
  923. * but there are no chance to remove this flag. Set async
  924. * because we don't get proper negotiation.
  925. */
  926. nsp32_set_async(data, target);
  927. target->sync_flag &= ~SDTR_TARGET;
  928. target->sync_flag |= SDTR_DONE;
  929. nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND,
  930. "Unknown SDTR from target is reached, fall back to async.");
  931. }
  932. nsp32_dbg(NSP32_DEBUG_TARGETFLAG,
  933. "target: %d sync_flag: 0x%x syncreg: 0x%x ackwidth: 0x%x",
  934. SCpnt->device->id, target->sync_flag, target->syncreg,
  935. target->ackwidth);
  936. /* Selection */
  937. if (auto_param == 0) {
  938. ret = nsp32_selection_autopara(SCpnt);
  939. } else {
  940. ret = nsp32_selection_autoscsi(SCpnt);
  941. }
  942. if (ret != TRUE) {
  943. nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND, "selection fail");
  944. nsp32_scsi_done(SCpnt);
  945. }
  946. return 0;
  947. }
  948. /* initialize asic */
  949. static int nsp32hw_init(nsp32_hw_data *data)
  950. {
  951. unsigned int base = data->BaseAddress;
  952. unsigned short irq_stat;
  953. unsigned long lc_reg;
  954. unsigned char power;
  955. lc_reg = nsp32_index_read4(base, CFG_LATE_CACHE);
  956. if ((lc_reg & 0xff00) == 0) {
  957. lc_reg |= (0x20 << 8);
  958. nsp32_index_write2(base, CFG_LATE_CACHE, lc_reg & 0xffff);
  959. }
  960. nsp32_write2(base, IRQ_CONTROL, IRQ_CONTROL_ALL_IRQ_MASK);
  961. nsp32_write2(base, TRANSFER_CONTROL, 0);
  962. nsp32_write4(base, BM_CNT, 0);
  963. nsp32_write2(base, SCSI_EXECUTE_PHASE, 0);
  964. do {
  965. irq_stat = nsp32_read2(base, IRQ_STATUS);
  966. nsp32_dbg(NSP32_DEBUG_INIT, "irq_stat 0x%x", irq_stat);
  967. } while (irq_stat & IRQSTATUS_ANY_IRQ);
  968. /*
  969. * Fill FIFO_FULL_SHLD, FIFO_EMPTY_SHLD. Below parameter is
  970. * designated by specification.
  971. */
  972. if ((data->trans_method & NSP32_TRANSFER_PIO) ||
  973. (data->trans_method & NSP32_TRANSFER_MMIO)) {
  974. nsp32_index_write1(base, FIFO_FULL_SHLD_COUNT, 0x40);
  975. nsp32_index_write1(base, FIFO_EMPTY_SHLD_COUNT, 0x40);
  976. } else if (data->trans_method & NSP32_TRANSFER_BUSMASTER) {
  977. nsp32_index_write1(base, FIFO_FULL_SHLD_COUNT, 0x10);
  978. nsp32_index_write1(base, FIFO_EMPTY_SHLD_COUNT, 0x60);
  979. } else {
  980. nsp32_dbg(NSP32_DEBUG_INIT, "unknown transfer mode");
  981. }
  982. nsp32_dbg(NSP32_DEBUG_INIT, "full 0x%x emp 0x%x",
  983. nsp32_index_read1(base, FIFO_FULL_SHLD_COUNT),
  984. nsp32_index_read1(base, FIFO_EMPTY_SHLD_COUNT));
  985. nsp32_index_write1(base, CLOCK_DIV, data->clock);
  986. nsp32_index_write1(base, BM_CYCLE, MEMRD_CMD1 | SGT_AUTO_PARA_MEMED_CMD);
  987. nsp32_write1(base, PARITY_CONTROL, 0); /* parity check is disable */
  988. /*
  989. * initialize MISC_WRRD register
  990. *
  991. * Note: Designated parameters is obeyed as following:
  992. * MISC_SCSI_DIRECTION_DETECTOR_SELECT: It must be set.
  993. * MISC_MASTER_TERMINATION_SELECT: It must be set.
  994. * MISC_BMREQ_NEGATE_TIMING_SEL: It should be set.
  995. * MISC_AUTOSEL_TIMING_SEL: It should be set.
  996. * MISC_BMSTOP_CHANGE2_NONDATA_PHASE: It should be set.
  997. * MISC_DELAYED_BMSTART: It's selected for safety.
  998. *
  999. * Note: If MISC_BMSTOP_CHANGE2_NONDATA_PHASE is set, then
  1000. * we have to set TRANSFERCONTROL_BM_START as 0 and set
  1001. * appropriate value before restarting bus master transfer.
  1002. */
  1003. nsp32_index_write2(base, MISC_WR,
  1004. (SCSI_DIRECTION_DETECTOR_SELECT |
  1005. DELAYED_BMSTART |
  1006. MASTER_TERMINATION_SELECT |
  1007. BMREQ_NEGATE_TIMING_SEL |
  1008. AUTOSEL_TIMING_SEL |
  1009. BMSTOP_CHANGE2_NONDATA_PHASE));
  1010. nsp32_index_write1(base, TERM_PWR_CONTROL, 0);
  1011. power = nsp32_index_read1(base, TERM_PWR_CONTROL);
  1012. if (!(power & SENSE)) {
  1013. nsp32_msg(KERN_INFO, "term power on");
  1014. nsp32_index_write1(base, TERM_PWR_CONTROL, BPWR);
  1015. }
  1016. nsp32_write2(base, TIMER_SET, TIMER_STOP);
  1017. nsp32_write2(base, TIMER_SET, TIMER_STOP); /* Required 2 times */
  1018. nsp32_write1(base, SYNC_REG, 0);
  1019. nsp32_write1(base, ACK_WIDTH, 0);
  1020. nsp32_write2(base, SEL_TIME_OUT, SEL_TIMEOUT_TIME);
  1021. /*
  1022. * enable to select designated IRQ (except for
  1023. * IRQSELECT_SERR, IRQSELECT_PERR, IRQSELECT_BMCNTERR)
  1024. */
  1025. nsp32_index_write2(base, IRQ_SELECT, IRQSELECT_TIMER_IRQ |
  1026. IRQSELECT_SCSIRESET_IRQ |
  1027. IRQSELECT_FIFO_SHLD_IRQ |
  1028. IRQSELECT_RESELECT_IRQ |
  1029. IRQSELECT_PHASE_CHANGE_IRQ |
  1030. IRQSELECT_AUTO_SCSI_SEQ_IRQ |
  1031. // IRQSELECT_BMCNTERR_IRQ |
  1032. IRQSELECT_TARGET_ABORT_IRQ |
  1033. IRQSELECT_MASTER_ABORT_IRQ );
  1034. nsp32_write2(base, IRQ_CONTROL, 0);
  1035. /* PCI LED off */
  1036. nsp32_index_write1(base, EXT_PORT_DDR, LED_OFF);
  1037. nsp32_index_write1(base, EXT_PORT, LED_OFF);
  1038. return TRUE;
  1039. }
  1040. /* interrupt routine */
  1041. static irqreturn_t do_nsp32_isr(int irq, void *dev_id, struct pt_regs *regs)
  1042. {
  1043. nsp32_hw_data *data = dev_id;
  1044. unsigned int base = data->BaseAddress;
  1045. struct scsi_cmnd *SCpnt = data->CurrentSC;
  1046. unsigned short auto_stat, irq_stat, trans_stat;
  1047. unsigned char busmon, busphase;
  1048. unsigned long flags;
  1049. int ret;
  1050. int handled = 0;
  1051. #if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0))
  1052. struct Scsi_Host *host = data->Host;
  1053. spin_lock_irqsave(host->host_lock, flags);
  1054. #else
  1055. spin_lock_irqsave(&io_request_lock, flags);
  1056. #endif
  1057. /*
  1058. * IRQ check, then enable IRQ mask
  1059. */
  1060. irq_stat = nsp32_read2(base, IRQ_STATUS);
  1061. nsp32_dbg(NSP32_DEBUG_INTR,
  1062. "enter IRQ: %d, IRQstatus: 0x%x", irq, irq_stat);
  1063. /* is this interrupt comes from Ninja asic? */
  1064. if ((irq_stat & IRQSTATUS_ANY_IRQ) == 0) {
  1065. nsp32_dbg(NSP32_DEBUG_INTR, "shared interrupt: irq other 0x%x", irq_stat);
  1066. goto out2;
  1067. }
  1068. handled = 1;
  1069. nsp32_write2(base, IRQ_CONTROL, IRQ_CONTROL_ALL_IRQ_MASK);
  1070. busmon = nsp32_read1(base, SCSI_BUS_MONITOR);
  1071. busphase = busmon & BUSMON_PHASE_MASK;
  1072. trans_stat = nsp32_read2(base, TRANSFER_STATUS);
  1073. if ((irq_stat == 0xffff) && (trans_stat == 0xffff)) {
  1074. nsp32_msg(KERN_INFO, "card disconnect");
  1075. if (data->CurrentSC != NULL) {
  1076. nsp32_msg(KERN_INFO, "clean up current SCSI command");
  1077. SCpnt->result = DID_BAD_TARGET << 16;
  1078. nsp32_scsi_done(SCpnt);
  1079. }
  1080. goto out;
  1081. }
  1082. /* Timer IRQ */
  1083. if (irq_stat & IRQSTATUS_TIMER_IRQ) {
  1084. nsp32_dbg(NSP32_DEBUG_INTR, "timer stop");
  1085. nsp32_write2(base, TIMER_SET, TIMER_STOP);
  1086. goto out;
  1087. }
  1088. /* SCSI reset */
  1089. if (irq_stat & IRQSTATUS_SCSIRESET_IRQ) {
  1090. nsp32_msg(KERN_INFO, "detected someone do bus reset");
  1091. nsp32_do_bus_reset(data);
  1092. if (SCpnt != NULL) {
  1093. SCpnt->result = DID_RESET << 16;
  1094. nsp32_scsi_done(SCpnt);
  1095. }
  1096. goto out;
  1097. }
  1098. if (SCpnt == NULL) {
  1099. nsp32_msg(KERN_WARNING, "SCpnt==NULL this can't be happened");
  1100. nsp32_msg(KERN_WARNING, "irq_stat=0x%x trans_stat=0x%x", irq_stat, trans_stat);
  1101. goto out;
  1102. }
  1103. /*
  1104. * AutoSCSI Interrupt.
  1105. * Note: This interrupt is occurred when AutoSCSI is finished. Then
  1106. * check SCSIEXECUTEPHASE, and do appropriate action. Each phases are
  1107. * recorded when AutoSCSI sequencer has been processed.
  1108. */
  1109. if(irq_stat & IRQSTATUS_AUTOSCSI_IRQ) {
  1110. /* getting SCSI executed phase */
  1111. auto_stat = nsp32_read2(base, SCSI_EXECUTE_PHASE);
  1112. nsp32_write2(base, SCSI_EXECUTE_PHASE, 0);
  1113. /* Selection Timeout, go busfree phase. */
  1114. if (auto_stat & SELECTION_TIMEOUT) {
  1115. nsp32_dbg(NSP32_DEBUG_INTR,
  1116. "selection timeout occurred");
  1117. SCpnt->result = DID_TIME_OUT << 16;
  1118. nsp32_scsi_done(SCpnt);
  1119. goto out;
  1120. }
  1121. if (auto_stat & MSGOUT_PHASE) {
  1122. /*
  1123. * MsgOut phase was processed.
  1124. * If MSG_IN_OCCUER is not set, then MsgOut phase is
  1125. * completed. Thus, msgout_len must reset. Otherwise,
  1126. * nothing to do here. If MSG_OUT_OCCUER is occurred,
  1127. * then we will encounter the condition and check.
  1128. */
  1129. if (!(auto_stat & MSG_IN_OCCUER) &&
  1130. (data->msgout_len <= 3)) {
  1131. /*
  1132. * !MSG_IN_OCCUER && msgout_len <=3
  1133. * ---> AutoSCSI with MSGOUTreg is processed.
  1134. */
  1135. data->msgout_len = 0;
  1136. };
  1137. nsp32_dbg(NSP32_DEBUG_INTR, "MsgOut phase processed");
  1138. }
  1139. if ((auto_stat & DATA_IN_PHASE) &&
  1140. (SCpnt->resid > 0) &&
  1141. ((nsp32_read2(base, FIFO_REST_CNT) & FIFO_REST_MASK) != 0)) {
  1142. printk( "auto+fifo\n");
  1143. //nsp32_pio_read(SCpnt);
  1144. }
  1145. if (auto_stat & (DATA_IN_PHASE | DATA_OUT_PHASE)) {
  1146. /* DATA_IN_PHASE/DATA_OUT_PHASE was processed. */
  1147. nsp32_dbg(NSP32_DEBUG_INTR,
  1148. "Data in/out phase processed");
  1149. /* read BMCNT, SGT pointer addr */
  1150. nsp32_dbg(NSP32_DEBUG_INTR, "BMCNT=0x%lx",
  1151. nsp32_read4(base, BM_CNT));
  1152. nsp32_dbg(NSP32_DEBUG_INTR, "addr=0x%lx",
  1153. nsp32_read4(base, SGT_ADR));
  1154. nsp32_dbg(NSP32_DEBUG_INTR, "SACK=0x%lx",
  1155. nsp32_read4(base, SACK_CNT));
  1156. nsp32_dbg(NSP32_DEBUG_INTR, "SSACK=0x%lx",
  1157. nsp32_read4(base, SAVED_SACK_CNT));
  1158. SCpnt->resid = 0; /* all data transfered! */
  1159. }
  1160. /*
  1161. * MsgIn Occur
  1162. */
  1163. if (auto_stat & MSG_IN_OCCUER) {
  1164. nsp32_msgin_occur(SCpnt, irq_stat, auto_stat);
  1165. }
  1166. /*
  1167. * MsgOut Occur
  1168. */
  1169. if (auto_stat & MSG_OUT_OCCUER) {
  1170. nsp32_msgout_occur(SCpnt);
  1171. }
  1172. /*
  1173. * Bus Free Occur
  1174. */
  1175. if (auto_stat & BUS_FREE_OCCUER) {
  1176. ret = nsp32_busfree_occur(SCpnt, auto_stat);
  1177. if (ret == TRUE) {
  1178. goto out;
  1179. }
  1180. }
  1181. if (auto_stat & STATUS_PHASE) {
  1182. /*
  1183. * Read CSB and substitute CSB for SCpnt->result
  1184. * to save status phase stutas byte.
  1185. * scsi error handler checks host_byte (DID_*:
  1186. * low level driver to indicate status), then checks
  1187. * status_byte (SCSI status byte).
  1188. */
  1189. SCpnt->result = (int)nsp32_read1(base, SCSI_CSB_IN);
  1190. }
  1191. if (auto_stat & ILLEGAL_PHASE) {
  1192. /* Illegal phase is detected. SACK is not back. */
  1193. nsp32_msg(KERN_WARNING,
  1194. "AUTO SCSI ILLEGAL PHASE OCCUR!!!!");
  1195. /* TODO: currently we don't have any action... bus reset? */
  1196. /*
  1197. * To send back SACK, assert, wait, and negate.
  1198. */
  1199. nsp32_sack_assert(data);
  1200. nsp32_wait_req(data, NEGATE);
  1201. nsp32_sack_negate(data);
  1202. }
  1203. if (auto_stat & COMMAND_PHASE) {
  1204. /* nothing to do */
  1205. nsp32_dbg(NSP32_DEBUG_INTR, "Command phase processed");
  1206. }
  1207. if (auto_stat & AUTOSCSI_BUSY) {
  1208. /* AutoSCSI is running */
  1209. }
  1210. show_autophase(auto_stat);
  1211. }
  1212. /* FIFO_SHLD_IRQ */
  1213. if (irq_stat & IRQSTATUS_FIFO_SHLD_IRQ) {
  1214. nsp32_dbg(NSP32_DEBUG_INTR, "FIFO IRQ");
  1215. switch(busphase) {
  1216. case BUSPHASE_DATA_OUT:
  1217. nsp32_dbg(NSP32_DEBUG_INTR, "fifo/write");
  1218. //nsp32_pio_write(SCpnt);
  1219. break;
  1220. case BUSPHASE_DATA_IN:
  1221. nsp32_dbg(NSP32_DEBUG_INTR, "fifo/read");
  1222. //nsp32_pio_read(SCpnt);
  1223. break;
  1224. case BUSPHASE_STATUS:
  1225. nsp32_dbg(NSP32_DEBUG_INTR, "fifo/status");
  1226. SCpnt->SCp.Status = nsp32_read1(base, SCSI_CSB_IN);
  1227. break;
  1228. default:
  1229. nsp32_dbg(NSP32_DEBUG_INTR, "fifo/other phase");
  1230. nsp32_dbg(NSP32_DEBUG_INTR, "irq_stat=0x%x trans_stat=0x%x", irq_stat, trans_stat);
  1231. show_busphase(busphase);
  1232. break;
  1233. }
  1234. goto out;
  1235. }
  1236. /* Phase Change IRQ */
  1237. if (irq_stat & IRQSTATUS_PHASE_CHANGE_IRQ) {
  1238. nsp32_dbg(NSP32_DEBUG_INTR, "phase change IRQ");
  1239. switch(busphase) {
  1240. case BUSPHASE_MESSAGE_IN:
  1241. nsp32_dbg(NSP32_DEBUG_INTR, "phase chg/msg in");
  1242. nsp32_msgin_occur(SCpnt, irq_stat, 0);
  1243. break;
  1244. default:
  1245. nsp32_msg(KERN_WARNING, "phase chg/other phase?");
  1246. nsp32_msg(KERN_WARNING, "irq_stat=0x%x trans_stat=0x%x\n",
  1247. irq_stat, trans_stat);
  1248. show_busphase(busphase);
  1249. break;
  1250. }
  1251. goto out;
  1252. }
  1253. /* PCI_IRQ */
  1254. if (irq_stat & IRQSTATUS_PCI_IRQ) {
  1255. nsp32_dbg(NSP32_DEBUG_INTR, "PCI IRQ occurred");
  1256. /* Do nothing */
  1257. }
  1258. /* BMCNTERR_IRQ */
  1259. if (irq_stat & IRQSTATUS_BMCNTERR_IRQ) {
  1260. nsp32_msg(KERN_ERR, "Received unexpected BMCNTERR IRQ! ");
  1261. /*
  1262. * TODO: To be implemented improving bus master
  1263. * transfer reliablity when BMCNTERR is occurred in
  1264. * AutoSCSI phase described in specification.
  1265. */
  1266. }
  1267. #if 0
  1268. nsp32_dbg(NSP32_DEBUG_INTR,
  1269. "irq_stat=0x%x trans_stat=0x%x", irq_stat, trans_stat);
  1270. show_busphase(busphase);
  1271. #endif
  1272. out:
  1273. /* disable IRQ mask */
  1274. nsp32_write2(base, IRQ_CONTROL, 0);
  1275. out2:
  1276. #if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0))
  1277. spin_unlock_irqrestore(host->host_lock, flags);
  1278. #else
  1279. spin_unlock_irqrestore(&io_request_lock, flags);
  1280. #endif
  1281. nsp32_dbg(NSP32_DEBUG_INTR, "exit");
  1282. return IRQ_RETVAL(handled);
  1283. }
  1284. #undef SPRINTF
  1285. #define SPRINTF(args...) \
  1286. do { \
  1287. if(length > (pos - buffer)) { \
  1288. pos += snprintf(pos, length - (pos - buffer) + 1, ## args); \
  1289. nsp32_dbg(NSP32_DEBUG_PROC, "buffer=0x%p pos=0x%p length=%d %d\n", buffer, pos, length, length - (pos - buffer));\
  1290. } \
  1291. } while(0)
  1292. static int nsp32_proc_info(
  1293. #if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,73))
  1294. struct Scsi_Host *host,
  1295. #endif
  1296. char *buffer,
  1297. char **start,
  1298. off_t offset,
  1299. int length,
  1300. #if !(LINUX_VERSION_CODE > KERNEL_VERSION(2,5,73))
  1301. int hostno,
  1302. #endif
  1303. int inout)
  1304. {
  1305. char *pos = buffer;
  1306. int thislength;
  1307. unsigned long flags;
  1308. nsp32_hw_data *data;
  1309. #if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,73))
  1310. int hostno;
  1311. #else
  1312. struct Scsi_Host *host;
  1313. #endif
  1314. unsigned int base;
  1315. unsigned char mode_reg;
  1316. int id, speed;
  1317. long model;
  1318. /* Write is not supported, just return. */
  1319. if (inout == TRUE) {
  1320. return -EINVAL;
  1321. }
  1322. #if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,73))
  1323. hostno = host->host_no;
  1324. #else
  1325. /* search this HBA host */
  1326. host = scsi_host_hn_get(hostno);
  1327. if (host == NULL) {
  1328. return -ESRCH;
  1329. }
  1330. #endif
  1331. data = (nsp32_hw_data *)host->hostdata;
  1332. base = host->io_port;
  1333. SPRINTF("NinjaSCSI-32 status\n\n");
  1334. SPRINTF("Driver version: %s, $Revision: 1.33 $\n", nsp32_release_version);
  1335. SPRINTF("SCSI host No.: %d\n", hostno);
  1336. SPRINTF("IRQ: %d\n", host->irq);
  1337. SPRINTF("IO: 0x%lx-0x%lx\n", host->io_port, host->io_port + host->n_io_port - 1);
  1338. SPRINTF("MMIO(virtual address): 0x%lx-0x%lx\n", host->base, host->base + data->MmioLength - 1);
  1339. SPRINTF("sg_tablesize: %d\n", host->sg_tablesize);
  1340. SPRINTF("Chip revision: 0x%x\n", (nsp32_read2(base, INDEX_REG) >> 8) & 0xff);
  1341. mode_reg = nsp32_index_read1(base, CHIP_MODE);
  1342. model = data->pci_devid->driver_data;
  1343. #ifdef CONFIG_PM
  1344. SPRINTF("Power Management: %s\n", (mode_reg & OPTF) ? "yes" : "no");
  1345. #endif
  1346. SPRINTF("OEM: %ld, %s\n", (mode_reg & (OEM0|OEM1)), nsp32_model[model]);
  1347. spin_lock_irqsave(&(data->Lock), flags);
  1348. SPRINTF("CurrentSC: 0x%p\n\n", data->CurrentSC);
  1349. spin_unlock_irqrestore(&(data->Lock), flags);
  1350. SPRINTF("SDTR status\n");
  1351. for (id = 0; id < ARRAY_SIZE(data->target); id++) {
  1352. SPRINTF("id %d: ", id);
  1353. if (id == host->this_id) {
  1354. SPRINTF("----- NinjaSCSI-32 host adapter\n");
  1355. continue;
  1356. }
  1357. if (data->target[id].sync_flag == SDTR_DONE) {
  1358. if (data->target[id].period == 0 &&
  1359. data->target[id].offset == ASYNC_OFFSET ) {
  1360. SPRINTF("async");
  1361. } else {
  1362. SPRINTF(" sync");
  1363. }
  1364. } else {
  1365. SPRINTF(" none");
  1366. }
  1367. if (data->target[id].period != 0) {
  1368. speed = 1000000 / (data->target[id].period * 4);
  1369. SPRINTF(" transfer %d.%dMB/s, offset %d",
  1370. speed / 1000,
  1371. speed % 1000,
  1372. data->target[id].offset
  1373. );
  1374. }
  1375. SPRINTF("\n");
  1376. }
  1377. thislength = pos - (buffer + offset);
  1378. if(thislength < 0) {
  1379. *start = NULL;
  1380. return 0;
  1381. }
  1382. thislength = min(thislength, length);
  1383. *start = buffer + offset;
  1384. return thislength;
  1385. }
  1386. #undef SPRINTF
  1387. /*
  1388. * Reset parameters and call scsi_done for data->cur_lunt.
  1389. * Be careful setting SCpnt->result = DID_* before calling this function.
  1390. */
  1391. static void nsp32_scsi_done(struct scsi_cmnd *SCpnt)
  1392. {
  1393. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  1394. unsigned int base = SCpnt->device->host->io_port;
  1395. /*
  1396. * unmap pci
  1397. */
  1398. if (SCpnt->request_bufflen == 0) {
  1399. goto skip;
  1400. }
  1401. if (SCpnt->use_sg) {
  1402. pci_unmap_sg(data->Pci,
  1403. (struct scatterlist *)SCpnt->buffer,
  1404. SCpnt->use_sg, SCpnt->sc_data_direction);
  1405. } else {
  1406. pci_unmap_single(data->Pci,
  1407. (u32)SCpnt->SCp.have_data_in,
  1408. SCpnt->request_bufflen,
  1409. SCpnt->sc_data_direction);
  1410. }
  1411. skip:
  1412. /*
  1413. * clear TRANSFERCONTROL_BM_START
  1414. */
  1415. nsp32_write2(base, TRANSFER_CONTROL, 0);
  1416. nsp32_write4(base, BM_CNT, 0);
  1417. /*
  1418. * call scsi_done
  1419. */
  1420. (*SCpnt->scsi_done)(SCpnt);
  1421. /*
  1422. * reset parameters
  1423. */
  1424. data->cur_lunt->SCpnt = NULL;
  1425. data->cur_lunt = NULL;
  1426. data->cur_target = NULL;
  1427. data->CurrentSC = NULL;
  1428. }
  1429. /*
  1430. * Bus Free Occur
  1431. *
  1432. * Current Phase is BUSFREE. AutoSCSI is automatically execute BUSFREE phase
  1433. * with ACK reply when below condition is matched:
  1434. * MsgIn 00: Command Complete.
  1435. * MsgIn 02: Save Data Pointer.
  1436. * MsgIn 04: Diconnect.
  1437. * In other case, unexpected BUSFREE is detected.
  1438. */
  1439. static int nsp32_busfree_occur(struct scsi_cmnd *SCpnt, unsigned short execph)
  1440. {
  1441. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  1442. unsigned int base = SCpnt->device->host->io_port;
  1443. nsp32_dbg(NSP32_DEBUG_BUSFREE, "enter execph=0x%x", execph);
  1444. show_autophase(execph);
  1445. nsp32_write4(base, BM_CNT, 0);
  1446. nsp32_write2(base, TRANSFER_CONTROL, 0);
  1447. /*
  1448. * MsgIn 02: Save Data Pointer
  1449. *
  1450. * VALID:
  1451. * Save Data Pointer is received. Adjust pointer.
  1452. *
  1453. * NO-VALID:
  1454. * SCSI-3 says if Save Data Pointer is not received, then we restart
  1455. * processing and we can't adjust any SCSI data pointer in next data
  1456. * phase.
  1457. */
  1458. if (execph & MSGIN_02_VALID) {
  1459. nsp32_dbg(NSP32_DEBUG_BUSFREE, "MsgIn02_Valid");
  1460. /*
  1461. * Check sack_cnt/saved_sack_cnt, then adjust sg table if
  1462. * needed.
  1463. */
  1464. if (!(execph & MSGIN_00_VALID) &&
  1465. ((execph & DATA_IN_PHASE) || (execph & DATA_OUT_PHASE))) {
  1466. unsigned int sacklen, s_sacklen;
  1467. /*
  1468. * Read SACK count and SAVEDSACK count, then compare.
  1469. */
  1470. sacklen = nsp32_read4(base, SACK_CNT );
  1471. s_sacklen = nsp32_read4(base, SAVED_SACK_CNT);
  1472. /*
  1473. * If SAVEDSACKCNT == 0, it means SavedDataPointer is
  1474. * come after data transfering.
  1475. */
  1476. if (s_sacklen > 0) {
  1477. /*
  1478. * Comparing between sack and savedsack to
  1479. * check the condition of AutoMsgIn03.
  1480. *
  1481. * If they are same, set msgin03 == TRUE,
  1482. * COMMANDCONTROL_AUTO_MSGIN_03 is enabled at
  1483. * reselection. On the other hand, if they
  1484. * aren't same, set msgin03 == FALSE, and
  1485. * COMMANDCONTROL_AUTO_MSGIN_03 is disabled at
  1486. * reselection.
  1487. */
  1488. if (sacklen != s_sacklen) {
  1489. data->cur_lunt->msgin03 = FALSE;
  1490. } else {
  1491. data->cur_lunt->msgin03 = TRUE;
  1492. }
  1493. nsp32_adjust_busfree(SCpnt, s_sacklen);
  1494. }
  1495. }
  1496. /* This value has not substitude with valid value yet... */
  1497. //data->cur_lunt->save_datp = data->cur_datp;
  1498. } else {
  1499. /*
  1500. * no processing.
  1501. */
  1502. }
  1503. if (execph & MSGIN_03_VALID) {
  1504. /* MsgIn03 was valid to be processed. No need processing. */
  1505. }
  1506. /*
  1507. * target SDTR check
  1508. */
  1509. if (data->cur_target->sync_flag & SDTR_INITIATOR) {
  1510. /*
  1511. * SDTR negotiation pulled by the initiator has not
  1512. * finished yet. Fall back to ASYNC mode.
  1513. */
  1514. nsp32_set_async(data, data->cur_target);
  1515. data->cur_target->sync_flag &= ~SDTR_INITIATOR;
  1516. data->cur_target->sync_flag |= SDTR_DONE;
  1517. } else if (data->cur_target->sync_flag & SDTR_TARGET) {
  1518. /*
  1519. * SDTR negotiation pulled by the target has been
  1520. * negotiating.
  1521. */
  1522. if (execph & (MSGIN_00_VALID | MSGIN_04_VALID)) {
  1523. /*
  1524. * If valid message is received, then
  1525. * negotiation is succeeded.
  1526. */
  1527. } else {
  1528. /*
  1529. * On the contrary, if unexpected bus free is
  1530. * occurred, then negotiation is failed. Fall
  1531. * back to ASYNC mode.
  1532. */
  1533. nsp32_set_async(data, data->cur_target);
  1534. }
  1535. data->cur_target->sync_flag &= ~SDTR_TARGET;
  1536. data->cur_target->sync_flag |= SDTR_DONE;
  1537. }
  1538. /*
  1539. * It is always ensured by SCSI standard that initiator
  1540. * switches into Bus Free Phase after
  1541. * receiving message 00 (Command Complete), 04 (Disconnect).
  1542. * It's the reason that processing here is valid.
  1543. */
  1544. if (execph & MSGIN_00_VALID) {
  1545. /* MsgIn 00: Command Complete */
  1546. nsp32_dbg(NSP32_DEBUG_BUSFREE, "command complete");
  1547. SCpnt->SCp.Status = nsp32_read1(base, SCSI_CSB_IN);
  1548. SCpnt->SCp.Message = 0;
  1549. nsp32_dbg(NSP32_DEBUG_BUSFREE,
  1550. "normal end stat=0x%x resid=0x%x\n",
  1551. SCpnt->SCp.Status, SCpnt->resid);
  1552. SCpnt->result = (DID_OK << 16) |
  1553. (SCpnt->SCp.Message << 8) |
  1554. (SCpnt->SCp.Status << 0);
  1555. nsp32_scsi_done(SCpnt);
  1556. /* All operation is done */
  1557. return TRUE;
  1558. } else if (execph & MSGIN_04_VALID) {
  1559. /* MsgIn 04: Disconnect */
  1560. SCpnt->SCp.Status = nsp32_read1(base, SCSI_CSB_IN);
  1561. SCpnt->SCp.Message = 4;
  1562. nsp32_dbg(NSP32_DEBUG_BUSFREE, "disconnect");
  1563. return TRUE;
  1564. } else {
  1565. /* Unexpected bus free */
  1566. nsp32_msg(KERN_WARNING, "unexpected bus free occurred");
  1567. /* DID_ERROR? */
  1568. //SCpnt->result = (DID_OK << 16) | (SCpnt->SCp.Message << 8) | (SCpnt->SCp.Status << 0);
  1569. SCpnt->result = DID_ERROR << 16;
  1570. nsp32_scsi_done(SCpnt);
  1571. return TRUE;
  1572. }
  1573. return FALSE;
  1574. }
  1575. /*
  1576. * nsp32_adjust_busfree - adjusting SG table
  1577. *
  1578. * Note: This driver adjust the SG table using SCSI ACK
  1579. * counter instead of BMCNT counter!
  1580. */
  1581. static void nsp32_adjust_busfree(struct scsi_cmnd *SCpnt, unsigned int s_sacklen)
  1582. {
  1583. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  1584. int old_entry = data->cur_entry;
  1585. int new_entry;
  1586. int sg_num = data->cur_lunt->sg_num;
  1587. nsp32_sgtable *sgt = data->cur_lunt->sglun->sgt;
  1588. unsigned int restlen, sentlen;
  1589. u32_le len, addr;
  1590. nsp32_dbg(NSP32_DEBUG_SGLIST, "old resid=0x%x", SCpnt->resid);
  1591. /* adjust saved SACK count with 4 byte start address boundary */
  1592. s_sacklen -= le32_to_cpu(sgt[old_entry].addr) & 3;
  1593. /*
  1594. * calculate new_entry from sack count and each sgt[].len
  1595. * calculate the byte which is intent to send
  1596. */
  1597. sentlen = 0;
  1598. for (new_entry = old_entry; new_entry < sg_num; new_entry++) {
  1599. sentlen += (le32_to_cpu(sgt[new_entry].len) & ~SGTEND);
  1600. if (sentlen > s_sacklen) {
  1601. break;
  1602. }
  1603. }
  1604. /* all sgt is processed */
  1605. if (new_entry == sg_num) {
  1606. goto last;
  1607. }
  1608. if (sentlen == s_sacklen) {
  1609. /* XXX: confirm it's ok or not */
  1610. /* In this case, it's ok because we are at
  1611. the head element of the sg. restlen is correctly calculated. */
  1612. }
  1613. /* calculate the rest length for transfering */
  1614. restlen = sentlen - s_sacklen;
  1615. /* update adjusting current SG table entry */
  1616. len = le32_to_cpu(sgt[new_entry].len);
  1617. addr = le32_to_cpu(sgt[new_entry].addr);
  1618. addr += (len - restlen);
  1619. sgt[new_entry].addr = cpu_to_le32(addr);
  1620. sgt[new_entry].len = cpu_to_le32(restlen);
  1621. /* set cur_entry with new_entry */
  1622. data->cur_entry = new_entry;
  1623. return;
  1624. last:
  1625. if (SCpnt->resid < sentlen) {
  1626. nsp32_msg(KERN_ERR, "resid underflow");
  1627. }
  1628. SCpnt->resid -= sentlen;
  1629. nsp32_dbg(NSP32_DEBUG_SGLIST, "new resid=0x%x", SCpnt->resid);
  1630. /* update hostdata and lun */
  1631. return;
  1632. }
  1633. /*
  1634. * It's called MsgOut phase occur.
  1635. * NinjaSCSI-32Bi/UDE automatically processes up to 3 messages in
  1636. * message out phase. It, however, has more than 3 messages,
  1637. * HBA creates the interrupt and we have to process by hand.
  1638. */
  1639. static void nsp32_msgout_occur(struct scsi_cmnd *SCpnt)
  1640. {
  1641. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  1642. unsigned int base = SCpnt->device->host->io_port;
  1643. //unsigned short command;
  1644. long new_sgtp;
  1645. int i;
  1646. nsp32_dbg(NSP32_DEBUG_MSGOUTOCCUR,
  1647. "enter: msgout_len: 0x%x", data->msgout_len);
  1648. /*
  1649. * If MsgOut phase is occurred without having any
  1650. * message, then No_Operation is sent (SCSI-2).
  1651. */
  1652. if (data->msgout_len == 0) {
  1653. nsp32_build_nop(SCpnt);
  1654. }
  1655. /*
  1656. * Set SGTP ADDR current entry for restarting AUTOSCSI,
  1657. * because SGTP is incremented next point.
  1658. * There is few statement in the specification...
  1659. */
  1660. new_sgtp = data->cur_lunt->sglun_paddr +
  1661. (data->cur_lunt->cur_entry * sizeof(nsp32_sgtable));
  1662. /*
  1663. * send messages
  1664. */
  1665. for (i = 0; i < data->msgout_len; i++) {
  1666. nsp32_dbg(NSP32_DEBUG_MSGOUTOCCUR,
  1667. "%d : 0x%x", i, data->msgoutbuf[i]);
  1668. /*
  1669. * Check REQ is asserted.
  1670. */
  1671. nsp32_wait_req(data, ASSERT);
  1672. if (i == (data->msgout_len - 1)) {
  1673. /*
  1674. * If the last message, set the AutoSCSI restart
  1675. * before send back the ack message. AutoSCSI
  1676. * restart automatically negate ATN signal.
  1677. */
  1678. //command = (AUTO_MSGIN_00_OR_04 | AUTO_MSGIN_02);
  1679. //nsp32_restart_autoscsi(SCpnt, command);
  1680. nsp32_write2(base, COMMAND_CONTROL,
  1681. (CLEAR_CDB_FIFO_POINTER |
  1682. AUTO_COMMAND_PHASE |
  1683. AUTOSCSI_RESTART |
  1684. AUTO_MSGIN_00_OR_04 |
  1685. AUTO_MSGIN_02 ));
  1686. }
  1687. /*
  1688. * Write data with SACK, then wait sack is
  1689. * automatically negated.
  1690. */
  1691. nsp32_write1(base, SCSI_DATA_WITH_ACK, data->msgoutbuf[i]);
  1692. nsp32_wait_sack(data, NEGATE);
  1693. nsp32_dbg(NSP32_DEBUG_MSGOUTOCCUR, "bus: 0x%x\n",
  1694. nsp32_read1(base, SCSI_BUS_MONITOR));
  1695. };
  1696. data->msgout_len = 0;
  1697. nsp32_dbg(NSP32_DEBUG_MSGOUTOCCUR, "exit");
  1698. }
  1699. /*
  1700. * Restart AutoSCSI
  1701. *
  1702. * Note: Restarting AutoSCSI needs set:
  1703. * SYNC_REG, ACK_WIDTH, SGT_ADR, TRANSFER_CONTROL
  1704. */
  1705. static void nsp32_restart_autoscsi(struct scsi_cmnd *SCpnt, unsigned short command)
  1706. {
  1707. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  1708. unsigned int base = data->BaseAddress;
  1709. unsigned short transfer = 0;
  1710. nsp32_dbg(NSP32_DEBUG_RESTART, "enter");
  1711. if (data->cur_target == NULL || data->cur_lunt == NULL) {
  1712. nsp32_msg(KERN_ERR, "Target or Lun is invalid");
  1713. }
  1714. /*
  1715. * set SYNC_REG
  1716. * Don't set BM_START_ADR before setting this register.
  1717. */
  1718. nsp32_write1(base, SYNC_REG, data->cur_target->syncreg);
  1719. /*
  1720. * set ACKWIDTH
  1721. */
  1722. nsp32_write1(base, ACK_WIDTH, data->cur_target->ackwidth);
  1723. /*
  1724. * set SREQ hazard killer sampling rate
  1725. */
  1726. nsp32_write1(base, SREQ_SMPL_RATE, data->cur_target->sample_reg);
  1727. /*
  1728. * set SGT ADDR (physical address)
  1729. */
  1730. nsp32_write4(base, SGT_ADR, data->cur_lunt->sglun_paddr);
  1731. /*
  1732. * set TRANSFER CONTROL REG
  1733. */
  1734. transfer = 0;
  1735. transfer |= (TRANSFER_GO | ALL_COUNTER_CLR);
  1736. if (data->trans_method & NSP32_TRANSFER_BUSMASTER) {
  1737. if (SCpnt->request_bufflen > 0) {
  1738. transfer |= BM_START;
  1739. }
  1740. } else if (data->trans_method & NSP32_TRANSFER_MMIO) {
  1741. transfer |= CB_MMIO_MODE;
  1742. } else if (data->trans_method & NSP32_TRANSFER_PIO) {
  1743. transfer |= CB_IO_MODE;
  1744. }
  1745. nsp32_write2(base, TRANSFER_CONTROL, transfer);
  1746. /*
  1747. * restart AutoSCSI
  1748. *
  1749. * TODO: COMMANDCONTROL_AUTO_COMMAND_PHASE is needed ?
  1750. */
  1751. command |= (CLEAR_CDB_FIFO_POINTER |
  1752. AUTO_COMMAND_PHASE |
  1753. AUTOSCSI_RESTART );
  1754. nsp32_write2(base, COMMAND_CONTROL, command);
  1755. nsp32_dbg(NSP32_DEBUG_RESTART, "exit");
  1756. }
  1757. /*
  1758. * cannot run automatically message in occur
  1759. */
  1760. static void nsp32_msgin_occur(struct scsi_cmnd *SCpnt,
  1761. unsigned long irq_status,
  1762. unsigned short execph)
  1763. {
  1764. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  1765. unsigned int base = SCpnt->device->host->io_port;
  1766. unsigned char msg;
  1767. unsigned char msgtype;
  1768. unsigned char newlun;
  1769. unsigned short command = 0;
  1770. int msgclear = TRUE;
  1771. long new_sgtp;
  1772. int ret;
  1773. /*
  1774. * read first message
  1775. * Use SCSIDATA_W_ACK instead of SCSIDATAIN, because the procedure
  1776. * of Message-In have to be processed before sending back SCSI ACK.
  1777. */
  1778. msg = nsp32_read1(base, SCSI_DATA_IN);
  1779. data->msginbuf[(unsigned char)data->msgin_len] = msg;
  1780. msgtype = data->msginbuf[0];
  1781. nsp32_dbg(NSP32_DEBUG_MSGINOCCUR,
  1782. "enter: msglen: 0x%x msgin: 0x%x msgtype: 0x%x",
  1783. data->msgin_len, msg, msgtype);
  1784. /*
  1785. * TODO: We need checking whether bus phase is message in?
  1786. */
  1787. /*
  1788. * assert SCSI ACK
  1789. */
  1790. nsp32_sack_assert(data);
  1791. /*
  1792. * processing IDENTIFY
  1793. */
  1794. if (msgtype & 0x80) {
  1795. if (!(irq_status & IRQSTATUS_RESELECT_OCCUER)) {
  1796. /* Invalid (non reselect) phase */
  1797. goto reject;
  1798. }
  1799. newlun = msgtype & 0x1f; /* TODO: SPI-3 compliant? */
  1800. ret = nsp32_reselection(SCpnt, newlun);
  1801. if (ret == TRUE) {
  1802. goto restart;
  1803. } else {
  1804. goto reject;
  1805. }
  1806. }
  1807. /*
  1808. * processing messages except for IDENTIFY
  1809. *
  1810. * TODO: Messages are all SCSI-2 terminology. SCSI-3 compliance is TODO.
  1811. */
  1812. switch (msgtype) {
  1813. /*
  1814. * 1-byte message
  1815. */
  1816. case COMMAND_COMPLETE:
  1817. case DISCONNECT:
  1818. /*
  1819. * These messages should not be occurred.
  1820. * They should be processed on AutoSCSI sequencer.
  1821. */
  1822. nsp32_msg(KERN_WARNING,
  1823. "unexpected message of AutoSCSI MsgIn: 0x%x", msg);
  1824. break;
  1825. case RESTORE_POINTERS:
  1826. /*
  1827. * AutoMsgIn03 is disabled, and HBA gets this message.
  1828. */
  1829. if ((execph & DATA_IN_PHASE) || (execph & DATA_OUT_PHASE)) {
  1830. unsigned int s_sacklen;
  1831. s_sacklen = nsp32_read4(base, SAVED_SACK_CNT);
  1832. if ((execph & MSGIN_02_VALID) && (s_sacklen > 0)) {
  1833. nsp32_adjust_busfree(SCpnt, s_sacklen);
  1834. } else {
  1835. /* No need to rewrite SGT */
  1836. }
  1837. }
  1838. data->cur_lunt->msgin03 = FALSE;
  1839. /* Update with the new value */
  1840. /* reset SACK/SavedACK counter (or ALL clear?) */
  1841. nsp32_write4(base, CLR_COUNTER, CLRCOUNTER_ALLMASK);
  1842. /*
  1843. * set new sg pointer
  1844. */
  1845. new_sgtp = data->cur_lunt->sglun_paddr +
  1846. (data->cur_lunt->cur_entry * sizeof(nsp32_sgtable));
  1847. nsp32_write4(base, SGT_ADR, new_sgtp);
  1848. break;
  1849. case SAVE_POINTERS:
  1850. /*
  1851. * These messages should not be occurred.
  1852. * They should be processed on AutoSCSI sequencer.
  1853. */
  1854. nsp32_msg (KERN_WARNING,
  1855. "unexpected message of AutoSCSI MsgIn: SAVE_POINTERS");
  1856. break;
  1857. case MESSAGE_REJECT:
  1858. /* If previous message_out is sending SDTR, and get
  1859. message_reject from target, SDTR negotiation is failed */
  1860. if (data->cur_target->sync_flag &
  1861. (SDTR_INITIATOR | SDTR_TARGET)) {
  1862. /*
  1863. * Current target is negotiating SDTR, but it's
  1864. * failed. Fall back to async transfer mode, and set
  1865. * SDTR_DONE.
  1866. */
  1867. nsp32_set_async(data, data->cur_target);
  1868. data->cur_target->sync_flag &= ~SDTR_INITIATOR;
  1869. data->cur_target->sync_flag |= SDTR_DONE;
  1870. }
  1871. break;
  1872. case LINKED_CMD_COMPLETE:
  1873. case LINKED_FLG_CMD_COMPLETE:
  1874. /* queue tag is not supported currently */
  1875. nsp32_msg (KERN_WARNING,
  1876. "unsupported message: 0x%x", msgtype);
  1877. break;
  1878. case INITIATE_RECOVERY:
  1879. /* staring ECA (Extended Contingent Allegiance) state. */
  1880. /* This message is declined in SPI2 or later. */
  1881. goto reject;
  1882. /*
  1883. * 2-byte message
  1884. */
  1885. case SIMPLE_QUEUE_TAG:
  1886. case 0x23:
  1887. /*
  1888. * 0x23: Ignore_Wide_Residue is not declared in scsi.h.
  1889. * No support is needed.
  1890. */
  1891. if (data->msgin_len >= 1) {
  1892. goto reject;
  1893. }
  1894. /* current position is 1-byte of 2 byte */
  1895. msgclear = FALSE;
  1896. break;
  1897. /*
  1898. * extended message
  1899. */
  1900. case EXTENDED_MESSAGE:
  1901. if (data->msgin_len < 1) {
  1902. /*
  1903. * Current position does not reach 2-byte
  1904. * (2-byte is extended message length).
  1905. */
  1906. msgclear = FALSE;
  1907. break;
  1908. }
  1909. if ((data->msginbuf[1] + 1) > data->msgin_len) {
  1910. /*
  1911. * Current extended message has msginbuf[1] + 2
  1912. * (msgin_len starts counting from 0, so buf[1] + 1).
  1913. * If current message position is not finished,
  1914. * continue receiving message.
  1915. */
  1916. msgclear = FALSE;
  1917. break;
  1918. }
  1919. /*
  1920. * Reach here means regular length of each type of
  1921. * extended messages.
  1922. */
  1923. switch (data->msginbuf[2]) {
  1924. case EXTENDED_MODIFY_DATA_POINTER:
  1925. /* TODO */
  1926. goto reject; /* not implemented yet */
  1927. break;
  1928. case EXTENDED_SDTR:
  1929. /*
  1930. * Exchange this message between initiator and target.
  1931. */
  1932. if (data->msgin_len != EXTENDED_SDTR_LEN + 1) {
  1933. /*
  1934. * received inappropriate message.
  1935. */
  1936. goto reject;
  1937. break;
  1938. }
  1939. nsp32_analyze_sdtr(SCpnt);
  1940. break;
  1941. case EXTENDED_EXTENDED_IDENTIFY:
  1942. /* SCSI-I only, not supported. */
  1943. goto reject; /* not implemented yet */
  1944. break;
  1945. case EXTENDED_WDTR:
  1946. goto reject; /* not implemented yet */
  1947. break;
  1948. default:
  1949. goto reject;
  1950. }
  1951. break;
  1952. default:
  1953. goto reject;
  1954. }
  1955. restart:
  1956. if (msgclear == TRUE) {
  1957. data->msgin_len = 0;
  1958. /*
  1959. * If restarting AutoSCSI, but there are some message to out
  1960. * (msgout_len > 0), set AutoATN, and set SCSIMSGOUT as 0
  1961. * (MV_VALID = 0). When commandcontrol is written with
  1962. * AutoSCSI restart, at the same time MsgOutOccur should be
  1963. * happened (however, such situation is really possible...?).
  1964. */
  1965. if (data->msgout_len > 0) {
  1966. nsp32_write4(base, SCSI_MSG_OUT, 0);
  1967. command |= AUTO_ATN;
  1968. }
  1969. /*
  1970. * restart AutoSCSI
  1971. * If it's failed, COMMANDCONTROL_AUTO_COMMAND_PHASE is needed.
  1972. */
  1973. command |= (AUTO_MSGIN_00_OR_04 | AUTO_MSGIN_02);
  1974. /*
  1975. * If current msgin03 is TRUE, then flag on.
  1976. */
  1977. if (data->cur_lunt->msgin03 == TRUE) {
  1978. command |= AUTO_MSGIN_03;
  1979. }
  1980. data->cur_lunt->msgin03 = FALSE;
  1981. } else {
  1982. data->msgin_len++;
  1983. }
  1984. /*
  1985. * restart AutoSCSI
  1986. */
  1987. nsp32_restart_autoscsi(SCpnt, command);
  1988. /*
  1989. * wait SCSI REQ negate for REQ-ACK handshake
  1990. */
  1991. nsp32_wait_req(data, NEGATE);
  1992. /*
  1993. * negate SCSI ACK
  1994. */
  1995. nsp32_sack_negate(data);
  1996. nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "exit");
  1997. return;
  1998. reject:
  1999. nsp32_msg(KERN_WARNING,
  2000. "invalid or unsupported MessageIn, rejected. "
  2001. "current msg: 0x%x (len: 0x%x), processing msg: 0x%x",
  2002. msg, data->msgin_len, msgtype);
  2003. nsp32_build_reject(SCpnt);
  2004. data->msgin_len = 0;
  2005. goto restart;
  2006. }
  2007. /*
  2008. *
  2009. */
  2010. static void nsp32_analyze_sdtr(struct scsi_cmnd *SCpnt)
  2011. {
  2012. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  2013. nsp32_target *target = data->cur_target;
  2014. nsp32_sync_table *synct;
  2015. unsigned char get_period = data->msginbuf[3];
  2016. unsigned char get_offset = data->msginbuf[4];
  2017. int entry;
  2018. int syncnum;
  2019. nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "enter");
  2020. synct = data->synct;
  2021. syncnum = data->syncnum;
  2022. /*
  2023. * If this inititor sent the SDTR message, then target responds SDTR,
  2024. * initiator SYNCREG, ACKWIDTH from SDTR parameter.
  2025. * Messages are not appropriate, then send back reject message.
  2026. * If initiator did not send the SDTR, but target sends SDTR,
  2027. * initiator calculator the appropriate parameter and send back SDTR.
  2028. */
  2029. if (target->sync_flag & SDTR_INITIATOR) {
  2030. /*
  2031. * Initiator sent SDTR, the target responds and
  2032. * send back negotiation SDTR.
  2033. */
  2034. nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "target responds SDTR");
  2035. target->sync_flag &= ~SDTR_INITIATOR;
  2036. target->sync_flag |= SDTR_DONE;
  2037. /*
  2038. * offset:
  2039. */
  2040. if (get_offset > SYNC_OFFSET) {
  2041. /*
  2042. * Negotiation is failed, the target send back
  2043. * unexpected offset value.
  2044. */
  2045. goto reject;
  2046. }
  2047. if (get_offset == ASYNC_OFFSET) {
  2048. /*
  2049. * Negotiation is succeeded, the target want
  2050. * to fall back into asynchronous transfer mode.
  2051. */
  2052. goto async;
  2053. }
  2054. /*
  2055. * period:
  2056. * Check whether sync period is too short. If too short,
  2057. * fall back to async mode. If it's ok, then investigate
  2058. * the received sync period. If sync period is acceptable
  2059. * between sync table start_period and end_period, then
  2060. * set this I_T nexus as sent offset and period.
  2061. * If it's not acceptable, send back reject and fall back
  2062. * to async mode.
  2063. */
  2064. if (get_period < data->synct[0].period_num) {
  2065. /*
  2066. * Negotiation is failed, the target send back
  2067. * unexpected period value.
  2068. */
  2069. goto reject;
  2070. }
  2071. entry = nsp32_search_period_entry(data, target, get_period);
  2072. if (entry < 0) {
  2073. /*
  2074. * Target want to use long period which is not
  2075. * acceptable NinjaSCSI-32Bi/UDE.
  2076. */
  2077. goto reject;
  2078. }
  2079. /*
  2080. * Set new sync table and offset in this I_T nexus.
  2081. */
  2082. nsp32_set_sync_entry(data, target, entry, get_offset);
  2083. } else {
  2084. /* Target send SDTR to initiator. */
  2085. nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "target send SDTR");
  2086. target->sync_flag |= SDTR_INITIATOR;
  2087. /* offset: */
  2088. if (get_offset > SYNC_OFFSET) {
  2089. /* send back as SYNC_OFFSET */
  2090. get_offset = SYNC_OFFSET;
  2091. }
  2092. /* period: */
  2093. if (get_period < data->synct[0].period_num) {
  2094. get_period = data->synct[0].period_num;
  2095. }
  2096. entry = nsp32_search_period_entry(data, target, get_period);
  2097. if (get_offset == ASYNC_OFFSET || entry < 0) {
  2098. nsp32_set_async(data, target);
  2099. nsp32_build_sdtr(SCpnt, 0, ASYNC_OFFSET);
  2100. } else {
  2101. nsp32_set_sync_entry(data, target, entry, get_offset);
  2102. nsp32_build_sdtr(SCpnt, get_period, get_offset);
  2103. }
  2104. }
  2105. target->period = get_period;
  2106. nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "exit");
  2107. return;
  2108. reject:
  2109. /*
  2110. * If the current message is unacceptable, send back to the target
  2111. * with reject message.
  2112. */
  2113. nsp32_build_reject(SCpnt);
  2114. async:
  2115. nsp32_set_async(data, target); /* set as ASYNC transfer mode */
  2116. target->period = 0;
  2117. nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "exit: set async");
  2118. return;
  2119. }
  2120. /*
  2121. * Search config entry number matched in sync_table from given
  2122. * target and speed period value. If failed to search, return negative value.
  2123. */
  2124. static int nsp32_search_period_entry(nsp32_hw_data *data,
  2125. nsp32_target *target,
  2126. unsigned char period)
  2127. {
  2128. int i;
  2129. if (target->limit_entry >= data->syncnum) {
  2130. nsp32_msg(KERN_ERR, "limit_entry exceeds syncnum!");
  2131. target->limit_entry = 0;
  2132. }
  2133. for (i = target->limit_entry; i < data->syncnum; i++) {
  2134. if (period >= data->synct[i].start_period &&
  2135. period <= data->synct[i].end_period) {
  2136. break;
  2137. }
  2138. }
  2139. /*
  2140. * Check given period value is over the sync_table value.
  2141. * If so, return max value.
  2142. */
  2143. if (i == data->syncnum) {
  2144. i = -1;
  2145. }
  2146. return i;
  2147. }
  2148. /*
  2149. * target <-> initiator use ASYNC transfer
  2150. */
  2151. static void nsp32_set_async(nsp32_hw_data *data, nsp32_target *target)
  2152. {
  2153. unsigned char period = data->synct[target->limit_entry].period_num;
  2154. target->offset = ASYNC_OFFSET;
  2155. target->period = 0;
  2156. target->syncreg = TO_SYNCREG(period, ASYNC_OFFSET);
  2157. target->ackwidth = 0;
  2158. target->sample_reg = 0;
  2159. nsp32_dbg(NSP32_DEBUG_SYNC, "set async");
  2160. }
  2161. /*
  2162. * target <-> initiator use maximum SYNC transfer
  2163. */
  2164. static void nsp32_set_max_sync(nsp32_hw_data *data,
  2165. nsp32_target *target,
  2166. unsigned char *period,
  2167. unsigned char *offset)
  2168. {
  2169. unsigned char period_num, ackwidth;
  2170. period_num = data->synct[target->limit_entry].period_num;
  2171. *period = data->synct[target->limit_entry].start_period;
  2172. ackwidth = data->synct[target->limit_entry].ackwidth;
  2173. *offset = SYNC_OFFSET;
  2174. target->syncreg = TO_SYNCREG(period_num, *offset);
  2175. target->ackwidth = ackwidth;
  2176. target->offset = *offset;
  2177. target->sample_reg = 0; /* disable SREQ sampling */
  2178. }
  2179. /*
  2180. * target <-> initiator use entry number speed
  2181. */
  2182. static void nsp32_set_sync_entry(nsp32_hw_data *data,
  2183. nsp32_target *target,
  2184. int entry,
  2185. unsigned char offset)
  2186. {
  2187. unsigned char period, ackwidth, sample_rate;
  2188. period = data->synct[entry].period_num;
  2189. ackwidth = data->synct[entry].ackwidth;
  2190. offset = offset;
  2191. sample_rate = data->synct[entry].sample_rate;
  2192. target->syncreg = TO_SYNCREG(period, offset);
  2193. target->ackwidth = ackwidth;
  2194. target->offset = offset;
  2195. target->sample_reg = sample_rate | SAMPLING_ENABLE;
  2196. nsp32_dbg(NSP32_DEBUG_SYNC, "set sync");
  2197. }
  2198. /*
  2199. * It waits until SCSI REQ becomes assertion or negation state.
  2200. *
  2201. * Note: If nsp32_msgin_occur is called, we asserts SCSI ACK. Then
  2202. * connected target responds SCSI REQ negation. We have to wait
  2203. * SCSI REQ becomes negation in order to negate SCSI ACK signal for
  2204. * REQ-ACK handshake.
  2205. */
  2206. static void nsp32_wait_req(nsp32_hw_data *data, int state)
  2207. {
  2208. unsigned int base = data->BaseAddress;
  2209. int wait_time = 0;
  2210. unsigned char bus, req_bit;
  2211. if (!((state == ASSERT) || (state == NEGATE))) {
  2212. nsp32_msg(KERN_ERR, "unknown state designation");
  2213. }
  2214. /* REQ is BIT(5) */
  2215. req_bit = (state == ASSERT ? BUSMON_REQ : 0);
  2216. do {
  2217. bus = nsp32_read1(base, SCSI_BUS_MONITOR);
  2218. if ((bus & BUSMON_REQ) == req_bit) {
  2219. nsp32_dbg(NSP32_DEBUG_WAIT,
  2220. "wait_time: %d", wait_time);
  2221. return;
  2222. }
  2223. udelay(1);
  2224. wait_time++;
  2225. } while (wait_time < REQSACK_TIMEOUT_TIME);
  2226. nsp32_msg(KERN_WARNING, "wait REQ timeout, req_bit: 0x%x", req_bit);
  2227. }
  2228. /*
  2229. * It waits until SCSI SACK becomes assertion or negation state.
  2230. */
  2231. static void nsp32_wait_sack(nsp32_hw_data *data, int state)
  2232. {
  2233. unsigned int base = data->BaseAddress;
  2234. int wait_time = 0;
  2235. unsigned char bus, ack_bit;
  2236. if (!((state == ASSERT) || (state == NEGATE))) {
  2237. nsp32_msg(KERN_ERR, "unknown state designation");
  2238. }
  2239. /* ACK is BIT(4) */
  2240. ack_bit = (state == ASSERT ? BUSMON_ACK : 0);
  2241. do {
  2242. bus = nsp32_read1(base, SCSI_BUS_MONITOR);
  2243. if ((bus & BUSMON_ACK) == ack_bit) {
  2244. nsp32_dbg(NSP32_DEBUG_WAIT,
  2245. "wait_time: %d", wait_time);
  2246. return;
  2247. }
  2248. udelay(1);
  2249. wait_time++;
  2250. } while (wait_time < REQSACK_TIMEOUT_TIME);
  2251. nsp32_msg(KERN_WARNING, "wait SACK timeout, ack_bit: 0x%x", ack_bit);
  2252. }
  2253. /*
  2254. * assert SCSI ACK
  2255. *
  2256. * Note: SCSI ACK assertion needs with ACKENB=1, AUTODIRECTION=1.
  2257. */
  2258. static void nsp32_sack_assert(nsp32_hw_data *data)
  2259. {
  2260. unsigned int base = data->BaseAddress;
  2261. unsigned char busctrl;
  2262. busctrl = nsp32_read1(base, SCSI_BUS_CONTROL);
  2263. busctrl |= (BUSCTL_ACK | AUTODIRECTION | ACKENB);
  2264. nsp32_write1(base, SCSI_BUS_CONTROL, busctrl);
  2265. }
  2266. /*
  2267. * negate SCSI ACK
  2268. */
  2269. static void nsp32_sack_negate(nsp32_hw_data *data)
  2270. {
  2271. unsigned int base = data->BaseAddress;
  2272. unsigned char busctrl;
  2273. busctrl = nsp32_read1(base, SCSI_BUS_CONTROL);
  2274. busctrl &= ~BUSCTL_ACK;
  2275. nsp32_write1(base, SCSI_BUS_CONTROL, busctrl);
  2276. }
  2277. /*
  2278. * Note: n_io_port is defined as 0x7f because I/O register port is
  2279. * assigned as:
  2280. * 0x800-0x8ff: memory mapped I/O port
  2281. * 0x900-0xbff: (map same 0x800-0x8ff I/O port image repeatedly)
  2282. * 0xc00-0xfff: CardBus status registers
  2283. */
  2284. #if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,73))
  2285. #define DETECT_OK 0
  2286. #define DETECT_NG 1
  2287. #define PCIDEV pdev
  2288. static int nsp32_detect(struct pci_dev *pdev)
  2289. #else
  2290. #define DETECT_OK 1
  2291. #define DETECT_NG 0
  2292. #define PCIDEV (data->Pci)
  2293. static int nsp32_detect(Scsi_Host_Template *sht)
  2294. #endif
  2295. {
  2296. struct Scsi_Host *host; /* registered host structure */
  2297. struct resource *res;
  2298. nsp32_hw_data *data;
  2299. int ret;
  2300. int i, j;
  2301. nsp32_dbg(NSP32_DEBUG_REGISTER, "enter");
  2302. /*
  2303. * register this HBA as SCSI device
  2304. */
  2305. #if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,73))
  2306. host = scsi_host_alloc(&nsp32_template, sizeof(nsp32_hw_data));
  2307. #else
  2308. host = scsi_register(sht, sizeof(nsp32_hw_data));
  2309. #endif
  2310. if (host == NULL) {
  2311. nsp32_msg (KERN_ERR, "failed to scsi register");
  2312. goto err;
  2313. }
  2314. /*
  2315. * set nsp32_hw_data
  2316. */
  2317. data = (nsp32_hw_data *)host->hostdata;
  2318. memcpy(data, &nsp32_data_base, sizeof(nsp32_hw_data));
  2319. host->irq = data->IrqNumber;
  2320. host->io_port = data->BaseAddress;
  2321. host->unique_id = data->BaseAddress;
  2322. host->n_io_port = data->NumAddress;
  2323. host->base = (unsigned long)data->MmioAddress;
  2324. #if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,63))
  2325. scsi_set_device(host, &PCIDEV->dev);
  2326. #else
  2327. scsi_set_pci_device(host, PCIDEV);
  2328. #endif
  2329. data->Host = host;
  2330. spin_lock_init(&(data->Lock));
  2331. data->cur_lunt = NULL;
  2332. data->cur_target = NULL;
  2333. /*
  2334. * Bus master transfer mode is supported currently.
  2335. */
  2336. data->trans_method = NSP32_TRANSFER_BUSMASTER;
  2337. /*
  2338. * Set clock div, CLOCK_4 (HBA has own external clock, and
  2339. * dividing * 100ns/4).
  2340. * Currently CLOCK_4 has only tested, not for CLOCK_2/PCICLK yet.
  2341. */
  2342. data->clock = CLOCK_4;
  2343. /*
  2344. * Select appropriate nsp32_sync_table and set I_CLOCKDIV.
  2345. */
  2346. switch (data->clock) {
  2347. case CLOCK_4:
  2348. /* If data->clock is CLOCK_4, then select 40M sync table. */
  2349. data->synct = nsp32_sync_table_40M;
  2350. data->syncnum = ARRAY_SIZE(nsp32_sync_table_40M);
  2351. break;
  2352. case CLOCK_2:
  2353. /* If data->clock is CLOCK_2, then select 20M sync table. */
  2354. data->synct = nsp32_sync_table_20M;
  2355. data->syncnum = ARRAY_SIZE(nsp32_sync_table_20M);
  2356. break;
  2357. case PCICLK:
  2358. /* If data->clock is PCICLK, then select pci sync table. */
  2359. data->synct = nsp32_sync_table_pci;
  2360. data->syncnum = ARRAY_SIZE(nsp32_sync_table_pci);
  2361. break;
  2362. default:
  2363. nsp32_msg(KERN_WARNING,
  2364. "Invalid clock div is selected, set CLOCK_4.");
  2365. /* Use default value CLOCK_4 */
  2366. data->clock = CLOCK_4;
  2367. data->synct = nsp32_sync_table_40M;
  2368. data->syncnum = ARRAY_SIZE(nsp32_sync_table_40M);
  2369. }
  2370. /*
  2371. * setup nsp32_lunt
  2372. */
  2373. /*
  2374. * setup DMA
  2375. */
  2376. if (pci_set_dma_mask(PCIDEV, 0xffffffffUL) != 0) {
  2377. nsp32_msg (KERN_ERR, "failed to set PCI DMA mask");
  2378. goto scsi_unregister;
  2379. }
  2380. /*
  2381. * allocate autoparam DMA resource.
  2382. */
  2383. data->autoparam = pci_alloc_consistent(PCIDEV, sizeof(nsp32_autoparam), &(data->auto_paddr));
  2384. if (data->autoparam == NULL) {
  2385. nsp32_msg(KERN_ERR, "failed to allocate DMA memory");
  2386. goto scsi_unregister;
  2387. }
  2388. /*
  2389. * allocate scatter-gather DMA resource.
  2390. */
  2391. data->sg_list = pci_alloc_consistent(PCIDEV, NSP32_SG_TABLE_SIZE,
  2392. &(data->sg_paddr));
  2393. if (data->sg_list == NULL) {
  2394. nsp32_msg(KERN_ERR, "failed to allocate DMA memory");
  2395. goto free_autoparam;
  2396. }
  2397. for (i = 0; i < ARRAY_SIZE(data->lunt); i++) {
  2398. for (j = 0; j < ARRAY_SIZE(data->lunt[0]); j++) {
  2399. int offset = i * ARRAY_SIZE(data->lunt[0]) + j;
  2400. nsp32_lunt tmp = {
  2401. .SCpnt = NULL,
  2402. .save_datp = 0,
  2403. .msgin03 = FALSE,
  2404. .sg_num = 0,
  2405. .cur_entry = 0,
  2406. .sglun = &(data->sg_list[offset]),
  2407. .sglun_paddr = data->sg_paddr + (offset * sizeof(nsp32_sglun)),
  2408. };
  2409. data->lunt[i][j] = tmp;
  2410. }
  2411. }
  2412. /*
  2413. * setup target
  2414. */
  2415. for (i = 0; i < ARRAY_SIZE(data->target); i++) {
  2416. nsp32_target *target = &(data->target[i]);
  2417. target->limit_entry = 0;
  2418. target->sync_flag = 0;
  2419. nsp32_set_async(data, target);
  2420. }
  2421. /*
  2422. * EEPROM check
  2423. */
  2424. ret = nsp32_getprom_param(data);
  2425. if (ret == FALSE) {
  2426. data->resettime = 3; /* default 3 */
  2427. }
  2428. /*
  2429. * setup HBA
  2430. */
  2431. nsp32hw_init(data);
  2432. snprintf(data->info_str, sizeof(data->info_str),
  2433. "NinjaSCSI-32Bi/UDE: irq %d, io 0x%lx+0x%x",
  2434. host->irq, host->io_port, host->n_io_port);
  2435. /*
  2436. * SCSI bus reset
  2437. *
  2438. * Note: It's important to reset SCSI bus in initialization phase.
  2439. * NinjaSCSI-32Bi/UDE HBA EEPROM seems to exchange SDTR when
  2440. * system is coming up, so SCSI devices connected to HBA is set as
  2441. * un-asynchronous mode. It brings the merit that this HBA is
  2442. * ready to start synchronous transfer without any preparation,
  2443. * but we are difficult to control transfer speed. In addition,
  2444. * it prevents device transfer speed from effecting EEPROM start-up
  2445. * SDTR. NinjaSCSI-32Bi/UDE has the feature if EEPROM is set as
  2446. * Auto Mode, then FAST-10M is selected when SCSI devices are
  2447. * connected same or more than 4 devices. It should be avoided
  2448. * depending on this specification. Thus, resetting the SCSI bus
  2449. * restores all connected SCSI devices to asynchronous mode, then
  2450. * this driver set SDTR safely later, and we can control all SCSI
  2451. * device transfer mode.
  2452. */
  2453. nsp32_do_bus_reset(data);
  2454. ret = request_irq(host->irq, do_nsp32_isr,
  2455. SA_SHIRQ | SA_SAMPLE_RANDOM, "nsp32", data);
  2456. if (ret < 0) {
  2457. nsp32_msg(KERN_ERR, "Unable to allocate IRQ for NinjaSCSI32 "
  2458. "SCSI PCI controller. Interrupt: %d", host->irq);
  2459. goto free_sg_list;
  2460. }
  2461. /*
  2462. * PCI IO register
  2463. */
  2464. res = request_region(host->io_port, host->n_io_port, "nsp32");
  2465. if (res == NULL) {
  2466. nsp32_msg(KERN_ERR,
  2467. "I/O region 0x%lx+0x%lx is already used",
  2468. data->BaseAddress, data->NumAddress);
  2469. goto free_irq;
  2470. }
  2471. #if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,73))
  2472. scsi_add_host (host, &PCIDEV->dev);
  2473. scsi_scan_host(host);
  2474. #endif
  2475. pci_set_drvdata(PCIDEV, host);
  2476. return DETECT_OK;
  2477. free_irq:
  2478. free_irq(host->irq, data);
  2479. free_sg_list:
  2480. pci_free_consistent(PCIDEV, NSP32_SG_TABLE_SIZE,
  2481. data->sg_list, data->sg_paddr);
  2482. free_autoparam:
  2483. pci_free_consistent(PCIDEV, sizeof(nsp32_autoparam),
  2484. data->autoparam, data->auto_paddr);
  2485. scsi_unregister:
  2486. scsi_host_put(host);
  2487. err:
  2488. return DETECT_NG;
  2489. }
  2490. #undef DETECT_OK
  2491. #undef DETECT_NG
  2492. #undef PCIDEV
  2493. static int nsp32_release(struct Scsi_Host *host)
  2494. {
  2495. nsp32_hw_data *data = (nsp32_hw_data *)host->hostdata;
  2496. if (data->autoparam) {
  2497. pci_free_consistent(data->Pci, sizeof(nsp32_autoparam),
  2498. data->autoparam, data->auto_paddr);
  2499. }
  2500. if (data->sg_list) {
  2501. pci_free_consistent(data->Pci, NSP32_SG_TABLE_SIZE,
  2502. data->sg_list, data->sg_paddr);
  2503. }
  2504. if (host->irq) {
  2505. free_irq(host->irq, data);
  2506. }
  2507. if (host->io_port && host->n_io_port) {
  2508. release_region(host->io_port, host->n_io_port);
  2509. }
  2510. if (data->MmioAddress) {
  2511. iounmap(data->MmioAddress);
  2512. }
  2513. return 0;
  2514. }
  2515. static const char *nsp32_info(struct Scsi_Host *shpnt)
  2516. {
  2517. nsp32_hw_data *data = (nsp32_hw_data *)shpnt->hostdata;
  2518. return data->info_str;
  2519. }
  2520. /****************************************************************************
  2521. * error handler
  2522. */
  2523. static int nsp32_eh_abort(struct scsi_cmnd *SCpnt)
  2524. {
  2525. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  2526. unsigned int base = SCpnt->device->host->io_port;
  2527. nsp32_msg(KERN_WARNING, "abort");
  2528. if (data->cur_lunt->SCpnt == NULL) {
  2529. nsp32_dbg(NSP32_DEBUG_BUSRESET, "abort failed");
  2530. return FAILED;
  2531. }
  2532. if (data->cur_target->sync_flag & (SDTR_INITIATOR | SDTR_TARGET)) {
  2533. /* reset SDTR negotiation */
  2534. data->cur_target->sync_flag = 0;
  2535. nsp32_set_async(data, data->cur_target);
  2536. }
  2537. nsp32_write2(base, TRANSFER_CONTROL, 0);
  2538. nsp32_write2(base, BM_CNT, 0);
  2539. SCpnt->result = DID_ABORT << 16;
  2540. nsp32_scsi_done(SCpnt);
  2541. nsp32_dbg(NSP32_DEBUG_BUSRESET, "abort success");
  2542. return SUCCESS;
  2543. }
  2544. static int nsp32_eh_bus_reset(struct scsi_cmnd *SCpnt)
  2545. {
  2546. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  2547. unsigned int base = SCpnt->device->host->io_port;
  2548. spin_lock_irq(SCpnt->device->host->host_lock);
  2549. nsp32_msg(KERN_INFO, "Bus Reset");
  2550. nsp32_dbg(NSP32_DEBUG_BUSRESET, "SCpnt=0x%x", SCpnt);
  2551. nsp32_write2(base, IRQ_CONTROL, IRQ_CONTROL_ALL_IRQ_MASK);
  2552. nsp32_do_bus_reset(data);
  2553. nsp32_write2(base, IRQ_CONTROL, 0);
  2554. spin_unlock_irq(SCpnt->device->host->host_lock);
  2555. return SUCCESS; /* SCSI bus reset is succeeded at any time. */
  2556. }
  2557. static void nsp32_do_bus_reset(nsp32_hw_data *data)
  2558. {
  2559. unsigned int base = data->BaseAddress;
  2560. unsigned short intrdat;
  2561. int i;
  2562. nsp32_dbg(NSP32_DEBUG_BUSRESET, "in");
  2563. /*
  2564. * stop all transfer
  2565. * clear TRANSFERCONTROL_BM_START
  2566. * clear counter
  2567. */
  2568. nsp32_write2(base, TRANSFER_CONTROL, 0);
  2569. nsp32_write4(base, BM_CNT, 0);
  2570. nsp32_write4(base, CLR_COUNTER, CLRCOUNTER_ALLMASK);
  2571. /*
  2572. * fall back to asynchronous transfer mode
  2573. * initialize SDTR negotiation flag
  2574. */
  2575. for (i = 0; i < ARRAY_SIZE(data->target); i++) {
  2576. nsp32_target *target = &data->target[i];
  2577. target->sync_flag = 0;
  2578. nsp32_set_async(data, target);
  2579. }
  2580. /*
  2581. * reset SCSI bus
  2582. */
  2583. nsp32_write1(base, SCSI_BUS_CONTROL, BUSCTL_RST);
  2584. udelay(RESET_HOLD_TIME);
  2585. nsp32_write1(base, SCSI_BUS_CONTROL, 0);
  2586. for(i = 0; i < 5; i++) {
  2587. intrdat = nsp32_read2(base, IRQ_STATUS); /* dummy read */
  2588. nsp32_dbg(NSP32_DEBUG_BUSRESET, "irq:1: 0x%x", intrdat);
  2589. }
  2590. data->CurrentSC = NULL;
  2591. }
  2592. static int nsp32_eh_host_reset(struct scsi_cmnd *SCpnt)
  2593. {
  2594. struct Scsi_Host *host = SCpnt->device->host;
  2595. unsigned int base = SCpnt->device->host->io_port;
  2596. nsp32_hw_data *data = (nsp32_hw_data *)host->hostdata;
  2597. nsp32_msg(KERN_INFO, "Host Reset");
  2598. nsp32_dbg(NSP32_DEBUG_BUSRESET, "SCpnt=0x%x", SCpnt);
  2599. spin_lock_irq(SCpnt->device->host->host_lock);
  2600. nsp32hw_init(data);
  2601. nsp32_write2(base, IRQ_CONTROL, IRQ_CONTROL_ALL_IRQ_MASK);
  2602. nsp32_do_bus_reset(data);
  2603. nsp32_write2(base, IRQ_CONTROL, 0);
  2604. spin_unlock_irq(SCpnt->device->host->host_lock);
  2605. return SUCCESS; /* Host reset is succeeded at any time. */
  2606. }
  2607. /**************************************************************************
  2608. * EEPROM handler
  2609. */
  2610. /*
  2611. * getting EEPROM parameter
  2612. */
  2613. static int nsp32_getprom_param(nsp32_hw_data *data)
  2614. {
  2615. int vendor = data->pci_devid->vendor;
  2616. int device = data->pci_devid->device;
  2617. int ret, val, i;
  2618. /*
  2619. * EEPROM checking.
  2620. */
  2621. ret = nsp32_prom_read(data, 0x7e);
  2622. if (ret != 0x55) {
  2623. nsp32_msg(KERN_INFO, "No EEPROM detected: 0x%x", ret);
  2624. return FALSE;
  2625. }
  2626. ret = nsp32_prom_read(data, 0x7f);
  2627. if (ret != 0xaa) {
  2628. nsp32_msg(KERN_INFO, "Invalid number: 0x%x", ret);
  2629. return FALSE;
  2630. }
  2631. /*
  2632. * check EEPROM type
  2633. */
  2634. if (vendor == PCI_VENDOR_ID_WORKBIT &&
  2635. device == PCI_DEVICE_ID_WORKBIT_STANDARD) {
  2636. ret = nsp32_getprom_c16(data);
  2637. } else if (vendor == PCI_VENDOR_ID_WORKBIT &&
  2638. device == PCI_DEVICE_ID_NINJASCSI_32BIB_LOGITEC) {
  2639. ret = nsp32_getprom_at24(data);
  2640. } else if (vendor == PCI_VENDOR_ID_WORKBIT &&
  2641. device == PCI_DEVICE_ID_NINJASCSI_32UDE_MELCO ) {
  2642. ret = nsp32_getprom_at24(data);
  2643. } else {
  2644. nsp32_msg(KERN_WARNING, "Unknown EEPROM");
  2645. ret = FALSE;
  2646. }
  2647. /* for debug : SPROM data full checking */
  2648. for (i = 0; i <= 0x1f; i++) {
  2649. val = nsp32_prom_read(data, i);
  2650. nsp32_dbg(NSP32_DEBUG_EEPROM,
  2651. "rom address 0x%x : 0x%x", i, val);
  2652. }
  2653. return ret;
  2654. }
  2655. /*
  2656. * AT24C01A (Logitec: LHA-600S), AT24C02 (Melco Buffalo: IFC-USLP) data map:
  2657. *
  2658. * ROMADDR
  2659. * 0x00 - 0x06 : Device Synchronous Transfer Period (SCSI ID 0 - 6)
  2660. * Value 0x0: ASYNC, 0x0c: Ultra-20M, 0x19: Fast-10M
  2661. * 0x07 : HBA Synchronous Transfer Period
  2662. * Value 0: AutoSync, 1: Manual Setting
  2663. * 0x08 - 0x0f : Not Used? (0x0)
  2664. * 0x10 : Bus Termination
  2665. * Value 0: Auto[ON], 1: ON, 2: OFF
  2666. * 0x11 : Not Used? (0)
  2667. * 0x12 : Bus Reset Delay Time (0x03)
  2668. * 0x13 : Bootable CD Support
  2669. * Value 0: Disable, 1: Enable
  2670. * 0x14 : Device Scan
  2671. * Bit 7 6 5 4 3 2 1 0
  2672. * | <----------------->
  2673. * | SCSI ID: Value 0: Skip, 1: YES
  2674. * |-> Value 0: ALL scan, Value 1: Manual
  2675. * 0x15 - 0x1b : Not Used? (0)
  2676. * 0x1c : Constant? (0x01) (clock div?)
  2677. * 0x1d - 0x7c : Not Used (0xff)
  2678. * 0x7d : Not Used? (0xff)
  2679. * 0x7e : Constant (0x55), Validity signature
  2680. * 0x7f : Constant (0xaa), Validity signature
  2681. */
  2682. static int nsp32_getprom_at24(nsp32_hw_data *data)
  2683. {
  2684. int ret, i;
  2685. int auto_sync;
  2686. nsp32_target *target;
  2687. int entry;
  2688. /*
  2689. * Reset time which is designated by EEPROM.
  2690. *
  2691. * TODO: Not used yet.
  2692. */
  2693. data->resettime = nsp32_prom_read(data, 0x12);
  2694. /*
  2695. * HBA Synchronous Transfer Period
  2696. *
  2697. * Note: auto_sync = 0: auto, 1: manual. Ninja SCSI HBA spec says
  2698. * that if auto_sync is 0 (auto), and connected SCSI devices are
  2699. * same or lower than 3, then transfer speed is set as ULTRA-20M.
  2700. * On the contrary if connected SCSI devices are same or higher
  2701. * than 4, then transfer speed is set as FAST-10M.
  2702. *
  2703. * I break this rule. The number of connected SCSI devices are
  2704. * only ignored. If auto_sync is 0 (auto), then transfer speed is
  2705. * forced as ULTRA-20M.
  2706. */
  2707. ret = nsp32_prom_read(data, 0x07);
  2708. switch (ret) {
  2709. case 0:
  2710. auto_sync = TRUE;
  2711. break;
  2712. case 1:
  2713. auto_sync = FALSE;
  2714. break;
  2715. default:
  2716. nsp32_msg(KERN_WARNING,
  2717. "Unsupported Auto Sync mode. Fall back to manual mode.");
  2718. auto_sync = TRUE;
  2719. }
  2720. if (trans_mode == ULTRA20M_MODE) {
  2721. auto_sync = TRUE;
  2722. }
  2723. /*
  2724. * each device Synchronous Transfer Period
  2725. */
  2726. for (i = 0; i < NSP32_HOST_SCSIID; i++) {
  2727. target = &data->target[i];
  2728. if (auto_sync == TRUE) {
  2729. target->limit_entry = 0; /* set as ULTRA20M */
  2730. } else {
  2731. ret = nsp32_prom_read(data, i);
  2732. entry = nsp32_search_period_entry(data, target, ret);
  2733. if (entry < 0) {
  2734. /* search failed... set maximum speed */
  2735. entry = 0;
  2736. }
  2737. target->limit_entry = entry;
  2738. }
  2739. }
  2740. return TRUE;
  2741. }
  2742. /*
  2743. * C16 110 (I-O Data: SC-NBD) data map:
  2744. *
  2745. * ROMADDR
  2746. * 0x00 - 0x06 : Device Synchronous Transfer Period (SCSI ID 0 - 6)
  2747. * Value 0x0: 20MB/S, 0x1: 10MB/S, 0x2: 5MB/S, 0x3: ASYNC
  2748. * 0x07 : 0 (HBA Synchronous Transfer Period: Auto Sync)
  2749. * 0x08 - 0x0f : Not Used? (0x0)
  2750. * 0x10 : Transfer Mode
  2751. * Value 0: PIO, 1: Busmater
  2752. * 0x11 : Bus Reset Delay Time (0x00-0x20)
  2753. * 0x12 : Bus Termination
  2754. * Value 0: Disable, 1: Enable
  2755. * 0x13 - 0x19 : Disconnection
  2756. * Value 0: Disable, 1: Enable
  2757. * 0x1a - 0x7c : Not Used? (0)
  2758. * 0x7d : Not Used? (0xf8)
  2759. * 0x7e : Constant (0x55), Validity signature
  2760. * 0x7f : Constant (0xaa), Validity signature
  2761. */
  2762. static int nsp32_getprom_c16(nsp32_hw_data *data)
  2763. {
  2764. int ret, i;
  2765. nsp32_target *target;
  2766. int entry, val;
  2767. /*
  2768. * Reset time which is designated by EEPROM.
  2769. *
  2770. * TODO: Not used yet.
  2771. */
  2772. data->resettime = nsp32_prom_read(data, 0x11);
  2773. /*
  2774. * each device Synchronous Transfer Period
  2775. */
  2776. for (i = 0; i < NSP32_HOST_SCSIID; i++) {
  2777. target = &data->target[i];
  2778. ret = nsp32_prom_read(data, i);
  2779. switch (ret) {
  2780. case 0: /* 20MB/s */
  2781. val = 0x0c;
  2782. break;
  2783. case 1: /* 10MB/s */
  2784. val = 0x19;
  2785. break;
  2786. case 2: /* 5MB/s */
  2787. val = 0x32;
  2788. break;
  2789. case 3: /* ASYNC */
  2790. val = 0x00;
  2791. break;
  2792. default: /* default 20MB/s */
  2793. val = 0x0c;
  2794. break;
  2795. }
  2796. entry = nsp32_search_period_entry(data, target, val);
  2797. if (entry < 0 || trans_mode == ULTRA20M_MODE) {
  2798. /* search failed... set maximum speed */
  2799. entry = 0;
  2800. }
  2801. target->limit_entry = entry;
  2802. }
  2803. return TRUE;
  2804. }
  2805. /*
  2806. * Atmel AT24C01A (drived in 5V) serial EEPROM routines
  2807. */
  2808. static int nsp32_prom_read(nsp32_hw_data *data, int romaddr)
  2809. {
  2810. int i, val;
  2811. /* start condition */
  2812. nsp32_prom_start(data);
  2813. /* device address */
  2814. nsp32_prom_write_bit(data, 1); /* 1 */
  2815. nsp32_prom_write_bit(data, 0); /* 0 */
  2816. nsp32_prom_write_bit(data, 1); /* 1 */
  2817. nsp32_prom_write_bit(data, 0); /* 0 */
  2818. nsp32_prom_write_bit(data, 0); /* A2: 0 (GND) */
  2819. nsp32_prom_write_bit(data, 0); /* A1: 0 (GND) */
  2820. nsp32_prom_write_bit(data, 0); /* A0: 0 (GND) */
  2821. /* R/W: W for dummy write */
  2822. nsp32_prom_write_bit(data, 0);
  2823. /* ack */
  2824. nsp32_prom_write_bit(data, 0);
  2825. /* word address */
  2826. for (i = 7; i >= 0; i--) {
  2827. nsp32_prom_write_bit(data, ((romaddr >> i) & 1));
  2828. }
  2829. /* ack */
  2830. nsp32_prom_write_bit(data, 0);
  2831. /* start condition */
  2832. nsp32_prom_start(data);
  2833. /* device address */
  2834. nsp32_prom_write_bit(data, 1); /* 1 */
  2835. nsp32_prom_write_bit(data, 0); /* 0 */
  2836. nsp32_prom_write_bit(data, 1); /* 1 */
  2837. nsp32_prom_write_bit(data, 0); /* 0 */
  2838. nsp32_prom_write_bit(data, 0); /* A2: 0 (GND) */
  2839. nsp32_prom_write_bit(data, 0); /* A1: 0 (GND) */
  2840. nsp32_prom_write_bit(data, 0); /* A0: 0 (GND) */
  2841. /* R/W: R */
  2842. nsp32_prom_write_bit(data, 1);
  2843. /* ack */
  2844. nsp32_prom_write_bit(data, 0);
  2845. /* data... */
  2846. val = 0;
  2847. for (i = 7; i >= 0; i--) {
  2848. val += (nsp32_prom_read_bit(data) << i);
  2849. }
  2850. /* no ack */
  2851. nsp32_prom_write_bit(data, 1);
  2852. /* stop condition */
  2853. nsp32_prom_stop(data);
  2854. return val;
  2855. }
  2856. static void nsp32_prom_set(nsp32_hw_data *data, int bit, int val)
  2857. {
  2858. int base = data->BaseAddress;
  2859. int tmp;
  2860. tmp = nsp32_index_read1(base, SERIAL_ROM_CTL);
  2861. if (val == 0) {
  2862. tmp &= ~bit;
  2863. } else {
  2864. tmp |= bit;
  2865. }
  2866. nsp32_index_write1(base, SERIAL_ROM_CTL, tmp);
  2867. udelay(10);
  2868. }
  2869. static int nsp32_prom_get(nsp32_hw_data *data, int bit)
  2870. {
  2871. int base = data->BaseAddress;
  2872. int tmp, ret;
  2873. if (bit != SDA) {
  2874. nsp32_msg(KERN_ERR, "return value is not appropriate");
  2875. return 0;
  2876. }
  2877. tmp = nsp32_index_read1(base, SERIAL_ROM_CTL) & bit;
  2878. if (tmp == 0) {
  2879. ret = 0;
  2880. } else {
  2881. ret = 1;
  2882. }
  2883. udelay(10);
  2884. return ret;
  2885. }
  2886. static void nsp32_prom_start (nsp32_hw_data *data)
  2887. {
  2888. /* start condition */
  2889. nsp32_prom_set(data, SCL, 1);
  2890. nsp32_prom_set(data, SDA, 1);
  2891. nsp32_prom_set(data, ENA, 1); /* output mode */
  2892. nsp32_prom_set(data, SDA, 0); /* keeping SCL=1 and transiting
  2893. * SDA 1->0 is start condition */
  2894. nsp32_prom_set(data, SCL, 0);
  2895. }
  2896. static void nsp32_prom_stop (nsp32_hw_data *data)
  2897. {
  2898. /* stop condition */
  2899. nsp32_prom_set(data, SCL, 1);
  2900. nsp32_prom_set(data, SDA, 0);
  2901. nsp32_prom_set(data, ENA, 1); /* output mode */
  2902. nsp32_prom_set(data, SDA, 1);
  2903. nsp32_prom_set(data, SCL, 0);
  2904. }
  2905. static void nsp32_prom_write_bit(nsp32_hw_data *data, int val)
  2906. {
  2907. /* write */
  2908. nsp32_prom_set(data, SDA, val);
  2909. nsp32_prom_set(data, SCL, 1 );
  2910. nsp32_prom_set(data, SCL, 0 );
  2911. }
  2912. static int nsp32_prom_read_bit(nsp32_hw_data *data)
  2913. {
  2914. int val;
  2915. /* read */
  2916. nsp32_prom_set(data, ENA, 0); /* input mode */
  2917. nsp32_prom_set(data, SCL, 1);
  2918. val = nsp32_prom_get(data, SDA);
  2919. nsp32_prom_set(data, SCL, 0);
  2920. nsp32_prom_set(data, ENA, 1); /* output mode */
  2921. return val;
  2922. }
  2923. /**************************************************************************
  2924. * Power Management
  2925. */
  2926. #ifdef CONFIG_PM
  2927. /* Device suspended */
  2928. static int nsp32_suspend(struct pci_dev *pdev, pm_message_t state)
  2929. {
  2930. struct Scsi_Host *host = pci_get_drvdata(pdev);
  2931. nsp32_msg(KERN_INFO, "pci-suspend: pdev=0x%p, state=%ld, slot=%s, host=0x%p", pdev, state, pci_name(pdev), host);
  2932. pci_save_state (pdev);
  2933. pci_disable_device (pdev);
  2934. pci_set_power_state(pdev, pci_choose_state(pdev, state));
  2935. return 0;
  2936. }
  2937. /* Device woken up */
  2938. static int nsp32_resume(struct pci_dev *pdev)
  2939. {
  2940. struct Scsi_Host *host = pci_get_drvdata(pdev);
  2941. nsp32_hw_data *data = (nsp32_hw_data *)host->hostdata;
  2942. unsigned short reg;
  2943. nsp32_msg(KERN_INFO, "pci-resume: pdev=0x%p, slot=%s, host=0x%p", pdev, pci_name(pdev), host);
  2944. pci_set_power_state(pdev, PCI_D0);
  2945. pci_enable_wake (pdev, PCI_D0, 0);
  2946. pci_restore_state (pdev);
  2947. reg = nsp32_read2(data->BaseAddress, INDEX_REG);
  2948. nsp32_msg(KERN_INFO, "io=0x%x reg=0x%x", data->BaseAddress, reg);
  2949. if (reg == 0xffff) {
  2950. nsp32_msg(KERN_INFO, "missing device. abort resume.");
  2951. return 0;
  2952. }
  2953. nsp32hw_init (data);
  2954. nsp32_do_bus_reset(data);
  2955. nsp32_msg(KERN_INFO, "resume success");
  2956. return 0;
  2957. }
  2958. /* Enable wake event */
  2959. static int nsp32_enable_wake(struct pci_dev *pdev, pci_power_t state, int enable)
  2960. {
  2961. struct Scsi_Host *host = pci_get_drvdata(pdev);
  2962. nsp32_msg(KERN_INFO, "pci-enable_wake: stub, pdev=0x%p, enable=%d, slot=%s, host=0x%p", pdev, enable, pci_name(pdev), host);
  2963. return 0;
  2964. }
  2965. #endif
  2966. /************************************************************************
  2967. * PCI/Cardbus probe/remove routine
  2968. */
  2969. static int __devinit nsp32_probe(struct pci_dev *pdev, const struct pci_device_id *id)
  2970. {
  2971. int ret;
  2972. nsp32_hw_data *data = &nsp32_data_base;
  2973. nsp32_dbg(NSP32_DEBUG_REGISTER, "enter");
  2974. ret = pci_enable_device(pdev);
  2975. if (ret) {
  2976. nsp32_msg(KERN_ERR, "failed to enable pci device");
  2977. return ret;
  2978. }
  2979. data->Pci = pdev;
  2980. data->pci_devid = id;
  2981. data->IrqNumber = pdev->irq;
  2982. data->BaseAddress = pci_resource_start(pdev, 0);
  2983. data->NumAddress = pci_resource_len (pdev, 0);
  2984. data->MmioAddress = ioremap_nocache(pci_resource_start(pdev, 1),
  2985. pci_resource_len (pdev, 1));
  2986. data->MmioLength = pci_resource_len (pdev, 1);
  2987. pci_set_master(pdev);
  2988. #if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,73))
  2989. ret = nsp32_detect(pdev);
  2990. #else
  2991. ret = scsi_register_host(&nsp32_template);
  2992. #endif
  2993. nsp32_msg(KERN_INFO, "irq: %i mmio: %p+0x%lx slot: %s model: %s",
  2994. pdev->irq,
  2995. data->MmioAddress, data->MmioLength,
  2996. pci_name(pdev),
  2997. nsp32_model[id->driver_data]);
  2998. nsp32_dbg(NSP32_DEBUG_REGISTER, "exit %d", ret);
  2999. return ret;
  3000. }
  3001. static void __devexit nsp32_remove(struct pci_dev *pdev)
  3002. {
  3003. #if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,73))
  3004. struct Scsi_Host *host = pci_get_drvdata(pdev);
  3005. #endif
  3006. nsp32_dbg(NSP32_DEBUG_REGISTER, "enter");
  3007. #if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,73))
  3008. scsi_remove_host(host);
  3009. nsp32_release(host);
  3010. scsi_host_put(host);
  3011. #else
  3012. scsi_unregister_host(&nsp32_template);
  3013. #endif
  3014. }
  3015. static struct pci_driver nsp32_driver = {
  3016. .name = "nsp32",
  3017. .id_table = nsp32_pci_table,
  3018. .probe = nsp32_probe,
  3019. .remove = __devexit_p(nsp32_remove),
  3020. #ifdef CONFIG_PM
  3021. .suspend = nsp32_suspend,
  3022. .resume = nsp32_resume,
  3023. .enable_wake = nsp32_enable_wake,
  3024. #endif
  3025. };
  3026. /*********************************************************************
  3027. * Moule entry point
  3028. */
  3029. static int __init init_nsp32(void) {
  3030. nsp32_msg(KERN_INFO, "loading...");
  3031. return pci_module_init(&nsp32_driver);
  3032. }
  3033. static void __exit exit_nsp32(void) {
  3034. nsp32_msg(KERN_INFO, "unloading...");
  3035. pci_unregister_driver(&nsp32_driver);
  3036. }
  3037. module_init(init_nsp32);
  3038. module_exit(exit_nsp32);
  3039. /* end */