yenta_socket.c 32 KB

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  1. /*
  2. * Regular cardbus driver ("yenta_socket")
  3. *
  4. * (C) Copyright 1999, 2000 Linus Torvalds
  5. *
  6. * Changelog:
  7. * Aug 2002: Manfred Spraul <manfred@colorfullife.com>
  8. * Dynamically adjust the size of the bridge resource
  9. *
  10. * May 2003: Dominik Brodowski <linux@brodo.de>
  11. * Merge pci_socket.c and yenta.c into one file
  12. */
  13. #include <linux/init.h>
  14. #include <linux/pci.h>
  15. #include <linux/sched.h>
  16. #include <linux/workqueue.h>
  17. #include <linux/interrupt.h>
  18. #include <linux/delay.h>
  19. #include <linux/module.h>
  20. #include <pcmcia/version.h>
  21. #include <pcmcia/cs_types.h>
  22. #include <pcmcia/ss.h>
  23. #include <pcmcia/cs.h>
  24. #include <asm/io.h>
  25. #include "yenta_socket.h"
  26. #include "i82365.h"
  27. static int disable_clkrun;
  28. module_param(disable_clkrun, bool, 0444);
  29. MODULE_PARM_DESC(disable_clkrun, "If PC card doesn't function properly, please try this option");
  30. static int isa_probe = 1;
  31. module_param(isa_probe, bool, 0444);
  32. MODULE_PARM_DESC(isa_probe, "If set ISA interrupts are probed (default). Set to N to disable probing");
  33. static int pwr_irqs_off;
  34. module_param(pwr_irqs_off, bool, 0644);
  35. MODULE_PARM_DESC(pwr_irqs_off, "Force IRQs off during power-on of slot. Use only when seeing IRQ storms!");
  36. #if 0
  37. #define debug(x,args...) printk(KERN_DEBUG "%s: " x, __func__ , ##args)
  38. #else
  39. #define debug(x,args...)
  40. #endif
  41. /* Don't ask.. */
  42. #define to_cycles(ns) ((ns)/120)
  43. #define to_ns(cycles) ((cycles)*120)
  44. static int yenta_probe_cb_irq(struct yenta_socket *socket);
  45. static unsigned int override_bios;
  46. module_param(override_bios, uint, 0000);
  47. MODULE_PARM_DESC (override_bios, "yenta ignore bios resource allocation");
  48. /*
  49. * Generate easy-to-use ways of reading a cardbus sockets
  50. * regular memory space ("cb_xxx"), configuration space
  51. * ("config_xxx") and compatibility space ("exca_xxxx")
  52. */
  53. static inline u32 cb_readl(struct yenta_socket *socket, unsigned reg)
  54. {
  55. u32 val = readl(socket->base + reg);
  56. debug("%p %04x %08x\n", socket, reg, val);
  57. return val;
  58. }
  59. static inline void cb_writel(struct yenta_socket *socket, unsigned reg, u32 val)
  60. {
  61. debug("%p %04x %08x\n", socket, reg, val);
  62. writel(val, socket->base + reg);
  63. }
  64. static inline u8 config_readb(struct yenta_socket *socket, unsigned offset)
  65. {
  66. u8 val;
  67. pci_read_config_byte(socket->dev, offset, &val);
  68. debug("%p %04x %02x\n", socket, offset, val);
  69. return val;
  70. }
  71. static inline u16 config_readw(struct yenta_socket *socket, unsigned offset)
  72. {
  73. u16 val;
  74. pci_read_config_word(socket->dev, offset, &val);
  75. debug("%p %04x %04x\n", socket, offset, val);
  76. return val;
  77. }
  78. static inline u32 config_readl(struct yenta_socket *socket, unsigned offset)
  79. {
  80. u32 val;
  81. pci_read_config_dword(socket->dev, offset, &val);
  82. debug("%p %04x %08x\n", socket, offset, val);
  83. return val;
  84. }
  85. static inline void config_writeb(struct yenta_socket *socket, unsigned offset, u8 val)
  86. {
  87. debug("%p %04x %02x\n", socket, offset, val);
  88. pci_write_config_byte(socket->dev, offset, val);
  89. }
  90. static inline void config_writew(struct yenta_socket *socket, unsigned offset, u16 val)
  91. {
  92. debug("%p %04x %04x\n", socket, offset, val);
  93. pci_write_config_word(socket->dev, offset, val);
  94. }
  95. static inline void config_writel(struct yenta_socket *socket, unsigned offset, u32 val)
  96. {
  97. debug("%p %04x %08x\n", socket, offset, val);
  98. pci_write_config_dword(socket->dev, offset, val);
  99. }
  100. static inline u8 exca_readb(struct yenta_socket *socket, unsigned reg)
  101. {
  102. u8 val = readb(socket->base + 0x800 + reg);
  103. debug("%p %04x %02x\n", socket, reg, val);
  104. return val;
  105. }
  106. static inline u8 exca_readw(struct yenta_socket *socket, unsigned reg)
  107. {
  108. u16 val;
  109. val = readb(socket->base + 0x800 + reg);
  110. val |= readb(socket->base + 0x800 + reg + 1) << 8;
  111. debug("%p %04x %04x\n", socket, reg, val);
  112. return val;
  113. }
  114. static inline void exca_writeb(struct yenta_socket *socket, unsigned reg, u8 val)
  115. {
  116. debug("%p %04x %02x\n", socket, reg, val);
  117. writeb(val, socket->base + 0x800 + reg);
  118. }
  119. static void exca_writew(struct yenta_socket *socket, unsigned reg, u16 val)
  120. {
  121. debug("%p %04x %04x\n", socket, reg, val);
  122. writeb(val, socket->base + 0x800 + reg);
  123. writeb(val >> 8, socket->base + 0x800 + reg + 1);
  124. }
  125. /*
  126. * Ugh, mixed-mode cardbus and 16-bit pccard state: things depend
  127. * on what kind of card is inserted..
  128. */
  129. static int yenta_get_status(struct pcmcia_socket *sock, unsigned int *value)
  130. {
  131. struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket);
  132. unsigned int val;
  133. u32 state = cb_readl(socket, CB_SOCKET_STATE);
  134. val = (state & CB_3VCARD) ? SS_3VCARD : 0;
  135. val |= (state & CB_XVCARD) ? SS_XVCARD : 0;
  136. val |= (state & (CB_5VCARD | CB_3VCARD | CB_XVCARD | CB_YVCARD)) ? 0 : SS_PENDING;
  137. val |= (state & (CB_CDETECT1 | CB_CDETECT2)) ? SS_PENDING : 0;
  138. if (state & CB_CBCARD) {
  139. val |= SS_CARDBUS;
  140. val |= (state & CB_CARDSTS) ? SS_STSCHG : 0;
  141. val |= (state & (CB_CDETECT1 | CB_CDETECT2)) ? 0 : SS_DETECT;
  142. val |= (state & CB_PWRCYCLE) ? SS_POWERON | SS_READY : 0;
  143. } else if (state & CB_16BITCARD) {
  144. u8 status = exca_readb(socket, I365_STATUS);
  145. val |= ((status & I365_CS_DETECT) == I365_CS_DETECT) ? SS_DETECT : 0;
  146. if (exca_readb(socket, I365_INTCTL) & I365_PC_IOCARD) {
  147. val |= (status & I365_CS_STSCHG) ? 0 : SS_STSCHG;
  148. } else {
  149. val |= (status & I365_CS_BVD1) ? 0 : SS_BATDEAD;
  150. val |= (status & I365_CS_BVD2) ? 0 : SS_BATWARN;
  151. }
  152. val |= (status & I365_CS_WRPROT) ? SS_WRPROT : 0;
  153. val |= (status & I365_CS_READY) ? SS_READY : 0;
  154. val |= (status & I365_CS_POWERON) ? SS_POWERON : 0;
  155. }
  156. *value = val;
  157. return 0;
  158. }
  159. static int yenta_Vcc_power(u32 control)
  160. {
  161. switch (control & CB_SC_VCC_MASK) {
  162. case CB_SC_VCC_5V: return 50;
  163. case CB_SC_VCC_3V: return 33;
  164. default: return 0;
  165. }
  166. }
  167. static int yenta_Vpp_power(u32 control)
  168. {
  169. switch (control & CB_SC_VPP_MASK) {
  170. case CB_SC_VPP_12V: return 120;
  171. case CB_SC_VPP_5V: return 50;
  172. case CB_SC_VPP_3V: return 33;
  173. default: return 0;
  174. }
  175. }
  176. static int yenta_get_socket(struct pcmcia_socket *sock, socket_state_t *state)
  177. {
  178. struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket);
  179. u8 reg;
  180. u32 control;
  181. control = cb_readl(socket, CB_SOCKET_CONTROL);
  182. state->Vcc = yenta_Vcc_power(control);
  183. state->Vpp = yenta_Vpp_power(control);
  184. state->io_irq = socket->io_irq;
  185. if (cb_readl(socket, CB_SOCKET_STATE) & CB_CBCARD) {
  186. u16 bridge = config_readw(socket, CB_BRIDGE_CONTROL);
  187. if (bridge & CB_BRIDGE_CRST)
  188. state->flags |= SS_RESET;
  189. return 0;
  190. }
  191. /* 16-bit card state.. */
  192. reg = exca_readb(socket, I365_POWER);
  193. state->flags = (reg & I365_PWR_AUTO) ? SS_PWR_AUTO : 0;
  194. state->flags |= (reg & I365_PWR_OUT) ? SS_OUTPUT_ENA : 0;
  195. reg = exca_readb(socket, I365_INTCTL);
  196. state->flags |= (reg & I365_PC_RESET) ? 0 : SS_RESET;
  197. state->flags |= (reg & I365_PC_IOCARD) ? SS_IOCARD : 0;
  198. reg = exca_readb(socket, I365_CSCINT);
  199. state->csc_mask = (reg & I365_CSC_DETECT) ? SS_DETECT : 0;
  200. if (state->flags & SS_IOCARD) {
  201. state->csc_mask |= (reg & I365_CSC_STSCHG) ? SS_STSCHG : 0;
  202. } else {
  203. state->csc_mask |= (reg & I365_CSC_BVD1) ? SS_BATDEAD : 0;
  204. state->csc_mask |= (reg & I365_CSC_BVD2) ? SS_BATWARN : 0;
  205. state->csc_mask |= (reg & I365_CSC_READY) ? SS_READY : 0;
  206. }
  207. return 0;
  208. }
  209. static void yenta_set_power(struct yenta_socket *socket, socket_state_t *state)
  210. {
  211. u32 reg = 0; /* CB_SC_STPCLK? */
  212. switch (state->Vcc) {
  213. case 33: reg = CB_SC_VCC_3V; break;
  214. case 50: reg = CB_SC_VCC_5V; break;
  215. default: reg = 0; break;
  216. }
  217. switch (state->Vpp) {
  218. case 33: reg |= CB_SC_VPP_3V; break;
  219. case 50: reg |= CB_SC_VPP_5V; break;
  220. case 120: reg |= CB_SC_VPP_12V; break;
  221. }
  222. if (reg != cb_readl(socket, CB_SOCKET_CONTROL))
  223. cb_writel(socket, CB_SOCKET_CONTROL, reg);
  224. }
  225. static int yenta_set_socket(struct pcmcia_socket *sock, socket_state_t *state)
  226. {
  227. struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket);
  228. u16 bridge;
  229. yenta_set_power(socket, state);
  230. socket->io_irq = state->io_irq;
  231. bridge = config_readw(socket, CB_BRIDGE_CONTROL) & ~(CB_BRIDGE_CRST | CB_BRIDGE_INTR);
  232. if (cb_readl(socket, CB_SOCKET_STATE) & CB_CBCARD) {
  233. u8 intr;
  234. bridge |= (state->flags & SS_RESET) ? CB_BRIDGE_CRST : 0;
  235. /* ISA interrupt control? */
  236. intr = exca_readb(socket, I365_INTCTL);
  237. intr = (intr & ~0xf);
  238. if (!socket->cb_irq) {
  239. intr |= state->io_irq;
  240. bridge |= CB_BRIDGE_INTR;
  241. }
  242. exca_writeb(socket, I365_INTCTL, intr);
  243. } else {
  244. u8 reg;
  245. reg = exca_readb(socket, I365_INTCTL) & (I365_RING_ENA | I365_INTR_ENA);
  246. reg |= (state->flags & SS_RESET) ? 0 : I365_PC_RESET;
  247. reg |= (state->flags & SS_IOCARD) ? I365_PC_IOCARD : 0;
  248. if (state->io_irq != socket->cb_irq) {
  249. reg |= state->io_irq;
  250. bridge |= CB_BRIDGE_INTR;
  251. }
  252. exca_writeb(socket, I365_INTCTL, reg);
  253. reg = exca_readb(socket, I365_POWER) & (I365_VCC_MASK|I365_VPP1_MASK);
  254. reg |= I365_PWR_NORESET;
  255. if (state->flags & SS_PWR_AUTO) reg |= I365_PWR_AUTO;
  256. if (state->flags & SS_OUTPUT_ENA) reg |= I365_PWR_OUT;
  257. if (exca_readb(socket, I365_POWER) != reg)
  258. exca_writeb(socket, I365_POWER, reg);
  259. /* CSC interrupt: no ISA irq for CSC */
  260. reg = I365_CSC_DETECT;
  261. if (state->flags & SS_IOCARD) {
  262. if (state->csc_mask & SS_STSCHG) reg |= I365_CSC_STSCHG;
  263. } else {
  264. if (state->csc_mask & SS_BATDEAD) reg |= I365_CSC_BVD1;
  265. if (state->csc_mask & SS_BATWARN) reg |= I365_CSC_BVD2;
  266. if (state->csc_mask & SS_READY) reg |= I365_CSC_READY;
  267. }
  268. exca_writeb(socket, I365_CSCINT, reg);
  269. exca_readb(socket, I365_CSC);
  270. if(sock->zoom_video)
  271. sock->zoom_video(sock, state->flags & SS_ZVCARD);
  272. }
  273. config_writew(socket, CB_BRIDGE_CONTROL, bridge);
  274. /* Socket event mask: get card insert/remove events.. */
  275. cb_writel(socket, CB_SOCKET_EVENT, -1);
  276. cb_writel(socket, CB_SOCKET_MASK, CB_CDMASK);
  277. return 0;
  278. }
  279. static int yenta_set_io_map(struct pcmcia_socket *sock, struct pccard_io_map *io)
  280. {
  281. struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket);
  282. int map;
  283. unsigned char ioctl, addr, enable;
  284. map = io->map;
  285. if (map > 1)
  286. return -EINVAL;
  287. enable = I365_ENA_IO(map);
  288. addr = exca_readb(socket, I365_ADDRWIN);
  289. /* Disable the window before changing it.. */
  290. if (addr & enable) {
  291. addr &= ~enable;
  292. exca_writeb(socket, I365_ADDRWIN, addr);
  293. }
  294. exca_writew(socket, I365_IO(map)+I365_W_START, io->start);
  295. exca_writew(socket, I365_IO(map)+I365_W_STOP, io->stop);
  296. ioctl = exca_readb(socket, I365_IOCTL) & ~I365_IOCTL_MASK(map);
  297. if (io->flags & MAP_0WS) ioctl |= I365_IOCTL_0WS(map);
  298. if (io->flags & MAP_16BIT) ioctl |= I365_IOCTL_16BIT(map);
  299. if (io->flags & MAP_AUTOSZ) ioctl |= I365_IOCTL_IOCS16(map);
  300. exca_writeb(socket, I365_IOCTL, ioctl);
  301. if (io->flags & MAP_ACTIVE)
  302. exca_writeb(socket, I365_ADDRWIN, addr | enable);
  303. return 0;
  304. }
  305. static int yenta_set_mem_map(struct pcmcia_socket *sock, struct pccard_mem_map *mem)
  306. {
  307. struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket);
  308. struct pci_bus_region region;
  309. int map;
  310. unsigned char addr, enable;
  311. unsigned int start, stop, card_start;
  312. unsigned short word;
  313. pcibios_resource_to_bus(socket->dev, &region, mem->res);
  314. map = mem->map;
  315. start = region.start;
  316. stop = region.end;
  317. card_start = mem->card_start;
  318. if (map > 4 || start > stop || ((start ^ stop) >> 24) ||
  319. (card_start >> 26) || mem->speed > 1000)
  320. return -EINVAL;
  321. enable = I365_ENA_MEM(map);
  322. addr = exca_readb(socket, I365_ADDRWIN);
  323. if (addr & enable) {
  324. addr &= ~enable;
  325. exca_writeb(socket, I365_ADDRWIN, addr);
  326. }
  327. exca_writeb(socket, CB_MEM_PAGE(map), start >> 24);
  328. word = (start >> 12) & 0x0fff;
  329. if (mem->flags & MAP_16BIT)
  330. word |= I365_MEM_16BIT;
  331. if (mem->flags & MAP_0WS)
  332. word |= I365_MEM_0WS;
  333. exca_writew(socket, I365_MEM(map) + I365_W_START, word);
  334. word = (stop >> 12) & 0x0fff;
  335. switch (to_cycles(mem->speed)) {
  336. case 0: break;
  337. case 1: word |= I365_MEM_WS0; break;
  338. case 2: word |= I365_MEM_WS1; break;
  339. default: word |= I365_MEM_WS1 | I365_MEM_WS0; break;
  340. }
  341. exca_writew(socket, I365_MEM(map) + I365_W_STOP, word);
  342. word = ((card_start - start) >> 12) & 0x3fff;
  343. if (mem->flags & MAP_WRPROT)
  344. word |= I365_MEM_WRPROT;
  345. if (mem->flags & MAP_ATTRIB)
  346. word |= I365_MEM_REG;
  347. exca_writew(socket, I365_MEM(map) + I365_W_OFF, word);
  348. if (mem->flags & MAP_ACTIVE)
  349. exca_writeb(socket, I365_ADDRWIN, addr | enable);
  350. return 0;
  351. }
  352. static irqreturn_t yenta_interrupt(int irq, void *dev_id, struct pt_regs *regs)
  353. {
  354. unsigned int events;
  355. struct yenta_socket *socket = (struct yenta_socket *) dev_id;
  356. u8 csc;
  357. u32 cb_event;
  358. /* Clear interrupt status for the event */
  359. cb_event = cb_readl(socket, CB_SOCKET_EVENT);
  360. cb_writel(socket, CB_SOCKET_EVENT, cb_event);
  361. csc = exca_readb(socket, I365_CSC);
  362. events = (cb_event & (CB_CD1EVENT | CB_CD2EVENT)) ? SS_DETECT : 0 ;
  363. events |= (csc & I365_CSC_DETECT) ? SS_DETECT : 0;
  364. if (exca_readb(socket, I365_INTCTL) & I365_PC_IOCARD) {
  365. events |= (csc & I365_CSC_STSCHG) ? SS_STSCHG : 0;
  366. } else {
  367. events |= (csc & I365_CSC_BVD1) ? SS_BATDEAD : 0;
  368. events |= (csc & I365_CSC_BVD2) ? SS_BATWARN : 0;
  369. events |= (csc & I365_CSC_READY) ? SS_READY : 0;
  370. }
  371. if (events)
  372. pcmcia_parse_events(&socket->socket, events);
  373. if (cb_event || csc)
  374. return IRQ_HANDLED;
  375. return IRQ_NONE;
  376. }
  377. static void yenta_interrupt_wrapper(unsigned long data)
  378. {
  379. struct yenta_socket *socket = (struct yenta_socket *) data;
  380. yenta_interrupt(0, (void *)socket, NULL);
  381. socket->poll_timer.expires = jiffies + HZ;
  382. add_timer(&socket->poll_timer);
  383. }
  384. static void yenta_clear_maps(struct yenta_socket *socket)
  385. {
  386. int i;
  387. struct resource res = { .start = 0, .end = 0x0fff };
  388. pccard_io_map io = { 0, 0, 0, 0, 1 };
  389. pccard_mem_map mem = { .res = &res, };
  390. yenta_set_socket(&socket->socket, &dead_socket);
  391. for (i = 0; i < 2; i++) {
  392. io.map = i;
  393. yenta_set_io_map(&socket->socket, &io);
  394. }
  395. for (i = 0; i < 5; i++) {
  396. mem.map = i;
  397. yenta_set_mem_map(&socket->socket, &mem);
  398. }
  399. }
  400. /* redoes voltage interrogation if required */
  401. static void yenta_interrogate(struct yenta_socket *socket)
  402. {
  403. u32 state;
  404. state = cb_readl(socket, CB_SOCKET_STATE);
  405. if (!(state & (CB_5VCARD | CB_3VCARD | CB_XVCARD | CB_YVCARD)) ||
  406. (state & (CB_CDETECT1 | CB_CDETECT2 | CB_NOTACARD | CB_BADVCCREQ)) ||
  407. ((state & (CB_16BITCARD | CB_CBCARD)) == (CB_16BITCARD | CB_CBCARD)))
  408. cb_writel(socket, CB_SOCKET_FORCE, CB_CVSTEST);
  409. }
  410. /* Called at resume and initialization events */
  411. static int yenta_sock_init(struct pcmcia_socket *sock)
  412. {
  413. struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket);
  414. u16 bridge;
  415. bridge = config_readw(socket, CB_BRIDGE_CONTROL) & ~CB_BRIDGE_INTR;
  416. if (!socket->cb_irq)
  417. bridge |= CB_BRIDGE_INTR;
  418. config_writew(socket, CB_BRIDGE_CONTROL, bridge);
  419. exca_writeb(socket, I365_GBLCTL, 0x00);
  420. exca_writeb(socket, I365_GENCTL, 0x00);
  421. /* Redo card voltage interrogation */
  422. yenta_interrogate(socket);
  423. yenta_clear_maps(socket);
  424. if (socket->type && socket->type->sock_init)
  425. socket->type->sock_init(socket);
  426. /* Re-enable CSC interrupts */
  427. cb_writel(socket, CB_SOCKET_MASK, CB_CDMASK);
  428. return 0;
  429. }
  430. static int yenta_sock_suspend(struct pcmcia_socket *sock)
  431. {
  432. struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket);
  433. /* Disable CSC interrupts */
  434. cb_writel(socket, CB_SOCKET_MASK, 0x0);
  435. return 0;
  436. }
  437. /*
  438. * Use an adaptive allocation for the memory resource,
  439. * sometimes the memory behind pci bridges is limited:
  440. * 1/8 of the size of the io window of the parent.
  441. * max 4 MB, min 16 kB.
  442. */
  443. #define BRIDGE_MEM_MAX 4*1024*1024
  444. #define BRIDGE_MEM_MIN 16*1024
  445. #define BRIDGE_IO_MAX 256
  446. #define BRIDGE_IO_MIN 32
  447. #ifndef PCIBIOS_MIN_CARDBUS_IO
  448. #define PCIBIOS_MIN_CARDBUS_IO PCIBIOS_MIN_IO
  449. #endif
  450. static void yenta_allocate_res(struct yenta_socket *socket, int nr, unsigned type)
  451. {
  452. struct pci_bus *bus;
  453. struct resource *root, *res;
  454. u32 start, end;
  455. u32 align, size, min;
  456. unsigned offset;
  457. unsigned mask;
  458. res = socket->dev->resource + PCI_BRIDGE_RESOURCES + nr;
  459. /* Already allocated? */
  460. if (res->parent)
  461. return 0;
  462. /* The granularity of the memory limit is 4kB, on IO it's 4 bytes */
  463. mask = ~0xfff;
  464. if (type & IORESOURCE_IO)
  465. mask = ~3;
  466. offset = 0x1c + 8*nr;
  467. bus = socket->dev->subordinate;
  468. res->name = bus->name;
  469. res->flags = type;
  470. res->start = 0;
  471. res->end = 0;
  472. root = pci_find_parent_resource(socket->dev, res);
  473. if (!root)
  474. return;
  475. start = config_readl(socket, offset) & mask;
  476. end = config_readl(socket, offset+4) | ~mask;
  477. if (start && end > start && !override_bios) {
  478. res->start = start;
  479. res->end = end;
  480. if (request_resource(root, res) == 0)
  481. return;
  482. printk(KERN_INFO "yenta %s: Preassigned resource %d busy, reconfiguring...\n",
  483. pci_name(socket->dev), nr);
  484. res->start = res->end = 0;
  485. }
  486. if (type & IORESOURCE_IO) {
  487. align = 1024;
  488. size = BRIDGE_IO_MAX;
  489. min = BRIDGE_IO_MIN;
  490. start = PCIBIOS_MIN_CARDBUS_IO;
  491. end = ~0U;
  492. } else {
  493. unsigned long avail = root->end - root->start;
  494. int i;
  495. size = BRIDGE_MEM_MAX;
  496. if (size > avail/8) {
  497. size=(avail+1)/8;
  498. /* round size down to next power of 2 */
  499. i = 0;
  500. while ((size /= 2) != 0)
  501. i++;
  502. size = 1 << i;
  503. }
  504. if (size < BRIDGE_MEM_MIN)
  505. size = BRIDGE_MEM_MIN;
  506. min = BRIDGE_MEM_MIN;
  507. align = size;
  508. start = PCIBIOS_MIN_MEM;
  509. end = ~0U;
  510. }
  511. do {
  512. if (allocate_resource(root, res, size, start, end, align, NULL, NULL)==0) {
  513. config_writel(socket, offset, res->start);
  514. config_writel(socket, offset+4, res->end);
  515. return;
  516. }
  517. size = size/2;
  518. align = size;
  519. } while (size >= min);
  520. printk(KERN_INFO "yenta %s: no resource of type %x available, trying to continue...\n",
  521. pci_name(socket->dev), type);
  522. res->start = res->end = 0;
  523. }
  524. /*
  525. * Allocate the bridge mappings for the device..
  526. */
  527. static void yenta_allocate_resources(struct yenta_socket *socket)
  528. {
  529. yenta_allocate_res(socket, 0, IORESOURCE_MEM|IORESOURCE_PREFETCH);
  530. yenta_allocate_res(socket, 1, IORESOURCE_MEM);
  531. yenta_allocate_res(socket, 2, IORESOURCE_IO);
  532. yenta_allocate_res(socket, 3, IORESOURCE_IO); /* PCI isn't clever enough to use this one yet */
  533. }
  534. /*
  535. * Free the bridge mappings for the device..
  536. */
  537. static void yenta_free_resources(struct yenta_socket *socket)
  538. {
  539. int i;
  540. for (i=0;i<4;i++) {
  541. struct resource *res;
  542. res = socket->dev->resource + PCI_BRIDGE_RESOURCES + i;
  543. if (res->start != 0 && res->end != 0)
  544. release_resource(res);
  545. res->start = res->end = 0;
  546. }
  547. }
  548. /*
  549. * Close it down - release our resources and go home..
  550. */
  551. static void yenta_close(struct pci_dev *dev)
  552. {
  553. struct yenta_socket *sock = pci_get_drvdata(dev);
  554. /* we don't want a dying socket registered */
  555. pcmcia_unregister_socket(&sock->socket);
  556. /* Disable all events so we don't die in an IRQ storm */
  557. cb_writel(sock, CB_SOCKET_MASK, 0x0);
  558. exca_writeb(sock, I365_CSCINT, 0);
  559. if (sock->cb_irq)
  560. free_irq(sock->cb_irq, sock);
  561. else
  562. del_timer_sync(&sock->poll_timer);
  563. if (sock->base)
  564. iounmap(sock->base);
  565. yenta_free_resources(sock);
  566. pci_release_regions(dev);
  567. pci_disable_device(dev);
  568. pci_set_drvdata(dev, NULL);
  569. }
  570. static struct pccard_operations yenta_socket_operations = {
  571. .init = yenta_sock_init,
  572. .suspend = yenta_sock_suspend,
  573. .get_status = yenta_get_status,
  574. .get_socket = yenta_get_socket,
  575. .set_socket = yenta_set_socket,
  576. .set_io_map = yenta_set_io_map,
  577. .set_mem_map = yenta_set_mem_map,
  578. };
  579. #include "ti113x.h"
  580. #include "ricoh.h"
  581. #include "topic.h"
  582. #include "o2micro.h"
  583. enum {
  584. CARDBUS_TYPE_DEFAULT = -1,
  585. CARDBUS_TYPE_TI,
  586. CARDBUS_TYPE_TI113X,
  587. CARDBUS_TYPE_TI12XX,
  588. CARDBUS_TYPE_TI1250,
  589. CARDBUS_TYPE_RICOH,
  590. CARDBUS_TYPE_TOPIC97,
  591. CARDBUS_TYPE_O2MICRO,
  592. };
  593. /*
  594. * Different cardbus controllers have slightly different
  595. * initialization sequences etc details. List them here..
  596. */
  597. static struct cardbus_type cardbus_type[] = {
  598. [CARDBUS_TYPE_TI] = {
  599. .override = ti_override,
  600. .save_state = ti_save_state,
  601. .restore_state = ti_restore_state,
  602. .sock_init = ti_init,
  603. },
  604. [CARDBUS_TYPE_TI113X] = {
  605. .override = ti113x_override,
  606. .save_state = ti_save_state,
  607. .restore_state = ti_restore_state,
  608. .sock_init = ti_init,
  609. },
  610. [CARDBUS_TYPE_TI12XX] = {
  611. .override = ti12xx_override,
  612. .save_state = ti_save_state,
  613. .restore_state = ti_restore_state,
  614. .sock_init = ti_init,
  615. },
  616. [CARDBUS_TYPE_TI1250] = {
  617. .override = ti1250_override,
  618. .save_state = ti_save_state,
  619. .restore_state = ti_restore_state,
  620. .sock_init = ti_init,
  621. },
  622. [CARDBUS_TYPE_RICOH] = {
  623. .override = ricoh_override,
  624. .save_state = ricoh_save_state,
  625. .restore_state = ricoh_restore_state,
  626. },
  627. [CARDBUS_TYPE_TOPIC97] = {
  628. .override = topic97_override,
  629. },
  630. [CARDBUS_TYPE_O2MICRO] = {
  631. .override = o2micro_override,
  632. .restore_state = o2micro_restore_state,
  633. },
  634. };
  635. /*
  636. * Only probe "regular" interrupts, don't
  637. * touch dangerous spots like the mouse irq,
  638. * because there are mice that apparently
  639. * get really confused if they get fondled
  640. * too intimately.
  641. *
  642. * Default to 11, 10, 9, 7, 6, 5, 4, 3.
  643. */
  644. static u32 isa_interrupts = 0x0ef8;
  645. static unsigned int yenta_probe_irq(struct yenta_socket *socket, u32 isa_irq_mask)
  646. {
  647. int i;
  648. unsigned long val;
  649. u16 bridge_ctrl;
  650. u32 mask;
  651. /* Set up ISA irq routing to probe the ISA irqs.. */
  652. bridge_ctrl = config_readw(socket, CB_BRIDGE_CONTROL);
  653. if (!(bridge_ctrl & CB_BRIDGE_INTR)) {
  654. bridge_ctrl |= CB_BRIDGE_INTR;
  655. config_writew(socket, CB_BRIDGE_CONTROL, bridge_ctrl);
  656. }
  657. /*
  658. * Probe for usable interrupts using the force
  659. * register to generate bogus card status events.
  660. */
  661. cb_writel(socket, CB_SOCKET_EVENT, -1);
  662. cb_writel(socket, CB_SOCKET_MASK, CB_CSTSMASK);
  663. exca_writeb(socket, I365_CSCINT, 0);
  664. val = probe_irq_on() & isa_irq_mask;
  665. for (i = 1; i < 16; i++) {
  666. if (!((val >> i) & 1))
  667. continue;
  668. exca_writeb(socket, I365_CSCINT, I365_CSC_STSCHG | (i << 4));
  669. cb_writel(socket, CB_SOCKET_FORCE, CB_FCARDSTS);
  670. udelay(100);
  671. cb_writel(socket, CB_SOCKET_EVENT, -1);
  672. }
  673. cb_writel(socket, CB_SOCKET_MASK, 0);
  674. exca_writeb(socket, I365_CSCINT, 0);
  675. mask = probe_irq_mask(val) & 0xffff;
  676. bridge_ctrl &= ~CB_BRIDGE_INTR;
  677. config_writew(socket, CB_BRIDGE_CONTROL, bridge_ctrl);
  678. return mask;
  679. }
  680. /* interrupt handler, only used during probing */
  681. static irqreturn_t yenta_probe_handler(int irq, void *dev_id, struct pt_regs *regs)
  682. {
  683. struct yenta_socket *socket = (struct yenta_socket *) dev_id;
  684. u8 csc;
  685. u32 cb_event;
  686. /* Clear interrupt status for the event */
  687. cb_event = cb_readl(socket, CB_SOCKET_EVENT);
  688. cb_writel(socket, CB_SOCKET_EVENT, -1);
  689. csc = exca_readb(socket, I365_CSC);
  690. if (cb_event || csc) {
  691. socket->probe_status = 1;
  692. return IRQ_HANDLED;
  693. }
  694. return IRQ_NONE;
  695. }
  696. /* probes the PCI interrupt, use only on override functions */
  697. static int yenta_probe_cb_irq(struct yenta_socket *socket)
  698. {
  699. u16 bridge_ctrl;
  700. if (!socket->cb_irq)
  701. return -1;
  702. socket->probe_status = 0;
  703. /* disable ISA interrupts */
  704. bridge_ctrl = config_readw(socket, CB_BRIDGE_CONTROL);
  705. bridge_ctrl &= ~CB_BRIDGE_INTR;
  706. config_writew(socket, CB_BRIDGE_CONTROL, bridge_ctrl);
  707. if (request_irq(socket->cb_irq, yenta_probe_handler, SA_SHIRQ, "yenta", socket)) {
  708. printk(KERN_WARNING "Yenta: request_irq() in yenta_probe_cb_irq() failed!\n");
  709. return -1;
  710. }
  711. /* generate interrupt, wait */
  712. exca_writeb(socket, I365_CSCINT, I365_CSC_STSCHG);
  713. cb_writel(socket, CB_SOCKET_EVENT, -1);
  714. cb_writel(socket, CB_SOCKET_MASK, CB_CSTSMASK);
  715. cb_writel(socket, CB_SOCKET_FORCE, CB_FCARDSTS);
  716. msleep(100);
  717. /* disable interrupts */
  718. cb_writel(socket, CB_SOCKET_MASK, 0);
  719. exca_writeb(socket, I365_CSCINT, 0);
  720. cb_writel(socket, CB_SOCKET_EVENT, -1);
  721. exca_readb(socket, I365_CSC);
  722. free_irq(socket->cb_irq, socket);
  723. return (int) socket->probe_status;
  724. }
  725. /*
  726. * Set static data that doesn't need re-initializing..
  727. */
  728. static void yenta_get_socket_capabilities(struct yenta_socket *socket, u32 isa_irq_mask)
  729. {
  730. socket->socket.features |= SS_CAP_PAGE_REGS | SS_CAP_PCCARD | SS_CAP_CARDBUS;
  731. socket->socket.map_size = 0x1000;
  732. socket->socket.pci_irq = socket->cb_irq;
  733. if (isa_probe)
  734. socket->socket.irq_mask = yenta_probe_irq(socket, isa_irq_mask);
  735. else
  736. socket->socket.irq_mask = 0;
  737. socket->socket.cb_dev = socket->dev;
  738. printk(KERN_INFO "Yenta: ISA IRQ mask 0x%04x, PCI irq %d\n",
  739. socket->socket.irq_mask, socket->cb_irq);
  740. }
  741. /*
  742. * Initialize the standard cardbus registers
  743. */
  744. static void yenta_config_init(struct yenta_socket *socket)
  745. {
  746. u16 bridge;
  747. struct pci_dev *dev = socket->dev;
  748. pci_set_power_state(socket->dev, 0);
  749. config_writel(socket, CB_LEGACY_MODE_BASE, 0);
  750. config_writel(socket, PCI_BASE_ADDRESS_0, dev->resource[0].start);
  751. config_writew(socket, PCI_COMMAND,
  752. PCI_COMMAND_IO |
  753. PCI_COMMAND_MEMORY |
  754. PCI_COMMAND_MASTER |
  755. PCI_COMMAND_WAIT);
  756. /* MAGIC NUMBERS! Fixme */
  757. config_writeb(socket, PCI_CACHE_LINE_SIZE, L1_CACHE_BYTES / 4);
  758. config_writeb(socket, PCI_LATENCY_TIMER, 168);
  759. config_writel(socket, PCI_PRIMARY_BUS,
  760. (176 << 24) | /* sec. latency timer */
  761. (dev->subordinate->subordinate << 16) | /* subordinate bus */
  762. (dev->subordinate->secondary << 8) | /* secondary bus */
  763. dev->subordinate->primary); /* primary bus */
  764. /*
  765. * Set up the bridging state:
  766. * - enable write posting.
  767. * - memory window 0 prefetchable, window 1 non-prefetchable
  768. * - PCI interrupts enabled if a PCI interrupt exists..
  769. */
  770. bridge = config_readw(socket, CB_BRIDGE_CONTROL);
  771. bridge &= ~(CB_BRIDGE_CRST | CB_BRIDGE_PREFETCH1 | CB_BRIDGE_INTR | CB_BRIDGE_ISAEN | CB_BRIDGE_VGAEN);
  772. bridge |= CB_BRIDGE_PREFETCH0 | CB_BRIDGE_POSTEN | CB_BRIDGE_INTR;
  773. config_writew(socket, CB_BRIDGE_CONTROL, bridge);
  774. }
  775. /*
  776. * Initialize a cardbus controller. Make sure we have a usable
  777. * interrupt, and that we can map the cardbus area. Fill in the
  778. * socket information structure..
  779. */
  780. static int __devinit yenta_probe (struct pci_dev *dev, const struct pci_device_id *id)
  781. {
  782. struct yenta_socket *socket;
  783. int ret;
  784. socket = kmalloc(sizeof(struct yenta_socket), GFP_KERNEL);
  785. if (!socket)
  786. return -ENOMEM;
  787. memset(socket, 0, sizeof(*socket));
  788. /* prepare pcmcia_socket */
  789. socket->socket.ops = &yenta_socket_operations;
  790. socket->socket.resource_ops = &pccard_nonstatic_ops;
  791. socket->socket.dev.dev = &dev->dev;
  792. socket->socket.driver_data = socket;
  793. socket->socket.owner = THIS_MODULE;
  794. /* prepare struct yenta_socket */
  795. socket->dev = dev;
  796. pci_set_drvdata(dev, socket);
  797. /*
  798. * Do some basic sanity checking..
  799. */
  800. if (pci_enable_device(dev)) {
  801. ret = -EBUSY;
  802. goto free;
  803. }
  804. ret = pci_request_regions(dev, "yenta_socket");
  805. if (ret)
  806. goto disable;
  807. if (!pci_resource_start(dev, 0)) {
  808. printk(KERN_ERR "No cardbus resource!\n");
  809. ret = -ENODEV;
  810. goto release;
  811. }
  812. /*
  813. * Ok, start setup.. Map the cardbus registers,
  814. * and request the IRQ.
  815. */
  816. socket->base = ioremap(pci_resource_start(dev, 0), 0x1000);
  817. if (!socket->base) {
  818. ret = -ENOMEM;
  819. goto release;
  820. }
  821. /*
  822. * report the subsystem vendor and device for help debugging
  823. * the irq stuff...
  824. */
  825. printk(KERN_INFO "Yenta: CardBus bridge found at %s [%04x:%04x]\n",
  826. pci_name(dev), dev->subsystem_vendor, dev->subsystem_device);
  827. yenta_config_init(socket);
  828. /* Disable all events */
  829. cb_writel(socket, CB_SOCKET_MASK, 0x0);
  830. /* Set up the bridge regions.. */
  831. yenta_allocate_resources(socket);
  832. socket->cb_irq = dev->irq;
  833. /* Do we have special options for the device? */
  834. if (id->driver_data != CARDBUS_TYPE_DEFAULT &&
  835. id->driver_data < ARRAY_SIZE(cardbus_type)) {
  836. socket->type = &cardbus_type[id->driver_data];
  837. ret = socket->type->override(socket);
  838. if (ret < 0)
  839. goto unmap;
  840. }
  841. /* We must finish initialization here */
  842. if (!socket->cb_irq || request_irq(socket->cb_irq, yenta_interrupt, SA_SHIRQ, "yenta", socket)) {
  843. /* No IRQ or request_irq failed. Poll */
  844. socket->cb_irq = 0; /* But zero is a valid IRQ number. */
  845. init_timer(&socket->poll_timer);
  846. socket->poll_timer.function = yenta_interrupt_wrapper;
  847. socket->poll_timer.data = (unsigned long)socket;
  848. socket->poll_timer.expires = jiffies + HZ;
  849. add_timer(&socket->poll_timer);
  850. }
  851. /* Figure out what the dang thing can do for the PCMCIA layer... */
  852. yenta_interrogate(socket);
  853. yenta_get_socket_capabilities(socket, isa_interrupts);
  854. printk(KERN_INFO "Socket status: %08x\n", cb_readl(socket, CB_SOCKET_STATE));
  855. /* Register it with the pcmcia layer.. */
  856. ret = pcmcia_register_socket(&socket->socket);
  857. if (ret == 0)
  858. goto out;
  859. unmap:
  860. iounmap(socket->base);
  861. release:
  862. pci_release_regions(dev);
  863. disable:
  864. pci_disable_device(dev);
  865. free:
  866. kfree(socket);
  867. out:
  868. return ret;
  869. }
  870. static int yenta_dev_suspend (struct pci_dev *dev, pm_message_t state)
  871. {
  872. struct yenta_socket *socket = pci_get_drvdata(dev);
  873. int ret;
  874. ret = pcmcia_socket_dev_suspend(&dev->dev, state);
  875. if (socket) {
  876. if (socket->type && socket->type->save_state)
  877. socket->type->save_state(socket);
  878. /* FIXME: pci_save_state needs to have a better interface */
  879. pci_save_state(dev);
  880. pci_read_config_dword(dev, 16*4, &socket->saved_state[0]);
  881. pci_read_config_dword(dev, 17*4, &socket->saved_state[1]);
  882. /*
  883. * Some laptops (IBM T22) do not like us putting the Cardbus
  884. * bridge into D3. At a guess, some other laptop will
  885. * probably require this, so leave it commented out for now.
  886. */
  887. /* pci_set_power_state(dev, 3); */
  888. }
  889. return ret;
  890. }
  891. static int yenta_dev_resume (struct pci_dev *dev)
  892. {
  893. struct yenta_socket *socket = pci_get_drvdata(dev);
  894. if (socket) {
  895. pci_set_power_state(dev, 0);
  896. /* FIXME: pci_restore_state needs to have a better interface */
  897. pci_restore_state(dev);
  898. pci_write_config_dword(dev, 16*4, socket->saved_state[0]);
  899. pci_write_config_dword(dev, 17*4, socket->saved_state[1]);
  900. if (socket->type && socket->type->restore_state)
  901. socket->type->restore_state(socket);
  902. }
  903. return pcmcia_socket_dev_resume(&dev->dev);
  904. }
  905. #define CB_ID(vend,dev,type) \
  906. { \
  907. .vendor = vend, \
  908. .device = dev, \
  909. .subvendor = PCI_ANY_ID, \
  910. .subdevice = PCI_ANY_ID, \
  911. .class = PCI_CLASS_BRIDGE_CARDBUS << 8, \
  912. .class_mask = ~0, \
  913. .driver_data = CARDBUS_TYPE_##type, \
  914. }
  915. static struct pci_device_id yenta_table [] = {
  916. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1031, TI),
  917. /*
  918. * TBD: Check if these TI variants can use more
  919. * advanced overrides instead. (I can't get the
  920. * data sheets for these devices. --rmk)
  921. */
  922. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1210, TI),
  923. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1130, TI113X),
  924. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1131, TI113X),
  925. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1211, TI12XX),
  926. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1220, TI12XX),
  927. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1221, TI12XX),
  928. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1225, TI12XX),
  929. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1251A, TI12XX),
  930. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1251B, TI12XX),
  931. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1420, TI12XX),
  932. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1450, TI12XX),
  933. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1451A, TI12XX),
  934. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1510, TI12XX),
  935. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1520, TI12XX),
  936. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1620, TI12XX),
  937. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_4410, TI12XX),
  938. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_4450, TI12XX),
  939. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_4451, TI12XX),
  940. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_4510, TI12XX),
  941. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_4520, TI12XX),
  942. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1250, TI1250),
  943. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1410, TI1250),
  944. CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_1211, TI12XX),
  945. CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_1225, TI12XX),
  946. CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_1410, TI1250),
  947. CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_1420, TI12XX),
  948. CB_ID(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C465, RICOH),
  949. CB_ID(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C466, RICOH),
  950. CB_ID(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C475, RICOH),
  951. CB_ID(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C476, RICOH),
  952. CB_ID(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C478, RICOH),
  953. CB_ID(PCI_VENDOR_ID_TOSHIBA, PCI_DEVICE_ID_TOSHIBA_TOPIC97, TOPIC97),
  954. CB_ID(PCI_VENDOR_ID_TOSHIBA, PCI_DEVICE_ID_TOSHIBA_TOPIC100, TOPIC97),
  955. CB_ID(PCI_VENDOR_ID_O2, PCI_ANY_ID, O2MICRO),
  956. /* match any cardbus bridge */
  957. CB_ID(PCI_ANY_ID, PCI_ANY_ID, DEFAULT),
  958. { /* all zeroes */ }
  959. };
  960. MODULE_DEVICE_TABLE(pci, yenta_table);
  961. static struct pci_driver yenta_cardbus_driver = {
  962. .name = "yenta_cardbus",
  963. .id_table = yenta_table,
  964. .probe = yenta_probe,
  965. .remove = __devexit_p(yenta_close),
  966. .suspend = yenta_dev_suspend,
  967. .resume = yenta_dev_resume,
  968. };
  969. static int __init yenta_socket_init(void)
  970. {
  971. return pci_register_driver (&yenta_cardbus_driver);
  972. }
  973. static void __exit yenta_socket_exit (void)
  974. {
  975. pci_unregister_driver (&yenta_cardbus_driver);
  976. }
  977. module_init(yenta_socket_init);
  978. module_exit(yenta_socket_exit);
  979. MODULE_LICENSE("GPL");