hd64465_ss.c 25 KB

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  1. /*
  2. * $Id: hd64465_ss.c,v 1.7 2003/07/06 14:42:50 lethal Exp $
  3. *
  4. * Device driver for the PCMCIA controller module of the
  5. * Hitachi HD64465 handheld companion chip.
  6. *
  7. * Note that the HD64465 provides a very thin PCMCIA host bridge
  8. * layer, requiring a lot of the work of supporting cards to be
  9. * performed by the processor. For example: mapping of card
  10. * interrupts to processor IRQs is done by IRQ demuxing software;
  11. * IO and memory mappings are fixed; setting voltages according
  12. * to card Voltage Select pins etc is done in software.
  13. *
  14. * Note also that this driver uses only the simple, fixed,
  15. * 16MB, 16-bit wide mappings to PCMCIA spaces defined by the
  16. * HD64465. Larger mappings, smaller mappings, or mappings of
  17. * different width to the same socket, are all possible only by
  18. * involving the SH7750's MMU, which is considered unnecessary here.
  19. * The downside is that it may be possible for some drivers to
  20. * break because they need or expect 8-bit mappings.
  21. *
  22. * This driver currently supports only the following configuration:
  23. * SH7750 CPU, HD64465, TPS2206 voltage control chip.
  24. *
  25. * by Greg Banks <gbanks@pocketpenguins.com>
  26. * (c) 2000 PocketPenguins Inc
  27. */
  28. #include <linux/types.h>
  29. #include <linux/module.h>
  30. #include <linux/init.h>
  31. #include <linux/string.h>
  32. #include <linux/kernel.h>
  33. #include <linux/ioport.h>
  34. #include <linux/mm.h>
  35. #include <linux/vmalloc.h>
  36. #include <asm/errno.h>
  37. #include <linux/irq.h>
  38. #include <linux/interrupt.h>
  39. #include <linux/device.h>
  40. #include <asm/io.h>
  41. #include <asm/hd64465/hd64465.h>
  42. #include <asm/hd64465/io.h>
  43. #include <pcmcia/version.h>
  44. #include <pcmcia/cs_types.h>
  45. #include <pcmcia/cs.h>
  46. #include <pcmcia/cistpl.h>
  47. #include <pcmcia/ds.h>
  48. #include <pcmcia/ss.h>
  49. #include <pcmcia/bulkmem.h>
  50. #include "cs_internal.h"
  51. #define MODNAME "hd64465_ss"
  52. /* #define HD64465_DEBUG 1 */
  53. #if HD64465_DEBUG
  54. #define DPRINTK(args...) printk(MODNAME ": " args)
  55. #else
  56. #define DPRINTK(args...)
  57. #endif
  58. extern int hd64465_io_debug;
  59. extern void * p3_ioremap(unsigned long phys_addr, unsigned long size, unsigned long flags);
  60. extern void p3_iounmap(void *addr);
  61. /*============================================================*/
  62. #define HS_IO_MAP_SIZE (64*1024)
  63. typedef struct hs_socket_t
  64. {
  65. unsigned int number;
  66. u_int irq;
  67. u_long mem_base;
  68. void *io_base;
  69. u_long mem_length;
  70. u_int ctrl_base;
  71. socket_state_t state;
  72. pccard_io_map io_maps[MAX_IO_WIN];
  73. pccard_mem_map mem_maps[MAX_WIN];
  74. struct pcmcia_socket socket;
  75. } hs_socket_t;
  76. #define HS_MAX_SOCKETS 2
  77. static hs_socket_t hs_sockets[HS_MAX_SOCKETS];
  78. #define hs_in(sp, r) inb((sp)->ctrl_base + (r))
  79. #define hs_out(sp, v, r) outb(v, (sp)->ctrl_base + (r))
  80. /* translate a boolean value to a bit in a register */
  81. #define bool_to_regbit(sp, r, bi, bo) \
  82. do { \
  83. unsigned short v = hs_in(sp, r); \
  84. if (bo) \
  85. v |= (bi); \
  86. else \
  87. v &= ~(bi); \
  88. hs_out(sp, v, r); \
  89. } while(0)
  90. /* register offsets from HD64465_REG_PCC[01]ISR */
  91. #define ISR 0x0
  92. #define GCR 0x2
  93. #define CSCR 0x4
  94. #define CSCIER 0x6
  95. #define SCR 0x8
  96. /* Mask and values for CSCIER register */
  97. #define IER_MASK 0x80
  98. #define IER_ON 0x3f /* interrupts on */
  99. #define IER_OFF 0x00 /* interrupts off */
  100. /*============================================================*/
  101. #if HD64465_DEBUG > 10
  102. static void cis_hex_dump(const unsigned char *x, int len)
  103. {
  104. int i;
  105. for (i=0 ; i<len ; i++)
  106. {
  107. if (!(i & 0xf))
  108. printk("\n%08x", (unsigned)(x + i));
  109. printk(" %02x", *(volatile unsigned short*)x);
  110. x += 2;
  111. }
  112. printk("\n");
  113. }
  114. #endif
  115. /*============================================================*/
  116. /*
  117. * This code helps create the illusion that the IREQ line from
  118. * the PC card is mapped to one of the CPU's IRQ lines by the
  119. * host bridge hardware (which is how every host bridge *except*
  120. * the HD64465 works). In particular, it supports enabling
  121. * and disabling the IREQ line by code which knows nothing
  122. * about the host bridge (e.g. device drivers, IDE code) using
  123. * the request_irq(), free_irq(), probe_irq_on() and probe_irq_off()
  124. * functions. Also, it supports sharing the mapped IRQ with
  125. * real hardware IRQs from the -IRL0-3 lines.
  126. */
  127. #define HS_NUM_MAPPED_IRQS 16 /* Limitation of the PCMCIA code */
  128. static struct
  129. {
  130. /* index is mapped irq number */
  131. hs_socket_t *sock;
  132. hw_irq_controller *old_handler;
  133. } hs_mapped_irq[HS_NUM_MAPPED_IRQS];
  134. static void hs_socket_enable_ireq(hs_socket_t *sp)
  135. {
  136. unsigned short cscier;
  137. DPRINTK("hs_socket_enable_ireq(sock=%d)\n", sp->number);
  138. cscier = hs_in(sp, CSCIER);
  139. cscier &= ~HD64465_PCCCSCIER_PIREQE_MASK;
  140. cscier |= HD64465_PCCCSCIER_PIREQE_LEVEL;
  141. hs_out(sp, cscier, CSCIER);
  142. }
  143. static void hs_socket_disable_ireq(hs_socket_t *sp)
  144. {
  145. unsigned short cscier;
  146. DPRINTK("hs_socket_disable_ireq(sock=%d)\n", sp->number);
  147. cscier = hs_in(sp, CSCIER);
  148. cscier &= ~HD64465_PCCCSCIER_PIREQE_MASK;
  149. hs_out(sp, cscier, CSCIER);
  150. }
  151. static unsigned int hs_startup_irq(unsigned int irq)
  152. {
  153. hs_socket_enable_ireq(hs_mapped_irq[irq].sock);
  154. hs_mapped_irq[irq].old_handler->startup(irq);
  155. return 0;
  156. }
  157. static void hs_shutdown_irq(unsigned int irq)
  158. {
  159. hs_socket_disable_ireq(hs_mapped_irq[irq].sock);
  160. hs_mapped_irq[irq].old_handler->shutdown(irq);
  161. }
  162. static void hs_enable_irq(unsigned int irq)
  163. {
  164. hs_socket_enable_ireq(hs_mapped_irq[irq].sock);
  165. hs_mapped_irq[irq].old_handler->enable(irq);
  166. }
  167. static void hs_disable_irq(unsigned int irq)
  168. {
  169. hs_socket_disable_ireq(hs_mapped_irq[irq].sock);
  170. hs_mapped_irq[irq].old_handler->disable(irq);
  171. }
  172. extern struct hw_interrupt_type no_irq_type;
  173. static void hs_mask_and_ack_irq(unsigned int irq)
  174. {
  175. hs_socket_disable_ireq(hs_mapped_irq[irq].sock);
  176. /* ack_none() spuriously complains about an unexpected IRQ */
  177. if (hs_mapped_irq[irq].old_handler != &no_irq_type)
  178. hs_mapped_irq[irq].old_handler->ack(irq);
  179. }
  180. static void hs_end_irq(unsigned int irq)
  181. {
  182. hs_socket_enable_ireq(hs_mapped_irq[irq].sock);
  183. hs_mapped_irq[irq].old_handler->end(irq);
  184. }
  185. static struct hw_interrupt_type hd64465_ss_irq_type = {
  186. .typename = "PCMCIA-IRQ",
  187. .startup = hs_startup_irq,
  188. .shutdown = hs_shutdown_irq,
  189. .enable = hs_enable_irq,
  190. .disable = hs_disable_irq,
  191. .ack = hs_mask_and_ack_irq,
  192. .end = hs_end_irq
  193. };
  194. /*
  195. * This function should only ever be called with interrupts disabled.
  196. */
  197. static void hs_map_irq(hs_socket_t *sp, unsigned int irq)
  198. {
  199. DPRINTK("hs_map_irq(sock=%d irq=%d)\n", sp->number, irq);
  200. if (irq >= HS_NUM_MAPPED_IRQS)
  201. return;
  202. hs_mapped_irq[irq].sock = sp;
  203. /* insert ourselves as the irq controller */
  204. hs_mapped_irq[irq].old_handler = irq_desc[irq].handler;
  205. irq_desc[irq].handler = &hd64465_ss_irq_type;
  206. }
  207. /*
  208. * This function should only ever be called with interrupts disabled.
  209. */
  210. static void hs_unmap_irq(hs_socket_t *sp, unsigned int irq)
  211. {
  212. DPRINTK("hs_unmap_irq(sock=%d irq=%d)\n", sp->number, irq);
  213. if (irq >= HS_NUM_MAPPED_IRQS)
  214. return;
  215. /* restore the original irq controller */
  216. irq_desc[irq].handler = hs_mapped_irq[irq].old_handler;
  217. }
  218. /*============================================================*/
  219. /*
  220. * Set Vpp and Vcc (in tenths of a Volt). Does not
  221. * support the hi-Z state.
  222. *
  223. * Note, this assumes the board uses a TPS2206 chip to control
  224. * the Vcc and Vpp voltages to the hs_sockets. If your board
  225. * uses the MIC2563 (also supported by the HD64465) then you
  226. * will have to modify this function.
  227. */
  228. /* 0V 3.3V 5.5V */
  229. static const u_char hs_tps2206_avcc[3] = { 0x00, 0x04, 0x08 };
  230. static const u_char hs_tps2206_bvcc[3] = { 0x00, 0x80, 0x40 };
  231. static int hs_set_voltages(hs_socket_t *sp, int Vcc, int Vpp)
  232. {
  233. u_int psr;
  234. u_int vcci = 0;
  235. u_int sock = sp->number;
  236. DPRINTK("hs_set_voltage(%d, %d, %d)\n", sock, Vcc, Vpp);
  237. switch (Vcc)
  238. {
  239. case 0: vcci = 0; break;
  240. case 33: vcci = 1; break;
  241. case 50: vcci = 2; break;
  242. default: return 0;
  243. }
  244. /* Note: Vpp = 120 not supported -- Greg Banks */
  245. if (Vpp != 0 && Vpp != Vcc)
  246. return 0;
  247. /* The PSR register holds 8 of the 9 bits which control
  248. * the TPS2206 via its serial interface.
  249. */
  250. psr = inw(HD64465_REG_PCCPSR);
  251. switch (sock)
  252. {
  253. case 0:
  254. psr &= 0x0f;
  255. psr |= hs_tps2206_avcc[vcci];
  256. psr |= (Vpp == 0 ? 0x00 : 0x02);
  257. break;
  258. case 1:
  259. psr &= 0xf0;
  260. psr |= hs_tps2206_bvcc[vcci];
  261. psr |= (Vpp == 0 ? 0x00 : 0x20);
  262. break;
  263. };
  264. outw(psr, HD64465_REG_PCCPSR);
  265. return 1;
  266. }
  267. /*============================================================*/
  268. /*
  269. * Drive the RESET line to the card.
  270. */
  271. static void hs_reset_socket(hs_socket_t *sp, int on)
  272. {
  273. unsigned short v;
  274. v = hs_in(sp, GCR);
  275. if (on)
  276. v |= HD64465_PCCGCR_PCCR;
  277. else
  278. v &= ~HD64465_PCCGCR_PCCR;
  279. hs_out(sp, v, GCR);
  280. }
  281. /*============================================================*/
  282. static int hs_init(struct pcmcia_socket *s)
  283. {
  284. hs_socket_t *sp = container_of(s, struct hs_socket_t, socket);
  285. DPRINTK("hs_init(%d)\n", sp->number);
  286. return 0;
  287. }
  288. /*============================================================*/
  289. static int hs_get_status(struct pcmcia_socket *s, u_int *value)
  290. {
  291. hs_socket_t *sp = container_of(s, struct hs_socket_t, socket);
  292. unsigned int isr;
  293. u_int status = 0;
  294. isr = hs_in(sp, ISR);
  295. /* Card is seated and powered when *both* CD pins are low */
  296. if ((isr & HD64465_PCCISR_PCD_MASK) == 0)
  297. {
  298. status |= SS_DETECT; /* card present */
  299. switch (isr & HD64465_PCCISR_PBVD_MASK)
  300. {
  301. case HD64465_PCCISR_PBVD_BATGOOD:
  302. break;
  303. case HD64465_PCCISR_PBVD_BATWARN:
  304. status |= SS_BATWARN;
  305. break;
  306. default:
  307. status |= SS_BATDEAD;
  308. break;
  309. }
  310. if (isr & HD64465_PCCISR_PREADY)
  311. status |= SS_READY;
  312. if (isr & HD64465_PCCISR_PMWP)
  313. status |= SS_WRPROT;
  314. /* Voltage Select pins interpreted as per Table 4-5 of the std.
  315. * Assuming we have the TPS2206, the socket is a "Low Voltage
  316. * key, 3.3V and 5V available, no X.XV available".
  317. */
  318. switch (isr & (HD64465_PCCISR_PVS2|HD64465_PCCISR_PVS1))
  319. {
  320. case HD64465_PCCISR_PVS1:
  321. printk(KERN_NOTICE MODNAME ": cannot handle X.XV card, ignored\n");
  322. status = 0;
  323. break;
  324. case 0:
  325. case HD64465_PCCISR_PVS2:
  326. /* 3.3V */
  327. status |= SS_3VCARD;
  328. break;
  329. case HD64465_PCCISR_PVS2|HD64465_PCCISR_PVS1:
  330. /* 5V */
  331. break;
  332. }
  333. /* TODO: SS_POWERON */
  334. /* TODO: SS_STSCHG */
  335. }
  336. DPRINTK("hs_get_status(%d) = %x\n", sock, status);
  337. *value = status;
  338. return 0;
  339. }
  340. /*============================================================*/
  341. static int hs_get_socket(struct pcmcia_socket *s, socket_state_t *state)
  342. {
  343. hs_socket_t *sp = container_of(s, struct hs_socket_t, socket);
  344. DPRINTK("hs_get_socket(%d)\n", sock);
  345. *state = sp->state;
  346. return 0;
  347. }
  348. /*============================================================*/
  349. static int hs_set_socket(struct pcmcia_socket *s, socket_state_t *state)
  350. {
  351. hs_socket_t *sp = container_of(s, struct hs_socket_t, socket);
  352. u_long flags;
  353. u_int changed;
  354. unsigned short cscier;
  355. DPRINTK("hs_set_socket(sock=%d, flags=%x, csc_mask=%x, Vcc=%d, Vpp=%d, io_irq=%d)\n",
  356. sock, state->flags, state->csc_mask, state->Vcc, state->Vpp, state->io_irq);
  357. local_irq_save(flags); /* Don't want interrupts happening here */
  358. if (state->Vpp != sp->state.Vpp ||
  359. state->Vcc != sp->state.Vcc) {
  360. if (!hs_set_voltages(sp, state->Vcc, state->Vpp)) {
  361. local_irq_restore(flags);
  362. return -EINVAL;
  363. }
  364. }
  365. /* hd64465_io_debug = 1; */
  366. /*
  367. * Handle changes in the Card Status Change mask,
  368. * by propagating to the CSCR register
  369. */
  370. changed = sp->state.csc_mask ^ state->csc_mask;
  371. cscier = hs_in(sp, CSCIER);
  372. if (changed & SS_DETECT) {
  373. if (state->csc_mask & SS_DETECT)
  374. cscier |= HD64465_PCCCSCIER_PCDE;
  375. else
  376. cscier &= ~HD64465_PCCCSCIER_PCDE;
  377. }
  378. if (changed & SS_READY) {
  379. if (state->csc_mask & SS_READY)
  380. cscier |= HD64465_PCCCSCIER_PRE;
  381. else
  382. cscier &= ~HD64465_PCCCSCIER_PRE;
  383. }
  384. if (changed & SS_BATDEAD) {
  385. if (state->csc_mask & SS_BATDEAD)
  386. cscier |= HD64465_PCCCSCIER_PBDE;
  387. else
  388. cscier &= ~HD64465_PCCCSCIER_PBDE;
  389. }
  390. if (changed & SS_BATWARN) {
  391. if (state->csc_mask & SS_BATWARN)
  392. cscier |= HD64465_PCCCSCIER_PBWE;
  393. else
  394. cscier &= ~HD64465_PCCCSCIER_PBWE;
  395. }
  396. if (changed & SS_STSCHG) {
  397. if (state->csc_mask & SS_STSCHG)
  398. cscier |= HD64465_PCCCSCIER_PSCE;
  399. else
  400. cscier &= ~HD64465_PCCCSCIER_PSCE;
  401. }
  402. hs_out(sp, cscier, CSCIER);
  403. if (sp->state.io_irq && !state->io_irq)
  404. hs_unmap_irq(sp, sp->state.io_irq);
  405. else if (!sp->state.io_irq && state->io_irq)
  406. hs_map_irq(sp, state->io_irq);
  407. /*
  408. * Handle changes in the flags field,
  409. * by propagating to config registers.
  410. */
  411. changed = sp->state.flags ^ state->flags;
  412. if (changed & SS_IOCARD) {
  413. DPRINTK("card type: %s\n",
  414. (state->flags & SS_IOCARD ? "i/o" : "memory" ));
  415. bool_to_regbit(sp, GCR, HD64465_PCCGCR_PCCT,
  416. state->flags & SS_IOCARD);
  417. }
  418. if (changed & SS_RESET) {
  419. DPRINTK("%s reset card\n",
  420. (state->flags & SS_RESET ? "start" : "stop"));
  421. bool_to_regbit(sp, GCR, HD64465_PCCGCR_PCCR,
  422. state->flags & SS_RESET);
  423. }
  424. if (changed & SS_OUTPUT_ENA) {
  425. DPRINTK("%sabling card output\n",
  426. (state->flags & SS_OUTPUT_ENA ? "en" : "dis"));
  427. bool_to_regbit(sp, GCR, HD64465_PCCGCR_PDRV,
  428. state->flags & SS_OUTPUT_ENA);
  429. }
  430. /* TODO: SS_SPKR_ENA */
  431. /* hd64465_io_debug = 0; */
  432. sp->state = *state;
  433. local_irq_restore(flags);
  434. #if HD64465_DEBUG > 10
  435. if (state->flags & SS_OUTPUT_ENA)
  436. cis_hex_dump((const unsigned char*)sp->mem_base, 0x100);
  437. #endif
  438. return 0;
  439. }
  440. /*============================================================*/
  441. static int hs_set_io_map(struct pcmcia_socket *s, struct pccard_io_map *io)
  442. {
  443. hs_socket_t *sp = container_of(s, struct hs_socket_t, socket);
  444. int map = io->map;
  445. int sock = sp->number;
  446. struct pccard_io_map *sio;
  447. pgprot_t prot;
  448. DPRINTK("hs_set_io_map(sock=%d, map=%d, flags=0x%x, speed=%dns, start=%#lx, stop=%#lx)\n",
  449. sock, map, io->flags, io->speed, io->start, io->stop);
  450. if (map >= MAX_IO_WIN)
  451. return -EINVAL;
  452. sio = &sp->io_maps[map];
  453. /* check for null changes */
  454. if (io->flags == sio->flags &&
  455. io->start == sio->start &&
  456. io->stop == sio->stop)
  457. return 0;
  458. if (io->flags & MAP_AUTOSZ)
  459. prot = PAGE_KERNEL_PCC(sock, _PAGE_PCC_IODYN);
  460. else if (io->flags & MAP_16BIT)
  461. prot = PAGE_KERNEL_PCC(sock, _PAGE_PCC_IO16);
  462. else
  463. prot = PAGE_KERNEL_PCC(sock, _PAGE_PCC_IO8);
  464. /* TODO: handle MAP_USE_WAIT */
  465. if (io->flags & MAP_USE_WAIT)
  466. printk(KERN_INFO MODNAME ": MAP_USE_WAIT unimplemented\n");
  467. /* TODO: handle MAP_PREFETCH */
  468. if (io->flags & MAP_PREFETCH)
  469. printk(KERN_INFO MODNAME ": MAP_PREFETCH unimplemented\n");
  470. /* TODO: handle MAP_WRPROT */
  471. if (io->flags & MAP_WRPROT)
  472. printk(KERN_INFO MODNAME ": MAP_WRPROT unimplemented\n");
  473. /* TODO: handle MAP_0WS */
  474. if (io->flags & MAP_0WS)
  475. printk(KERN_INFO MODNAME ": MAP_0WS unimplemented\n");
  476. if (io->flags & MAP_ACTIVE) {
  477. unsigned long pstart, psize, paddrbase;
  478. paddrbase = virt_to_phys((void*)(sp->mem_base + 2 * HD64465_PCC_WINDOW));
  479. pstart = io->start & PAGE_MASK;
  480. psize = ((io->stop + PAGE_SIZE) & PAGE_MASK) - pstart;
  481. /*
  482. * Change PTEs in only that portion of the mapping requested
  483. * by the caller. This means that most of the time, most of
  484. * the PTEs in the io_vma will be unmapped and only the bottom
  485. * page will be mapped. But the code allows for weird cards
  486. * that might want IO ports > 4K.
  487. */
  488. sp->io_base = p3_ioremap(paddrbase + pstart, psize, pgprot_val(prot));
  489. /*
  490. * Change the mapping used by inb() outb() etc
  491. */
  492. hd64465_port_map(io->start,
  493. io->stop - io->start + 1,
  494. (unsigned long)sp->io_base + io->start, 0);
  495. } else {
  496. hd64465_port_unmap(sio->start, sio->stop - sio->start + 1);
  497. p3_iounmap(sp->io_base);
  498. }
  499. *sio = *io;
  500. return 0;
  501. }
  502. /*============================================================*/
  503. static int hs_set_mem_map(struct pcmcia_socket *s, struct pccard_mem_map *mem)
  504. {
  505. hs_socket_t *sp = container_of(s, struct hs_socket_t, socket);
  506. struct pccard_mem_map *smem;
  507. int map = mem->map;
  508. unsigned long paddr;
  509. #if 0
  510. DPRINTK("hs_set_mem_map(sock=%d, map=%d, flags=0x%x, card_start=0x%08x)\n",
  511. sock, map, mem->flags, mem->card_start);
  512. #endif
  513. if (map >= MAX_WIN)
  514. return -EINVAL;
  515. smem = &sp->mem_maps[map];
  516. paddr = sp->mem_base; /* base of Attribute mapping */
  517. if (!(mem->flags & MAP_ATTRIB))
  518. paddr += HD64465_PCC_WINDOW; /* base of Common mapping */
  519. paddr += mem->card_start;
  520. /* Because we specified SS_CAP_STATIC_MAP, we are obliged
  521. * at this time to report the system address corresponding
  522. * to the card address requested. This is how Socket Services
  523. * queries our fixed mapping. I wish this fact had been
  524. * documented - Greg Banks.
  525. */
  526. mem->static_start = paddr;
  527. *smem = *mem;
  528. return 0;
  529. }
  530. /* TODO: do we need to use the MMU to access Common memory ??? */
  531. /*============================================================*/
  532. /*
  533. * This function is registered with the HD64465 glue code to do a
  534. * secondary demux step on the PCMCIA interrupts. It handles
  535. * mapping the IREQ request from the card to a standard Linux
  536. * IRQ, as requested by SocketServices.
  537. */
  538. static int hs_irq_demux(int irq, void *dev)
  539. {
  540. hs_socket_t *sp = (hs_socket_t *)dev;
  541. u_int cscr;
  542. DPRINTK("hs_irq_demux(irq=%d)\n", irq);
  543. if (sp->state.io_irq &&
  544. (cscr = hs_in(sp, CSCR)) & HD64465_PCCCSCR_PIREQ) {
  545. cscr &= ~HD64465_PCCCSCR_PIREQ;
  546. hs_out(sp, cscr, CSCR);
  547. return sp->state.io_irq;
  548. }
  549. return irq;
  550. }
  551. /*============================================================*/
  552. /*
  553. * Interrupt handling routine.
  554. */
  555. static irqreturn_t hs_interrupt(int irq, void *dev, struct pt_regs *regs)
  556. {
  557. hs_socket_t *sp = (hs_socket_t *)dev;
  558. u_int events = 0;
  559. u_int cscr;
  560. cscr = hs_in(sp, CSCR);
  561. DPRINTK("hs_interrupt, cscr=%04x\n", cscr);
  562. /* check for bus-related changes to be reported to Socket Services */
  563. if (cscr & HD64465_PCCCSCR_PCDC) {
  564. /* double-check for a 16-bit card, as we don't support CardBus */
  565. if ((hs_in(sp, ISR) & HD64465_PCCISR_PCD_MASK) != 0) {
  566. printk(KERN_NOTICE MODNAME
  567. ": socket %d, card not a supported card type or not inserted correctly\n",
  568. sp->number);
  569. /* Don't do the rest unless a card is present */
  570. cscr &= ~(HD64465_PCCCSCR_PCDC|
  571. HD64465_PCCCSCR_PRC|
  572. HD64465_PCCCSCR_PBW|
  573. HD64465_PCCCSCR_PBD|
  574. HD64465_PCCCSCR_PSC);
  575. } else {
  576. cscr &= ~HD64465_PCCCSCR_PCDC;
  577. events |= SS_DETECT; /* card insertion or removal */
  578. }
  579. }
  580. if (cscr & HD64465_PCCCSCR_PRC) {
  581. cscr &= ~HD64465_PCCCSCR_PRC;
  582. events |= SS_READY; /* ready signal changed */
  583. }
  584. if (cscr & HD64465_PCCCSCR_PBW) {
  585. cscr &= ~HD64465_PCCCSCR_PSC;
  586. events |= SS_BATWARN; /* battery warning */
  587. }
  588. if (cscr & HD64465_PCCCSCR_PBD) {
  589. cscr &= ~HD64465_PCCCSCR_PSC;
  590. events |= SS_BATDEAD; /* battery dead */
  591. }
  592. if (cscr & HD64465_PCCCSCR_PSC) {
  593. cscr &= ~HD64465_PCCCSCR_PSC;
  594. events |= SS_STSCHG; /* STSCHG (status changed) signal */
  595. }
  596. if (cscr & HD64465_PCCCSCR_PIREQ) {
  597. cscr &= ~HD64465_PCCCSCR_PIREQ;
  598. /* This should have been dealt with during irq demux */
  599. printk(KERN_NOTICE MODNAME ": unexpected IREQ from card\n");
  600. }
  601. hs_out(sp, cscr, CSCR);
  602. if (events)
  603. pcmcia_parse_events(&sp->socket, events);
  604. return IRQ_HANDLED;
  605. }
  606. /*============================================================*/
  607. static struct pccard_operations hs_operations = {
  608. .init = hs_init,
  609. .get_status = hs_get_status,
  610. .get_socket = hs_get_socket,
  611. .set_socket = hs_set_socket,
  612. .set_io_map = hs_set_io_map,
  613. .set_mem_map = hs_set_mem_map,
  614. };
  615. static int hs_init_socket(hs_socket_t *sp, int irq, unsigned long mem_base,
  616. unsigned int ctrl_base)
  617. {
  618. unsigned short v;
  619. int i, err;
  620. memset(sp, 0, sizeof(*sp));
  621. sp->irq = irq;
  622. sp->mem_base = mem_base;
  623. sp->mem_length = 4*HD64465_PCC_WINDOW; /* 16MB */
  624. sp->ctrl_base = ctrl_base;
  625. for (i=0 ; i<MAX_IO_WIN ; i++)
  626. sp->io_maps[i].map = i;
  627. for (i=0 ; i<MAX_WIN ; i++)
  628. sp->mem_maps[i].map = i;
  629. hd64465_register_irq_demux(sp->irq, hs_irq_demux, sp);
  630. if ((err = request_irq(sp->irq, hs_interrupt, SA_INTERRUPT, MODNAME, sp)) < 0)
  631. return err;
  632. if (request_mem_region(sp->mem_base, sp->mem_length, MODNAME) == 0) {
  633. sp->mem_base = 0;
  634. return -ENOMEM;
  635. }
  636. /* According to section 3.2 of the PCMCIA standard, low-voltage
  637. * capable cards must implement cold insertion, i.e. Vpp and
  638. * Vcc set to 0 before card is inserted.
  639. */
  640. /*hs_set_voltages(sp, 0, 0);*/
  641. /* hi-Z the outputs to the card and set 16MB map mode */
  642. v = hs_in(sp, GCR);
  643. v &= ~HD64465_PCCGCR_PCCT; /* memory-only card */
  644. hs_out(sp, v, GCR);
  645. v = hs_in(sp, GCR);
  646. v |= HD64465_PCCGCR_PDRV; /* enable outputs to card */
  647. hs_out(sp, v, GCR);
  648. v = hs_in(sp, GCR);
  649. v |= HD64465_PCCGCR_PMMOD; /* 16MB mapping mode */
  650. hs_out(sp, v, GCR);
  651. v = hs_in(sp, GCR);
  652. /* lowest 16MB of Common */
  653. v &= ~(HD64465_PCCGCR_PPA25|HD64465_PCCGCR_PPA24);
  654. hs_out(sp, v, GCR);
  655. hs_reset_socket(sp, 1);
  656. printk(KERN_INFO "HD64465 PCMCIA bridge socket %d at 0x%08lx irq %d\n",
  657. i, sp->mem_base, sp->irq);
  658. return 0;
  659. }
  660. static void hs_exit_socket(hs_socket_t *sp)
  661. {
  662. unsigned short cscier, gcr;
  663. unsigned long flags;
  664. local_irq_save(flags);
  665. /* turn off interrupts in hardware */
  666. cscier = hs_in(sp, CSCIER);
  667. cscier = (cscier & IER_MASK) | IER_OFF;
  668. hs_out(sp, cscier, CSCIER);
  669. /* hi-Z the outputs to the card */
  670. gcr = hs_in(sp, GCR);
  671. gcr &= HD64465_PCCGCR_PDRV;
  672. hs_out(sp, gcr, GCR);
  673. /* power the card down */
  674. hs_set_voltages(sp, 0, 0);
  675. if (sp->mem_base != 0)
  676. release_mem_region(sp->mem_base, sp->mem_length);
  677. if (sp->irq != 0) {
  678. free_irq(sp->irq, hs_interrupt);
  679. hd64465_unregister_irq_demux(sp->irq);
  680. }
  681. local_irq_restore(flags);
  682. }
  683. static int hd64465_suspend(struct device *dev, pm_message_t state, u32 level)
  684. {
  685. int ret = 0;
  686. if (level == SUSPEND_SAVE_STATE)
  687. ret = pcmcia_socket_dev_suspend(dev, state);
  688. return ret;
  689. }
  690. static int hd64465_resume(struct device *dev, u32 level)
  691. {
  692. int ret = 0;
  693. if (level == RESUME_RESTORE_STATE)
  694. ret = pcmcia_socket_dev_resume(dev);
  695. return ret;
  696. }
  697. static struct device_driver hd64465_driver = {
  698. .name = "hd64465-pcmcia",
  699. .bus = &platform_bus_type,
  700. .suspend = hd64465_suspend,
  701. .resume = hd64465_resume,
  702. };
  703. static struct platform_device hd64465_device = {
  704. .name = "hd64465-pcmcia",
  705. .id = 0,
  706. };
  707. static int __init init_hs(void)
  708. {
  709. int i;
  710. unsigned short v;
  711. /* hd64465_io_debug = 1; */
  712. if (driver_register(&hd64465_driver))
  713. return -EINVAL;
  714. /* Wake both sockets out of STANDBY mode */
  715. /* TODO: wait 15ms */
  716. v = inw(HD64465_REG_SMSCR);
  717. v &= ~(HD64465_SMSCR_PC0ST|HD64465_SMSCR_PC1ST);
  718. outw(v, HD64465_REG_SMSCR);
  719. /* keep power controller out of shutdown mode */
  720. v = inb(HD64465_REG_PCC0SCR);
  721. v |= HD64465_PCCSCR_SHDN;
  722. outb(v, HD64465_REG_PCC0SCR);
  723. /* use serial (TPS2206) power controller */
  724. v = inb(HD64465_REG_PCC0CSCR);
  725. v |= HD64465_PCCCSCR_PSWSEL;
  726. outb(v, HD64465_REG_PCC0CSCR);
  727. /*
  728. * Setup hs_sockets[] structures and request system resources.
  729. * TODO: on memory allocation failure, power down the socket
  730. * before quitting.
  731. */
  732. for (i=0; i<HS_MAX_SOCKETS; i++) {
  733. hs_set_voltages(&hs_sockets[i], 0, 0);
  734. hs_sockets[i].socket.features |= SS_CAP_PCCARD | SS_CAP_STATIC_MAP; /* mappings are fixed in host memory */
  735. hs_sockets[i].socket.resource_ops = &pccard_static_ops;
  736. hs_sockets[i].socket.irq_mask = 0xffde;/*0xffff*/ /* IRQs mapped in s/w so can do any, really */
  737. hs_sockets[i].socket.map_size = HD64465_PCC_WINDOW; /* 16MB fixed window size */
  738. hs_sockets[i].socket.owner = THIS_MODULE;
  739. hs_sockets[i].socket.ss_entry = &hs_operations;
  740. }
  741. i = hs_init_socket(&hs_sockets[0],
  742. HD64465_IRQ_PCMCIA0,
  743. HD64465_PCC0_BASE,
  744. HD64465_REG_PCC0ISR);
  745. if (i < 0) {
  746. unregister_driver(&hd64465_driver);
  747. return i;
  748. }
  749. i = hs_init_socket(&hs_sockets[1],
  750. HD64465_IRQ_PCMCIA1,
  751. HD64465_PCC1_BASE,
  752. HD64465_REG_PCC1ISR);
  753. if (i < 0) {
  754. unregister_driver(&hd64465_driver);
  755. return i;
  756. }
  757. /* hd64465_io_debug = 0; */
  758. platform_device_register(&hd64465_device);
  759. for (i=0; i<HS_MAX_SOCKETS; i++) {
  760. unsigned int ret;
  761. hs_sockets[i].socket.dev.dev = &hd64465_device.dev;
  762. hs_sockets[i].number = i;
  763. ret = pcmcia_register_socket(&hs_sockets[i].socket);
  764. if (ret && i)
  765. pcmcia_unregister_socket(&hs_sockets[0].socket);
  766. }
  767. return 0;
  768. }
  769. static void __exit exit_hs(void)
  770. {
  771. int i;
  772. for (i=0 ; i<HS_MAX_SOCKETS ; i++) {
  773. pcmcia_unregister_socket(&hs_sockets[i].socket);
  774. hs_exit_socket(&hs_sockets[i]);
  775. }
  776. platform_device_unregister(&hd64465_device);
  777. unregister_driver(&hd64465_driver);
  778. }
  779. module_init(init_hs);
  780. module_exit(exit_hs);
  781. /*============================================================*/
  782. /*END*/