ixgb_main.c 55 KB

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  1. /*******************************************************************************
  2. Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
  3. This program is free software; you can redistribute it and/or modify it
  4. under the terms of the GNU General Public License as published by the Free
  5. Software Foundation; either version 2 of the License, or (at your option)
  6. any later version.
  7. This program is distributed in the hope that it will be useful, but WITHOUT
  8. ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  9. FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  10. more details.
  11. You should have received a copy of the GNU General Public License along with
  12. this program; if not, write to the Free Software Foundation, Inc., 59
  13. Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  14. The full GNU General Public License is included in this distribution in the
  15. file called LICENSE.
  16. Contact Information:
  17. Linux NICS <linux.nics@intel.com>
  18. Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  19. *******************************************************************************/
  20. #include "ixgb.h"
  21. /* Change Log
  22. * 1.0.88 01/05/05
  23. * - include fix to the condition that determines when to quit NAPI - Robert Olsson
  24. * - use netif_poll_{disable/enable} to synchronize between NAPI and i/f up/down
  25. * 1.0.84 10/26/04
  26. * - reset buffer_info->dma in Tx resource cleanup logic
  27. * 1.0.83 10/12/04
  28. * - sparse cleanup - shemminger@osdl.org
  29. * - fix tx resource cleanup logic
  30. */
  31. char ixgb_driver_name[] = "ixgb";
  32. char ixgb_driver_string[] = "Intel(R) PRO/10GbE Network Driver";
  33. #ifndef CONFIG_IXGB_NAPI
  34. #define DRIVERNAPI
  35. #else
  36. #define DRIVERNAPI "-NAPI"
  37. #endif
  38. #define DRV_VERSION "1.0.95-k2"DRIVERNAPI
  39. char ixgb_driver_version[] = DRV_VERSION;
  40. char ixgb_copyright[] = "Copyright (c) 1999-2005 Intel Corporation.";
  41. /* ixgb_pci_tbl - PCI Device ID Table
  42. *
  43. * Wildcard entries (PCI_ANY_ID) should come last
  44. * Last entry must be all 0s
  45. *
  46. * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
  47. * Class, Class Mask, private data (not used) }
  48. */
  49. static struct pci_device_id ixgb_pci_tbl[] = {
  50. {INTEL_VENDOR_ID, IXGB_DEVICE_ID_82597EX,
  51. PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
  52. {INTEL_VENDOR_ID, IXGB_DEVICE_ID_82597EX_SR,
  53. PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
  54. {INTEL_VENDOR_ID, IXGB_DEVICE_ID_82597EX_LR,
  55. PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
  56. /* required last entry */
  57. {0,}
  58. };
  59. MODULE_DEVICE_TABLE(pci, ixgb_pci_tbl);
  60. /* Local Function Prototypes */
  61. int ixgb_up(struct ixgb_adapter *adapter);
  62. void ixgb_down(struct ixgb_adapter *adapter, boolean_t kill_watchdog);
  63. void ixgb_reset(struct ixgb_adapter *adapter);
  64. int ixgb_setup_tx_resources(struct ixgb_adapter *adapter);
  65. int ixgb_setup_rx_resources(struct ixgb_adapter *adapter);
  66. void ixgb_free_tx_resources(struct ixgb_adapter *adapter);
  67. void ixgb_free_rx_resources(struct ixgb_adapter *adapter);
  68. void ixgb_update_stats(struct ixgb_adapter *adapter);
  69. static int ixgb_init_module(void);
  70. static void ixgb_exit_module(void);
  71. static int ixgb_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
  72. static void __devexit ixgb_remove(struct pci_dev *pdev);
  73. static int ixgb_sw_init(struct ixgb_adapter *adapter);
  74. static int ixgb_open(struct net_device *netdev);
  75. static int ixgb_close(struct net_device *netdev);
  76. static void ixgb_configure_tx(struct ixgb_adapter *adapter);
  77. static void ixgb_configure_rx(struct ixgb_adapter *adapter);
  78. static void ixgb_setup_rctl(struct ixgb_adapter *adapter);
  79. static void ixgb_clean_tx_ring(struct ixgb_adapter *adapter);
  80. static void ixgb_clean_rx_ring(struct ixgb_adapter *adapter);
  81. static void ixgb_set_multi(struct net_device *netdev);
  82. static void ixgb_watchdog(unsigned long data);
  83. static int ixgb_xmit_frame(struct sk_buff *skb, struct net_device *netdev);
  84. static struct net_device_stats *ixgb_get_stats(struct net_device *netdev);
  85. static int ixgb_change_mtu(struct net_device *netdev, int new_mtu);
  86. static int ixgb_set_mac(struct net_device *netdev, void *p);
  87. static irqreturn_t ixgb_intr(int irq, void *data, struct pt_regs *regs);
  88. static boolean_t ixgb_clean_tx_irq(struct ixgb_adapter *adapter);
  89. #ifdef CONFIG_IXGB_NAPI
  90. static int ixgb_clean(struct net_device *netdev, int *budget);
  91. static boolean_t ixgb_clean_rx_irq(struct ixgb_adapter *adapter,
  92. int *work_done, int work_to_do);
  93. #else
  94. static boolean_t ixgb_clean_rx_irq(struct ixgb_adapter *adapter);
  95. #endif
  96. static void ixgb_alloc_rx_buffers(struct ixgb_adapter *adapter);
  97. void ixgb_set_ethtool_ops(struct net_device *netdev);
  98. static void ixgb_tx_timeout(struct net_device *dev);
  99. static void ixgb_tx_timeout_task(struct net_device *dev);
  100. static void ixgb_vlan_rx_register(struct net_device *netdev,
  101. struct vlan_group *grp);
  102. static void ixgb_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid);
  103. static void ixgb_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid);
  104. static void ixgb_restore_vlan(struct ixgb_adapter *adapter);
  105. #ifdef CONFIG_NET_POLL_CONTROLLER
  106. /* for netdump / net console */
  107. static void ixgb_netpoll(struct net_device *dev);
  108. #endif
  109. /* Exported from other modules */
  110. extern void ixgb_check_options(struct ixgb_adapter *adapter);
  111. static struct pci_driver ixgb_driver = {
  112. .name = ixgb_driver_name,
  113. .id_table = ixgb_pci_tbl,
  114. .probe = ixgb_probe,
  115. .remove = __devexit_p(ixgb_remove),
  116. };
  117. MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
  118. MODULE_DESCRIPTION("Intel(R) PRO/10GbE Network Driver");
  119. MODULE_LICENSE("GPL");
  120. MODULE_VERSION(DRV_VERSION);
  121. /* some defines for controlling descriptor fetches in h/w */
  122. #define RXDCTL_PTHRESH_DEFAULT 128 /* chip considers prefech below this */
  123. #define RXDCTL_HTHRESH_DEFAULT 16 /* chip will only prefetch if tail is
  124. pushed this many descriptors from head */
  125. #define RXDCTL_WTHRESH_DEFAULT 16 /* chip writes back at this many or RXT0 */
  126. /**
  127. * ixgb_init_module - Driver Registration Routine
  128. *
  129. * ixgb_init_module is the first routine called when the driver is
  130. * loaded. All it does is register with the PCI subsystem.
  131. **/
  132. static int __init
  133. ixgb_init_module(void)
  134. {
  135. printk(KERN_INFO "%s - version %s\n",
  136. ixgb_driver_string, ixgb_driver_version);
  137. printk(KERN_INFO "%s\n", ixgb_copyright);
  138. return pci_module_init(&ixgb_driver);
  139. }
  140. module_init(ixgb_init_module);
  141. /**
  142. * ixgb_exit_module - Driver Exit Cleanup Routine
  143. *
  144. * ixgb_exit_module is called just before the driver is removed
  145. * from memory.
  146. **/
  147. static void __exit
  148. ixgb_exit_module(void)
  149. {
  150. pci_unregister_driver(&ixgb_driver);
  151. }
  152. module_exit(ixgb_exit_module);
  153. /**
  154. * ixgb_irq_disable - Mask off interrupt generation on the NIC
  155. * @adapter: board private structure
  156. **/
  157. static inline void
  158. ixgb_irq_disable(struct ixgb_adapter *adapter)
  159. {
  160. atomic_inc(&adapter->irq_sem);
  161. IXGB_WRITE_REG(&adapter->hw, IMC, ~0);
  162. IXGB_WRITE_FLUSH(&adapter->hw);
  163. synchronize_irq(adapter->pdev->irq);
  164. }
  165. /**
  166. * ixgb_irq_enable - Enable default interrupt generation settings
  167. * @adapter: board private structure
  168. **/
  169. static inline void
  170. ixgb_irq_enable(struct ixgb_adapter *adapter)
  171. {
  172. if(atomic_dec_and_test(&adapter->irq_sem)) {
  173. IXGB_WRITE_REG(&adapter->hw, IMS,
  174. IXGB_INT_RXT0 | IXGB_INT_RXDMT0 | IXGB_INT_TXDW |
  175. IXGB_INT_LSC);
  176. IXGB_WRITE_FLUSH(&adapter->hw);
  177. }
  178. }
  179. int
  180. ixgb_up(struct ixgb_adapter *adapter)
  181. {
  182. struct net_device *netdev = adapter->netdev;
  183. int err;
  184. int max_frame = netdev->mtu + ENET_HEADER_SIZE + ENET_FCS_LENGTH;
  185. struct ixgb_hw *hw = &adapter->hw;
  186. /* hardware has been reset, we need to reload some things */
  187. ixgb_set_multi(netdev);
  188. ixgb_restore_vlan(adapter);
  189. ixgb_configure_tx(adapter);
  190. ixgb_setup_rctl(adapter);
  191. ixgb_configure_rx(adapter);
  192. ixgb_alloc_rx_buffers(adapter);
  193. #ifdef CONFIG_PCI_MSI
  194. {
  195. boolean_t pcix = (IXGB_READ_REG(&adapter->hw, STATUS) &
  196. IXGB_STATUS_PCIX_MODE) ? TRUE : FALSE;
  197. adapter->have_msi = TRUE;
  198. if (!pcix)
  199. adapter->have_msi = FALSE;
  200. else if((err = pci_enable_msi(adapter->pdev))) {
  201. printk (KERN_ERR
  202. "Unable to allocate MSI interrupt Error: %d\n", err);
  203. adapter->have_msi = FALSE;
  204. /* proceed to try to request regular interrupt */
  205. }
  206. }
  207. #endif
  208. if((err = request_irq(adapter->pdev->irq, &ixgb_intr,
  209. SA_SHIRQ | SA_SAMPLE_RANDOM,
  210. netdev->name, netdev)))
  211. return err;
  212. /* disable interrupts and get the hardware into a known state */
  213. IXGB_WRITE_REG(&adapter->hw, IMC, 0xffffffff);
  214. if((hw->max_frame_size != max_frame) ||
  215. (hw->max_frame_size !=
  216. (IXGB_READ_REG(hw, MFS) >> IXGB_MFS_SHIFT))) {
  217. hw->max_frame_size = max_frame;
  218. IXGB_WRITE_REG(hw, MFS, hw->max_frame_size << IXGB_MFS_SHIFT);
  219. if(hw->max_frame_size >
  220. IXGB_MAX_ENET_FRAME_SIZE_WITHOUT_FCS + ENET_FCS_LENGTH) {
  221. uint32_t ctrl0 = IXGB_READ_REG(hw, CTRL0);
  222. if(!(ctrl0 & IXGB_CTRL0_JFE)) {
  223. ctrl0 |= IXGB_CTRL0_JFE;
  224. IXGB_WRITE_REG(hw, CTRL0, ctrl0);
  225. }
  226. }
  227. }
  228. mod_timer(&adapter->watchdog_timer, jiffies);
  229. ixgb_irq_enable(adapter);
  230. #ifdef CONFIG_IXGB_NAPI
  231. netif_poll_enable(netdev);
  232. #endif
  233. return 0;
  234. }
  235. void
  236. ixgb_down(struct ixgb_adapter *adapter, boolean_t kill_watchdog)
  237. {
  238. struct net_device *netdev = adapter->netdev;
  239. ixgb_irq_disable(adapter);
  240. free_irq(adapter->pdev->irq, netdev);
  241. #ifdef CONFIG_PCI_MSI
  242. if(adapter->have_msi == TRUE)
  243. pci_disable_msi(adapter->pdev);
  244. #endif
  245. if(kill_watchdog)
  246. del_timer_sync(&adapter->watchdog_timer);
  247. #ifdef CONFIG_IXGB_NAPI
  248. netif_poll_disable(netdev);
  249. #endif
  250. adapter->link_speed = 0;
  251. adapter->link_duplex = 0;
  252. netif_carrier_off(netdev);
  253. netif_stop_queue(netdev);
  254. ixgb_reset(adapter);
  255. ixgb_clean_tx_ring(adapter);
  256. ixgb_clean_rx_ring(adapter);
  257. }
  258. void
  259. ixgb_reset(struct ixgb_adapter *adapter)
  260. {
  261. ixgb_adapter_stop(&adapter->hw);
  262. if(!ixgb_init_hw(&adapter->hw))
  263. IXGB_DBG("ixgb_init_hw failed.\n");
  264. }
  265. /**
  266. * ixgb_probe - Device Initialization Routine
  267. * @pdev: PCI device information struct
  268. * @ent: entry in ixgb_pci_tbl
  269. *
  270. * Returns 0 on success, negative on failure
  271. *
  272. * ixgb_probe initializes an adapter identified by a pci_dev structure.
  273. * The OS initialization, configuring of the adapter private structure,
  274. * and a hardware reset occur.
  275. **/
  276. static int __devinit
  277. ixgb_probe(struct pci_dev *pdev,
  278. const struct pci_device_id *ent)
  279. {
  280. struct net_device *netdev = NULL;
  281. struct ixgb_adapter *adapter;
  282. static int cards_found = 0;
  283. unsigned long mmio_start;
  284. int mmio_len;
  285. int pci_using_dac;
  286. int i;
  287. int err;
  288. if((err = pci_enable_device(pdev)))
  289. return err;
  290. if(!(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK))) {
  291. pci_using_dac = 1;
  292. } else {
  293. if((err = pci_set_dma_mask(pdev, DMA_32BIT_MASK))) {
  294. IXGB_ERR("No usable DMA configuration, aborting\n");
  295. return err;
  296. }
  297. pci_using_dac = 0;
  298. }
  299. if((err = pci_request_regions(pdev, ixgb_driver_name)))
  300. return err;
  301. pci_set_master(pdev);
  302. netdev = alloc_etherdev(sizeof(struct ixgb_adapter));
  303. if(!netdev) {
  304. err = -ENOMEM;
  305. goto err_alloc_etherdev;
  306. }
  307. SET_MODULE_OWNER(netdev);
  308. SET_NETDEV_DEV(netdev, &pdev->dev);
  309. pci_set_drvdata(pdev, netdev);
  310. adapter = netdev->priv;
  311. adapter->netdev = netdev;
  312. adapter->pdev = pdev;
  313. adapter->hw.back = adapter;
  314. mmio_start = pci_resource_start(pdev, BAR_0);
  315. mmio_len = pci_resource_len(pdev, BAR_0);
  316. adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
  317. if(!adapter->hw.hw_addr) {
  318. err = -EIO;
  319. goto err_ioremap;
  320. }
  321. for(i = BAR_1; i <= BAR_5; i++) {
  322. if(pci_resource_len(pdev, i) == 0)
  323. continue;
  324. if(pci_resource_flags(pdev, i) & IORESOURCE_IO) {
  325. adapter->hw.io_base = pci_resource_start(pdev, i);
  326. break;
  327. }
  328. }
  329. netdev->open = &ixgb_open;
  330. netdev->stop = &ixgb_close;
  331. netdev->hard_start_xmit = &ixgb_xmit_frame;
  332. netdev->get_stats = &ixgb_get_stats;
  333. netdev->set_multicast_list = &ixgb_set_multi;
  334. netdev->set_mac_address = &ixgb_set_mac;
  335. netdev->change_mtu = &ixgb_change_mtu;
  336. ixgb_set_ethtool_ops(netdev);
  337. netdev->tx_timeout = &ixgb_tx_timeout;
  338. netdev->watchdog_timeo = HZ;
  339. #ifdef CONFIG_IXGB_NAPI
  340. netdev->poll = &ixgb_clean;
  341. netdev->weight = 64;
  342. #endif
  343. netdev->vlan_rx_register = ixgb_vlan_rx_register;
  344. netdev->vlan_rx_add_vid = ixgb_vlan_rx_add_vid;
  345. netdev->vlan_rx_kill_vid = ixgb_vlan_rx_kill_vid;
  346. #ifdef CONFIG_NET_POLL_CONTROLLER
  347. netdev->poll_controller = ixgb_netpoll;
  348. #endif
  349. netdev->mem_start = mmio_start;
  350. netdev->mem_end = mmio_start + mmio_len;
  351. netdev->base_addr = adapter->hw.io_base;
  352. adapter->bd_number = cards_found;
  353. adapter->link_speed = 0;
  354. adapter->link_duplex = 0;
  355. /* setup the private structure */
  356. if((err = ixgb_sw_init(adapter)))
  357. goto err_sw_init;
  358. netdev->features = NETIF_F_SG |
  359. NETIF_F_HW_CSUM |
  360. NETIF_F_HW_VLAN_TX |
  361. NETIF_F_HW_VLAN_RX |
  362. NETIF_F_HW_VLAN_FILTER;
  363. #ifdef NETIF_F_TSO
  364. netdev->features |= NETIF_F_TSO;
  365. #endif
  366. if(pci_using_dac)
  367. netdev->features |= NETIF_F_HIGHDMA;
  368. /* make sure the EEPROM is good */
  369. if(!ixgb_validate_eeprom_checksum(&adapter->hw)) {
  370. printk(KERN_ERR "The EEPROM Checksum Is Not Valid\n");
  371. err = -EIO;
  372. goto err_eeprom;
  373. }
  374. ixgb_get_ee_mac_addr(&adapter->hw, netdev->dev_addr);
  375. if(!is_valid_ether_addr(netdev->dev_addr)) {
  376. err = -EIO;
  377. goto err_eeprom;
  378. }
  379. adapter->part_num = ixgb_get_ee_pba_number(&adapter->hw);
  380. init_timer(&adapter->watchdog_timer);
  381. adapter->watchdog_timer.function = &ixgb_watchdog;
  382. adapter->watchdog_timer.data = (unsigned long)adapter;
  383. INIT_WORK(&adapter->tx_timeout_task,
  384. (void (*)(void *))ixgb_tx_timeout_task, netdev);
  385. if((err = register_netdev(netdev)))
  386. goto err_register;
  387. /* we're going to reset, so assume we have no link for now */
  388. netif_carrier_off(netdev);
  389. netif_stop_queue(netdev);
  390. printk(KERN_INFO "%s: Intel(R) PRO/10GbE Network Connection\n",
  391. netdev->name);
  392. ixgb_check_options(adapter);
  393. /* reset the hardware with the new settings */
  394. ixgb_reset(adapter);
  395. cards_found++;
  396. return 0;
  397. err_register:
  398. err_sw_init:
  399. err_eeprom:
  400. iounmap(adapter->hw.hw_addr);
  401. err_ioremap:
  402. free_netdev(netdev);
  403. err_alloc_etherdev:
  404. pci_release_regions(pdev);
  405. return err;
  406. }
  407. /**
  408. * ixgb_remove - Device Removal Routine
  409. * @pdev: PCI device information struct
  410. *
  411. * ixgb_remove is called by the PCI subsystem to alert the driver
  412. * that it should release a PCI device. The could be caused by a
  413. * Hot-Plug event, or because the driver is going to be removed from
  414. * memory.
  415. **/
  416. static void __devexit
  417. ixgb_remove(struct pci_dev *pdev)
  418. {
  419. struct net_device *netdev = pci_get_drvdata(pdev);
  420. struct ixgb_adapter *adapter = netdev->priv;
  421. unregister_netdev(netdev);
  422. iounmap(adapter->hw.hw_addr);
  423. pci_release_regions(pdev);
  424. free_netdev(netdev);
  425. }
  426. /**
  427. * ixgb_sw_init - Initialize general software structures (struct ixgb_adapter)
  428. * @adapter: board private structure to initialize
  429. *
  430. * ixgb_sw_init initializes the Adapter private data structure.
  431. * Fields are initialized based on PCI device information and
  432. * OS network device settings (MTU size).
  433. **/
  434. static int __devinit
  435. ixgb_sw_init(struct ixgb_adapter *adapter)
  436. {
  437. struct ixgb_hw *hw = &adapter->hw;
  438. struct net_device *netdev = adapter->netdev;
  439. struct pci_dev *pdev = adapter->pdev;
  440. /* PCI config space info */
  441. hw->vendor_id = pdev->vendor;
  442. hw->device_id = pdev->device;
  443. hw->subsystem_vendor_id = pdev->subsystem_vendor;
  444. hw->subsystem_id = pdev->subsystem_device;
  445. adapter->rx_buffer_len = IXGB_RXBUFFER_2048;
  446. hw->max_frame_size = netdev->mtu + ENET_HEADER_SIZE + ENET_FCS_LENGTH;
  447. if((hw->device_id == IXGB_DEVICE_ID_82597EX)
  448. ||(hw->device_id == IXGB_DEVICE_ID_82597EX_LR)
  449. ||(hw->device_id == IXGB_DEVICE_ID_82597EX_SR))
  450. hw->mac_type = ixgb_82597;
  451. else {
  452. /* should never have loaded on this device */
  453. printk(KERN_ERR "ixgb: unsupported device id\n");
  454. }
  455. /* enable flow control to be programmed */
  456. hw->fc.send_xon = 1;
  457. atomic_set(&adapter->irq_sem, 1);
  458. spin_lock_init(&adapter->tx_lock);
  459. return 0;
  460. }
  461. /**
  462. * ixgb_open - Called when a network interface is made active
  463. * @netdev: network interface device structure
  464. *
  465. * Returns 0 on success, negative value on failure
  466. *
  467. * The open entry point is called when a network interface is made
  468. * active by the system (IFF_UP). At this point all resources needed
  469. * for transmit and receive operations are allocated, the interrupt
  470. * handler is registered with the OS, the watchdog timer is started,
  471. * and the stack is notified that the interface is ready.
  472. **/
  473. static int
  474. ixgb_open(struct net_device *netdev)
  475. {
  476. struct ixgb_adapter *adapter = netdev->priv;
  477. int err;
  478. /* allocate transmit descriptors */
  479. if((err = ixgb_setup_tx_resources(adapter)))
  480. goto err_setup_tx;
  481. /* allocate receive descriptors */
  482. if((err = ixgb_setup_rx_resources(adapter)))
  483. goto err_setup_rx;
  484. if((err = ixgb_up(adapter)))
  485. goto err_up;
  486. return 0;
  487. err_up:
  488. ixgb_free_rx_resources(adapter);
  489. err_setup_rx:
  490. ixgb_free_tx_resources(adapter);
  491. err_setup_tx:
  492. ixgb_reset(adapter);
  493. return err;
  494. }
  495. /**
  496. * ixgb_close - Disables a network interface
  497. * @netdev: network interface device structure
  498. *
  499. * Returns 0, this is not allowed to fail
  500. *
  501. * The close entry point is called when an interface is de-activated
  502. * by the OS. The hardware is still under the drivers control, but
  503. * needs to be disabled. A global MAC reset is issued to stop the
  504. * hardware, and all transmit and receive resources are freed.
  505. **/
  506. static int
  507. ixgb_close(struct net_device *netdev)
  508. {
  509. struct ixgb_adapter *adapter = netdev->priv;
  510. ixgb_down(adapter, TRUE);
  511. ixgb_free_tx_resources(adapter);
  512. ixgb_free_rx_resources(adapter);
  513. return 0;
  514. }
  515. /**
  516. * ixgb_setup_tx_resources - allocate Tx resources (Descriptors)
  517. * @adapter: board private structure
  518. *
  519. * Return 0 on success, negative on failure
  520. **/
  521. int
  522. ixgb_setup_tx_resources(struct ixgb_adapter *adapter)
  523. {
  524. struct ixgb_desc_ring *txdr = &adapter->tx_ring;
  525. struct pci_dev *pdev = adapter->pdev;
  526. int size;
  527. size = sizeof(struct ixgb_buffer) * txdr->count;
  528. txdr->buffer_info = vmalloc(size);
  529. if(!txdr->buffer_info) {
  530. return -ENOMEM;
  531. }
  532. memset(txdr->buffer_info, 0, size);
  533. /* round up to nearest 4K */
  534. txdr->size = txdr->count * sizeof(struct ixgb_tx_desc);
  535. IXGB_ROUNDUP(txdr->size, 4096);
  536. txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
  537. if(!txdr->desc) {
  538. vfree(txdr->buffer_info);
  539. return -ENOMEM;
  540. }
  541. memset(txdr->desc, 0, txdr->size);
  542. txdr->next_to_use = 0;
  543. txdr->next_to_clean = 0;
  544. return 0;
  545. }
  546. /**
  547. * ixgb_configure_tx - Configure 82597 Transmit Unit after Reset.
  548. * @adapter: board private structure
  549. *
  550. * Configure the Tx unit of the MAC after a reset.
  551. **/
  552. static void
  553. ixgb_configure_tx(struct ixgb_adapter *adapter)
  554. {
  555. uint64_t tdba = adapter->tx_ring.dma;
  556. uint32_t tdlen = adapter->tx_ring.count * sizeof(struct ixgb_tx_desc);
  557. uint32_t tctl;
  558. struct ixgb_hw *hw = &adapter->hw;
  559. /* Setup the Base and Length of the Tx Descriptor Ring
  560. * tx_ring.dma can be either a 32 or 64 bit value
  561. */
  562. IXGB_WRITE_REG(hw, TDBAL, (tdba & 0x00000000ffffffffULL));
  563. IXGB_WRITE_REG(hw, TDBAH, (tdba >> 32));
  564. IXGB_WRITE_REG(hw, TDLEN, tdlen);
  565. /* Setup the HW Tx Head and Tail descriptor pointers */
  566. IXGB_WRITE_REG(hw, TDH, 0);
  567. IXGB_WRITE_REG(hw, TDT, 0);
  568. /* don't set up txdctl, it induces performance problems if configured
  569. * incorrectly */
  570. /* Set the Tx Interrupt Delay register */
  571. IXGB_WRITE_REG(hw, TIDV, adapter->tx_int_delay);
  572. /* Program the Transmit Control Register */
  573. tctl = IXGB_TCTL_TCE | IXGB_TCTL_TXEN | IXGB_TCTL_TPDE;
  574. IXGB_WRITE_REG(hw, TCTL, tctl);
  575. /* Setup Transmit Descriptor Settings for this adapter */
  576. adapter->tx_cmd_type =
  577. IXGB_TX_DESC_TYPE
  578. | (adapter->tx_int_delay_enable ? IXGB_TX_DESC_CMD_IDE : 0);
  579. }
  580. /**
  581. * ixgb_setup_rx_resources - allocate Rx resources (Descriptors)
  582. * @adapter: board private structure
  583. *
  584. * Returns 0 on success, negative on failure
  585. **/
  586. int
  587. ixgb_setup_rx_resources(struct ixgb_adapter *adapter)
  588. {
  589. struct ixgb_desc_ring *rxdr = &adapter->rx_ring;
  590. struct pci_dev *pdev = adapter->pdev;
  591. int size;
  592. size = sizeof(struct ixgb_buffer) * rxdr->count;
  593. rxdr->buffer_info = vmalloc(size);
  594. if(!rxdr->buffer_info) {
  595. return -ENOMEM;
  596. }
  597. memset(rxdr->buffer_info, 0, size);
  598. /* Round up to nearest 4K */
  599. rxdr->size = rxdr->count * sizeof(struct ixgb_rx_desc);
  600. IXGB_ROUNDUP(rxdr->size, 4096);
  601. rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
  602. if(!rxdr->desc) {
  603. vfree(rxdr->buffer_info);
  604. return -ENOMEM;
  605. }
  606. memset(rxdr->desc, 0, rxdr->size);
  607. rxdr->next_to_clean = 0;
  608. rxdr->next_to_use = 0;
  609. return 0;
  610. }
  611. /**
  612. * ixgb_setup_rctl - configure the receive control register
  613. * @adapter: Board private structure
  614. **/
  615. static void
  616. ixgb_setup_rctl(struct ixgb_adapter *adapter)
  617. {
  618. uint32_t rctl;
  619. rctl = IXGB_READ_REG(&adapter->hw, RCTL);
  620. rctl &= ~(3 << IXGB_RCTL_MO_SHIFT);
  621. rctl |=
  622. IXGB_RCTL_BAM | IXGB_RCTL_RDMTS_1_2 |
  623. IXGB_RCTL_RXEN | IXGB_RCTL_CFF |
  624. (adapter->hw.mc_filter_type << IXGB_RCTL_MO_SHIFT);
  625. rctl |= IXGB_RCTL_SECRC;
  626. switch (adapter->rx_buffer_len) {
  627. case IXGB_RXBUFFER_2048:
  628. default:
  629. rctl |= IXGB_RCTL_BSIZE_2048;
  630. break;
  631. case IXGB_RXBUFFER_4096:
  632. rctl |= IXGB_RCTL_BSIZE_4096;
  633. break;
  634. case IXGB_RXBUFFER_8192:
  635. rctl |= IXGB_RCTL_BSIZE_8192;
  636. break;
  637. case IXGB_RXBUFFER_16384:
  638. rctl |= IXGB_RCTL_BSIZE_16384;
  639. break;
  640. }
  641. IXGB_WRITE_REG(&adapter->hw, RCTL, rctl);
  642. }
  643. /**
  644. * ixgb_configure_rx - Configure 82597 Receive Unit after Reset.
  645. * @adapter: board private structure
  646. *
  647. * Configure the Rx unit of the MAC after a reset.
  648. **/
  649. static void
  650. ixgb_configure_rx(struct ixgb_adapter *adapter)
  651. {
  652. uint64_t rdba = adapter->rx_ring.dma;
  653. uint32_t rdlen = adapter->rx_ring.count * sizeof(struct ixgb_rx_desc);
  654. struct ixgb_hw *hw = &adapter->hw;
  655. uint32_t rctl;
  656. uint32_t rxcsum;
  657. uint32_t rxdctl;
  658. /* make sure receives are disabled while setting up the descriptors */
  659. rctl = IXGB_READ_REG(hw, RCTL);
  660. IXGB_WRITE_REG(hw, RCTL, rctl & ~IXGB_RCTL_RXEN);
  661. /* set the Receive Delay Timer Register */
  662. IXGB_WRITE_REG(hw, RDTR, adapter->rx_int_delay);
  663. /* Setup the Base and Length of the Rx Descriptor Ring */
  664. IXGB_WRITE_REG(hw, RDBAL, (rdba & 0x00000000ffffffffULL));
  665. IXGB_WRITE_REG(hw, RDBAH, (rdba >> 32));
  666. IXGB_WRITE_REG(hw, RDLEN, rdlen);
  667. /* Setup the HW Rx Head and Tail Descriptor Pointers */
  668. IXGB_WRITE_REG(hw, RDH, 0);
  669. IXGB_WRITE_REG(hw, RDT, 0);
  670. /* set up pre-fetching of receive buffers so we get some before we
  671. * run out (default hardware behavior is to run out before fetching
  672. * more). This sets up to fetch if HTHRESH rx descriptors are avail
  673. * and the descriptors in hw cache are below PTHRESH. This avoids
  674. * the hardware behavior of fetching <=512 descriptors in a single
  675. * burst that pre-empts all other activity, usually causing fifo
  676. * overflows. */
  677. /* use WTHRESH to burst write 16 descriptors or burst when RXT0 */
  678. rxdctl = RXDCTL_WTHRESH_DEFAULT << IXGB_RXDCTL_WTHRESH_SHIFT |
  679. RXDCTL_HTHRESH_DEFAULT << IXGB_RXDCTL_HTHRESH_SHIFT |
  680. RXDCTL_PTHRESH_DEFAULT << IXGB_RXDCTL_PTHRESH_SHIFT;
  681. IXGB_WRITE_REG(hw, RXDCTL, rxdctl);
  682. /* Enable Receive Checksum Offload for TCP and UDP */
  683. if(adapter->rx_csum == TRUE) {
  684. rxcsum = IXGB_READ_REG(hw, RXCSUM);
  685. rxcsum |= IXGB_RXCSUM_TUOFL;
  686. IXGB_WRITE_REG(hw, RXCSUM, rxcsum);
  687. }
  688. /* Enable Receives */
  689. IXGB_WRITE_REG(hw, RCTL, rctl);
  690. }
  691. /**
  692. * ixgb_free_tx_resources - Free Tx Resources
  693. * @adapter: board private structure
  694. *
  695. * Free all transmit software resources
  696. **/
  697. void
  698. ixgb_free_tx_resources(struct ixgb_adapter *adapter)
  699. {
  700. struct pci_dev *pdev = adapter->pdev;
  701. ixgb_clean_tx_ring(adapter);
  702. vfree(adapter->tx_ring.buffer_info);
  703. adapter->tx_ring.buffer_info = NULL;
  704. pci_free_consistent(pdev, adapter->tx_ring.size,
  705. adapter->tx_ring.desc, adapter->tx_ring.dma);
  706. adapter->tx_ring.desc = NULL;
  707. }
  708. static inline void
  709. ixgb_unmap_and_free_tx_resource(struct ixgb_adapter *adapter,
  710. struct ixgb_buffer *buffer_info)
  711. {
  712. struct pci_dev *pdev = adapter->pdev;
  713. if(buffer_info->dma) {
  714. pci_unmap_page(pdev,
  715. buffer_info->dma,
  716. buffer_info->length,
  717. PCI_DMA_TODEVICE);
  718. buffer_info->dma = 0;
  719. }
  720. if(buffer_info->skb) {
  721. dev_kfree_skb_any(buffer_info->skb);
  722. buffer_info->skb = NULL;
  723. }
  724. }
  725. /**
  726. * ixgb_clean_tx_ring - Free Tx Buffers
  727. * @adapter: board private structure
  728. **/
  729. static void
  730. ixgb_clean_tx_ring(struct ixgb_adapter *adapter)
  731. {
  732. struct ixgb_desc_ring *tx_ring = &adapter->tx_ring;
  733. struct ixgb_buffer *buffer_info;
  734. unsigned long size;
  735. unsigned int i;
  736. /* Free all the Tx ring sk_buffs */
  737. for(i = 0; i < tx_ring->count; i++) {
  738. buffer_info = &tx_ring->buffer_info[i];
  739. ixgb_unmap_and_free_tx_resource(adapter, buffer_info);
  740. }
  741. size = sizeof(struct ixgb_buffer) * tx_ring->count;
  742. memset(tx_ring->buffer_info, 0, size);
  743. /* Zero out the descriptor ring */
  744. memset(tx_ring->desc, 0, tx_ring->size);
  745. tx_ring->next_to_use = 0;
  746. tx_ring->next_to_clean = 0;
  747. IXGB_WRITE_REG(&adapter->hw, TDH, 0);
  748. IXGB_WRITE_REG(&adapter->hw, TDT, 0);
  749. }
  750. /**
  751. * ixgb_free_rx_resources - Free Rx Resources
  752. * @adapter: board private structure
  753. *
  754. * Free all receive software resources
  755. **/
  756. void
  757. ixgb_free_rx_resources(struct ixgb_adapter *adapter)
  758. {
  759. struct ixgb_desc_ring *rx_ring = &adapter->rx_ring;
  760. struct pci_dev *pdev = adapter->pdev;
  761. ixgb_clean_rx_ring(adapter);
  762. vfree(rx_ring->buffer_info);
  763. rx_ring->buffer_info = NULL;
  764. pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
  765. rx_ring->desc = NULL;
  766. }
  767. /**
  768. * ixgb_clean_rx_ring - Free Rx Buffers
  769. * @adapter: board private structure
  770. **/
  771. static void
  772. ixgb_clean_rx_ring(struct ixgb_adapter *adapter)
  773. {
  774. struct ixgb_desc_ring *rx_ring = &adapter->rx_ring;
  775. struct ixgb_buffer *buffer_info;
  776. struct pci_dev *pdev = adapter->pdev;
  777. unsigned long size;
  778. unsigned int i;
  779. /* Free all the Rx ring sk_buffs */
  780. for(i = 0; i < rx_ring->count; i++) {
  781. buffer_info = &rx_ring->buffer_info[i];
  782. if(buffer_info->skb) {
  783. pci_unmap_single(pdev,
  784. buffer_info->dma,
  785. buffer_info->length,
  786. PCI_DMA_FROMDEVICE);
  787. dev_kfree_skb(buffer_info->skb);
  788. buffer_info->skb = NULL;
  789. }
  790. }
  791. size = sizeof(struct ixgb_buffer) * rx_ring->count;
  792. memset(rx_ring->buffer_info, 0, size);
  793. /* Zero out the descriptor ring */
  794. memset(rx_ring->desc, 0, rx_ring->size);
  795. rx_ring->next_to_clean = 0;
  796. rx_ring->next_to_use = 0;
  797. IXGB_WRITE_REG(&adapter->hw, RDH, 0);
  798. IXGB_WRITE_REG(&adapter->hw, RDT, 0);
  799. }
  800. /**
  801. * ixgb_set_mac - Change the Ethernet Address of the NIC
  802. * @netdev: network interface device structure
  803. * @p: pointer to an address structure
  804. *
  805. * Returns 0 on success, negative on failure
  806. **/
  807. static int
  808. ixgb_set_mac(struct net_device *netdev, void *p)
  809. {
  810. struct ixgb_adapter *adapter = netdev->priv;
  811. struct sockaddr *addr = p;
  812. if(!is_valid_ether_addr(addr->sa_data))
  813. return -EADDRNOTAVAIL;
  814. memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
  815. ixgb_rar_set(&adapter->hw, addr->sa_data, 0);
  816. return 0;
  817. }
  818. /**
  819. * ixgb_set_multi - Multicast and Promiscuous mode set
  820. * @netdev: network interface device structure
  821. *
  822. * The set_multi entry point is called whenever the multicast address
  823. * list or the network interface flags are updated. This routine is
  824. * responsible for configuring the hardware for proper multicast,
  825. * promiscuous mode, and all-multi behavior.
  826. **/
  827. static void
  828. ixgb_set_multi(struct net_device *netdev)
  829. {
  830. struct ixgb_adapter *adapter = netdev->priv;
  831. struct ixgb_hw *hw = &adapter->hw;
  832. struct dev_mc_list *mc_ptr;
  833. uint32_t rctl;
  834. int i;
  835. /* Check for Promiscuous and All Multicast modes */
  836. rctl = IXGB_READ_REG(hw, RCTL);
  837. if(netdev->flags & IFF_PROMISC) {
  838. rctl |= (IXGB_RCTL_UPE | IXGB_RCTL_MPE);
  839. } else if(netdev->flags & IFF_ALLMULTI) {
  840. rctl |= IXGB_RCTL_MPE;
  841. rctl &= ~IXGB_RCTL_UPE;
  842. } else {
  843. rctl &= ~(IXGB_RCTL_UPE | IXGB_RCTL_MPE);
  844. }
  845. if(netdev->mc_count > IXGB_MAX_NUM_MULTICAST_ADDRESSES) {
  846. rctl |= IXGB_RCTL_MPE;
  847. IXGB_WRITE_REG(hw, RCTL, rctl);
  848. } else {
  849. uint8_t mta[netdev->mc_count * IXGB_ETH_LENGTH_OF_ADDRESS];
  850. IXGB_WRITE_REG(hw, RCTL, rctl);
  851. for(i = 0, mc_ptr = netdev->mc_list; mc_ptr;
  852. i++, mc_ptr = mc_ptr->next)
  853. memcpy(&mta[i * IXGB_ETH_LENGTH_OF_ADDRESS],
  854. mc_ptr->dmi_addr, IXGB_ETH_LENGTH_OF_ADDRESS);
  855. ixgb_mc_addr_list_update(hw, mta, netdev->mc_count, 0);
  856. }
  857. }
  858. /**
  859. * ixgb_watchdog - Timer Call-back
  860. * @data: pointer to netdev cast into an unsigned long
  861. **/
  862. static void
  863. ixgb_watchdog(unsigned long data)
  864. {
  865. struct ixgb_adapter *adapter = (struct ixgb_adapter *)data;
  866. struct net_device *netdev = adapter->netdev;
  867. struct ixgb_desc_ring *txdr = &adapter->tx_ring;
  868. ixgb_check_for_link(&adapter->hw);
  869. if (ixgb_check_for_bad_link(&adapter->hw)) {
  870. /* force the reset path */
  871. netif_stop_queue(netdev);
  872. }
  873. if(adapter->hw.link_up) {
  874. if(!netif_carrier_ok(netdev)) {
  875. printk(KERN_INFO "ixgb: %s NIC Link is Up %d Mbps %s\n",
  876. netdev->name, 10000, "Full Duplex");
  877. adapter->link_speed = 10000;
  878. adapter->link_duplex = FULL_DUPLEX;
  879. netif_carrier_on(netdev);
  880. netif_wake_queue(netdev);
  881. }
  882. } else {
  883. if(netif_carrier_ok(netdev)) {
  884. adapter->link_speed = 0;
  885. adapter->link_duplex = 0;
  886. printk(KERN_INFO
  887. "ixgb: %s NIC Link is Down\n",
  888. netdev->name);
  889. netif_carrier_off(netdev);
  890. netif_stop_queue(netdev);
  891. }
  892. }
  893. ixgb_update_stats(adapter);
  894. if(!netif_carrier_ok(netdev)) {
  895. if(IXGB_DESC_UNUSED(txdr) + 1 < txdr->count) {
  896. /* We've lost link, so the controller stops DMA,
  897. * but we've got queued Tx work that's never going
  898. * to get done, so reset controller to flush Tx.
  899. * (Do the reset outside of interrupt context). */
  900. schedule_work(&adapter->tx_timeout_task);
  901. }
  902. }
  903. /* Force detection of hung controller every watchdog period */
  904. adapter->detect_tx_hung = TRUE;
  905. /* generate an interrupt to force clean up of any stragglers */
  906. IXGB_WRITE_REG(&adapter->hw, ICS, IXGB_INT_TXDW);
  907. /* Reset the timer */
  908. mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
  909. }
  910. #define IXGB_TX_FLAGS_CSUM 0x00000001
  911. #define IXGB_TX_FLAGS_VLAN 0x00000002
  912. #define IXGB_TX_FLAGS_TSO 0x00000004
  913. static inline int
  914. ixgb_tso(struct ixgb_adapter *adapter, struct sk_buff *skb)
  915. {
  916. #ifdef NETIF_F_TSO
  917. struct ixgb_context_desc *context_desc;
  918. unsigned int i;
  919. uint8_t ipcss, ipcso, tucss, tucso, hdr_len;
  920. uint16_t ipcse, tucse, mss;
  921. int err;
  922. if(likely(skb_shinfo(skb)->tso_size)) {
  923. if (skb_header_cloned(skb)) {
  924. err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
  925. if (err)
  926. return err;
  927. }
  928. hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
  929. mss = skb_shinfo(skb)->tso_size;
  930. skb->nh.iph->tot_len = 0;
  931. skb->nh.iph->check = 0;
  932. skb->h.th->check = ~csum_tcpudp_magic(skb->nh.iph->saddr,
  933. skb->nh.iph->daddr,
  934. 0, IPPROTO_TCP, 0);
  935. ipcss = skb->nh.raw - skb->data;
  936. ipcso = (void *)&(skb->nh.iph->check) - (void *)skb->data;
  937. ipcse = skb->h.raw - skb->data - 1;
  938. tucss = skb->h.raw - skb->data;
  939. tucso = (void *)&(skb->h.th->check) - (void *)skb->data;
  940. tucse = 0;
  941. i = adapter->tx_ring.next_to_use;
  942. context_desc = IXGB_CONTEXT_DESC(adapter->tx_ring, i);
  943. context_desc->ipcss = ipcss;
  944. context_desc->ipcso = ipcso;
  945. context_desc->ipcse = cpu_to_le16(ipcse);
  946. context_desc->tucss = tucss;
  947. context_desc->tucso = tucso;
  948. context_desc->tucse = cpu_to_le16(tucse);
  949. context_desc->mss = cpu_to_le16(mss);
  950. context_desc->hdr_len = hdr_len;
  951. context_desc->status = 0;
  952. context_desc->cmd_type_len = cpu_to_le32(
  953. IXGB_CONTEXT_DESC_TYPE
  954. | IXGB_CONTEXT_DESC_CMD_TSE
  955. | IXGB_CONTEXT_DESC_CMD_IP
  956. | IXGB_CONTEXT_DESC_CMD_TCP
  957. | IXGB_CONTEXT_DESC_CMD_IDE
  958. | (skb->len - (hdr_len)));
  959. if(++i == adapter->tx_ring.count) i = 0;
  960. adapter->tx_ring.next_to_use = i;
  961. return 1;
  962. }
  963. #endif
  964. return 0;
  965. }
  966. static inline boolean_t
  967. ixgb_tx_csum(struct ixgb_adapter *adapter, struct sk_buff *skb)
  968. {
  969. struct ixgb_context_desc *context_desc;
  970. unsigned int i;
  971. uint8_t css, cso;
  972. if(likely(skb->ip_summed == CHECKSUM_HW)) {
  973. css = skb->h.raw - skb->data;
  974. cso = (skb->h.raw + skb->csum) - skb->data;
  975. i = adapter->tx_ring.next_to_use;
  976. context_desc = IXGB_CONTEXT_DESC(adapter->tx_ring, i);
  977. context_desc->tucss = css;
  978. context_desc->tucso = cso;
  979. context_desc->tucse = 0;
  980. /* zero out any previously existing data in one instruction */
  981. *(uint32_t *)&(context_desc->ipcss) = 0;
  982. context_desc->status = 0;
  983. context_desc->hdr_len = 0;
  984. context_desc->mss = 0;
  985. context_desc->cmd_type_len =
  986. cpu_to_le32(IXGB_CONTEXT_DESC_TYPE
  987. | IXGB_TX_DESC_CMD_IDE);
  988. if(++i == adapter->tx_ring.count) i = 0;
  989. adapter->tx_ring.next_to_use = i;
  990. return TRUE;
  991. }
  992. return FALSE;
  993. }
  994. #define IXGB_MAX_TXD_PWR 14
  995. #define IXGB_MAX_DATA_PER_TXD (1<<IXGB_MAX_TXD_PWR)
  996. static inline int
  997. ixgb_tx_map(struct ixgb_adapter *adapter, struct sk_buff *skb,
  998. unsigned int first)
  999. {
  1000. struct ixgb_desc_ring *tx_ring = &adapter->tx_ring;
  1001. struct ixgb_buffer *buffer_info;
  1002. int len = skb->len;
  1003. unsigned int offset = 0, size, count = 0, i;
  1004. unsigned int nr_frags = skb_shinfo(skb)->nr_frags;
  1005. unsigned int f;
  1006. len -= skb->data_len;
  1007. i = tx_ring->next_to_use;
  1008. while(len) {
  1009. buffer_info = &tx_ring->buffer_info[i];
  1010. size = min(len, IXGB_MAX_JUMBO_FRAME_SIZE);
  1011. buffer_info->length = size;
  1012. buffer_info->dma =
  1013. pci_map_single(adapter->pdev,
  1014. skb->data + offset,
  1015. size,
  1016. PCI_DMA_TODEVICE);
  1017. buffer_info->time_stamp = jiffies;
  1018. len -= size;
  1019. offset += size;
  1020. count++;
  1021. if(++i == tx_ring->count) i = 0;
  1022. }
  1023. for(f = 0; f < nr_frags; f++) {
  1024. struct skb_frag_struct *frag;
  1025. frag = &skb_shinfo(skb)->frags[f];
  1026. len = frag->size;
  1027. offset = 0;
  1028. while(len) {
  1029. buffer_info = &tx_ring->buffer_info[i];
  1030. size = min(len, IXGB_MAX_JUMBO_FRAME_SIZE);
  1031. buffer_info->length = size;
  1032. buffer_info->dma =
  1033. pci_map_page(adapter->pdev,
  1034. frag->page,
  1035. frag->page_offset + offset,
  1036. size,
  1037. PCI_DMA_TODEVICE);
  1038. buffer_info->time_stamp = jiffies;
  1039. len -= size;
  1040. offset += size;
  1041. count++;
  1042. if(++i == tx_ring->count) i = 0;
  1043. }
  1044. }
  1045. i = (i == 0) ? tx_ring->count - 1 : i - 1;
  1046. tx_ring->buffer_info[i].skb = skb;
  1047. tx_ring->buffer_info[first].next_to_watch = i;
  1048. return count;
  1049. }
  1050. static inline void
  1051. ixgb_tx_queue(struct ixgb_adapter *adapter, int count, int vlan_id,int tx_flags)
  1052. {
  1053. struct ixgb_desc_ring *tx_ring = &adapter->tx_ring;
  1054. struct ixgb_tx_desc *tx_desc = NULL;
  1055. struct ixgb_buffer *buffer_info;
  1056. uint32_t cmd_type_len = adapter->tx_cmd_type;
  1057. uint8_t status = 0;
  1058. uint8_t popts = 0;
  1059. unsigned int i;
  1060. if(tx_flags & IXGB_TX_FLAGS_TSO) {
  1061. cmd_type_len |= IXGB_TX_DESC_CMD_TSE;
  1062. popts |= (IXGB_TX_DESC_POPTS_IXSM | IXGB_TX_DESC_POPTS_TXSM);
  1063. }
  1064. if(tx_flags & IXGB_TX_FLAGS_CSUM)
  1065. popts |= IXGB_TX_DESC_POPTS_TXSM;
  1066. if(tx_flags & IXGB_TX_FLAGS_VLAN) {
  1067. cmd_type_len |= IXGB_TX_DESC_CMD_VLE;
  1068. }
  1069. i = tx_ring->next_to_use;
  1070. while(count--) {
  1071. buffer_info = &tx_ring->buffer_info[i];
  1072. tx_desc = IXGB_TX_DESC(*tx_ring, i);
  1073. tx_desc->buff_addr = cpu_to_le64(buffer_info->dma);
  1074. tx_desc->cmd_type_len =
  1075. cpu_to_le32(cmd_type_len | buffer_info->length);
  1076. tx_desc->status = status;
  1077. tx_desc->popts = popts;
  1078. tx_desc->vlan = cpu_to_le16(vlan_id);
  1079. if(++i == tx_ring->count) i = 0;
  1080. }
  1081. tx_desc->cmd_type_len |= cpu_to_le32(IXGB_TX_DESC_CMD_EOP
  1082. | IXGB_TX_DESC_CMD_RS );
  1083. /* Force memory writes to complete before letting h/w
  1084. * know there are new descriptors to fetch. (Only
  1085. * applicable for weak-ordered memory model archs,
  1086. * such as IA-64). */
  1087. wmb();
  1088. tx_ring->next_to_use = i;
  1089. IXGB_WRITE_REG(&adapter->hw, TDT, i);
  1090. }
  1091. /* Tx Descriptors needed, worst case */
  1092. #define TXD_USE_COUNT(S) (((S) >> IXGB_MAX_TXD_PWR) + \
  1093. (((S) & (IXGB_MAX_DATA_PER_TXD - 1)) ? 1 : 0))
  1094. #define DESC_NEEDED TXD_USE_COUNT(IXGB_MAX_DATA_PER_TXD) + \
  1095. MAX_SKB_FRAGS * TXD_USE_COUNT(PAGE_SIZE) + 1
  1096. static int
  1097. ixgb_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
  1098. {
  1099. struct ixgb_adapter *adapter = netdev->priv;
  1100. unsigned int first;
  1101. unsigned int tx_flags = 0;
  1102. unsigned long flags;
  1103. int vlan_id = 0;
  1104. int tso;
  1105. if(skb->len <= 0) {
  1106. dev_kfree_skb_any(skb);
  1107. return 0;
  1108. }
  1109. spin_lock_irqsave(&adapter->tx_lock, flags);
  1110. if(unlikely(IXGB_DESC_UNUSED(&adapter->tx_ring) < DESC_NEEDED)) {
  1111. netif_stop_queue(netdev);
  1112. spin_unlock_irqrestore(&adapter->tx_lock, flags);
  1113. return 1;
  1114. }
  1115. spin_unlock_irqrestore(&adapter->tx_lock, flags);
  1116. if(adapter->vlgrp && vlan_tx_tag_present(skb)) {
  1117. tx_flags |= IXGB_TX_FLAGS_VLAN;
  1118. vlan_id = vlan_tx_tag_get(skb);
  1119. }
  1120. first = adapter->tx_ring.next_to_use;
  1121. tso = ixgb_tso(adapter, skb);
  1122. if (tso < 0) {
  1123. dev_kfree_skb_any(skb);
  1124. return NETDEV_TX_OK;
  1125. }
  1126. if (tso)
  1127. tx_flags |= IXGB_TX_FLAGS_TSO;
  1128. else if(ixgb_tx_csum(adapter, skb))
  1129. tx_flags |= IXGB_TX_FLAGS_CSUM;
  1130. ixgb_tx_queue(adapter, ixgb_tx_map(adapter, skb, first), vlan_id,
  1131. tx_flags);
  1132. netdev->trans_start = jiffies;
  1133. return 0;
  1134. }
  1135. /**
  1136. * ixgb_tx_timeout - Respond to a Tx Hang
  1137. * @netdev: network interface device structure
  1138. **/
  1139. static void
  1140. ixgb_tx_timeout(struct net_device *netdev)
  1141. {
  1142. struct ixgb_adapter *adapter = netdev->priv;
  1143. /* Do the reset outside of interrupt context */
  1144. schedule_work(&adapter->tx_timeout_task);
  1145. }
  1146. static void
  1147. ixgb_tx_timeout_task(struct net_device *netdev)
  1148. {
  1149. struct ixgb_adapter *adapter = netdev->priv;
  1150. ixgb_down(adapter, TRUE);
  1151. ixgb_up(adapter);
  1152. }
  1153. /**
  1154. * ixgb_get_stats - Get System Network Statistics
  1155. * @netdev: network interface device structure
  1156. *
  1157. * Returns the address of the device statistics structure.
  1158. * The statistics are actually updated from the timer callback.
  1159. **/
  1160. static struct net_device_stats *
  1161. ixgb_get_stats(struct net_device *netdev)
  1162. {
  1163. struct ixgb_adapter *adapter = netdev->priv;
  1164. return &adapter->net_stats;
  1165. }
  1166. /**
  1167. * ixgb_change_mtu - Change the Maximum Transfer Unit
  1168. * @netdev: network interface device structure
  1169. * @new_mtu: new value for maximum frame size
  1170. *
  1171. * Returns 0 on success, negative on failure
  1172. **/
  1173. static int
  1174. ixgb_change_mtu(struct net_device *netdev, int new_mtu)
  1175. {
  1176. struct ixgb_adapter *adapter = netdev->priv;
  1177. int max_frame = new_mtu + ENET_HEADER_SIZE + ENET_FCS_LENGTH;
  1178. int old_max_frame = netdev->mtu + ENET_HEADER_SIZE + ENET_FCS_LENGTH;
  1179. if((max_frame < IXGB_MIN_ENET_FRAME_SIZE_WITHOUT_FCS + ENET_FCS_LENGTH)
  1180. || (max_frame > IXGB_MAX_JUMBO_FRAME_SIZE + ENET_FCS_LENGTH)) {
  1181. IXGB_ERR("Invalid MTU setting\n");
  1182. return -EINVAL;
  1183. }
  1184. if((max_frame <= IXGB_MAX_ENET_FRAME_SIZE_WITHOUT_FCS + ENET_FCS_LENGTH)
  1185. || (max_frame <= IXGB_RXBUFFER_2048)) {
  1186. adapter->rx_buffer_len = IXGB_RXBUFFER_2048;
  1187. } else if(max_frame <= IXGB_RXBUFFER_4096) {
  1188. adapter->rx_buffer_len = IXGB_RXBUFFER_4096;
  1189. } else if(max_frame <= IXGB_RXBUFFER_8192) {
  1190. adapter->rx_buffer_len = IXGB_RXBUFFER_8192;
  1191. } else {
  1192. adapter->rx_buffer_len = IXGB_RXBUFFER_16384;
  1193. }
  1194. netdev->mtu = new_mtu;
  1195. if(old_max_frame != max_frame && netif_running(netdev)) {
  1196. ixgb_down(adapter, TRUE);
  1197. ixgb_up(adapter);
  1198. }
  1199. return 0;
  1200. }
  1201. /**
  1202. * ixgb_update_stats - Update the board statistics counters.
  1203. * @adapter: board private structure
  1204. **/
  1205. void
  1206. ixgb_update_stats(struct ixgb_adapter *adapter)
  1207. {
  1208. struct net_device *netdev = adapter->netdev;
  1209. if((netdev->flags & IFF_PROMISC) || (netdev->flags & IFF_ALLMULTI) ||
  1210. (netdev->mc_count > IXGB_MAX_NUM_MULTICAST_ADDRESSES)) {
  1211. u64 multi = IXGB_READ_REG(&adapter->hw, MPRCL);
  1212. u32 bcast_l = IXGB_READ_REG(&adapter->hw, BPRCL);
  1213. u32 bcast_h = IXGB_READ_REG(&adapter->hw, BPRCH);
  1214. u64 bcast = ((u64)bcast_h << 32) | bcast_l;
  1215. multi |= ((u64)IXGB_READ_REG(&adapter->hw, MPRCH) << 32);
  1216. /* fix up multicast stats by removing broadcasts */
  1217. multi -= bcast;
  1218. adapter->stats.mprcl += (multi & 0xFFFFFFFF);
  1219. adapter->stats.mprch += (multi >> 32);
  1220. adapter->stats.bprcl += bcast_l;
  1221. adapter->stats.bprch += bcast_h;
  1222. } else {
  1223. adapter->stats.mprcl += IXGB_READ_REG(&adapter->hw, MPRCL);
  1224. adapter->stats.mprch += IXGB_READ_REG(&adapter->hw, MPRCH);
  1225. adapter->stats.bprcl += IXGB_READ_REG(&adapter->hw, BPRCL);
  1226. adapter->stats.bprch += IXGB_READ_REG(&adapter->hw, BPRCH);
  1227. }
  1228. adapter->stats.tprl += IXGB_READ_REG(&adapter->hw, TPRL);
  1229. adapter->stats.tprh += IXGB_READ_REG(&adapter->hw, TPRH);
  1230. adapter->stats.gprcl += IXGB_READ_REG(&adapter->hw, GPRCL);
  1231. adapter->stats.gprch += IXGB_READ_REG(&adapter->hw, GPRCH);
  1232. adapter->stats.uprcl += IXGB_READ_REG(&adapter->hw, UPRCL);
  1233. adapter->stats.uprch += IXGB_READ_REG(&adapter->hw, UPRCH);
  1234. adapter->stats.vprcl += IXGB_READ_REG(&adapter->hw, VPRCL);
  1235. adapter->stats.vprch += IXGB_READ_REG(&adapter->hw, VPRCH);
  1236. adapter->stats.jprcl += IXGB_READ_REG(&adapter->hw, JPRCL);
  1237. adapter->stats.jprch += IXGB_READ_REG(&adapter->hw, JPRCH);
  1238. adapter->stats.gorcl += IXGB_READ_REG(&adapter->hw, GORCL);
  1239. adapter->stats.gorch += IXGB_READ_REG(&adapter->hw, GORCH);
  1240. adapter->stats.torl += IXGB_READ_REG(&adapter->hw, TORL);
  1241. adapter->stats.torh += IXGB_READ_REG(&adapter->hw, TORH);
  1242. adapter->stats.rnbc += IXGB_READ_REG(&adapter->hw, RNBC);
  1243. adapter->stats.ruc += IXGB_READ_REG(&adapter->hw, RUC);
  1244. adapter->stats.roc += IXGB_READ_REG(&adapter->hw, ROC);
  1245. adapter->stats.rlec += IXGB_READ_REG(&adapter->hw, RLEC);
  1246. adapter->stats.crcerrs += IXGB_READ_REG(&adapter->hw, CRCERRS);
  1247. adapter->stats.icbc += IXGB_READ_REG(&adapter->hw, ICBC);
  1248. adapter->stats.ecbc += IXGB_READ_REG(&adapter->hw, ECBC);
  1249. adapter->stats.mpc += IXGB_READ_REG(&adapter->hw, MPC);
  1250. adapter->stats.tptl += IXGB_READ_REG(&adapter->hw, TPTL);
  1251. adapter->stats.tpth += IXGB_READ_REG(&adapter->hw, TPTH);
  1252. adapter->stats.gptcl += IXGB_READ_REG(&adapter->hw, GPTCL);
  1253. adapter->stats.gptch += IXGB_READ_REG(&adapter->hw, GPTCH);
  1254. adapter->stats.bptcl += IXGB_READ_REG(&adapter->hw, BPTCL);
  1255. adapter->stats.bptch += IXGB_READ_REG(&adapter->hw, BPTCH);
  1256. adapter->stats.mptcl += IXGB_READ_REG(&adapter->hw, MPTCL);
  1257. adapter->stats.mptch += IXGB_READ_REG(&adapter->hw, MPTCH);
  1258. adapter->stats.uptcl += IXGB_READ_REG(&adapter->hw, UPTCL);
  1259. adapter->stats.uptch += IXGB_READ_REG(&adapter->hw, UPTCH);
  1260. adapter->stats.vptcl += IXGB_READ_REG(&adapter->hw, VPTCL);
  1261. adapter->stats.vptch += IXGB_READ_REG(&adapter->hw, VPTCH);
  1262. adapter->stats.jptcl += IXGB_READ_REG(&adapter->hw, JPTCL);
  1263. adapter->stats.jptch += IXGB_READ_REG(&adapter->hw, JPTCH);
  1264. adapter->stats.gotcl += IXGB_READ_REG(&adapter->hw, GOTCL);
  1265. adapter->stats.gotch += IXGB_READ_REG(&adapter->hw, GOTCH);
  1266. adapter->stats.totl += IXGB_READ_REG(&adapter->hw, TOTL);
  1267. adapter->stats.toth += IXGB_READ_REG(&adapter->hw, TOTH);
  1268. adapter->stats.dc += IXGB_READ_REG(&adapter->hw, DC);
  1269. adapter->stats.plt64c += IXGB_READ_REG(&adapter->hw, PLT64C);
  1270. adapter->stats.tsctc += IXGB_READ_REG(&adapter->hw, TSCTC);
  1271. adapter->stats.tsctfc += IXGB_READ_REG(&adapter->hw, TSCTFC);
  1272. adapter->stats.ibic += IXGB_READ_REG(&adapter->hw, IBIC);
  1273. adapter->stats.rfc += IXGB_READ_REG(&adapter->hw, RFC);
  1274. adapter->stats.lfc += IXGB_READ_REG(&adapter->hw, LFC);
  1275. adapter->stats.pfrc += IXGB_READ_REG(&adapter->hw, PFRC);
  1276. adapter->stats.pftc += IXGB_READ_REG(&adapter->hw, PFTC);
  1277. adapter->stats.mcfrc += IXGB_READ_REG(&adapter->hw, MCFRC);
  1278. adapter->stats.mcftc += IXGB_READ_REG(&adapter->hw, MCFTC);
  1279. adapter->stats.xonrxc += IXGB_READ_REG(&adapter->hw, XONRXC);
  1280. adapter->stats.xontxc += IXGB_READ_REG(&adapter->hw, XONTXC);
  1281. adapter->stats.xoffrxc += IXGB_READ_REG(&adapter->hw, XOFFRXC);
  1282. adapter->stats.xofftxc += IXGB_READ_REG(&adapter->hw, XOFFTXC);
  1283. adapter->stats.rjc += IXGB_READ_REG(&adapter->hw, RJC);
  1284. /* Fill out the OS statistics structure */
  1285. adapter->net_stats.rx_packets = adapter->stats.gprcl;
  1286. adapter->net_stats.tx_packets = adapter->stats.gptcl;
  1287. adapter->net_stats.rx_bytes = adapter->stats.gorcl;
  1288. adapter->net_stats.tx_bytes = adapter->stats.gotcl;
  1289. adapter->net_stats.multicast = adapter->stats.mprcl;
  1290. adapter->net_stats.collisions = 0;
  1291. /* ignore RLEC as it reports errors for padded (<64bytes) frames
  1292. * with a length in the type/len field */
  1293. adapter->net_stats.rx_errors =
  1294. /* adapter->stats.rnbc + */ adapter->stats.crcerrs +
  1295. adapter->stats.ruc +
  1296. adapter->stats.roc /*+ adapter->stats.rlec */ +
  1297. adapter->stats.icbc +
  1298. adapter->stats.ecbc + adapter->stats.mpc;
  1299. adapter->net_stats.rx_dropped = adapter->stats.mpc;
  1300. /* see above
  1301. * adapter->net_stats.rx_length_errors = adapter->stats.rlec;
  1302. */
  1303. adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
  1304. adapter->net_stats.rx_fifo_errors = adapter->stats.mpc;
  1305. adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
  1306. adapter->net_stats.rx_over_errors = adapter->stats.mpc;
  1307. adapter->net_stats.tx_errors = 0;
  1308. adapter->net_stats.rx_frame_errors = 0;
  1309. adapter->net_stats.tx_aborted_errors = 0;
  1310. adapter->net_stats.tx_carrier_errors = 0;
  1311. adapter->net_stats.tx_fifo_errors = 0;
  1312. adapter->net_stats.tx_heartbeat_errors = 0;
  1313. adapter->net_stats.tx_window_errors = 0;
  1314. }
  1315. #define IXGB_MAX_INTR 10
  1316. /**
  1317. * ixgb_intr - Interrupt Handler
  1318. * @irq: interrupt number
  1319. * @data: pointer to a network interface device structure
  1320. * @pt_regs: CPU registers structure
  1321. **/
  1322. static irqreturn_t
  1323. ixgb_intr(int irq, void *data, struct pt_regs *regs)
  1324. {
  1325. struct net_device *netdev = data;
  1326. struct ixgb_adapter *adapter = netdev->priv;
  1327. struct ixgb_hw *hw = &adapter->hw;
  1328. uint32_t icr = IXGB_READ_REG(hw, ICR);
  1329. #ifndef CONFIG_IXGB_NAPI
  1330. unsigned int i;
  1331. #endif
  1332. if(unlikely(!icr))
  1333. return IRQ_NONE; /* Not our interrupt */
  1334. if(unlikely(icr & (IXGB_INT_RXSEQ | IXGB_INT_LSC))) {
  1335. mod_timer(&adapter->watchdog_timer, jiffies);
  1336. }
  1337. #ifdef CONFIG_IXGB_NAPI
  1338. if(netif_rx_schedule_prep(netdev)) {
  1339. /* Disable interrupts and register for poll. The flush
  1340. of the posted write is intentionally left out.
  1341. */
  1342. atomic_inc(&adapter->irq_sem);
  1343. IXGB_WRITE_REG(&adapter->hw, IMC, ~0);
  1344. __netif_rx_schedule(netdev);
  1345. }
  1346. #else
  1347. /* yes, that is actually a & and it is meant to make sure that
  1348. * every pass through this for loop checks both receive and
  1349. * transmit queues for completed descriptors, intended to
  1350. * avoid starvation issues and assist tx/rx fairness. */
  1351. for(i = 0; i < IXGB_MAX_INTR; i++)
  1352. if(!ixgb_clean_rx_irq(adapter) &
  1353. !ixgb_clean_tx_irq(adapter))
  1354. break;
  1355. #endif
  1356. return IRQ_HANDLED;
  1357. }
  1358. #ifdef CONFIG_IXGB_NAPI
  1359. /**
  1360. * ixgb_clean - NAPI Rx polling callback
  1361. * @adapter: board private structure
  1362. **/
  1363. static int
  1364. ixgb_clean(struct net_device *netdev, int *budget)
  1365. {
  1366. struct ixgb_adapter *adapter = netdev->priv;
  1367. int work_to_do = min(*budget, netdev->quota);
  1368. int tx_cleaned;
  1369. int work_done = 0;
  1370. tx_cleaned = ixgb_clean_tx_irq(adapter);
  1371. ixgb_clean_rx_irq(adapter, &work_done, work_to_do);
  1372. *budget -= work_done;
  1373. netdev->quota -= work_done;
  1374. /* if no Tx and not enough Rx work done, exit the polling mode */
  1375. if((!tx_cleaned && (work_done == 0)) || !netif_running(netdev)) {
  1376. netif_rx_complete(netdev);
  1377. ixgb_irq_enable(adapter);
  1378. return 0;
  1379. }
  1380. return 1;
  1381. }
  1382. #endif
  1383. /**
  1384. * ixgb_clean_tx_irq - Reclaim resources after transmit completes
  1385. * @adapter: board private structure
  1386. **/
  1387. static boolean_t
  1388. ixgb_clean_tx_irq(struct ixgb_adapter *adapter)
  1389. {
  1390. struct ixgb_desc_ring *tx_ring = &adapter->tx_ring;
  1391. struct net_device *netdev = adapter->netdev;
  1392. struct ixgb_tx_desc *tx_desc, *eop_desc;
  1393. struct ixgb_buffer *buffer_info;
  1394. unsigned int i, eop;
  1395. boolean_t cleaned = FALSE;
  1396. i = tx_ring->next_to_clean;
  1397. eop = tx_ring->buffer_info[i].next_to_watch;
  1398. eop_desc = IXGB_TX_DESC(*tx_ring, eop);
  1399. while(eop_desc->status & IXGB_TX_DESC_STATUS_DD) {
  1400. for(cleaned = FALSE; !cleaned; ) {
  1401. tx_desc = IXGB_TX_DESC(*tx_ring, i);
  1402. buffer_info = &tx_ring->buffer_info[i];
  1403. if (tx_desc->popts
  1404. & (IXGB_TX_DESC_POPTS_TXSM |
  1405. IXGB_TX_DESC_POPTS_IXSM))
  1406. adapter->hw_csum_tx_good++;
  1407. ixgb_unmap_and_free_tx_resource(adapter, buffer_info);
  1408. *(uint32_t *)&(tx_desc->status) = 0;
  1409. cleaned = (i == eop);
  1410. if(++i == tx_ring->count) i = 0;
  1411. }
  1412. eop = tx_ring->buffer_info[i].next_to_watch;
  1413. eop_desc = IXGB_TX_DESC(*tx_ring, eop);
  1414. }
  1415. tx_ring->next_to_clean = i;
  1416. spin_lock(&adapter->tx_lock);
  1417. if(cleaned && netif_queue_stopped(netdev) && netif_carrier_ok(netdev) &&
  1418. (IXGB_DESC_UNUSED(tx_ring) > IXGB_TX_QUEUE_WAKE)) {
  1419. netif_wake_queue(netdev);
  1420. }
  1421. spin_unlock(&adapter->tx_lock);
  1422. if(adapter->detect_tx_hung) {
  1423. /* detect a transmit hang in hardware, this serializes the
  1424. * check with the clearing of time_stamp and movement of i */
  1425. adapter->detect_tx_hung = FALSE;
  1426. if(tx_ring->buffer_info[i].dma &&
  1427. time_after(jiffies, tx_ring->buffer_info[i].time_stamp + HZ)
  1428. && !(IXGB_READ_REG(&adapter->hw, STATUS) &
  1429. IXGB_STATUS_TXOFF))
  1430. netif_stop_queue(netdev);
  1431. }
  1432. return cleaned;
  1433. }
  1434. /**
  1435. * ixgb_rx_checksum - Receive Checksum Offload for 82597.
  1436. * @adapter: board private structure
  1437. * @rx_desc: receive descriptor
  1438. * @sk_buff: socket buffer with received data
  1439. **/
  1440. static inline void
  1441. ixgb_rx_checksum(struct ixgb_adapter *adapter,
  1442. struct ixgb_rx_desc *rx_desc,
  1443. struct sk_buff *skb)
  1444. {
  1445. /* Ignore Checksum bit is set OR
  1446. * TCP Checksum has not been calculated
  1447. */
  1448. if((rx_desc->status & IXGB_RX_DESC_STATUS_IXSM) ||
  1449. (!(rx_desc->status & IXGB_RX_DESC_STATUS_TCPCS))) {
  1450. skb->ip_summed = CHECKSUM_NONE;
  1451. return;
  1452. }
  1453. /* At this point we know the hardware did the TCP checksum */
  1454. /* now look at the TCP checksum error bit */
  1455. if(rx_desc->errors & IXGB_RX_DESC_ERRORS_TCPE) {
  1456. /* let the stack verify checksum errors */
  1457. skb->ip_summed = CHECKSUM_NONE;
  1458. adapter->hw_csum_rx_error++;
  1459. } else {
  1460. /* TCP checksum is good */
  1461. skb->ip_summed = CHECKSUM_UNNECESSARY;
  1462. adapter->hw_csum_rx_good++;
  1463. }
  1464. }
  1465. /**
  1466. * ixgb_clean_rx_irq - Send received data up the network stack,
  1467. * @adapter: board private structure
  1468. **/
  1469. static boolean_t
  1470. #ifdef CONFIG_IXGB_NAPI
  1471. ixgb_clean_rx_irq(struct ixgb_adapter *adapter, int *work_done, int work_to_do)
  1472. #else
  1473. ixgb_clean_rx_irq(struct ixgb_adapter *adapter)
  1474. #endif
  1475. {
  1476. struct ixgb_desc_ring *rx_ring = &adapter->rx_ring;
  1477. struct net_device *netdev = adapter->netdev;
  1478. struct pci_dev *pdev = adapter->pdev;
  1479. struct ixgb_rx_desc *rx_desc, *next_rxd;
  1480. struct ixgb_buffer *buffer_info, *next_buffer, *next2_buffer;
  1481. uint32_t length;
  1482. unsigned int i, j;
  1483. boolean_t cleaned = FALSE;
  1484. i = rx_ring->next_to_clean;
  1485. rx_desc = IXGB_RX_DESC(*rx_ring, i);
  1486. buffer_info = &rx_ring->buffer_info[i];
  1487. while(rx_desc->status & IXGB_RX_DESC_STATUS_DD) {
  1488. struct sk_buff *skb, *next_skb;
  1489. u8 status;
  1490. #ifdef CONFIG_IXGB_NAPI
  1491. if(*work_done >= work_to_do)
  1492. break;
  1493. (*work_done)++;
  1494. #endif
  1495. status = rx_desc->status;
  1496. skb = buffer_info->skb;
  1497. prefetch(skb->data);
  1498. if(++i == rx_ring->count) i = 0;
  1499. next_rxd = IXGB_RX_DESC(*rx_ring, i);
  1500. prefetch(next_rxd);
  1501. if((j = i + 1) == rx_ring->count) j = 0;
  1502. next2_buffer = &rx_ring->buffer_info[j];
  1503. prefetch(next2_buffer);
  1504. next_buffer = &rx_ring->buffer_info[i];
  1505. next_skb = next_buffer->skb;
  1506. prefetch(next_skb);
  1507. cleaned = TRUE;
  1508. pci_unmap_single(pdev,
  1509. buffer_info->dma,
  1510. buffer_info->length,
  1511. PCI_DMA_FROMDEVICE);
  1512. length = le16_to_cpu(rx_desc->length);
  1513. if(unlikely(!(status & IXGB_RX_DESC_STATUS_EOP))) {
  1514. /* All receives must fit into a single buffer */
  1515. IXGB_DBG("Receive packet consumed multiple buffers "
  1516. "length<%x>\n", length);
  1517. dev_kfree_skb_irq(skb);
  1518. goto rxdesc_done;
  1519. }
  1520. if (unlikely(rx_desc->errors
  1521. & (IXGB_RX_DESC_ERRORS_CE | IXGB_RX_DESC_ERRORS_SE
  1522. | IXGB_RX_DESC_ERRORS_P |
  1523. IXGB_RX_DESC_ERRORS_RXE))) {
  1524. dev_kfree_skb_irq(skb);
  1525. goto rxdesc_done;
  1526. }
  1527. /* Good Receive */
  1528. skb_put(skb, length);
  1529. /* Receive Checksum Offload */
  1530. ixgb_rx_checksum(adapter, rx_desc, skb);
  1531. skb->protocol = eth_type_trans(skb, netdev);
  1532. #ifdef CONFIG_IXGB_NAPI
  1533. if(adapter->vlgrp && (status & IXGB_RX_DESC_STATUS_VP)) {
  1534. vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
  1535. le16_to_cpu(rx_desc->special) &
  1536. IXGB_RX_DESC_SPECIAL_VLAN_MASK);
  1537. } else {
  1538. netif_receive_skb(skb);
  1539. }
  1540. #else /* CONFIG_IXGB_NAPI */
  1541. if(adapter->vlgrp && (status & IXGB_RX_DESC_STATUS_VP)) {
  1542. vlan_hwaccel_rx(skb, adapter->vlgrp,
  1543. le16_to_cpu(rx_desc->special) &
  1544. IXGB_RX_DESC_SPECIAL_VLAN_MASK);
  1545. } else {
  1546. netif_rx(skb);
  1547. }
  1548. #endif /* CONFIG_IXGB_NAPI */
  1549. netdev->last_rx = jiffies;
  1550. rxdesc_done:
  1551. /* clean up descriptor, might be written over by hw */
  1552. rx_desc->status = 0;
  1553. buffer_info->skb = NULL;
  1554. /* use prefetched values */
  1555. rx_desc = next_rxd;
  1556. buffer_info = next_buffer;
  1557. }
  1558. rx_ring->next_to_clean = i;
  1559. ixgb_alloc_rx_buffers(adapter);
  1560. return cleaned;
  1561. }
  1562. /**
  1563. * ixgb_alloc_rx_buffers - Replace used receive buffers
  1564. * @adapter: address of board private structure
  1565. **/
  1566. static void
  1567. ixgb_alloc_rx_buffers(struct ixgb_adapter *adapter)
  1568. {
  1569. struct ixgb_desc_ring *rx_ring = &adapter->rx_ring;
  1570. struct net_device *netdev = adapter->netdev;
  1571. struct pci_dev *pdev = adapter->pdev;
  1572. struct ixgb_rx_desc *rx_desc;
  1573. struct ixgb_buffer *buffer_info;
  1574. struct sk_buff *skb;
  1575. unsigned int i;
  1576. int num_group_tail_writes;
  1577. long cleancount;
  1578. i = rx_ring->next_to_use;
  1579. buffer_info = &rx_ring->buffer_info[i];
  1580. cleancount = IXGB_DESC_UNUSED(rx_ring);
  1581. num_group_tail_writes = IXGB_RX_BUFFER_WRITE;
  1582. /* leave three descriptors unused */
  1583. while(--cleancount > 2) {
  1584. rx_desc = IXGB_RX_DESC(*rx_ring, i);
  1585. skb = dev_alloc_skb(adapter->rx_buffer_len + NET_IP_ALIGN);
  1586. if(unlikely(!skb)) {
  1587. /* Better luck next round */
  1588. break;
  1589. }
  1590. /* Make buffer alignment 2 beyond a 16 byte boundary
  1591. * this will result in a 16 byte aligned IP header after
  1592. * the 14 byte MAC header is removed
  1593. */
  1594. skb_reserve(skb, NET_IP_ALIGN);
  1595. skb->dev = netdev;
  1596. buffer_info->skb = skb;
  1597. buffer_info->length = adapter->rx_buffer_len;
  1598. buffer_info->dma =
  1599. pci_map_single(pdev,
  1600. skb->data,
  1601. adapter->rx_buffer_len,
  1602. PCI_DMA_FROMDEVICE);
  1603. rx_desc->buff_addr = cpu_to_le64(buffer_info->dma);
  1604. /* guarantee DD bit not set now before h/w gets descriptor
  1605. * this is the rest of the workaround for h/w double
  1606. * writeback. */
  1607. rx_desc->status = 0;
  1608. if((i & ~(num_group_tail_writes- 1)) == i) {
  1609. /* Force memory writes to complete before letting h/w
  1610. * know there are new descriptors to fetch. (Only
  1611. * applicable for weak-ordered memory model archs,
  1612. * such as IA-64). */
  1613. wmb();
  1614. IXGB_WRITE_REG(&adapter->hw, RDT, i);
  1615. }
  1616. if(++i == rx_ring->count) i = 0;
  1617. buffer_info = &rx_ring->buffer_info[i];
  1618. }
  1619. rx_ring->next_to_use = i;
  1620. }
  1621. /**
  1622. * ixgb_vlan_rx_register - enables or disables vlan tagging/stripping.
  1623. *
  1624. * @param netdev network interface device structure
  1625. * @param grp indicates to enable or disable tagging/stripping
  1626. **/
  1627. static void
  1628. ixgb_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
  1629. {
  1630. struct ixgb_adapter *adapter = netdev->priv;
  1631. uint32_t ctrl, rctl;
  1632. ixgb_irq_disable(adapter);
  1633. adapter->vlgrp = grp;
  1634. if(grp) {
  1635. /* enable VLAN tag insert/strip */
  1636. ctrl = IXGB_READ_REG(&adapter->hw, CTRL0);
  1637. ctrl |= IXGB_CTRL0_VME;
  1638. IXGB_WRITE_REG(&adapter->hw, CTRL0, ctrl);
  1639. /* enable VLAN receive filtering */
  1640. rctl = IXGB_READ_REG(&adapter->hw, RCTL);
  1641. rctl |= IXGB_RCTL_VFE;
  1642. rctl &= ~IXGB_RCTL_CFIEN;
  1643. IXGB_WRITE_REG(&adapter->hw, RCTL, rctl);
  1644. } else {
  1645. /* disable VLAN tag insert/strip */
  1646. ctrl = IXGB_READ_REG(&adapter->hw, CTRL0);
  1647. ctrl &= ~IXGB_CTRL0_VME;
  1648. IXGB_WRITE_REG(&adapter->hw, CTRL0, ctrl);
  1649. /* disable VLAN filtering */
  1650. rctl = IXGB_READ_REG(&adapter->hw, RCTL);
  1651. rctl &= ~IXGB_RCTL_VFE;
  1652. IXGB_WRITE_REG(&adapter->hw, RCTL, rctl);
  1653. }
  1654. ixgb_irq_enable(adapter);
  1655. }
  1656. static void
  1657. ixgb_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid)
  1658. {
  1659. struct ixgb_adapter *adapter = netdev->priv;
  1660. uint32_t vfta, index;
  1661. /* add VID to filter table */
  1662. index = (vid >> 5) & 0x7F;
  1663. vfta = IXGB_READ_REG_ARRAY(&adapter->hw, VFTA, index);
  1664. vfta |= (1 << (vid & 0x1F));
  1665. ixgb_write_vfta(&adapter->hw, index, vfta);
  1666. }
  1667. static void
  1668. ixgb_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid)
  1669. {
  1670. struct ixgb_adapter *adapter = netdev->priv;
  1671. uint32_t vfta, index;
  1672. ixgb_irq_disable(adapter);
  1673. if(adapter->vlgrp)
  1674. adapter->vlgrp->vlan_devices[vid] = NULL;
  1675. ixgb_irq_enable(adapter);
  1676. /* remove VID from filter table*/
  1677. index = (vid >> 5) & 0x7F;
  1678. vfta = IXGB_READ_REG_ARRAY(&adapter->hw, VFTA, index);
  1679. vfta &= ~(1 << (vid & 0x1F));
  1680. ixgb_write_vfta(&adapter->hw, index, vfta);
  1681. }
  1682. static void
  1683. ixgb_restore_vlan(struct ixgb_adapter *adapter)
  1684. {
  1685. ixgb_vlan_rx_register(adapter->netdev, adapter->vlgrp);
  1686. if(adapter->vlgrp) {
  1687. uint16_t vid;
  1688. for(vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
  1689. if(!adapter->vlgrp->vlan_devices[vid])
  1690. continue;
  1691. ixgb_vlan_rx_add_vid(adapter->netdev, vid);
  1692. }
  1693. }
  1694. }
  1695. #ifdef CONFIG_NET_POLL_CONTROLLER
  1696. /*
  1697. * Polling 'interrupt' - used by things like netconsole to send skbs
  1698. * without having to re-enable interrupts. It's not called while
  1699. * the interrupt routine is executing.
  1700. */
  1701. static void ixgb_netpoll(struct net_device *dev)
  1702. {
  1703. struct ixgb_adapter *adapter = dev->priv;
  1704. disable_irq(adapter->pdev->irq);
  1705. ixgb_intr(adapter->pdev->irq, dev, NULL);
  1706. enable_irq(adapter->pdev->irq);
  1707. }
  1708. #endif
  1709. /* ixgb_main.c */