dm9000.c 28 KB

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  1. /*
  2. * dm9000.c: Version 1.2 03/18/2003
  3. *
  4. * A Davicom DM9000 ISA NIC fast Ethernet driver for Linux.
  5. * Copyright (C) 1997 Sten Wang
  6. *
  7. * This program is free software; you can redistribute it and/or
  8. * modify it under the terms of the GNU General Public License
  9. * as published by the Free Software Foundation; either version 2
  10. * of the License, or (at your option) any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * (C)Copyright 1997-1998 DAVICOM Semiconductor,Inc. All Rights Reserved.
  18. *
  19. * V0.11 06/20/2001 REG_0A bit3=1, default enable BP with DA match
  20. * 06/22/2001 Support DM9801 progrmming
  21. * E3: R25 = ((R24 + NF) & 0x00ff) | 0xf000
  22. * E4: R25 = ((R24 + NF) & 0x00ff) | 0xc200
  23. * R17 = (R17 & 0xfff0) | NF + 3
  24. * E5: R25 = ((R24 + NF - 3) & 0x00ff) | 0xc200
  25. * R17 = (R17 & 0xfff0) | NF
  26. *
  27. * v1.00 modify by simon 2001.9.5
  28. * change for kernel 2.4.x
  29. *
  30. * v1.1 11/09/2001 fix force mode bug
  31. *
  32. * v1.2 03/18/2003 Weilun Huang <weilun_huang@davicom.com.tw>:
  33. * Fixed phy reset.
  34. * Added tx/rx 32 bit mode.
  35. * Cleaned up for kernel merge.
  36. *
  37. * 03/03/2004 Sascha Hauer <s.hauer@pengutronix.de>
  38. * Port to 2.6 kernel
  39. *
  40. * 24-Sep-2004 Ben Dooks <ben@simtec.co.uk>
  41. * Cleanup of code to remove ifdefs
  42. * Allowed platform device data to influence access width
  43. * Reformatting areas of code
  44. *
  45. * 17-Mar-2005 Sascha Hauer <s.hauer@pengutronix.de>
  46. * * removed 2.4 style module parameters
  47. * * removed removed unused stat counter and fixed
  48. * net_device_stats
  49. * * introduced tx_timeout function
  50. * * reworked locking
  51. */
  52. #include <linux/module.h>
  53. #include <linux/ioport.h>
  54. #include <linux/netdevice.h>
  55. #include <linux/etherdevice.h>
  56. #include <linux/init.h>
  57. #include <linux/skbuff.h>
  58. #include <linux/version.h>
  59. #include <linux/spinlock.h>
  60. #include <linux/crc32.h>
  61. #include <linux/mii.h>
  62. #include <linux/dm9000.h>
  63. #include <linux/delay.h>
  64. #include <asm/delay.h>
  65. #include <asm/irq.h>
  66. #include <asm/io.h>
  67. #include "dm9000.h"
  68. /* Board/System/Debug information/definition ---------------- */
  69. #define DM9000_PHY 0x40 /* PHY address 0x01 */
  70. #define TRUE 1
  71. #define FALSE 0
  72. #define CARDNAME "dm9000"
  73. #define PFX CARDNAME ": "
  74. #define DM9000_TIMER_WUT jiffies+(HZ*2) /* timer wakeup time : 2 second */
  75. #define DM9000_DEBUG 0
  76. #if DM9000_DEBUG > 2
  77. #define PRINTK3(args...) printk(CARDNAME ": " args)
  78. #else
  79. #define PRINTK3(args...) do { } while(0)
  80. #endif
  81. #if DM9000_DEBUG > 1
  82. #define PRINTK2(args...) printk(CARDNAME ": " args)
  83. #else
  84. #define PRINTK2(args...) do { } while(0)
  85. #endif
  86. #if DM9000_DEBUG > 0
  87. #define PRINTK1(args...) printk(CARDNAME ": " args)
  88. #define PRINTK(args...) printk(CARDNAME ": " args)
  89. #else
  90. #define PRINTK1(args...) do { } while(0)
  91. #define PRINTK(args...) printk(KERN_DEBUG args)
  92. #endif
  93. /*
  94. * Transmit timeout, default 5 seconds.
  95. */
  96. static int watchdog = 5000;
  97. module_param(watchdog, int, 0400);
  98. MODULE_PARM_DESC(watchdog, "transmit timeout in milliseconds");
  99. /* Structure/enum declaration ------------------------------- */
  100. typedef struct board_info {
  101. void __iomem *io_addr; /* Register I/O base address */
  102. void __iomem *io_data; /* Data I/O address */
  103. u16 irq; /* IRQ */
  104. u16 tx_pkt_cnt;
  105. u16 queue_pkt_len;
  106. u16 queue_start_addr;
  107. u16 dbug_cnt;
  108. u8 io_mode; /* 0:word, 2:byte */
  109. u8 phy_addr;
  110. void (*inblk)(void __iomem *port, void *data, int length);
  111. void (*outblk)(void __iomem *port, void *data, int length);
  112. void (*dumpblk)(void __iomem *port, int length);
  113. struct resource *addr_res; /* resources found */
  114. struct resource *data_res;
  115. struct resource *addr_req; /* resources requested */
  116. struct resource *data_req;
  117. struct resource *irq_res;
  118. struct timer_list timer;
  119. struct net_device_stats stats;
  120. unsigned char srom[128];
  121. spinlock_t lock;
  122. struct mii_if_info mii;
  123. u32 msg_enable;
  124. } board_info_t;
  125. /* function declaration ------------------------------------- */
  126. static int dm9000_probe(struct device *);
  127. static int dm9000_open(struct net_device *);
  128. static int dm9000_start_xmit(struct sk_buff *, struct net_device *);
  129. static int dm9000_stop(struct net_device *);
  130. static int dm9000_do_ioctl(struct net_device *, struct ifreq *, int);
  131. static void dm9000_timer(unsigned long);
  132. static void dm9000_init_dm9000(struct net_device *);
  133. static struct net_device_stats *dm9000_get_stats(struct net_device *);
  134. static irqreturn_t dm9000_interrupt(int, void *, struct pt_regs *);
  135. static int dm9000_phy_read(struct net_device *dev, int phyaddr_unsused, int reg);
  136. static void dm9000_phy_write(struct net_device *dev, int phyaddr_unused, int reg,
  137. int value);
  138. static u16 read_srom_word(board_info_t *, int);
  139. static void dm9000_rx(struct net_device *);
  140. static void dm9000_hash_table(struct net_device *);
  141. //#define DM9000_PROGRAM_EEPROM
  142. #ifdef DM9000_PROGRAM_EEPROM
  143. static void program_eeprom(board_info_t * db);
  144. #endif
  145. /* DM9000 network board routine ---------------------------- */
  146. static void
  147. dm9000_reset(board_info_t * db)
  148. {
  149. PRINTK1("dm9000x: resetting\n");
  150. /* RESET device */
  151. writeb(DM9000_NCR, db->io_addr);
  152. udelay(200);
  153. writeb(NCR_RST, db->io_data);
  154. udelay(200);
  155. }
  156. /*
  157. * Read a byte from I/O port
  158. */
  159. static u8
  160. ior(board_info_t * db, int reg)
  161. {
  162. writeb(reg, db->io_addr);
  163. return readb(db->io_data);
  164. }
  165. /*
  166. * Write a byte to I/O port
  167. */
  168. static void
  169. iow(board_info_t * db, int reg, int value)
  170. {
  171. writeb(reg, db->io_addr);
  172. writeb(value, db->io_data);
  173. }
  174. /* routines for sending block to chip */
  175. static void dm9000_outblk_8bit(void __iomem *reg, void *data, int count)
  176. {
  177. writesb(reg, data, count);
  178. }
  179. static void dm9000_outblk_16bit(void __iomem *reg, void *data, int count)
  180. {
  181. writesw(reg, data, (count+1) >> 1);
  182. }
  183. static void dm9000_outblk_32bit(void __iomem *reg, void *data, int count)
  184. {
  185. writesl(reg, data, (count+3) >> 2);
  186. }
  187. /* input block from chip to memory */
  188. static void dm9000_inblk_8bit(void __iomem *reg, void *data, int count)
  189. {
  190. readsb(reg, data, count);
  191. }
  192. static void dm9000_inblk_16bit(void __iomem *reg, void *data, int count)
  193. {
  194. readsw(reg, data, (count+1) >> 1);
  195. }
  196. static void dm9000_inblk_32bit(void __iomem *reg, void *data, int count)
  197. {
  198. readsl(reg, data, (count+3) >> 2);
  199. }
  200. /* dump block from chip to null */
  201. static void dm9000_dumpblk_8bit(void __iomem *reg, int count)
  202. {
  203. int i;
  204. int tmp;
  205. for (i = 0; i < count; i++)
  206. tmp = readb(reg);
  207. }
  208. static void dm9000_dumpblk_16bit(void __iomem *reg, int count)
  209. {
  210. int i;
  211. int tmp;
  212. count = (count + 1) >> 1;
  213. for (i = 0; i < count; i++)
  214. tmp = readw(reg);
  215. }
  216. static void dm9000_dumpblk_32bit(void __iomem *reg, int count)
  217. {
  218. int i;
  219. int tmp;
  220. count = (count + 3) >> 2;
  221. for (i = 0; i < count; i++)
  222. tmp = readl(reg);
  223. }
  224. /* dm9000_set_io
  225. *
  226. * select the specified set of io routines to use with the
  227. * device
  228. */
  229. static void dm9000_set_io(struct board_info *db, int byte_width)
  230. {
  231. /* use the size of the data resource to work out what IO
  232. * routines we want to use
  233. */
  234. switch (byte_width) {
  235. case 1:
  236. db->dumpblk = dm9000_dumpblk_8bit;
  237. db->outblk = dm9000_outblk_8bit;
  238. db->inblk = dm9000_inblk_8bit;
  239. break;
  240. case 2:
  241. db->dumpblk = dm9000_dumpblk_16bit;
  242. db->outblk = dm9000_outblk_16bit;
  243. db->inblk = dm9000_inblk_16bit;
  244. break;
  245. case 3:
  246. printk(KERN_ERR PFX ": 3 byte IO, falling back to 16bit\n");
  247. db->dumpblk = dm9000_dumpblk_16bit;
  248. db->outblk = dm9000_outblk_16bit;
  249. db->inblk = dm9000_inblk_16bit;
  250. break;
  251. case 4:
  252. default:
  253. db->dumpblk = dm9000_dumpblk_32bit;
  254. db->outblk = dm9000_outblk_32bit;
  255. db->inblk = dm9000_inblk_32bit;
  256. break;
  257. }
  258. }
  259. /* Our watchdog timed out. Called by the networking layer */
  260. static void dm9000_timeout(struct net_device *dev)
  261. {
  262. board_info_t *db = (board_info_t *) dev->priv;
  263. u8 reg_save;
  264. unsigned long flags;
  265. /* Save previous register address */
  266. reg_save = readb(db->io_addr);
  267. spin_lock_irqsave(db->lock,flags);
  268. netif_stop_queue(dev);
  269. dm9000_reset(db);
  270. dm9000_init_dm9000(dev);
  271. /* We can accept TX packets again */
  272. dev->trans_start = jiffies;
  273. netif_wake_queue(dev);
  274. /* Restore previous register address */
  275. writeb(reg_save, db->io_addr);
  276. spin_unlock_irqrestore(db->lock,flags);
  277. }
  278. /* dm9000_release_board
  279. *
  280. * release a board, and any mapped resources
  281. */
  282. static void
  283. dm9000_release_board(struct platform_device *pdev, struct board_info *db)
  284. {
  285. if (db->data_res == NULL) {
  286. if (db->addr_res != NULL)
  287. release_mem_region((unsigned long)db->io_addr, 4);
  288. return;
  289. }
  290. /* unmap our resources */
  291. iounmap(db->io_addr);
  292. iounmap(db->io_data);
  293. /* release the resources */
  294. if (db->data_req != NULL) {
  295. release_resource(db->data_req);
  296. kfree(db->data_req);
  297. }
  298. if (db->addr_res != NULL) {
  299. release_resource(db->addr_res);
  300. kfree(db->addr_req);
  301. }
  302. }
  303. #define res_size(_r) (((_r)->end - (_r)->start) + 1)
  304. /*
  305. * Search DM9000 board, allocate space and register it
  306. */
  307. static int
  308. dm9000_probe(struct device *dev)
  309. {
  310. struct platform_device *pdev = to_platform_device(dev);
  311. struct dm9000_plat_data *pdata = pdev->dev.platform_data;
  312. struct board_info *db; /* Point a board information structure */
  313. struct net_device *ndev;
  314. unsigned long base;
  315. int ret = 0;
  316. int iosize;
  317. int i;
  318. u32 id_val;
  319. printk(KERN_INFO "%s Ethernet Driver\n", CARDNAME);
  320. /* Init network device */
  321. ndev = alloc_etherdev(sizeof (struct board_info));
  322. if (!ndev) {
  323. printk("%s: could not allocate device.\n", CARDNAME);
  324. return -ENOMEM;
  325. }
  326. SET_MODULE_OWNER(ndev);
  327. SET_NETDEV_DEV(ndev, dev);
  328. PRINTK2("dm9000_probe()");
  329. /* setup board info structure */
  330. db = (struct board_info *) ndev->priv;
  331. memset(db, 0, sizeof (*db));
  332. if (pdev->num_resources < 2) {
  333. ret = -ENODEV;
  334. goto out;
  335. }
  336. switch (pdev->num_resources) {
  337. case 2:
  338. base = pdev->resource[0].start;
  339. if (!request_mem_region(base, 4, ndev->name)) {
  340. ret = -EBUSY;
  341. goto out;
  342. }
  343. ndev->base_addr = base;
  344. ndev->irq = pdev->resource[1].start;
  345. db->io_addr = (void *)base;
  346. db->io_data = (void *)(base + 4);
  347. break;
  348. case 3:
  349. db->addr_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  350. db->data_res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
  351. db->irq_res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
  352. if (db->addr_res == NULL || db->data_res == NULL) {
  353. printk(KERN_ERR PFX "insufficient resources\n");
  354. ret = -ENOENT;
  355. goto out;
  356. }
  357. i = res_size(db->addr_res);
  358. db->addr_req = request_mem_region(db->addr_res->start, i,
  359. pdev->name);
  360. if (db->addr_req == NULL) {
  361. printk(KERN_ERR PFX "cannot claim address reg area\n");
  362. ret = -EIO;
  363. goto out;
  364. }
  365. db->io_addr = ioremap(db->addr_res->start, i);
  366. if (db->io_addr == NULL) {
  367. printk(KERN_ERR "failed to ioremap address reg\n");
  368. ret = -EINVAL;
  369. goto out;
  370. }
  371. iosize = res_size(db->data_res);
  372. db->data_req = request_mem_region(db->data_res->start, iosize,
  373. pdev->name);
  374. if (db->data_req == NULL) {
  375. printk(KERN_ERR PFX "cannot claim data reg area\n");
  376. ret = -EIO;
  377. goto out;
  378. }
  379. db->io_data = ioremap(db->data_res->start, iosize);
  380. if (db->io_data == NULL) {
  381. printk(KERN_ERR "failed to ioremap data reg\n");
  382. ret = -EINVAL;
  383. goto out;
  384. }
  385. /* fill in parameters for net-dev structure */
  386. ndev->base_addr = (unsigned long)db->io_addr;
  387. ndev->irq = db->irq_res->start;
  388. /* ensure at least we have a default set of IO routines */
  389. dm9000_set_io(db, iosize);
  390. }
  391. /* check to see if anything is being over-ridden */
  392. if (pdata != NULL) {
  393. /* check to see if the driver wants to over-ride the
  394. * default IO width */
  395. if (pdata->flags & DM9000_PLATF_8BITONLY)
  396. dm9000_set_io(db, 1);
  397. if (pdata->flags & DM9000_PLATF_16BITONLY)
  398. dm9000_set_io(db, 2);
  399. if (pdata->flags & DM9000_PLATF_32BITONLY)
  400. dm9000_set_io(db, 4);
  401. /* check to see if there are any IO routine
  402. * over-rides */
  403. if (pdata->inblk != NULL)
  404. db->inblk = pdata->inblk;
  405. if (pdata->outblk != NULL)
  406. db->outblk = pdata->outblk;
  407. if (pdata->dumpblk != NULL)
  408. db->dumpblk = pdata->dumpblk;
  409. }
  410. dm9000_reset(db);
  411. /* try two times, DM9000 sometimes gets the first read wrong */
  412. for (i = 0; i < 2; i++) {
  413. id_val = ior(db, DM9000_VIDL);
  414. id_val |= (u32)ior(db, DM9000_VIDH) << 8;
  415. id_val |= (u32)ior(db, DM9000_PIDL) << 16;
  416. id_val |= (u32)ior(db, DM9000_PIDH) << 24;
  417. if (id_val == DM9000_ID)
  418. break;
  419. printk("%s: read wrong id 0x%08x\n", CARDNAME, id_val);
  420. }
  421. if (id_val != DM9000_ID) {
  422. printk("%s: wrong id: 0x%08x\n", CARDNAME, id_val);
  423. goto release;
  424. }
  425. /* from this point we assume that we have found a DM9000 */
  426. /* driver system function */
  427. ether_setup(ndev);
  428. ndev->open = &dm9000_open;
  429. ndev->hard_start_xmit = &dm9000_start_xmit;
  430. ndev->tx_timeout = &dm9000_timeout;
  431. ndev->watchdog_timeo = msecs_to_jiffies(watchdog);
  432. ndev->stop = &dm9000_stop;
  433. ndev->get_stats = &dm9000_get_stats;
  434. ndev->set_multicast_list = &dm9000_hash_table;
  435. ndev->do_ioctl = &dm9000_do_ioctl;
  436. #ifdef DM9000_PROGRAM_EEPROM
  437. program_eeprom(db);
  438. #endif
  439. db->msg_enable = NETIF_MSG_LINK;
  440. db->mii.phy_id_mask = 0x1f;
  441. db->mii.reg_num_mask = 0x1f;
  442. db->mii.force_media = 0;
  443. db->mii.full_duplex = 0;
  444. db->mii.dev = ndev;
  445. db->mii.mdio_read = dm9000_phy_read;
  446. db->mii.mdio_write = dm9000_phy_write;
  447. /* Read SROM content */
  448. for (i = 0; i < 64; i++)
  449. ((u16 *) db->srom)[i] = read_srom_word(db, i);
  450. /* Set Node Address */
  451. for (i = 0; i < 6; i++)
  452. ndev->dev_addr[i] = db->srom[i];
  453. if (!is_valid_ether_addr(ndev->dev_addr))
  454. printk("%s: Invalid ethernet MAC address. Please "
  455. "set using ifconfig\n", ndev->name);
  456. dev_set_drvdata(dev, ndev);
  457. ret = register_netdev(ndev);
  458. if (ret == 0) {
  459. printk("%s: dm9000 at %p,%p IRQ %d MAC: ",
  460. ndev->name, db->io_addr, db->io_data, ndev->irq);
  461. for (i = 0; i < 5; i++)
  462. printk("%02x:", ndev->dev_addr[i]);
  463. printk("%02x\n", ndev->dev_addr[5]);
  464. }
  465. return 0;
  466. release:
  467. out:
  468. printk("%s: not found (%d).\n", CARDNAME, ret);
  469. dm9000_release_board(pdev, db);
  470. kfree(ndev);
  471. return ret;
  472. }
  473. /*
  474. * Open the interface.
  475. * The interface is opened whenever "ifconfig" actives it.
  476. */
  477. static int
  478. dm9000_open(struct net_device *dev)
  479. {
  480. board_info_t *db = (board_info_t *) dev->priv;
  481. PRINTK2("entering dm9000_open\n");
  482. if (request_irq(dev->irq, &dm9000_interrupt, SA_SHIRQ, dev->name, dev))
  483. return -EAGAIN;
  484. /* Initialize DM9000 board */
  485. dm9000_reset(db);
  486. dm9000_init_dm9000(dev);
  487. /* Init driver variable */
  488. db->dbug_cnt = 0;
  489. /* set and active a timer process */
  490. init_timer(&db->timer);
  491. db->timer.expires = DM9000_TIMER_WUT * 2;
  492. db->timer.data = (unsigned long) dev;
  493. db->timer.function = &dm9000_timer;
  494. add_timer(&db->timer);
  495. mii_check_media(&db->mii, netif_msg_link(db), 1);
  496. netif_start_queue(dev);
  497. return 0;
  498. }
  499. /*
  500. * Initilize dm9000 board
  501. */
  502. static void
  503. dm9000_init_dm9000(struct net_device *dev)
  504. {
  505. board_info_t *db = (board_info_t *) dev->priv;
  506. PRINTK1("entering %s\n",__FUNCTION__);
  507. /* I/O mode */
  508. db->io_mode = ior(db, DM9000_ISR) >> 6; /* ISR bit7:6 keeps I/O mode */
  509. /* GPIO0 on pre-activate PHY */
  510. iow(db, DM9000_GPR, 0); /* REG_1F bit0 activate phyxcer */
  511. iow(db, DM9000_GPCR, GPCR_GEP_CNTL); /* Let GPIO0 output */
  512. iow(db, DM9000_GPR, 0); /* Enable PHY */
  513. /* Program operating register */
  514. iow(db, DM9000_TCR, 0); /* TX Polling clear */
  515. iow(db, DM9000_BPTR, 0x3f); /* Less 3Kb, 200us */
  516. iow(db, DM9000_FCR, 0xff); /* Flow Control */
  517. iow(db, DM9000_SMCR, 0); /* Special Mode */
  518. /* clear TX status */
  519. iow(db, DM9000_NSR, NSR_WAKEST | NSR_TX2END | NSR_TX1END);
  520. iow(db, DM9000_ISR, ISR_CLR_STATUS); /* Clear interrupt status */
  521. /* Set address filter table */
  522. dm9000_hash_table(dev);
  523. /* Activate DM9000 */
  524. iow(db, DM9000_RCR, RCR_DIS_LONG | RCR_DIS_CRC | RCR_RXEN);
  525. /* Enable TX/RX interrupt mask */
  526. iow(db, DM9000_IMR, IMR_PAR | IMR_PTM | IMR_PRM);
  527. /* Init Driver variable */
  528. db->tx_pkt_cnt = 0;
  529. db->queue_pkt_len = 0;
  530. dev->trans_start = 0;
  531. spin_lock_init(&db->lock);
  532. }
  533. /*
  534. * Hardware start transmission.
  535. * Send a packet to media from the upper layer.
  536. */
  537. static int
  538. dm9000_start_xmit(struct sk_buff *skb, struct net_device *dev)
  539. {
  540. board_info_t *db = (board_info_t *) dev->priv;
  541. PRINTK3("dm9000_start_xmit\n");
  542. if (db->tx_pkt_cnt > 1)
  543. return 1;
  544. netif_stop_queue(dev);
  545. /* Disable all interrupts */
  546. iow(db, DM9000_IMR, IMR_PAR);
  547. /* Move data to DM9000 TX RAM */
  548. writeb(DM9000_MWCMD, db->io_addr);
  549. (db->outblk)(db->io_data, skb->data, skb->len);
  550. db->stats.tx_bytes += skb->len;
  551. /* TX control: First packet immediately send, second packet queue */
  552. if (db->tx_pkt_cnt == 0) {
  553. /* First Packet */
  554. db->tx_pkt_cnt++;
  555. /* Set TX length to DM9000 */
  556. iow(db, DM9000_TXPLL, skb->len & 0xff);
  557. iow(db, DM9000_TXPLH, (skb->len >> 8) & 0xff);
  558. /* Issue TX polling command */
  559. iow(db, DM9000_TCR, TCR_TXREQ); /* Cleared after TX complete */
  560. dev->trans_start = jiffies; /* save the time stamp */
  561. } else {
  562. /* Second packet */
  563. db->tx_pkt_cnt++;
  564. db->queue_pkt_len = skb->len;
  565. }
  566. /* free this SKB */
  567. dev_kfree_skb(skb);
  568. /* Re-enable resource check */
  569. if (db->tx_pkt_cnt == 1)
  570. netif_wake_queue(dev);
  571. /* Re-enable interrupt */
  572. iow(db, DM9000_IMR, IMR_PAR | IMR_PTM | IMR_PRM);
  573. return 0;
  574. }
  575. static void
  576. dm9000_shutdown(struct net_device *dev)
  577. {
  578. board_info_t *db = (board_info_t *) dev->priv;
  579. /* RESET device */
  580. dm9000_phy_write(dev, 0, MII_BMCR, BMCR_RESET); /* PHY RESET */
  581. iow(db, DM9000_GPR, 0x01); /* Power-Down PHY */
  582. iow(db, DM9000_IMR, IMR_PAR); /* Disable all interrupt */
  583. iow(db, DM9000_RCR, 0x00); /* Disable RX */
  584. }
  585. /*
  586. * Stop the interface.
  587. * The interface is stopped when it is brought.
  588. */
  589. static int
  590. dm9000_stop(struct net_device *ndev)
  591. {
  592. board_info_t *db = (board_info_t *) ndev->priv;
  593. PRINTK1("entering %s\n",__FUNCTION__);
  594. /* deleted timer */
  595. del_timer(&db->timer);
  596. netif_stop_queue(ndev);
  597. netif_carrier_off(ndev);
  598. /* free interrupt */
  599. free_irq(ndev->irq, ndev);
  600. dm9000_shutdown(ndev);
  601. return 0;
  602. }
  603. /*
  604. * DM9000 interrupt handler
  605. * receive the packet to upper layer, free the transmitted packet
  606. */
  607. void
  608. dm9000_tx_done(struct net_device *dev, board_info_t * db)
  609. {
  610. int tx_status = ior(db, DM9000_NSR); /* Got TX status */
  611. if (tx_status & (NSR_TX2END | NSR_TX1END)) {
  612. /* One packet sent complete */
  613. db->tx_pkt_cnt--;
  614. db->stats.tx_packets++;
  615. /* Queue packet check & send */
  616. if (db->tx_pkt_cnt > 0) {
  617. iow(db, DM9000_TXPLL, db->queue_pkt_len & 0xff);
  618. iow(db, DM9000_TXPLH, (db->queue_pkt_len >> 8) & 0xff);
  619. iow(db, DM9000_TCR, TCR_TXREQ);
  620. dev->trans_start = jiffies;
  621. }
  622. netif_wake_queue(dev);
  623. }
  624. }
  625. static irqreturn_t
  626. dm9000_interrupt(int irq, void *dev_id, struct pt_regs *regs)
  627. {
  628. struct net_device *dev = dev_id;
  629. board_info_t *db;
  630. int int_status;
  631. u8 reg_save;
  632. PRINTK3("entering %s\n",__FUNCTION__);
  633. if (!dev) {
  634. PRINTK1("dm9000_interrupt() without DEVICE arg\n");
  635. return IRQ_HANDLED;
  636. }
  637. /* A real interrupt coming */
  638. db = (board_info_t *) dev->priv;
  639. spin_lock(&db->lock);
  640. /* Save previous register address */
  641. reg_save = readb(db->io_addr);
  642. /* Disable all interrupts */
  643. iow(db, DM9000_IMR, IMR_PAR);
  644. /* Got DM9000 interrupt status */
  645. int_status = ior(db, DM9000_ISR); /* Got ISR */
  646. iow(db, DM9000_ISR, int_status); /* Clear ISR status */
  647. /* Received the coming packet */
  648. if (int_status & ISR_PRS)
  649. dm9000_rx(dev);
  650. /* Trnasmit Interrupt check */
  651. if (int_status & ISR_PTS)
  652. dm9000_tx_done(dev, db);
  653. /* Re-enable interrupt mask */
  654. iow(db, DM9000_IMR, IMR_PAR | IMR_PTM | IMR_PRM);
  655. /* Restore previous register address */
  656. writeb(reg_save, db->io_addr);
  657. spin_unlock(&db->lock);
  658. return IRQ_HANDLED;
  659. }
  660. /*
  661. * Get statistics from driver.
  662. */
  663. static struct net_device_stats *
  664. dm9000_get_stats(struct net_device *dev)
  665. {
  666. board_info_t *db = (board_info_t *) dev->priv;
  667. return &db->stats;
  668. }
  669. /*
  670. * Process the upper socket ioctl command
  671. */
  672. static int
  673. dm9000_do_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
  674. {
  675. PRINTK1("entering %s\n",__FUNCTION__);
  676. return 0;
  677. }
  678. /*
  679. * A periodic timer routine
  680. * Dynamic media sense, allocated Rx buffer...
  681. */
  682. static void
  683. dm9000_timer(unsigned long data)
  684. {
  685. struct net_device *dev = (struct net_device *) data;
  686. board_info_t *db = (board_info_t *) dev->priv;
  687. u8 reg_save;
  688. unsigned long flags;
  689. PRINTK3("dm9000_timer()\n");
  690. spin_lock_irqsave(db->lock,flags);
  691. /* Save previous register address */
  692. reg_save = readb(db->io_addr);
  693. mii_check_media(&db->mii, netif_msg_link(db), 0);
  694. /* Restore previous register address */
  695. writeb(reg_save, db->io_addr);
  696. spin_unlock_irqrestore(db->lock,flags);
  697. /* Set timer again */
  698. db->timer.expires = DM9000_TIMER_WUT;
  699. add_timer(&db->timer);
  700. }
  701. struct dm9000_rxhdr {
  702. u16 RxStatus;
  703. u16 RxLen;
  704. } __attribute__((__packed__));
  705. /*
  706. * Received a packet and pass to upper layer
  707. */
  708. static void
  709. dm9000_rx(struct net_device *dev)
  710. {
  711. board_info_t *db = (board_info_t *) dev->priv;
  712. struct dm9000_rxhdr rxhdr;
  713. struct sk_buff *skb;
  714. u8 rxbyte, *rdptr;
  715. int GoodPacket;
  716. int RxLen;
  717. /* Check packet ready or not */
  718. do {
  719. ior(db, DM9000_MRCMDX); /* Dummy read */
  720. /* Get most updated data */
  721. rxbyte = readb(db->io_data);
  722. /* Status check: this byte must be 0 or 1 */
  723. if (rxbyte > DM9000_PKT_RDY) {
  724. printk("status check failed: %d\n", rxbyte);
  725. iow(db, DM9000_RCR, 0x00); /* Stop Device */
  726. iow(db, DM9000_ISR, IMR_PAR); /* Stop INT request */
  727. return;
  728. }
  729. if (rxbyte != DM9000_PKT_RDY)
  730. return;
  731. /* A packet ready now & Get status/length */
  732. GoodPacket = TRUE;
  733. writeb(DM9000_MRCMD, db->io_addr);
  734. (db->inblk)(db->io_data, &rxhdr, sizeof(rxhdr));
  735. RxLen = rxhdr.RxLen;
  736. /* Packet Status check */
  737. if (RxLen < 0x40) {
  738. GoodPacket = FALSE;
  739. PRINTK1("Bad Packet received (runt)\n");
  740. }
  741. if (RxLen > DM9000_PKT_MAX) {
  742. PRINTK1("RST: RX Len:%x\n", RxLen);
  743. }
  744. if (rxhdr.RxStatus & 0xbf00) {
  745. GoodPacket = FALSE;
  746. if (rxhdr.RxStatus & 0x100) {
  747. PRINTK1("fifo error\n");
  748. db->stats.rx_fifo_errors++;
  749. }
  750. if (rxhdr.RxStatus & 0x200) {
  751. PRINTK1("crc error\n");
  752. db->stats.rx_crc_errors++;
  753. }
  754. if (rxhdr.RxStatus & 0x8000) {
  755. PRINTK1("length error\n");
  756. db->stats.rx_length_errors++;
  757. }
  758. }
  759. /* Move data from DM9000 */
  760. if (GoodPacket
  761. && ((skb = dev_alloc_skb(RxLen + 4)) != NULL)) {
  762. skb->dev = dev;
  763. skb_reserve(skb, 2);
  764. rdptr = (u8 *) skb_put(skb, RxLen - 4);
  765. /* Read received packet from RX SRAM */
  766. (db->inblk)(db->io_data, rdptr, RxLen);
  767. db->stats.rx_bytes += RxLen;
  768. /* Pass to upper layer */
  769. skb->protocol = eth_type_trans(skb, dev);
  770. netif_rx(skb);
  771. db->stats.rx_packets++;
  772. } else {
  773. /* need to dump the packet's data */
  774. (db->dumpblk)(db->io_data, RxLen);
  775. }
  776. } while (rxbyte == DM9000_PKT_RDY);
  777. }
  778. /*
  779. * Read a word data from SROM
  780. */
  781. static u16
  782. read_srom_word(board_info_t * db, int offset)
  783. {
  784. iow(db, DM9000_EPAR, offset);
  785. iow(db, DM9000_EPCR, EPCR_ERPRR);
  786. mdelay(8); /* according to the datasheet 200us should be enough,
  787. but it doesn't work */
  788. iow(db, DM9000_EPCR, 0x0);
  789. return (ior(db, DM9000_EPDRL) + (ior(db, DM9000_EPDRH) << 8));
  790. }
  791. #ifdef DM9000_PROGRAM_EEPROM
  792. /*
  793. * Write a word data to SROM
  794. */
  795. static void
  796. write_srom_word(board_info_t * db, int offset, u16 val)
  797. {
  798. iow(db, DM9000_EPAR, offset);
  799. iow(db, DM9000_EPDRH, ((val >> 8) & 0xff));
  800. iow(db, DM9000_EPDRL, (val & 0xff));
  801. iow(db, DM9000_EPCR, EPCR_WEP | EPCR_ERPRW);
  802. mdelay(8); /* same shit */
  803. iow(db, DM9000_EPCR, 0);
  804. }
  805. /*
  806. * Only for development:
  807. * Here we write static data to the eeprom in case
  808. * we don't have valid content on a new board
  809. */
  810. static void
  811. program_eeprom(board_info_t * db)
  812. {
  813. u16 eeprom[] = { 0x0c00, 0x007f, 0x1300, /* MAC Address */
  814. 0x0000, /* Autoload: accept nothing */
  815. 0x0a46, 0x9000, /* Vendor / Product ID */
  816. 0x0000, /* pin control */
  817. 0x0000,
  818. }; /* Wake-up mode control */
  819. int i;
  820. for (i = 0; i < 8; i++)
  821. write_srom_word(db, i, eeprom[i]);
  822. }
  823. #endif
  824. /*
  825. * Calculate the CRC valude of the Rx packet
  826. * flag = 1 : return the reverse CRC (for the received packet CRC)
  827. * 0 : return the normal CRC (for Hash Table index)
  828. */
  829. static unsigned long
  830. cal_CRC(unsigned char *Data, unsigned int Len, u8 flag)
  831. {
  832. u32 crc = ether_crc_le(Len, Data);
  833. if (flag)
  834. return ~crc;
  835. return crc;
  836. }
  837. /*
  838. * Set DM9000 multicast address
  839. */
  840. static void
  841. dm9000_hash_table(struct net_device *dev)
  842. {
  843. board_info_t *db = (board_info_t *) dev->priv;
  844. struct dev_mc_list *mcptr = dev->mc_list;
  845. int mc_cnt = dev->mc_count;
  846. u32 hash_val;
  847. u16 i, oft, hash_table[4];
  848. unsigned long flags;
  849. PRINTK2("dm9000_hash_table()\n");
  850. spin_lock_irqsave(&db->lock,flags);
  851. for (i = 0, oft = 0x10; i < 6; i++, oft++)
  852. iow(db, oft, dev->dev_addr[i]);
  853. /* Clear Hash Table */
  854. for (i = 0; i < 4; i++)
  855. hash_table[i] = 0x0;
  856. /* broadcast address */
  857. hash_table[3] = 0x8000;
  858. /* the multicast address in Hash Table : 64 bits */
  859. for (i = 0; i < mc_cnt; i++, mcptr = mcptr->next) {
  860. hash_val = cal_CRC((char *) mcptr->dmi_addr, 6, 0) & 0x3f;
  861. hash_table[hash_val / 16] |= (u16) 1 << (hash_val % 16);
  862. }
  863. /* Write the hash table to MAC MD table */
  864. for (i = 0, oft = 0x16; i < 4; i++) {
  865. iow(db, oft++, hash_table[i] & 0xff);
  866. iow(db, oft++, (hash_table[i] >> 8) & 0xff);
  867. }
  868. spin_unlock_irqrestore(&db->lock,flags);
  869. }
  870. /*
  871. * Read a word from phyxcer
  872. */
  873. static int
  874. dm9000_phy_read(struct net_device *dev, int phy_reg_unused, int reg)
  875. {
  876. board_info_t *db = (board_info_t *) dev->priv;
  877. unsigned long flags;
  878. int ret;
  879. spin_lock_irqsave(&db->lock,flags);
  880. /* Fill the phyxcer register into REG_0C */
  881. iow(db, DM9000_EPAR, DM9000_PHY | reg);
  882. iow(db, DM9000_EPCR, 0xc); /* Issue phyxcer read command */
  883. udelay(100); /* Wait read complete */
  884. iow(db, DM9000_EPCR, 0x0); /* Clear phyxcer read command */
  885. /* The read data keeps on REG_0D & REG_0E */
  886. ret = (ior(db, DM9000_EPDRH) << 8) | ior(db, DM9000_EPDRL);
  887. spin_unlock_irqrestore(&db->lock,flags);
  888. return ret;
  889. }
  890. /*
  891. * Write a word to phyxcer
  892. */
  893. static void
  894. dm9000_phy_write(struct net_device *dev, int phyaddr_unused, int reg, int value)
  895. {
  896. board_info_t *db = (board_info_t *) dev->priv;
  897. unsigned long flags;
  898. spin_lock_irqsave(&db->lock,flags);
  899. /* Fill the phyxcer register into REG_0C */
  900. iow(db, DM9000_EPAR, DM9000_PHY | reg);
  901. /* Fill the written data into REG_0D & REG_0E */
  902. iow(db, DM9000_EPDRL, (value & 0xff));
  903. iow(db, DM9000_EPDRH, ((value >> 8) & 0xff));
  904. iow(db, DM9000_EPCR, 0xa); /* Issue phyxcer write command */
  905. udelay(500); /* Wait write complete */
  906. iow(db, DM9000_EPCR, 0x0); /* Clear phyxcer write command */
  907. spin_unlock_irqrestore(&db->lock,flags);
  908. }
  909. static int
  910. dm9000_drv_suspend(struct device *dev, u32 state, u32 level)
  911. {
  912. struct net_device *ndev = dev_get_drvdata(dev);
  913. if (ndev && level == SUSPEND_DISABLE) {
  914. if (netif_running(ndev)) {
  915. netif_device_detach(ndev);
  916. dm9000_shutdown(ndev);
  917. }
  918. }
  919. return 0;
  920. }
  921. static int
  922. dm9000_drv_resume(struct device *dev, u32 level)
  923. {
  924. struct net_device *ndev = dev_get_drvdata(dev);
  925. board_info_t *db = (board_info_t *) ndev->priv;
  926. if (ndev && level == RESUME_ENABLE) {
  927. if (netif_running(ndev)) {
  928. dm9000_reset(db);
  929. dm9000_init_dm9000(ndev);
  930. netif_device_attach(ndev);
  931. }
  932. }
  933. return 0;
  934. }
  935. static int
  936. dm9000_drv_remove(struct device *dev)
  937. {
  938. struct platform_device *pdev = to_platform_device(dev);
  939. struct net_device *ndev = dev_get_drvdata(dev);
  940. dev_set_drvdata(dev, NULL);
  941. unregister_netdev(ndev);
  942. dm9000_release_board(pdev, (board_info_t *) ndev->priv);
  943. kfree(ndev); /* free device structure */
  944. PRINTK1("clean_module() exit\n");
  945. return 0;
  946. }
  947. static struct device_driver dm9000_driver = {
  948. .name = "dm9000",
  949. .bus = &platform_bus_type,
  950. .probe = dm9000_probe,
  951. .remove = dm9000_drv_remove,
  952. .suspend = dm9000_drv_suspend,
  953. .resume = dm9000_drv_resume,
  954. };
  955. static int __init
  956. dm9000_init(void)
  957. {
  958. return driver_register(&dm9000_driver); /* search board and register */
  959. }
  960. static void __exit
  961. dm9000_cleanup(void)
  962. {
  963. driver_unregister(&dm9000_driver);
  964. }
  965. module_init(dm9000_init);
  966. module_exit(dm9000_cleanup);
  967. MODULE_AUTHOR("Sascha Hauer, Ben Dooks");
  968. MODULE_DESCRIPTION("Davicom DM9000 network driver");
  969. MODULE_LICENSE("GPL");