cfi_cmdset_0002.c 38 KB

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  1. /*
  2. * Common Flash Interface support:
  3. * AMD & Fujitsu Standard Vendor Command Set (ID 0x0002)
  4. *
  5. * Copyright (C) 2000 Crossnet Co. <info@crossnet.co.jp>
  6. * Copyright (C) 2004 Arcom Control Systems Ltd <linux@arcom.com>
  7. *
  8. * 2_by_8 routines added by Simon Munton
  9. *
  10. * 4_by_16 work by Carolyn J. Smith
  11. *
  12. * Occasionally maintained by Thayne Harbaugh tharbaugh at lnxi dot com
  13. *
  14. * This code is GPL
  15. *
  16. * $Id: cfi_cmdset_0002.c,v 1.114 2004/12/11 15:43:53 dedekind Exp $
  17. *
  18. */
  19. #include <linux/config.h>
  20. #include <linux/module.h>
  21. #include <linux/types.h>
  22. #include <linux/kernel.h>
  23. #include <linux/sched.h>
  24. #include <linux/init.h>
  25. #include <asm/io.h>
  26. #include <asm/byteorder.h>
  27. #include <linux/errno.h>
  28. #include <linux/slab.h>
  29. #include <linux/delay.h>
  30. #include <linux/interrupt.h>
  31. #include <linux/mtd/compatmac.h>
  32. #include <linux/mtd/map.h>
  33. #include <linux/mtd/mtd.h>
  34. #include <linux/mtd/cfi.h>
  35. #define AMD_BOOTLOC_BUG
  36. #define FORCE_WORD_WRITE 0
  37. #define MAX_WORD_RETRIES 3
  38. #define MANUFACTURER_AMD 0x0001
  39. #define MANUFACTURER_SST 0x00BF
  40. #define SST49LF004B 0x0060
  41. static int cfi_amdstd_read (struct mtd_info *, loff_t, size_t, size_t *, u_char *);
  42. static int cfi_amdstd_write_words(struct mtd_info *, loff_t, size_t, size_t *, const u_char *);
  43. static int cfi_amdstd_write_buffers(struct mtd_info *, loff_t, size_t, size_t *, const u_char *);
  44. static int cfi_amdstd_erase_chip(struct mtd_info *, struct erase_info *);
  45. static int cfi_amdstd_erase_varsize(struct mtd_info *, struct erase_info *);
  46. static void cfi_amdstd_sync (struct mtd_info *);
  47. static int cfi_amdstd_suspend (struct mtd_info *);
  48. static void cfi_amdstd_resume (struct mtd_info *);
  49. static int cfi_amdstd_secsi_read (struct mtd_info *, loff_t, size_t, size_t *, u_char *);
  50. static void cfi_amdstd_destroy(struct mtd_info *);
  51. struct mtd_info *cfi_cmdset_0002(struct map_info *, int);
  52. static struct mtd_info *cfi_amdstd_setup (struct mtd_info *);
  53. static int get_chip(struct map_info *map, struct flchip *chip, unsigned long adr, int mode);
  54. static void put_chip(struct map_info *map, struct flchip *chip, unsigned long adr);
  55. #include "fwh_lock.h"
  56. static struct mtd_chip_driver cfi_amdstd_chipdrv = {
  57. .probe = NULL, /* Not usable directly */
  58. .destroy = cfi_amdstd_destroy,
  59. .name = "cfi_cmdset_0002",
  60. .module = THIS_MODULE
  61. };
  62. /* #define DEBUG_CFI_FEATURES */
  63. #ifdef DEBUG_CFI_FEATURES
  64. static void cfi_tell_features(struct cfi_pri_amdstd *extp)
  65. {
  66. const char* erase_suspend[3] = {
  67. "Not supported", "Read only", "Read/write"
  68. };
  69. const char* top_bottom[6] = {
  70. "No WP", "8x8KiB sectors at top & bottom, no WP",
  71. "Bottom boot", "Top boot",
  72. "Uniform, Bottom WP", "Uniform, Top WP"
  73. };
  74. printk(" Silicon revision: %d\n", extp->SiliconRevision >> 1);
  75. printk(" Address sensitive unlock: %s\n",
  76. (extp->SiliconRevision & 1) ? "Not required" : "Required");
  77. if (extp->EraseSuspend < ARRAY_SIZE(erase_suspend))
  78. printk(" Erase Suspend: %s\n", erase_suspend[extp->EraseSuspend]);
  79. else
  80. printk(" Erase Suspend: Unknown value %d\n", extp->EraseSuspend);
  81. if (extp->BlkProt == 0)
  82. printk(" Block protection: Not supported\n");
  83. else
  84. printk(" Block protection: %d sectors per group\n", extp->BlkProt);
  85. printk(" Temporary block unprotect: %s\n",
  86. extp->TmpBlkUnprotect ? "Supported" : "Not supported");
  87. printk(" Block protect/unprotect scheme: %d\n", extp->BlkProtUnprot);
  88. printk(" Number of simultaneous operations: %d\n", extp->SimultaneousOps);
  89. printk(" Burst mode: %s\n",
  90. extp->BurstMode ? "Supported" : "Not supported");
  91. if (extp->PageMode == 0)
  92. printk(" Page mode: Not supported\n");
  93. else
  94. printk(" Page mode: %d word page\n", extp->PageMode << 2);
  95. printk(" Vpp Supply Minimum Program/Erase Voltage: %d.%d V\n",
  96. extp->VppMin >> 4, extp->VppMin & 0xf);
  97. printk(" Vpp Supply Maximum Program/Erase Voltage: %d.%d V\n",
  98. extp->VppMax >> 4, extp->VppMax & 0xf);
  99. if (extp->TopBottom < ARRAY_SIZE(top_bottom))
  100. printk(" Top/Bottom Boot Block: %s\n", top_bottom[extp->TopBottom]);
  101. else
  102. printk(" Top/Bottom Boot Block: Unknown value %d\n", extp->TopBottom);
  103. }
  104. #endif
  105. #ifdef AMD_BOOTLOC_BUG
  106. /* Wheee. Bring me the head of someone at AMD. */
  107. static void fixup_amd_bootblock(struct mtd_info *mtd, void* param)
  108. {
  109. struct map_info *map = mtd->priv;
  110. struct cfi_private *cfi = map->fldrv_priv;
  111. struct cfi_pri_amdstd *extp = cfi->cmdset_priv;
  112. __u8 major = extp->MajorVersion;
  113. __u8 minor = extp->MinorVersion;
  114. if (((major << 8) | minor) < 0x3131) {
  115. /* CFI version 1.0 => don't trust bootloc */
  116. if (cfi->id & 0x80) {
  117. printk(KERN_WARNING "%s: JEDEC Device ID is 0x%02X. Assuming broken CFI table.\n", map->name, cfi->id);
  118. extp->TopBottom = 3; /* top boot */
  119. } else {
  120. extp->TopBottom = 2; /* bottom boot */
  121. }
  122. }
  123. }
  124. #endif
  125. static void fixup_use_write_buffers(struct mtd_info *mtd, void *param)
  126. {
  127. struct map_info *map = mtd->priv;
  128. struct cfi_private *cfi = map->fldrv_priv;
  129. if (cfi->cfiq->BufWriteTimeoutTyp) {
  130. DEBUG(MTD_DEBUG_LEVEL1, "Using buffer write method\n" );
  131. mtd->write = cfi_amdstd_write_buffers;
  132. }
  133. }
  134. static void fixup_use_secsi(struct mtd_info *mtd, void *param)
  135. {
  136. /* Setup for chips with a secsi area */
  137. mtd->read_user_prot_reg = cfi_amdstd_secsi_read;
  138. mtd->read_fact_prot_reg = cfi_amdstd_secsi_read;
  139. }
  140. static void fixup_use_erase_chip(struct mtd_info *mtd, void *param)
  141. {
  142. struct map_info *map = mtd->priv;
  143. struct cfi_private *cfi = map->fldrv_priv;
  144. if ((cfi->cfiq->NumEraseRegions == 1) &&
  145. ((cfi->cfiq->EraseRegionInfo[0] & 0xffff) == 0)) {
  146. mtd->erase = cfi_amdstd_erase_chip;
  147. }
  148. }
  149. static struct cfi_fixup cfi_fixup_table[] = {
  150. #ifdef AMD_BOOTLOC_BUG
  151. { CFI_MFR_AMD, CFI_ID_ANY, fixup_amd_bootblock, NULL },
  152. #endif
  153. { CFI_MFR_AMD, 0x0050, fixup_use_secsi, NULL, },
  154. { CFI_MFR_AMD, 0x0053, fixup_use_secsi, NULL, },
  155. { CFI_MFR_AMD, 0x0055, fixup_use_secsi, NULL, },
  156. { CFI_MFR_AMD, 0x0056, fixup_use_secsi, NULL, },
  157. { CFI_MFR_AMD, 0x005C, fixup_use_secsi, NULL, },
  158. { CFI_MFR_AMD, 0x005F, fixup_use_secsi, NULL, },
  159. #if !FORCE_WORD_WRITE
  160. { CFI_MFR_ANY, CFI_ID_ANY, fixup_use_write_buffers, NULL, },
  161. #endif
  162. { 0, 0, NULL, NULL }
  163. };
  164. static struct cfi_fixup jedec_fixup_table[] = {
  165. { MANUFACTURER_SST, SST49LF004B, fixup_use_fwh_lock, NULL, },
  166. { 0, 0, NULL, NULL }
  167. };
  168. static struct cfi_fixup fixup_table[] = {
  169. /* The CFI vendor ids and the JEDEC vendor IDs appear
  170. * to be common. It is like the devices id's are as
  171. * well. This table is to pick all cases where
  172. * we know that is the case.
  173. */
  174. { CFI_MFR_ANY, CFI_ID_ANY, fixup_use_erase_chip, NULL },
  175. { 0, 0, NULL, NULL }
  176. };
  177. struct mtd_info *cfi_cmdset_0002(struct map_info *map, int primary)
  178. {
  179. struct cfi_private *cfi = map->fldrv_priv;
  180. struct mtd_info *mtd;
  181. int i;
  182. mtd = kmalloc(sizeof(*mtd), GFP_KERNEL);
  183. if (!mtd) {
  184. printk(KERN_WARNING "Failed to allocate memory for MTD device\n");
  185. return NULL;
  186. }
  187. memset(mtd, 0, sizeof(*mtd));
  188. mtd->priv = map;
  189. mtd->type = MTD_NORFLASH;
  190. /* Fill in the default mtd operations */
  191. mtd->erase = cfi_amdstd_erase_varsize;
  192. mtd->write = cfi_amdstd_write_words;
  193. mtd->read = cfi_amdstd_read;
  194. mtd->sync = cfi_amdstd_sync;
  195. mtd->suspend = cfi_amdstd_suspend;
  196. mtd->resume = cfi_amdstd_resume;
  197. mtd->flags = MTD_CAP_NORFLASH;
  198. mtd->name = map->name;
  199. if (cfi->cfi_mode==CFI_MODE_CFI){
  200. unsigned char bootloc;
  201. /*
  202. * It's a real CFI chip, not one for which the probe
  203. * routine faked a CFI structure. So we read the feature
  204. * table from it.
  205. */
  206. __u16 adr = primary?cfi->cfiq->P_ADR:cfi->cfiq->A_ADR;
  207. struct cfi_pri_amdstd *extp;
  208. extp = (struct cfi_pri_amdstd*)cfi_read_pri(map, adr, sizeof(*extp), "Amd/Fujitsu");
  209. if (!extp) {
  210. kfree(mtd);
  211. return NULL;
  212. }
  213. /* Install our own private info structure */
  214. cfi->cmdset_priv = extp;
  215. /* Apply cfi device specific fixups */
  216. cfi_fixup(mtd, cfi_fixup_table);
  217. #ifdef DEBUG_CFI_FEATURES
  218. /* Tell the user about it in lots of lovely detail */
  219. cfi_tell_features(extp);
  220. #endif
  221. bootloc = extp->TopBottom;
  222. if ((bootloc != 2) && (bootloc != 3)) {
  223. printk(KERN_WARNING "%s: CFI does not contain boot "
  224. "bank location. Assuming top.\n", map->name);
  225. bootloc = 2;
  226. }
  227. if (bootloc == 3 && cfi->cfiq->NumEraseRegions > 1) {
  228. printk(KERN_WARNING "%s: Swapping erase regions for broken CFI table.\n", map->name);
  229. for (i=0; i<cfi->cfiq->NumEraseRegions / 2; i++) {
  230. int j = (cfi->cfiq->NumEraseRegions-1)-i;
  231. __u32 swap;
  232. swap = cfi->cfiq->EraseRegionInfo[i];
  233. cfi->cfiq->EraseRegionInfo[i] = cfi->cfiq->EraseRegionInfo[j];
  234. cfi->cfiq->EraseRegionInfo[j] = swap;
  235. }
  236. }
  237. /* Set the default CFI lock/unlock addresses */
  238. cfi->addr_unlock1 = 0x555;
  239. cfi->addr_unlock2 = 0x2aa;
  240. /* Modify the unlock address if we are in compatibility mode */
  241. if ( /* x16 in x8 mode */
  242. ((cfi->device_type == CFI_DEVICETYPE_X8) &&
  243. (cfi->cfiq->InterfaceDesc == 2)) ||
  244. /* x32 in x16 mode */
  245. ((cfi->device_type == CFI_DEVICETYPE_X16) &&
  246. (cfi->cfiq->InterfaceDesc == 4)))
  247. {
  248. cfi->addr_unlock1 = 0xaaa;
  249. cfi->addr_unlock2 = 0x555;
  250. }
  251. } /* CFI mode */
  252. else if (cfi->cfi_mode == CFI_MODE_JEDEC) {
  253. /* Apply jedec specific fixups */
  254. cfi_fixup(mtd, jedec_fixup_table);
  255. }
  256. /* Apply generic fixups */
  257. cfi_fixup(mtd, fixup_table);
  258. for (i=0; i< cfi->numchips; i++) {
  259. cfi->chips[i].word_write_time = 1<<cfi->cfiq->WordWriteTimeoutTyp;
  260. cfi->chips[i].buffer_write_time = 1<<cfi->cfiq->BufWriteTimeoutTyp;
  261. cfi->chips[i].erase_time = 1<<cfi->cfiq->BlockEraseTimeoutTyp;
  262. }
  263. map->fldrv = &cfi_amdstd_chipdrv;
  264. return cfi_amdstd_setup(mtd);
  265. }
  266. static struct mtd_info *cfi_amdstd_setup(struct mtd_info *mtd)
  267. {
  268. struct map_info *map = mtd->priv;
  269. struct cfi_private *cfi = map->fldrv_priv;
  270. unsigned long devsize = (1<<cfi->cfiq->DevSize) * cfi->interleave;
  271. unsigned long offset = 0;
  272. int i,j;
  273. printk(KERN_NOTICE "number of %s chips: %d\n",
  274. (cfi->cfi_mode == CFI_MODE_CFI)?"CFI":"JEDEC",cfi->numchips);
  275. /* Select the correct geometry setup */
  276. mtd->size = devsize * cfi->numchips;
  277. mtd->numeraseregions = cfi->cfiq->NumEraseRegions * cfi->numchips;
  278. mtd->eraseregions = kmalloc(sizeof(struct mtd_erase_region_info)
  279. * mtd->numeraseregions, GFP_KERNEL);
  280. if (!mtd->eraseregions) {
  281. printk(KERN_WARNING "Failed to allocate memory for MTD erase region info\n");
  282. goto setup_err;
  283. }
  284. for (i=0; i<cfi->cfiq->NumEraseRegions; i++) {
  285. unsigned long ernum, ersize;
  286. ersize = ((cfi->cfiq->EraseRegionInfo[i] >> 8) & ~0xff) * cfi->interleave;
  287. ernum = (cfi->cfiq->EraseRegionInfo[i] & 0xffff) + 1;
  288. if (mtd->erasesize < ersize) {
  289. mtd->erasesize = ersize;
  290. }
  291. for (j=0; j<cfi->numchips; j++) {
  292. mtd->eraseregions[(j*cfi->cfiq->NumEraseRegions)+i].offset = (j*devsize)+offset;
  293. mtd->eraseregions[(j*cfi->cfiq->NumEraseRegions)+i].erasesize = ersize;
  294. mtd->eraseregions[(j*cfi->cfiq->NumEraseRegions)+i].numblocks = ernum;
  295. }
  296. offset += (ersize * ernum);
  297. }
  298. if (offset != devsize) {
  299. /* Argh */
  300. printk(KERN_WARNING "Sum of regions (%lx) != total size of set of interleaved chips (%lx)\n", offset, devsize);
  301. goto setup_err;
  302. }
  303. #if 0
  304. // debug
  305. for (i=0; i<mtd->numeraseregions;i++){
  306. printk("%d: offset=0x%x,size=0x%x,blocks=%d\n",
  307. i,mtd->eraseregions[i].offset,
  308. mtd->eraseregions[i].erasesize,
  309. mtd->eraseregions[i].numblocks);
  310. }
  311. #endif
  312. /* FIXME: erase-suspend-program is broken. See
  313. http://lists.infradead.org/pipermail/linux-mtd/2003-December/009001.html */
  314. printk(KERN_NOTICE "cfi_cmdset_0002: Disabling erase-suspend-program due to code brokenness.\n");
  315. __module_get(THIS_MODULE);
  316. return mtd;
  317. setup_err:
  318. if(mtd) {
  319. if(mtd->eraseregions)
  320. kfree(mtd->eraseregions);
  321. kfree(mtd);
  322. }
  323. kfree(cfi->cmdset_priv);
  324. kfree(cfi->cfiq);
  325. return NULL;
  326. }
  327. /*
  328. * Return true if the chip is ready.
  329. *
  330. * Ready is one of: read mode, query mode, erase-suspend-read mode (in any
  331. * non-suspended sector) and is indicated by no toggle bits toggling.
  332. *
  333. * Note that anything more complicated than checking if no bits are toggling
  334. * (including checking DQ5 for an error status) is tricky to get working
  335. * correctly and is therefore not done (particulary with interleaved chips
  336. * as each chip must be checked independantly of the others).
  337. */
  338. static int chip_ready(struct map_info *map, unsigned long addr)
  339. {
  340. map_word d, t;
  341. d = map_read(map, addr);
  342. t = map_read(map, addr);
  343. return map_word_equal(map, d, t);
  344. }
  345. static int get_chip(struct map_info *map, struct flchip *chip, unsigned long adr, int mode)
  346. {
  347. DECLARE_WAITQUEUE(wait, current);
  348. struct cfi_private *cfi = map->fldrv_priv;
  349. unsigned long timeo;
  350. struct cfi_pri_amdstd *cfip = (struct cfi_pri_amdstd *)cfi->cmdset_priv;
  351. resettime:
  352. timeo = jiffies + HZ;
  353. retry:
  354. switch (chip->state) {
  355. case FL_STATUS:
  356. for (;;) {
  357. if (chip_ready(map, adr))
  358. break;
  359. if (time_after(jiffies, timeo)) {
  360. printk(KERN_ERR "Waiting for chip to be ready timed out.\n");
  361. cfi_spin_unlock(chip->mutex);
  362. return -EIO;
  363. }
  364. cfi_spin_unlock(chip->mutex);
  365. cfi_udelay(1);
  366. cfi_spin_lock(chip->mutex);
  367. /* Someone else might have been playing with it. */
  368. goto retry;
  369. }
  370. case FL_READY:
  371. case FL_CFI_QUERY:
  372. case FL_JEDEC_QUERY:
  373. return 0;
  374. case FL_ERASING:
  375. if (mode == FL_WRITING) /* FIXME: Erase-suspend-program appears broken. */
  376. goto sleep;
  377. if (!(mode == FL_READY || mode == FL_POINT
  378. || !cfip
  379. || (mode == FL_WRITING && (cfip->EraseSuspend & 0x2))
  380. || (mode == FL_WRITING && (cfip->EraseSuspend & 0x1))))
  381. goto sleep;
  382. /* We could check to see if we're trying to access the sector
  383. * that is currently being erased. However, no user will try
  384. * anything like that so we just wait for the timeout. */
  385. /* Erase suspend */
  386. /* It's harmless to issue the Erase-Suspend and Erase-Resume
  387. * commands when the erase algorithm isn't in progress. */
  388. map_write(map, CMD(0xB0), chip->in_progress_block_addr);
  389. chip->oldstate = FL_ERASING;
  390. chip->state = FL_ERASE_SUSPENDING;
  391. chip->erase_suspended = 1;
  392. for (;;) {
  393. if (chip_ready(map, adr))
  394. break;
  395. if (time_after(jiffies, timeo)) {
  396. /* Should have suspended the erase by now.
  397. * Send an Erase-Resume command as either
  398. * there was an error (so leave the erase
  399. * routine to recover from it) or we trying to
  400. * use the erase-in-progress sector. */
  401. map_write(map, CMD(0x30), chip->in_progress_block_addr);
  402. chip->state = FL_ERASING;
  403. chip->oldstate = FL_READY;
  404. printk(KERN_ERR "MTD %s(): chip not ready after erase suspend\n", __func__);
  405. return -EIO;
  406. }
  407. cfi_spin_unlock(chip->mutex);
  408. cfi_udelay(1);
  409. cfi_spin_lock(chip->mutex);
  410. /* Nobody will touch it while it's in state FL_ERASE_SUSPENDING.
  411. So we can just loop here. */
  412. }
  413. chip->state = FL_READY;
  414. return 0;
  415. case FL_POINT:
  416. /* Only if there's no operation suspended... */
  417. if (mode == FL_READY && chip->oldstate == FL_READY)
  418. return 0;
  419. default:
  420. sleep:
  421. set_current_state(TASK_UNINTERRUPTIBLE);
  422. add_wait_queue(&chip->wq, &wait);
  423. cfi_spin_unlock(chip->mutex);
  424. schedule();
  425. remove_wait_queue(&chip->wq, &wait);
  426. cfi_spin_lock(chip->mutex);
  427. goto resettime;
  428. }
  429. }
  430. static void put_chip(struct map_info *map, struct flchip *chip, unsigned long adr)
  431. {
  432. struct cfi_private *cfi = map->fldrv_priv;
  433. switch(chip->oldstate) {
  434. case FL_ERASING:
  435. chip->state = chip->oldstate;
  436. map_write(map, CMD(0x30), chip->in_progress_block_addr);
  437. chip->oldstate = FL_READY;
  438. chip->state = FL_ERASING;
  439. break;
  440. case FL_READY:
  441. case FL_STATUS:
  442. /* We should really make set_vpp() count, rather than doing this */
  443. DISABLE_VPP(map);
  444. break;
  445. default:
  446. printk(KERN_ERR "MTD: put_chip() called with oldstate %d!!\n", chip->oldstate);
  447. }
  448. wake_up(&chip->wq);
  449. }
  450. static inline int do_read_onechip(struct map_info *map, struct flchip *chip, loff_t adr, size_t len, u_char *buf)
  451. {
  452. unsigned long cmd_addr;
  453. struct cfi_private *cfi = map->fldrv_priv;
  454. int ret;
  455. adr += chip->start;
  456. /* Ensure cmd read/writes are aligned. */
  457. cmd_addr = adr & ~(map_bankwidth(map)-1);
  458. cfi_spin_lock(chip->mutex);
  459. ret = get_chip(map, chip, cmd_addr, FL_READY);
  460. if (ret) {
  461. cfi_spin_unlock(chip->mutex);
  462. return ret;
  463. }
  464. if (chip->state != FL_POINT && chip->state != FL_READY) {
  465. map_write(map, CMD(0xf0), cmd_addr);
  466. chip->state = FL_READY;
  467. }
  468. map_copy_from(map, buf, adr, len);
  469. put_chip(map, chip, cmd_addr);
  470. cfi_spin_unlock(chip->mutex);
  471. return 0;
  472. }
  473. static int cfi_amdstd_read (struct mtd_info *mtd, loff_t from, size_t len, size_t *retlen, u_char *buf)
  474. {
  475. struct map_info *map = mtd->priv;
  476. struct cfi_private *cfi = map->fldrv_priv;
  477. unsigned long ofs;
  478. int chipnum;
  479. int ret = 0;
  480. /* ofs: offset within the first chip that the first read should start */
  481. chipnum = (from >> cfi->chipshift);
  482. ofs = from - (chipnum << cfi->chipshift);
  483. *retlen = 0;
  484. while (len) {
  485. unsigned long thislen;
  486. if (chipnum >= cfi->numchips)
  487. break;
  488. if ((len + ofs -1) >> cfi->chipshift)
  489. thislen = (1<<cfi->chipshift) - ofs;
  490. else
  491. thislen = len;
  492. ret = do_read_onechip(map, &cfi->chips[chipnum], ofs, thislen, buf);
  493. if (ret)
  494. break;
  495. *retlen += thislen;
  496. len -= thislen;
  497. buf += thislen;
  498. ofs = 0;
  499. chipnum++;
  500. }
  501. return ret;
  502. }
  503. static inline int do_read_secsi_onechip(struct map_info *map, struct flchip *chip, loff_t adr, size_t len, u_char *buf)
  504. {
  505. DECLARE_WAITQUEUE(wait, current);
  506. unsigned long timeo = jiffies + HZ;
  507. struct cfi_private *cfi = map->fldrv_priv;
  508. retry:
  509. cfi_spin_lock(chip->mutex);
  510. if (chip->state != FL_READY){
  511. #if 0
  512. printk(KERN_DEBUG "Waiting for chip to read, status = %d\n", chip->state);
  513. #endif
  514. set_current_state(TASK_UNINTERRUPTIBLE);
  515. add_wait_queue(&chip->wq, &wait);
  516. cfi_spin_unlock(chip->mutex);
  517. schedule();
  518. remove_wait_queue(&chip->wq, &wait);
  519. #if 0
  520. if(signal_pending(current))
  521. return -EINTR;
  522. #endif
  523. timeo = jiffies + HZ;
  524. goto retry;
  525. }
  526. adr += chip->start;
  527. chip->state = FL_READY;
  528. cfi_send_gen_cmd(0xAA, cfi->addr_unlock1, chip->start, map, cfi, cfi->device_type, NULL);
  529. cfi_send_gen_cmd(0x55, cfi->addr_unlock2, chip->start, map, cfi, cfi->device_type, NULL);
  530. cfi_send_gen_cmd(0x88, cfi->addr_unlock1, chip->start, map, cfi, cfi->device_type, NULL);
  531. map_copy_from(map, buf, adr, len);
  532. cfi_send_gen_cmd(0xAA, cfi->addr_unlock1, chip->start, map, cfi, cfi->device_type, NULL);
  533. cfi_send_gen_cmd(0x55, cfi->addr_unlock2, chip->start, map, cfi, cfi->device_type, NULL);
  534. cfi_send_gen_cmd(0x90, cfi->addr_unlock1, chip->start, map, cfi, cfi->device_type, NULL);
  535. cfi_send_gen_cmd(0x00, cfi->addr_unlock1, chip->start, map, cfi, cfi->device_type, NULL);
  536. wake_up(&chip->wq);
  537. cfi_spin_unlock(chip->mutex);
  538. return 0;
  539. }
  540. static int cfi_amdstd_secsi_read (struct mtd_info *mtd, loff_t from, size_t len, size_t *retlen, u_char *buf)
  541. {
  542. struct map_info *map = mtd->priv;
  543. struct cfi_private *cfi = map->fldrv_priv;
  544. unsigned long ofs;
  545. int chipnum;
  546. int ret = 0;
  547. /* ofs: offset within the first chip that the first read should start */
  548. /* 8 secsi bytes per chip */
  549. chipnum=from>>3;
  550. ofs=from & 7;
  551. *retlen = 0;
  552. while (len) {
  553. unsigned long thislen;
  554. if (chipnum >= cfi->numchips)
  555. break;
  556. if ((len + ofs -1) >> 3)
  557. thislen = (1<<3) - ofs;
  558. else
  559. thislen = len;
  560. ret = do_read_secsi_onechip(map, &cfi->chips[chipnum], ofs, thislen, buf);
  561. if (ret)
  562. break;
  563. *retlen += thislen;
  564. len -= thislen;
  565. buf += thislen;
  566. ofs = 0;
  567. chipnum++;
  568. }
  569. return ret;
  570. }
  571. static int do_write_oneword(struct map_info *map, struct flchip *chip, unsigned long adr, map_word datum)
  572. {
  573. struct cfi_private *cfi = map->fldrv_priv;
  574. unsigned long timeo = jiffies + HZ;
  575. /*
  576. * We use a 1ms + 1 jiffies generic timeout for writes (most devices
  577. * have a max write time of a few hundreds usec). However, we should
  578. * use the maximum timeout value given by the chip at probe time
  579. * instead. Unfortunately, struct flchip does have a field for
  580. * maximum timeout, only for typical which can be far too short
  581. * depending of the conditions. The ' + 1' is to avoid having a
  582. * timeout of 0 jiffies if HZ is smaller than 1000.
  583. */
  584. unsigned long uWriteTimeout = ( HZ / 1000 ) + 1;
  585. int ret = 0;
  586. map_word oldd;
  587. int retry_cnt = 0;
  588. adr += chip->start;
  589. cfi_spin_lock(chip->mutex);
  590. ret = get_chip(map, chip, adr, FL_WRITING);
  591. if (ret) {
  592. cfi_spin_unlock(chip->mutex);
  593. return ret;
  594. }
  595. DEBUG( MTD_DEBUG_LEVEL3, "MTD %s(): WRITE 0x%.8lx(0x%.8lx)\n",
  596. __func__, adr, datum.x[0] );
  597. /*
  598. * Check for a NOP for the case when the datum to write is already
  599. * present - it saves time and works around buggy chips that corrupt
  600. * data at other locations when 0xff is written to a location that
  601. * already contains 0xff.
  602. */
  603. oldd = map_read(map, adr);
  604. if (map_word_equal(map, oldd, datum)) {
  605. DEBUG( MTD_DEBUG_LEVEL3, "MTD %s(): NOP\n",
  606. __func__);
  607. goto op_done;
  608. }
  609. ENABLE_VPP(map);
  610. retry:
  611. cfi_send_gen_cmd(0xAA, cfi->addr_unlock1, chip->start, map, cfi, cfi->device_type, NULL);
  612. cfi_send_gen_cmd(0x55, cfi->addr_unlock2, chip->start, map, cfi, cfi->device_type, NULL);
  613. cfi_send_gen_cmd(0xA0, cfi->addr_unlock1, chip->start, map, cfi, cfi->device_type, NULL);
  614. map_write(map, datum, adr);
  615. chip->state = FL_WRITING;
  616. cfi_spin_unlock(chip->mutex);
  617. cfi_udelay(chip->word_write_time);
  618. cfi_spin_lock(chip->mutex);
  619. /* See comment above for timeout value. */
  620. timeo = jiffies + uWriteTimeout;
  621. for (;;) {
  622. if (chip->state != FL_WRITING) {
  623. /* Someone's suspended the write. Sleep */
  624. DECLARE_WAITQUEUE(wait, current);
  625. set_current_state(TASK_UNINTERRUPTIBLE);
  626. add_wait_queue(&chip->wq, &wait);
  627. cfi_spin_unlock(chip->mutex);
  628. schedule();
  629. remove_wait_queue(&chip->wq, &wait);
  630. timeo = jiffies + (HZ / 2); /* FIXME */
  631. cfi_spin_lock(chip->mutex);
  632. continue;
  633. }
  634. if (chip_ready(map, adr))
  635. goto op_done;
  636. if (time_after(jiffies, timeo))
  637. break;
  638. /* Latency issues. Drop the lock, wait a while and retry */
  639. cfi_spin_unlock(chip->mutex);
  640. cfi_udelay(1);
  641. cfi_spin_lock(chip->mutex);
  642. }
  643. printk(KERN_WARNING "MTD %s(): software timeout\n", __func__);
  644. /* reset on all failures. */
  645. map_write( map, CMD(0xF0), chip->start );
  646. /* FIXME - should have reset delay before continuing */
  647. if (++retry_cnt <= MAX_WORD_RETRIES)
  648. goto retry;
  649. ret = -EIO;
  650. op_done:
  651. chip->state = FL_READY;
  652. put_chip(map, chip, adr);
  653. cfi_spin_unlock(chip->mutex);
  654. return ret;
  655. }
  656. static int cfi_amdstd_write_words(struct mtd_info *mtd, loff_t to, size_t len,
  657. size_t *retlen, const u_char *buf)
  658. {
  659. struct map_info *map = mtd->priv;
  660. struct cfi_private *cfi = map->fldrv_priv;
  661. int ret = 0;
  662. int chipnum;
  663. unsigned long ofs, chipstart;
  664. DECLARE_WAITQUEUE(wait, current);
  665. *retlen = 0;
  666. if (!len)
  667. return 0;
  668. chipnum = to >> cfi->chipshift;
  669. ofs = to - (chipnum << cfi->chipshift);
  670. chipstart = cfi->chips[chipnum].start;
  671. /* If it's not bus-aligned, do the first byte write */
  672. if (ofs & (map_bankwidth(map)-1)) {
  673. unsigned long bus_ofs = ofs & ~(map_bankwidth(map)-1);
  674. int i = ofs - bus_ofs;
  675. int n = 0;
  676. map_word tmp_buf;
  677. retry:
  678. cfi_spin_lock(cfi->chips[chipnum].mutex);
  679. if (cfi->chips[chipnum].state != FL_READY) {
  680. #if 0
  681. printk(KERN_DEBUG "Waiting for chip to write, status = %d\n", cfi->chips[chipnum].state);
  682. #endif
  683. set_current_state(TASK_UNINTERRUPTIBLE);
  684. add_wait_queue(&cfi->chips[chipnum].wq, &wait);
  685. cfi_spin_unlock(cfi->chips[chipnum].mutex);
  686. schedule();
  687. remove_wait_queue(&cfi->chips[chipnum].wq, &wait);
  688. #if 0
  689. if(signal_pending(current))
  690. return -EINTR;
  691. #endif
  692. goto retry;
  693. }
  694. /* Load 'tmp_buf' with old contents of flash */
  695. tmp_buf = map_read(map, bus_ofs+chipstart);
  696. cfi_spin_unlock(cfi->chips[chipnum].mutex);
  697. /* Number of bytes to copy from buffer */
  698. n = min_t(int, len, map_bankwidth(map)-i);
  699. tmp_buf = map_word_load_partial(map, tmp_buf, buf, i, n);
  700. ret = do_write_oneword(map, &cfi->chips[chipnum],
  701. bus_ofs, tmp_buf);
  702. if (ret)
  703. return ret;
  704. ofs += n;
  705. buf += n;
  706. (*retlen) += n;
  707. len -= n;
  708. if (ofs >> cfi->chipshift) {
  709. chipnum ++;
  710. ofs = 0;
  711. if (chipnum == cfi->numchips)
  712. return 0;
  713. }
  714. }
  715. /* We are now aligned, write as much as possible */
  716. while(len >= map_bankwidth(map)) {
  717. map_word datum;
  718. datum = map_word_load(map, buf);
  719. ret = do_write_oneword(map, &cfi->chips[chipnum],
  720. ofs, datum);
  721. if (ret)
  722. return ret;
  723. ofs += map_bankwidth(map);
  724. buf += map_bankwidth(map);
  725. (*retlen) += map_bankwidth(map);
  726. len -= map_bankwidth(map);
  727. if (ofs >> cfi->chipshift) {
  728. chipnum ++;
  729. ofs = 0;
  730. if (chipnum == cfi->numchips)
  731. return 0;
  732. chipstart = cfi->chips[chipnum].start;
  733. }
  734. }
  735. /* Write the trailing bytes if any */
  736. if (len & (map_bankwidth(map)-1)) {
  737. map_word tmp_buf;
  738. retry1:
  739. cfi_spin_lock(cfi->chips[chipnum].mutex);
  740. if (cfi->chips[chipnum].state != FL_READY) {
  741. #if 0
  742. printk(KERN_DEBUG "Waiting for chip to write, status = %d\n", cfi->chips[chipnum].state);
  743. #endif
  744. set_current_state(TASK_UNINTERRUPTIBLE);
  745. add_wait_queue(&cfi->chips[chipnum].wq, &wait);
  746. cfi_spin_unlock(cfi->chips[chipnum].mutex);
  747. schedule();
  748. remove_wait_queue(&cfi->chips[chipnum].wq, &wait);
  749. #if 0
  750. if(signal_pending(current))
  751. return -EINTR;
  752. #endif
  753. goto retry1;
  754. }
  755. tmp_buf = map_read(map, ofs + chipstart);
  756. cfi_spin_unlock(cfi->chips[chipnum].mutex);
  757. tmp_buf = map_word_load_partial(map, tmp_buf, buf, 0, len);
  758. ret = do_write_oneword(map, &cfi->chips[chipnum],
  759. ofs, tmp_buf);
  760. if (ret)
  761. return ret;
  762. (*retlen) += len;
  763. }
  764. return 0;
  765. }
  766. /*
  767. * FIXME: interleaved mode not tested, and probably not supported!
  768. */
  769. static inline int do_write_buffer(struct map_info *map, struct flchip *chip,
  770. unsigned long adr, const u_char *buf, int len)
  771. {
  772. struct cfi_private *cfi = map->fldrv_priv;
  773. unsigned long timeo = jiffies + HZ;
  774. /* see comments in do_write_oneword() regarding uWriteTimeo. */
  775. unsigned long uWriteTimeout = ( HZ / 1000 ) + 1;
  776. int ret = -EIO;
  777. unsigned long cmd_adr;
  778. int z, words;
  779. map_word datum;
  780. adr += chip->start;
  781. cmd_adr = adr;
  782. cfi_spin_lock(chip->mutex);
  783. ret = get_chip(map, chip, adr, FL_WRITING);
  784. if (ret) {
  785. cfi_spin_unlock(chip->mutex);
  786. return ret;
  787. }
  788. datum = map_word_load(map, buf);
  789. DEBUG( MTD_DEBUG_LEVEL3, "MTD %s(): WRITE 0x%.8lx(0x%.8lx)\n",
  790. __func__, adr, datum.x[0] );
  791. ENABLE_VPP(map);
  792. cfi_send_gen_cmd(0xAA, cfi->addr_unlock1, chip->start, map, cfi, cfi->device_type, NULL);
  793. cfi_send_gen_cmd(0x55, cfi->addr_unlock2, chip->start, map, cfi, cfi->device_type, NULL);
  794. //cfi_send_gen_cmd(0xA0, cfi->addr_unlock1, chip->start, map, cfi, cfi->device_type, NULL);
  795. /* Write Buffer Load */
  796. map_write(map, CMD(0x25), cmd_adr);
  797. chip->state = FL_WRITING_TO_BUFFER;
  798. /* Write length of data to come */
  799. words = len / map_bankwidth(map);
  800. map_write(map, CMD(words - 1), cmd_adr);
  801. /* Write data */
  802. z = 0;
  803. while(z < words * map_bankwidth(map)) {
  804. datum = map_word_load(map, buf);
  805. map_write(map, datum, adr + z);
  806. z += map_bankwidth(map);
  807. buf += map_bankwidth(map);
  808. }
  809. z -= map_bankwidth(map);
  810. adr += z;
  811. /* Write Buffer Program Confirm: GO GO GO */
  812. map_write(map, CMD(0x29), cmd_adr);
  813. chip->state = FL_WRITING;
  814. cfi_spin_unlock(chip->mutex);
  815. cfi_udelay(chip->buffer_write_time);
  816. cfi_spin_lock(chip->mutex);
  817. timeo = jiffies + uWriteTimeout;
  818. for (;;) {
  819. if (chip->state != FL_WRITING) {
  820. /* Someone's suspended the write. Sleep */
  821. DECLARE_WAITQUEUE(wait, current);
  822. set_current_state(TASK_UNINTERRUPTIBLE);
  823. add_wait_queue(&chip->wq, &wait);
  824. cfi_spin_unlock(chip->mutex);
  825. schedule();
  826. remove_wait_queue(&chip->wq, &wait);
  827. timeo = jiffies + (HZ / 2); /* FIXME */
  828. cfi_spin_lock(chip->mutex);
  829. continue;
  830. }
  831. if (chip_ready(map, adr))
  832. goto op_done;
  833. if( time_after(jiffies, timeo))
  834. break;
  835. /* Latency issues. Drop the lock, wait a while and retry */
  836. cfi_spin_unlock(chip->mutex);
  837. cfi_udelay(1);
  838. cfi_spin_lock(chip->mutex);
  839. }
  840. printk(KERN_WARNING "MTD %s(): software timeout\n",
  841. __func__ );
  842. /* reset on all failures. */
  843. map_write( map, CMD(0xF0), chip->start );
  844. /* FIXME - should have reset delay before continuing */
  845. ret = -EIO;
  846. op_done:
  847. chip->state = FL_READY;
  848. put_chip(map, chip, adr);
  849. cfi_spin_unlock(chip->mutex);
  850. return ret;
  851. }
  852. static int cfi_amdstd_write_buffers(struct mtd_info *mtd, loff_t to, size_t len,
  853. size_t *retlen, const u_char *buf)
  854. {
  855. struct map_info *map = mtd->priv;
  856. struct cfi_private *cfi = map->fldrv_priv;
  857. int wbufsize = cfi_interleave(cfi) << cfi->cfiq->MaxBufWriteSize;
  858. int ret = 0;
  859. int chipnum;
  860. unsigned long ofs;
  861. *retlen = 0;
  862. if (!len)
  863. return 0;
  864. chipnum = to >> cfi->chipshift;
  865. ofs = to - (chipnum << cfi->chipshift);
  866. /* If it's not bus-aligned, do the first word write */
  867. if (ofs & (map_bankwidth(map)-1)) {
  868. size_t local_len = (-ofs)&(map_bankwidth(map)-1);
  869. if (local_len > len)
  870. local_len = len;
  871. ret = cfi_amdstd_write_words(mtd, ofs + (chipnum<<cfi->chipshift),
  872. local_len, retlen, buf);
  873. if (ret)
  874. return ret;
  875. ofs += local_len;
  876. buf += local_len;
  877. len -= local_len;
  878. if (ofs >> cfi->chipshift) {
  879. chipnum ++;
  880. ofs = 0;
  881. if (chipnum == cfi->numchips)
  882. return 0;
  883. }
  884. }
  885. /* Write buffer is worth it only if more than one word to write... */
  886. while (len >= map_bankwidth(map) * 2) {
  887. /* We must not cross write block boundaries */
  888. int size = wbufsize - (ofs & (wbufsize-1));
  889. if (size > len)
  890. size = len;
  891. if (size % map_bankwidth(map))
  892. size -= size % map_bankwidth(map);
  893. ret = do_write_buffer(map, &cfi->chips[chipnum],
  894. ofs, buf, size);
  895. if (ret)
  896. return ret;
  897. ofs += size;
  898. buf += size;
  899. (*retlen) += size;
  900. len -= size;
  901. if (ofs >> cfi->chipshift) {
  902. chipnum ++;
  903. ofs = 0;
  904. if (chipnum == cfi->numchips)
  905. return 0;
  906. }
  907. }
  908. if (len) {
  909. size_t retlen_dregs = 0;
  910. ret = cfi_amdstd_write_words(mtd, ofs + (chipnum<<cfi->chipshift),
  911. len, &retlen_dregs, buf);
  912. *retlen += retlen_dregs;
  913. return ret;
  914. }
  915. return 0;
  916. }
  917. /*
  918. * Handle devices with one erase region, that only implement
  919. * the chip erase command.
  920. */
  921. static inline int do_erase_chip(struct map_info *map, struct flchip *chip)
  922. {
  923. struct cfi_private *cfi = map->fldrv_priv;
  924. unsigned long timeo = jiffies + HZ;
  925. unsigned long int adr;
  926. DECLARE_WAITQUEUE(wait, current);
  927. int ret = 0;
  928. adr = cfi->addr_unlock1;
  929. cfi_spin_lock(chip->mutex);
  930. ret = get_chip(map, chip, adr, FL_WRITING);
  931. if (ret) {
  932. cfi_spin_unlock(chip->mutex);
  933. return ret;
  934. }
  935. DEBUG( MTD_DEBUG_LEVEL3, "MTD %s(): ERASE 0x%.8lx\n",
  936. __func__, chip->start );
  937. ENABLE_VPP(map);
  938. cfi_send_gen_cmd(0xAA, cfi->addr_unlock1, chip->start, map, cfi, cfi->device_type, NULL);
  939. cfi_send_gen_cmd(0x55, cfi->addr_unlock2, chip->start, map, cfi, cfi->device_type, NULL);
  940. cfi_send_gen_cmd(0x80, cfi->addr_unlock1, chip->start, map, cfi, cfi->device_type, NULL);
  941. cfi_send_gen_cmd(0xAA, cfi->addr_unlock1, chip->start, map, cfi, cfi->device_type, NULL);
  942. cfi_send_gen_cmd(0x55, cfi->addr_unlock2, chip->start, map, cfi, cfi->device_type, NULL);
  943. cfi_send_gen_cmd(0x10, cfi->addr_unlock1, chip->start, map, cfi, cfi->device_type, NULL);
  944. chip->state = FL_ERASING;
  945. chip->erase_suspended = 0;
  946. chip->in_progress_block_addr = adr;
  947. cfi_spin_unlock(chip->mutex);
  948. msleep(chip->erase_time/2);
  949. cfi_spin_lock(chip->mutex);
  950. timeo = jiffies + (HZ*20);
  951. for (;;) {
  952. if (chip->state != FL_ERASING) {
  953. /* Someone's suspended the erase. Sleep */
  954. set_current_state(TASK_UNINTERRUPTIBLE);
  955. add_wait_queue(&chip->wq, &wait);
  956. cfi_spin_unlock(chip->mutex);
  957. schedule();
  958. remove_wait_queue(&chip->wq, &wait);
  959. cfi_spin_lock(chip->mutex);
  960. continue;
  961. }
  962. if (chip->erase_suspended) {
  963. /* This erase was suspended and resumed.
  964. Adjust the timeout */
  965. timeo = jiffies + (HZ*20); /* FIXME */
  966. chip->erase_suspended = 0;
  967. }
  968. if (chip_ready(map, adr))
  969. goto op_done;
  970. if (time_after(jiffies, timeo))
  971. break;
  972. /* Latency issues. Drop the lock, wait a while and retry */
  973. cfi_spin_unlock(chip->mutex);
  974. set_current_state(TASK_UNINTERRUPTIBLE);
  975. schedule_timeout(1);
  976. cfi_spin_lock(chip->mutex);
  977. }
  978. printk(KERN_WARNING "MTD %s(): software timeout\n",
  979. __func__ );
  980. /* reset on all failures. */
  981. map_write( map, CMD(0xF0), chip->start );
  982. /* FIXME - should have reset delay before continuing */
  983. ret = -EIO;
  984. op_done:
  985. chip->state = FL_READY;
  986. put_chip(map, chip, adr);
  987. cfi_spin_unlock(chip->mutex);
  988. return ret;
  989. }
  990. static inline int do_erase_oneblock(struct map_info *map, struct flchip *chip, unsigned long adr, int len, void *thunk)
  991. {
  992. struct cfi_private *cfi = map->fldrv_priv;
  993. unsigned long timeo = jiffies + HZ;
  994. DECLARE_WAITQUEUE(wait, current);
  995. int ret = 0;
  996. adr += chip->start;
  997. cfi_spin_lock(chip->mutex);
  998. ret = get_chip(map, chip, adr, FL_ERASING);
  999. if (ret) {
  1000. cfi_spin_unlock(chip->mutex);
  1001. return ret;
  1002. }
  1003. DEBUG( MTD_DEBUG_LEVEL3, "MTD %s(): ERASE 0x%.8lx\n",
  1004. __func__, adr );
  1005. ENABLE_VPP(map);
  1006. cfi_send_gen_cmd(0xAA, cfi->addr_unlock1, chip->start, map, cfi, cfi->device_type, NULL);
  1007. cfi_send_gen_cmd(0x55, cfi->addr_unlock2, chip->start, map, cfi, cfi->device_type, NULL);
  1008. cfi_send_gen_cmd(0x80, cfi->addr_unlock1, chip->start, map, cfi, cfi->device_type, NULL);
  1009. cfi_send_gen_cmd(0xAA, cfi->addr_unlock1, chip->start, map, cfi, cfi->device_type, NULL);
  1010. cfi_send_gen_cmd(0x55, cfi->addr_unlock2, chip->start, map, cfi, cfi->device_type, NULL);
  1011. map_write(map, CMD(0x30), adr);
  1012. chip->state = FL_ERASING;
  1013. chip->erase_suspended = 0;
  1014. chip->in_progress_block_addr = adr;
  1015. cfi_spin_unlock(chip->mutex);
  1016. msleep(chip->erase_time/2);
  1017. cfi_spin_lock(chip->mutex);
  1018. timeo = jiffies + (HZ*20);
  1019. for (;;) {
  1020. if (chip->state != FL_ERASING) {
  1021. /* Someone's suspended the erase. Sleep */
  1022. set_current_state(TASK_UNINTERRUPTIBLE);
  1023. add_wait_queue(&chip->wq, &wait);
  1024. cfi_spin_unlock(chip->mutex);
  1025. schedule();
  1026. remove_wait_queue(&chip->wq, &wait);
  1027. cfi_spin_lock(chip->mutex);
  1028. continue;
  1029. }
  1030. if (chip->erase_suspended) {
  1031. /* This erase was suspended and resumed.
  1032. Adjust the timeout */
  1033. timeo = jiffies + (HZ*20); /* FIXME */
  1034. chip->erase_suspended = 0;
  1035. }
  1036. if (chip_ready(map, adr))
  1037. goto op_done;
  1038. if (time_after(jiffies, timeo))
  1039. break;
  1040. /* Latency issues. Drop the lock, wait a while and retry */
  1041. cfi_spin_unlock(chip->mutex);
  1042. set_current_state(TASK_UNINTERRUPTIBLE);
  1043. schedule_timeout(1);
  1044. cfi_spin_lock(chip->mutex);
  1045. }
  1046. printk(KERN_WARNING "MTD %s(): software timeout\n",
  1047. __func__ );
  1048. /* reset on all failures. */
  1049. map_write( map, CMD(0xF0), chip->start );
  1050. /* FIXME - should have reset delay before continuing */
  1051. ret = -EIO;
  1052. op_done:
  1053. chip->state = FL_READY;
  1054. put_chip(map, chip, adr);
  1055. cfi_spin_unlock(chip->mutex);
  1056. return ret;
  1057. }
  1058. int cfi_amdstd_erase_varsize(struct mtd_info *mtd, struct erase_info *instr)
  1059. {
  1060. unsigned long ofs, len;
  1061. int ret;
  1062. ofs = instr->addr;
  1063. len = instr->len;
  1064. ret = cfi_varsize_frob(mtd, do_erase_oneblock, ofs, len, NULL);
  1065. if (ret)
  1066. return ret;
  1067. instr->state = MTD_ERASE_DONE;
  1068. mtd_erase_callback(instr);
  1069. return 0;
  1070. }
  1071. static int cfi_amdstd_erase_chip(struct mtd_info *mtd, struct erase_info *instr)
  1072. {
  1073. struct map_info *map = mtd->priv;
  1074. struct cfi_private *cfi = map->fldrv_priv;
  1075. int ret = 0;
  1076. if (instr->addr != 0)
  1077. return -EINVAL;
  1078. if (instr->len != mtd->size)
  1079. return -EINVAL;
  1080. ret = do_erase_chip(map, &cfi->chips[0]);
  1081. if (ret)
  1082. return ret;
  1083. instr->state = MTD_ERASE_DONE;
  1084. mtd_erase_callback(instr);
  1085. return 0;
  1086. }
  1087. static void cfi_amdstd_sync (struct mtd_info *mtd)
  1088. {
  1089. struct map_info *map = mtd->priv;
  1090. struct cfi_private *cfi = map->fldrv_priv;
  1091. int i;
  1092. struct flchip *chip;
  1093. int ret = 0;
  1094. DECLARE_WAITQUEUE(wait, current);
  1095. for (i=0; !ret && i<cfi->numchips; i++) {
  1096. chip = &cfi->chips[i];
  1097. retry:
  1098. cfi_spin_lock(chip->mutex);
  1099. switch(chip->state) {
  1100. case FL_READY:
  1101. case FL_STATUS:
  1102. case FL_CFI_QUERY:
  1103. case FL_JEDEC_QUERY:
  1104. chip->oldstate = chip->state;
  1105. chip->state = FL_SYNCING;
  1106. /* No need to wake_up() on this state change -
  1107. * as the whole point is that nobody can do anything
  1108. * with the chip now anyway.
  1109. */
  1110. case FL_SYNCING:
  1111. cfi_spin_unlock(chip->mutex);
  1112. break;
  1113. default:
  1114. /* Not an idle state */
  1115. add_wait_queue(&chip->wq, &wait);
  1116. cfi_spin_unlock(chip->mutex);
  1117. schedule();
  1118. remove_wait_queue(&chip->wq, &wait);
  1119. goto retry;
  1120. }
  1121. }
  1122. /* Unlock the chips again */
  1123. for (i--; i >=0; i--) {
  1124. chip = &cfi->chips[i];
  1125. cfi_spin_lock(chip->mutex);
  1126. if (chip->state == FL_SYNCING) {
  1127. chip->state = chip->oldstate;
  1128. wake_up(&chip->wq);
  1129. }
  1130. cfi_spin_unlock(chip->mutex);
  1131. }
  1132. }
  1133. static int cfi_amdstd_suspend(struct mtd_info *mtd)
  1134. {
  1135. struct map_info *map = mtd->priv;
  1136. struct cfi_private *cfi = map->fldrv_priv;
  1137. int i;
  1138. struct flchip *chip;
  1139. int ret = 0;
  1140. for (i=0; !ret && i<cfi->numchips; i++) {
  1141. chip = &cfi->chips[i];
  1142. cfi_spin_lock(chip->mutex);
  1143. switch(chip->state) {
  1144. case FL_READY:
  1145. case FL_STATUS:
  1146. case FL_CFI_QUERY:
  1147. case FL_JEDEC_QUERY:
  1148. chip->oldstate = chip->state;
  1149. chip->state = FL_PM_SUSPENDED;
  1150. /* No need to wake_up() on this state change -
  1151. * as the whole point is that nobody can do anything
  1152. * with the chip now anyway.
  1153. */
  1154. case FL_PM_SUSPENDED:
  1155. break;
  1156. default:
  1157. ret = -EAGAIN;
  1158. break;
  1159. }
  1160. cfi_spin_unlock(chip->mutex);
  1161. }
  1162. /* Unlock the chips again */
  1163. if (ret) {
  1164. for (i--; i >=0; i--) {
  1165. chip = &cfi->chips[i];
  1166. cfi_spin_lock(chip->mutex);
  1167. if (chip->state == FL_PM_SUSPENDED) {
  1168. chip->state = chip->oldstate;
  1169. wake_up(&chip->wq);
  1170. }
  1171. cfi_spin_unlock(chip->mutex);
  1172. }
  1173. }
  1174. return ret;
  1175. }
  1176. static void cfi_amdstd_resume(struct mtd_info *mtd)
  1177. {
  1178. struct map_info *map = mtd->priv;
  1179. struct cfi_private *cfi = map->fldrv_priv;
  1180. int i;
  1181. struct flchip *chip;
  1182. for (i=0; i<cfi->numchips; i++) {
  1183. chip = &cfi->chips[i];
  1184. cfi_spin_lock(chip->mutex);
  1185. if (chip->state == FL_PM_SUSPENDED) {
  1186. chip->state = FL_READY;
  1187. map_write(map, CMD(0xF0), chip->start);
  1188. wake_up(&chip->wq);
  1189. }
  1190. else
  1191. printk(KERN_ERR "Argh. Chip not in PM_SUSPENDED state upon resume()\n");
  1192. cfi_spin_unlock(chip->mutex);
  1193. }
  1194. }
  1195. static void cfi_amdstd_destroy(struct mtd_info *mtd)
  1196. {
  1197. struct map_info *map = mtd->priv;
  1198. struct cfi_private *cfi = map->fldrv_priv;
  1199. kfree(cfi->cmdset_priv);
  1200. kfree(cfi->cfiq);
  1201. kfree(cfi);
  1202. kfree(mtd->eraseregions);
  1203. }
  1204. static char im_name[]="cfi_cmdset_0002";
  1205. static int __init cfi_amdstd_init(void)
  1206. {
  1207. inter_module_register(im_name, THIS_MODULE, &cfi_cmdset_0002);
  1208. return 0;
  1209. }
  1210. static void __exit cfi_amdstd_exit(void)
  1211. {
  1212. inter_module_unregister(im_name);
  1213. }
  1214. module_init(cfi_amdstd_init);
  1215. module_exit(cfi_amdstd_exit);
  1216. MODULE_LICENSE("GPL");
  1217. MODULE_AUTHOR("Crossnet Co. <info@crossnet.co.jp> et al.");
  1218. MODULE_DESCRIPTION("MTD chip driver for AMD/Fujitsu flash chips");