os_pri.c 26 KB

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  1. /* $Id: os_pri.c,v 1.32 2004/03/21 17:26:01 armin Exp $ */
  2. #include "platform.h"
  3. #include "debuglib.h"
  4. #include "cardtype.h"
  5. #include "pc.h"
  6. #include "pr_pc.h"
  7. #include "di_defs.h"
  8. #include "dsp_defs.h"
  9. #include "di.h"
  10. #include "io.h"
  11. #include "xdi_msg.h"
  12. #include "xdi_adapter.h"
  13. #include "os_pri.h"
  14. #include "diva_pci.h"
  15. #include "mi_pc.h"
  16. #include "pc_maint.h"
  17. #include "dsp_tst.h"
  18. #include "diva_dma.h"
  19. /* --------------------------------------------------------------------------
  20. OS Dependent part of XDI driver for DIVA PRI Adapter
  21. DSP detection/validation by Anthony Booth (Eicon Networks, www.eicon.com)
  22. -------------------------------------------------------------------------- */
  23. #define DIVA_PRI_NO_PCI_BIOS_WORKAROUND 1
  24. extern int diva_card_read_xlog(diva_os_xdi_adapter_t * a);
  25. /*
  26. ** IMPORTS
  27. */
  28. extern void prepare_pri_functions(PISDN_ADAPTER IoAdapter);
  29. extern void prepare_pri2_functions(PISDN_ADAPTER IoAdapter);
  30. extern void diva_xdi_display_adapter_features(int card);
  31. static int diva_pri_cleanup_adapter(diva_os_xdi_adapter_t * a);
  32. static int diva_pri_cmd_card_proc(struct _diva_os_xdi_adapter *a,
  33. diva_xdi_um_cfg_cmd_t * cmd, int length);
  34. static int pri_get_serial_number(diva_os_xdi_adapter_t * a);
  35. static int diva_pri_stop_adapter(diva_os_xdi_adapter_t * a);
  36. static dword diva_pri_detect_dsps(diva_os_xdi_adapter_t * a);
  37. /*
  38. ** Check card revision
  39. */
  40. static int pri_is_rev_2_card(int card_ordinal)
  41. {
  42. switch (card_ordinal) {
  43. case CARDTYPE_DIVASRV_P_30M_V2_PCI:
  44. case CARDTYPE_DIVASRV_VOICE_P_30M_V2_PCI:
  45. return (1);
  46. }
  47. return (0);
  48. }
  49. static void diva_pri_set_addresses(diva_os_xdi_adapter_t * a)
  50. {
  51. a->resources.pci.mem_type_id[MEM_TYPE_ADDRESS] = 0;
  52. a->resources.pci.mem_type_id[MEM_TYPE_CONTROL] = 2;
  53. a->resources.pci.mem_type_id[MEM_TYPE_CONFIG] = 4;
  54. a->resources.pci.mem_type_id[MEM_TYPE_RAM] = 0;
  55. a->resources.pci.mem_type_id[MEM_TYPE_RESET] = 2;
  56. a->resources.pci.mem_type_id[MEM_TYPE_CFG] = 4;
  57. a->resources.pci.mem_type_id[MEM_TYPE_PROM] = 3;
  58. a->xdi_adapter.Address = a->resources.pci.addr[0];
  59. a->xdi_adapter.Control = a->resources.pci.addr[2];
  60. a->xdi_adapter.Config = a->resources.pci.addr[4];
  61. a->xdi_adapter.ram = a->resources.pci.addr[0];
  62. a->xdi_adapter.ram += MP_SHARED_RAM_OFFSET;
  63. a->xdi_adapter.reset = a->resources.pci.addr[2];
  64. a->xdi_adapter.reset += MP_RESET;
  65. a->xdi_adapter.cfg = a->resources.pci.addr[4];
  66. a->xdi_adapter.cfg += MP_IRQ_RESET;
  67. a->xdi_adapter.sdram_bar = a->resources.pci.bar[0];
  68. a->xdi_adapter.prom = a->resources.pci.addr[3];
  69. }
  70. /*
  71. ** BAR0 - SDRAM, MP_MEMORY_SIZE, MP2_MEMORY_SIZE by Rev.2
  72. ** BAR1 - DEVICES, 0x1000
  73. ** BAR2 - CONTROL (REG), 0x2000
  74. ** BAR3 - FLASH (REG), 0x8000
  75. ** BAR4 - CONFIG (CFG), 0x1000
  76. */
  77. int diva_pri_init_card(diva_os_xdi_adapter_t * a)
  78. {
  79. int bar = 0;
  80. int pri_rev_2;
  81. unsigned long bar_length[5] = {
  82. MP_MEMORY_SIZE,
  83. 0x1000,
  84. 0x2000,
  85. 0x8000,
  86. 0x1000
  87. };
  88. pri_rev_2 = pri_is_rev_2_card(a->CardOrdinal);
  89. if (pri_rev_2) {
  90. bar_length[0] = MP2_MEMORY_SIZE;
  91. }
  92. /*
  93. Set properties
  94. */
  95. a->xdi_adapter.Properties = CardProperties[a->CardOrdinal];
  96. DBG_LOG(("Load %s", a->xdi_adapter.Properties.Name))
  97. /*
  98. First initialization step: get and check hardware resoures.
  99. Do not map resources and do not acecess card at this step
  100. */
  101. for (bar = 0; bar < 5; bar++) {
  102. a->resources.pci.bar[bar] =
  103. divasa_get_pci_bar(a->resources.pci.bus,
  104. a->resources.pci.func, bar,
  105. a->resources.pci.hdev);
  106. if (!a->resources.pci.bar[bar]
  107. || (a->resources.pci.bar[bar] == 0xFFFFFFF0)) {
  108. DBG_ERR(("A: invalid bar[%d]=%08x", bar,
  109. a->resources.pci.bar[bar]))
  110. return (-1);
  111. }
  112. }
  113. a->resources.pci.irq =
  114. (byte) divasa_get_pci_irq(a->resources.pci.bus,
  115. a->resources.pci.func,
  116. a->resources.pci.hdev);
  117. if (!a->resources.pci.irq) {
  118. DBG_ERR(("A: invalid irq"));
  119. return (-1);
  120. }
  121. /*
  122. Map all BAR's
  123. */
  124. for (bar = 0; bar < 5; bar++) {
  125. a->resources.pci.addr[bar] =
  126. divasa_remap_pci_bar(a, bar, a->resources.pci.bar[bar],
  127. bar_length[bar]);
  128. if (!a->resources.pci.addr[bar]) {
  129. DBG_ERR(("A: A(%d), can't map bar[%d]",
  130. a->controller, bar))
  131. diva_pri_cleanup_adapter(a);
  132. return (-1);
  133. }
  134. }
  135. /*
  136. Set all memory areas
  137. */
  138. diva_pri_set_addresses(a);
  139. /*
  140. Get Serial Number of this adapter
  141. */
  142. if (pri_get_serial_number(a)) {
  143. dword serNo;
  144. serNo = a->resources.pci.bar[1] & 0xffff0000;
  145. serNo |= ((dword) a->resources.pci.bus) << 8;
  146. serNo += (a->resources.pci.func + a->controller + 1);
  147. a->xdi_adapter.serialNo = serNo & ~0xFF000000;
  148. DBG_ERR(("A: A(%d) can't get Serial Number, generated serNo=%ld",
  149. a->controller, a->xdi_adapter.serialNo))
  150. }
  151. /*
  152. Initialize os objects
  153. */
  154. if (diva_os_initialize_spin_lock(&a->xdi_adapter.isr_spin_lock, "isr")) {
  155. diva_pri_cleanup_adapter(a);
  156. return (-1);
  157. }
  158. if (diva_os_initialize_spin_lock
  159. (&a->xdi_adapter.data_spin_lock, "data")) {
  160. diva_pri_cleanup_adapter(a);
  161. return (-1);
  162. }
  163. strcpy(a->xdi_adapter.req_soft_isr.dpc_thread_name, "kdivasprid");
  164. if (diva_os_initialize_soft_isr(&a->xdi_adapter.req_soft_isr,
  165. DIDpcRoutine, &a->xdi_adapter)) {
  166. diva_pri_cleanup_adapter(a);
  167. return (-1);
  168. }
  169. /*
  170. Do not initialize second DPC - only one thread will be created
  171. */
  172. a->xdi_adapter.isr_soft_isr.object =
  173. a->xdi_adapter.req_soft_isr.object;
  174. /*
  175. Next step of card initialization:
  176. set up all interface pointers
  177. */
  178. a->xdi_adapter.Channels = CardProperties[a->CardOrdinal].Channels;
  179. a->xdi_adapter.e_max = CardProperties[a->CardOrdinal].E_info;
  180. a->xdi_adapter.e_tbl =
  181. diva_os_malloc(0, a->xdi_adapter.e_max * sizeof(E_INFO));
  182. if (!a->xdi_adapter.e_tbl) {
  183. diva_pri_cleanup_adapter(a);
  184. return (-1);
  185. }
  186. memset(a->xdi_adapter.e_tbl, 0x00, a->xdi_adapter.e_max * sizeof(E_INFO));
  187. a->xdi_adapter.a.io = &a->xdi_adapter;
  188. a->xdi_adapter.DIRequest = request;
  189. a->interface.cleanup_adapter_proc = diva_pri_cleanup_adapter;
  190. a->interface.cmd_proc = diva_pri_cmd_card_proc;
  191. if (pri_rev_2) {
  192. prepare_pri2_functions(&a->xdi_adapter);
  193. } else {
  194. prepare_pri_functions(&a->xdi_adapter);
  195. }
  196. a->dsp_mask = diva_pri_detect_dsps(a);
  197. /*
  198. Allocate DMA map
  199. */
  200. if (pri_rev_2) {
  201. diva_init_dma_map(a->resources.pci.hdev,
  202. (struct _diva_dma_map_entry **) &a->xdi_adapter.dma_map, 32);
  203. }
  204. /*
  205. Set IRQ handler
  206. */
  207. a->xdi_adapter.irq_info.irq_nr = a->resources.pci.irq;
  208. sprintf(a->xdi_adapter.irq_info.irq_name,
  209. "DIVA PRI %ld", (long) a->xdi_adapter.serialNo);
  210. if (diva_os_register_irq(a, a->xdi_adapter.irq_info.irq_nr,
  211. a->xdi_adapter.irq_info.irq_name)) {
  212. diva_pri_cleanup_adapter(a);
  213. return (-1);
  214. }
  215. a->xdi_adapter.irq_info.registered = 1;
  216. diva_log_info("%s IRQ:%d SerNo:%d", a->xdi_adapter.Properties.Name,
  217. a->resources.pci.irq, a->xdi_adapter.serialNo);
  218. return (0);
  219. }
  220. static int diva_pri_cleanup_adapter(diva_os_xdi_adapter_t * a)
  221. {
  222. int bar = 0;
  223. /*
  224. Stop Adapter if adapter is running
  225. */
  226. if (a->xdi_adapter.Initialized) {
  227. diva_pri_stop_adapter(a);
  228. }
  229. /*
  230. Remove ISR Handler
  231. */
  232. if (a->xdi_adapter.irq_info.registered) {
  233. diva_os_remove_irq(a, a->xdi_adapter.irq_info.irq_nr);
  234. }
  235. a->xdi_adapter.irq_info.registered = 0;
  236. /*
  237. Step 1: unmap all BAR's, if any was mapped
  238. */
  239. for (bar = 0; bar < 5; bar++) {
  240. if (a->resources.pci.bar[bar]
  241. && a->resources.pci.addr[bar]) {
  242. divasa_unmap_pci_bar(a->resources.pci.addr[bar]);
  243. a->resources.pci.bar[bar] = 0;
  244. a->resources.pci.addr[bar] = NULL;
  245. }
  246. }
  247. /*
  248. Free OS objects
  249. */
  250. diva_os_cancel_soft_isr(&a->xdi_adapter.isr_soft_isr);
  251. diva_os_cancel_soft_isr(&a->xdi_adapter.req_soft_isr);
  252. diva_os_remove_soft_isr(&a->xdi_adapter.req_soft_isr);
  253. a->xdi_adapter.isr_soft_isr.object = NULL;
  254. diva_os_destroy_spin_lock(&a->xdi_adapter.isr_spin_lock, "rm");
  255. diva_os_destroy_spin_lock(&a->xdi_adapter.data_spin_lock, "rm");
  256. /*
  257. Free memory accupied by XDI adapter
  258. */
  259. if (a->xdi_adapter.e_tbl) {
  260. diva_os_free(0, a->xdi_adapter.e_tbl);
  261. a->xdi_adapter.e_tbl = NULL;
  262. }
  263. a->xdi_adapter.Channels = 0;
  264. a->xdi_adapter.e_max = 0;
  265. /*
  266. Free adapter DMA map
  267. */
  268. diva_free_dma_map(a->resources.pci.hdev,
  269. (struct _diva_dma_map_entry *) a->xdi_adapter.
  270. dma_map);
  271. a->xdi_adapter.dma_map = NULL;
  272. /*
  273. Detach this adapter from debug driver
  274. */
  275. return (0);
  276. }
  277. /*
  278. ** Activate On Board Boot Loader
  279. */
  280. static int diva_pri_reset_adapter(PISDN_ADAPTER IoAdapter)
  281. {
  282. dword i;
  283. struct mp_load __iomem *boot;
  284. if (!IoAdapter->Address || !IoAdapter->reset) {
  285. return (-1);
  286. }
  287. if (IoAdapter->Initialized) {
  288. DBG_ERR(("A: A(%d) can't reset PRI adapter - please stop first",
  289. IoAdapter->ANum))
  290. return (-1);
  291. }
  292. boot = (struct mp_load __iomem *) DIVA_OS_MEM_ATTACH_ADDRESS(IoAdapter);
  293. WRITE_DWORD(&boot->err, 0);
  294. DIVA_OS_MEM_DETACH_ADDRESS(IoAdapter, boot);
  295. IoAdapter->rstFnc(IoAdapter);
  296. diva_os_wait(10);
  297. boot = (struct mp_load __iomem *) DIVA_OS_MEM_ATTACH_ADDRESS(IoAdapter);
  298. i = READ_DWORD(&boot->live);
  299. diva_os_wait(10);
  300. if (i == READ_DWORD(&boot->live)) {
  301. DIVA_OS_MEM_DETACH_ADDRESS(IoAdapter, boot);
  302. DBG_ERR(("A: A(%d) CPU on PRI %ld is not alive!",
  303. IoAdapter->ANum, IoAdapter->serialNo))
  304. return (-1);
  305. }
  306. if (READ_DWORD(&boot->err)) {
  307. DBG_ERR(("A: A(%d) PRI %ld Board Selftest failed, error=%08lx",
  308. IoAdapter->ANum, IoAdapter->serialNo,
  309. READ_DWORD(&boot->err)))
  310. DIVA_OS_MEM_DETACH_ADDRESS(IoAdapter, boot);
  311. return (-1);
  312. }
  313. DIVA_OS_MEM_DETACH_ADDRESS(IoAdapter, boot);
  314. /*
  315. Forget all outstanding entities
  316. */
  317. IoAdapter->e_count = 0;
  318. if (IoAdapter->e_tbl) {
  319. memset(IoAdapter->e_tbl, 0x00,
  320. IoAdapter->e_max * sizeof(E_INFO));
  321. }
  322. IoAdapter->head = 0;
  323. IoAdapter->tail = 0;
  324. IoAdapter->assign = 0;
  325. IoAdapter->trapped = 0;
  326. memset(&IoAdapter->a.IdTable[0], 0x00,
  327. sizeof(IoAdapter->a.IdTable));
  328. memset(&IoAdapter->a.IdTypeTable[0], 0x00,
  329. sizeof(IoAdapter->a.IdTypeTable));
  330. memset(&IoAdapter->a.FlowControlIdTable[0], 0x00,
  331. sizeof(IoAdapter->a.FlowControlIdTable));
  332. memset(&IoAdapter->a.FlowControlSkipTable[0], 0x00,
  333. sizeof(IoAdapter->a.FlowControlSkipTable));
  334. memset(&IoAdapter->a.misc_flags_table[0], 0x00,
  335. sizeof(IoAdapter->a.misc_flags_table));
  336. memset(&IoAdapter->a.rx_stream[0], 0x00,
  337. sizeof(IoAdapter->a.rx_stream));
  338. memset(&IoAdapter->a.tx_stream[0], 0x00,
  339. sizeof(IoAdapter->a.tx_stream));
  340. memset(&IoAdapter->a.tx_pos[0], 0x00, sizeof(IoAdapter->a.tx_pos));
  341. memset(&IoAdapter->a.rx_pos[0], 0x00, sizeof(IoAdapter->a.rx_pos));
  342. return (0);
  343. }
  344. static int
  345. diva_pri_write_sdram_block(PISDN_ADAPTER IoAdapter,
  346. dword address,
  347. const byte * data, dword length, dword limit)
  348. {
  349. byte __iomem *p = DIVA_OS_MEM_ATTACH_ADDRESS(IoAdapter);
  350. byte __iomem *mem = p;
  351. if (((address + length) >= limit) || !mem) {
  352. DIVA_OS_MEM_DETACH_ADDRESS(IoAdapter, p);
  353. DBG_ERR(("A: A(%d) write PRI address=0x%08lx",
  354. IoAdapter->ANum, address + length))
  355. return (-1);
  356. }
  357. mem += address;
  358. /* memcpy_toio(), maybe? */
  359. while (length--) {
  360. WRITE_BYTE(mem++, *data++);
  361. }
  362. DIVA_OS_MEM_DETACH_ADDRESS(IoAdapter, p);
  363. return (0);
  364. }
  365. static int
  366. diva_pri_start_adapter(PISDN_ADAPTER IoAdapter,
  367. dword start_address, dword features)
  368. {
  369. dword i;
  370. int started = 0;
  371. byte __iomem *p;
  372. struct mp_load __iomem *boot = (struct mp_load __iomem *) DIVA_OS_MEM_ATTACH_ADDRESS(IoAdapter);
  373. ADAPTER *a = &IoAdapter->a;
  374. if (IoAdapter->Initialized) {
  375. DIVA_OS_MEM_DETACH_ADDRESS(IoAdapter, boot);
  376. DBG_ERR(("A: A(%d) pri_start_adapter, adapter already running",
  377. IoAdapter->ANum))
  378. return (-1);
  379. }
  380. if (!boot) {
  381. DIVA_OS_MEM_DETACH_ADDRESS(IoAdapter, boot);
  382. DBG_ERR(("A: PRI %ld can't start, adapter not mapped",
  383. IoAdapter->serialNo))
  384. return (-1);
  385. }
  386. sprintf(IoAdapter->Name, "A(%d)", (int) IoAdapter->ANum);
  387. DBG_LOG(("A(%d) start PRI at 0x%08lx", IoAdapter->ANum,
  388. start_address))
  389. WRITE_DWORD(&boot->addr, start_address);
  390. WRITE_DWORD(&boot->cmd, 3);
  391. for (i = 0; i < 300; ++i) {
  392. diva_os_wait(10);
  393. if ((READ_DWORD(&boot->signature) >> 16) == 0x4447) {
  394. DBG_LOG(("A(%d) Protocol startup time %d.%02d seconds",
  395. IoAdapter->ANum, (i / 100), (i % 100)))
  396. started = 1;
  397. break;
  398. }
  399. }
  400. if (!started) {
  401. byte __iomem *p = (byte __iomem *)boot;
  402. dword TrapId;
  403. dword debug;
  404. TrapId = READ_DWORD(&p[0x80]);
  405. debug = READ_DWORD(&p[0x1c]);
  406. DBG_ERR(("A(%d) Adapter start failed 0x%08lx, TrapId=%08lx, debug=%08lx",
  407. IoAdapter->ANum, READ_DWORD(&boot->signature),
  408. TrapId, debug))
  409. DIVA_OS_MEM_DETACH_ADDRESS(IoAdapter, boot);
  410. if (IoAdapter->trapFnc) {
  411. (*(IoAdapter->trapFnc)) (IoAdapter);
  412. }
  413. IoAdapter->stop(IoAdapter);
  414. return (-1);
  415. }
  416. DIVA_OS_MEM_DETACH_ADDRESS(IoAdapter, boot);
  417. IoAdapter->Initialized = TRUE;
  418. /*
  419. Check Interrupt
  420. */
  421. IoAdapter->IrqCount = 0;
  422. p = DIVA_OS_MEM_ATTACH_CFG(IoAdapter);
  423. WRITE_DWORD(p, (dword) ~ 0x03E00000);
  424. DIVA_OS_MEM_DETACH_CFG(IoAdapter, p);
  425. a->ReadyInt = 1;
  426. a->ram_out(a, &PR_RAM->ReadyInt, 1);
  427. for (i = 100; !IoAdapter->IrqCount && (i-- > 0); diva_os_wait(10));
  428. if (!IoAdapter->IrqCount) {
  429. DBG_ERR(("A: A(%d) interrupt test failed",
  430. IoAdapter->ANum))
  431. IoAdapter->Initialized = FALSE;
  432. IoAdapter->stop(IoAdapter);
  433. return (-1);
  434. }
  435. IoAdapter->Properties.Features = (word) features;
  436. diva_xdi_display_adapter_features(IoAdapter->ANum);
  437. DBG_LOG(("A(%d) PRI adapter successfull started", IoAdapter->ANum))
  438. /*
  439. Register with DIDD
  440. */
  441. diva_xdi_didd_register_adapter(IoAdapter->ANum);
  442. return (0);
  443. }
  444. static void diva_pri_clear_interrupts(diva_os_xdi_adapter_t * a)
  445. {
  446. PISDN_ADAPTER IoAdapter = &a->xdi_adapter;
  447. /*
  448. clear any pending interrupt
  449. */
  450. IoAdapter->disIrq(IoAdapter);
  451. IoAdapter->tst_irq(&IoAdapter->a);
  452. IoAdapter->clr_irq(&IoAdapter->a);
  453. IoAdapter->tst_irq(&IoAdapter->a);
  454. /*
  455. kill pending dpcs
  456. */
  457. diva_os_cancel_soft_isr(&IoAdapter->req_soft_isr);
  458. diva_os_cancel_soft_isr(&IoAdapter->isr_soft_isr);
  459. }
  460. /*
  461. ** Stop Adapter, but do not unmap/unregister - adapter
  462. ** will be restarted later
  463. */
  464. static int diva_pri_stop_adapter(diva_os_xdi_adapter_t * a)
  465. {
  466. PISDN_ADAPTER IoAdapter = &a->xdi_adapter;
  467. int i = 100;
  468. if (!IoAdapter->ram) {
  469. return (-1);
  470. }
  471. if (!IoAdapter->Initialized) {
  472. DBG_ERR(("A: A(%d) can't stop PRI adapter - not running",
  473. IoAdapter->ANum))
  474. return (-1); /* nothing to stop */
  475. }
  476. IoAdapter->Initialized = 0;
  477. /*
  478. Disconnect Adapter from DIDD
  479. */
  480. diva_xdi_didd_remove_adapter(IoAdapter->ANum);
  481. /*
  482. Stop interrupts
  483. */
  484. a->clear_interrupts_proc = diva_pri_clear_interrupts;
  485. IoAdapter->a.ReadyInt = 1;
  486. IoAdapter->a.ram_inc(&IoAdapter->a, &PR_RAM->ReadyInt);
  487. do {
  488. diva_os_sleep(10);
  489. } while (i-- && a->clear_interrupts_proc);
  490. if (a->clear_interrupts_proc) {
  491. diva_pri_clear_interrupts(a);
  492. a->clear_interrupts_proc = NULL;
  493. DBG_ERR(("A: A(%d) no final interrupt from PRI adapter",
  494. IoAdapter->ANum))
  495. }
  496. IoAdapter->a.ReadyInt = 0;
  497. /*
  498. Stop and reset adapter
  499. */
  500. IoAdapter->stop(IoAdapter);
  501. return (0);
  502. }
  503. /*
  504. ** Process commands form configuration/download framework and from
  505. ** user mode
  506. **
  507. ** return 0 on success
  508. */
  509. static int
  510. diva_pri_cmd_card_proc(struct _diva_os_xdi_adapter *a,
  511. diva_xdi_um_cfg_cmd_t * cmd, int length)
  512. {
  513. int ret = -1;
  514. if (cmd->adapter != a->controller) {
  515. DBG_ERR(("A: pri_cmd, invalid controller=%d != %d",
  516. cmd->adapter, a->controller))
  517. return (-1);
  518. }
  519. switch (cmd->command) {
  520. case DIVA_XDI_UM_CMD_GET_CARD_ORDINAL:
  521. a->xdi_mbox.data_length = sizeof(dword);
  522. a->xdi_mbox.data =
  523. diva_os_malloc(0, a->xdi_mbox.data_length);
  524. if (a->xdi_mbox.data) {
  525. *(dword *) a->xdi_mbox.data =
  526. (dword) a->CardOrdinal;
  527. a->xdi_mbox.status = DIVA_XDI_MBOX_BUSY;
  528. ret = 0;
  529. }
  530. break;
  531. case DIVA_XDI_UM_CMD_GET_SERIAL_NR:
  532. a->xdi_mbox.data_length = sizeof(dword);
  533. a->xdi_mbox.data =
  534. diva_os_malloc(0, a->xdi_mbox.data_length);
  535. if (a->xdi_mbox.data) {
  536. *(dword *) a->xdi_mbox.data =
  537. (dword) a->xdi_adapter.serialNo;
  538. a->xdi_mbox.status = DIVA_XDI_MBOX_BUSY;
  539. ret = 0;
  540. }
  541. break;
  542. case DIVA_XDI_UM_CMD_GET_PCI_HW_CONFIG:
  543. a->xdi_mbox.data_length = sizeof(dword) * 9;
  544. a->xdi_mbox.data =
  545. diva_os_malloc(0, a->xdi_mbox.data_length);
  546. if (a->xdi_mbox.data) {
  547. int i;
  548. dword *data = (dword *) a->xdi_mbox.data;
  549. for (i = 0; i < 8; i++) {
  550. *data++ = a->resources.pci.bar[i];
  551. }
  552. *data++ = (dword) a->resources.pci.irq;
  553. a->xdi_mbox.status = DIVA_XDI_MBOX_BUSY;
  554. ret = 0;
  555. }
  556. break;
  557. case DIVA_XDI_UM_CMD_RESET_ADAPTER:
  558. ret = diva_pri_reset_adapter(&a->xdi_adapter);
  559. break;
  560. case DIVA_XDI_UM_CMD_WRITE_SDRAM_BLOCK:
  561. ret = diva_pri_write_sdram_block(&a->xdi_adapter,
  562. cmd->command_data.
  563. write_sdram.offset,
  564. (byte *) & cmd[1],
  565. cmd->command_data.
  566. write_sdram.length,
  567. pri_is_rev_2_card(a->
  568. CardOrdinal)
  569. ? MP2_MEMORY_SIZE :
  570. MP_MEMORY_SIZE);
  571. break;
  572. case DIVA_XDI_UM_CMD_STOP_ADAPTER:
  573. ret = diva_pri_stop_adapter(a);
  574. break;
  575. case DIVA_XDI_UM_CMD_START_ADAPTER:
  576. ret = diva_pri_start_adapter(&a->xdi_adapter,
  577. cmd->command_data.start.
  578. offset,
  579. cmd->command_data.start.
  580. features);
  581. break;
  582. case DIVA_XDI_UM_CMD_SET_PROTOCOL_FEATURES:
  583. a->xdi_adapter.features =
  584. cmd->command_data.features.features;
  585. a->xdi_adapter.a.protocol_capabilities =
  586. a->xdi_adapter.features;
  587. DBG_TRC(("Set raw protocol features (%08x)",
  588. a->xdi_adapter.features))
  589. ret = 0;
  590. break;
  591. case DIVA_XDI_UM_CMD_GET_CARD_STATE:
  592. a->xdi_mbox.data_length = sizeof(dword);
  593. a->xdi_mbox.data =
  594. diva_os_malloc(0, a->xdi_mbox.data_length);
  595. if (a->xdi_mbox.data) {
  596. dword *data = (dword *) a->xdi_mbox.data;
  597. if (!a->xdi_adapter.ram ||
  598. !a->xdi_adapter.reset ||
  599. !a->xdi_adapter.cfg) {
  600. *data = 3;
  601. } else if (a->xdi_adapter.trapped) {
  602. *data = 2;
  603. } else if (a->xdi_adapter.Initialized) {
  604. *data = 1;
  605. } else {
  606. *data = 0;
  607. }
  608. a->xdi_mbox.status = DIVA_XDI_MBOX_BUSY;
  609. ret = 0;
  610. }
  611. break;
  612. case DIVA_XDI_UM_CMD_READ_XLOG_ENTRY:
  613. ret = diva_card_read_xlog(a);
  614. break;
  615. case DIVA_XDI_UM_CMD_READ_SDRAM:
  616. if (a->xdi_adapter.Address) {
  617. if (
  618. (a->xdi_mbox.data_length =
  619. cmd->command_data.read_sdram.length)) {
  620. if (
  621. (a->xdi_mbox.data_length +
  622. cmd->command_data.read_sdram.offset) <
  623. a->xdi_adapter.MemorySize) {
  624. a->xdi_mbox.data =
  625. diva_os_malloc(0,
  626. a->xdi_mbox.
  627. data_length);
  628. if (a->xdi_mbox.data) {
  629. byte __iomem *p = DIVA_OS_MEM_ATTACH_ADDRESS(&a->xdi_adapter);
  630. byte __iomem *src = p;
  631. byte *dst = a->xdi_mbox.data;
  632. dword len = a->xdi_mbox.data_length;
  633. src += cmd->command_data.read_sdram.offset;
  634. while (len--) {
  635. *dst++ = READ_BYTE(src++);
  636. }
  637. a->xdi_mbox.status = DIVA_XDI_MBOX_BUSY;
  638. DIVA_OS_MEM_DETACH_ADDRESS(&a->xdi_adapter, p);
  639. ret = 0;
  640. }
  641. }
  642. }
  643. }
  644. break;
  645. default:
  646. DBG_ERR(("A: A(%d) invalid cmd=%d", a->controller,
  647. cmd->command))
  648. }
  649. return (ret);
  650. }
  651. /*
  652. ** Get Serial Number
  653. */
  654. static int pri_get_serial_number(diva_os_xdi_adapter_t * a)
  655. {
  656. byte data[64];
  657. int i;
  658. dword len = sizeof(data);
  659. volatile byte __iomem *config;
  660. volatile byte __iomem *flash;
  661. byte c;
  662. /*
  663. * First set some GT6401x config registers before accessing the BOOT-ROM
  664. */
  665. config = DIVA_OS_MEM_ATTACH_CONFIG(&a->xdi_adapter);
  666. c = READ_BYTE(&config[0xc3c]);
  667. if (!(c & 0x08)) {
  668. WRITE_BYTE(&config[0xc3c], c); /* Base Address enable register */
  669. }
  670. WRITE_BYTE(&config[LOW_BOOTCS_DREG], 0x00);
  671. WRITE_BYTE(&config[HI_BOOTCS_DREG], 0xFF);
  672. DIVA_OS_MEM_DETACH_CONFIG(&a->xdi_adapter, config);
  673. /*
  674. * Read only the last 64 bytes of manufacturing data
  675. */
  676. memset(data, '\0', len);
  677. flash = DIVA_OS_MEM_ATTACH_PROM(&a->xdi_adapter);
  678. for (i = 0; i < len; i++) {
  679. data[i] = READ_BYTE(&flash[0x8000 - len + i]);
  680. }
  681. DIVA_OS_MEM_DETACH_PROM(&a->xdi_adapter, flash);
  682. config = DIVA_OS_MEM_ATTACH_CONFIG(&a->xdi_adapter);
  683. WRITE_BYTE(&config[LOW_BOOTCS_DREG], 0xFC); /* Disable FLASH EPROM access */
  684. WRITE_BYTE(&config[HI_BOOTCS_DREG], 0xFF);
  685. DIVA_OS_MEM_DETACH_CONFIG(&a->xdi_adapter, config);
  686. if (memcmp(&data[48], "DIVAserverPR", 12)) {
  687. #if !defined(DIVA_PRI_NO_PCI_BIOS_WORKAROUND) /* { */
  688. word cmd = 0, cmd_org;
  689. void *addr;
  690. dword addr1, addr3, addr4;
  691. byte Bus, Slot;
  692. void *hdev;
  693. addr4 = a->resources.pci.bar[4];
  694. addr3 = a->resources.pci.bar[3]; /* flash */
  695. addr1 = a->resources.pci.bar[1]; /* unused */
  696. DBG_ERR(("A: apply Compaq BIOS workaround"))
  697. DBG_LOG(("%02x:%02x:%02x:%02x:%02x:%02x:%02x:%02x",
  698. data[0], data[1], data[2], data[3],
  699. data[4], data[5], data[6], data[7]))
  700. Bus = a->resources.pci.bus;
  701. Slot = a->resources.pci.func;
  702. hdev = a->resources.pci.hdev;
  703. PCIread(Bus, Slot, 0x04, &cmd_org, sizeof(cmd_org), hdev);
  704. PCIwrite(Bus, Slot, 0x04, &cmd, sizeof(cmd), hdev);
  705. PCIwrite(Bus, Slot, 0x14, &addr4, sizeof(addr4), hdev);
  706. PCIwrite(Bus, Slot, 0x20, &addr1, sizeof(addr1), hdev);
  707. PCIwrite(Bus, Slot, 0x04, &cmd_org, sizeof(cmd_org), hdev);
  708. addr = a->resources.pci.addr[1];
  709. a->resources.pci.addr[1] = a->resources.pci.addr[4];
  710. a->resources.pci.addr[4] = addr;
  711. addr1 = a->resources.pci.bar[1];
  712. a->resources.pci.bar[1] = a->resources.pci.bar[4];
  713. a->resources.pci.bar[4] = addr1;
  714. /*
  715. Try to read Flash again
  716. */
  717. len = sizeof(data);
  718. config = DIVA_OS_MEM_ATTACH_CONFIG(&a->xdi_adapter);
  719. if (!(config[0xc3c] & 0x08)) {
  720. config[0xc3c] |= 0x08; /* Base Address enable register */
  721. }
  722. config[LOW_BOOTCS_DREG] = 0x00;
  723. config[HI_BOOTCS_DREG] = 0xFF;
  724. DIVA_OS_MEM_DETACH_CONFIG(&a->xdi_adapter, config);
  725. memset(data, '\0', len);
  726. flash = DIVA_OS_MEM_ATTACH_PROM(&a->xdi_adapter);
  727. for (i = 0; i < len; i++) {
  728. data[i] = flash[0x8000 - len + i];
  729. }
  730. DIVA_OS_MEM_ATTACH_PROM(&a->xdi_adapter, flash);
  731. config = DIVA_OS_MEM_ATTACH_CONFIG(&a->xdi_adapter);
  732. config[LOW_BOOTCS_DREG] = 0xFC;
  733. config[HI_BOOTCS_DREG] = 0xFF;
  734. DIVA_OS_MEM_DETACH_CONFIG(&a->xdi_adapter, config);
  735. if (memcmp(&data[48], "DIVAserverPR", 12)) {
  736. DBG_ERR(("A: failed to read serial number"))
  737. DBG_LOG(("%02x:%02x:%02x:%02x:%02x:%02x:%02x:%02x",
  738. data[0], data[1], data[2], data[3],
  739. data[4], data[5], data[6], data[7]))
  740. return (-1);
  741. }
  742. #else /* } { */
  743. DBG_ERR(("A: failed to read DIVA signature word"))
  744. DBG_LOG(("%02x:%02x:%02x:%02x:%02x:%02x:%02x:%02x",
  745. data[0], data[1], data[2], data[3],
  746. data[4], data[5], data[6], data[7]))
  747. DBG_LOG(("%02x:%02x:%02x:%02x", data[47], data[46],
  748. data[45], data[44]))
  749. #endif /* } */
  750. }
  751. a->xdi_adapter.serialNo =
  752. (data[47] << 24) | (data[46] << 16) | (data[45] << 8) |
  753. data[44];
  754. if (!a->xdi_adapter.serialNo
  755. || (a->xdi_adapter.serialNo == 0xffffffff)) {
  756. a->xdi_adapter.serialNo = 0;
  757. DBG_ERR(("A: failed to read serial number"))
  758. return (-1);
  759. }
  760. DBG_LOG(("Serial No. : %ld", a->xdi_adapter.serialNo))
  761. DBG_TRC(("Board Revision : %d.%02d", (int) data[41],
  762. (int) data[40]))
  763. DBG_TRC(("PLD revision : %d.%02d", (int) data[33],
  764. (int) data[32]))
  765. DBG_TRC(("Boot loader version : %d.%02d", (int) data[37],
  766. (int) data[36]))
  767. DBG_TRC(("Manufacturing Date : %d/%02d/%02d (yyyy/mm/dd)",
  768. (int) ((data[28] > 90) ? 1900 : 2000) +
  769. (int) data[28], (int) data[29], (int) data[30]))
  770. return (0);
  771. }
  772. void diva_os_prepare_pri2_functions(PISDN_ADAPTER IoAdapter)
  773. {
  774. }
  775. void diva_os_prepare_pri_functions(PISDN_ADAPTER IoAdapter)
  776. {
  777. }
  778. /*
  779. ** Checks presence of DSP on board
  780. */
  781. static int
  782. dsp_check_presence(volatile byte __iomem * addr, volatile byte __iomem * data, int dsp)
  783. {
  784. word pattern;
  785. WRITE_WORD(addr, 0x4000);
  786. WRITE_WORD(data, DSP_SIGNATURE_PROBE_WORD);
  787. WRITE_WORD(addr, 0x4000);
  788. pattern = READ_WORD(data);
  789. if (pattern != DSP_SIGNATURE_PROBE_WORD) {
  790. DBG_TRC(("W: DSP[%d] %04x(is) != %04x(should)",
  791. dsp, pattern, DSP_SIGNATURE_PROBE_WORD))
  792. return (-1);
  793. }
  794. WRITE_WORD(addr, 0x4000);
  795. WRITE_WORD(data, ~DSP_SIGNATURE_PROBE_WORD);
  796. WRITE_WORD(addr, 0x4000);
  797. pattern = READ_WORD(data);
  798. if (pattern != (word) ~ DSP_SIGNATURE_PROBE_WORD) {
  799. DBG_ERR(("A: DSP[%d] %04x(is) != %04x(should)",
  800. dsp, pattern, (word) ~ DSP_SIGNATURE_PROBE_WORD))
  801. return (-2);
  802. }
  803. DBG_TRC(("DSP[%d] present", dsp))
  804. return (0);
  805. }
  806. /*
  807. ** Check if DSP's are present and operating
  808. ** Information about detected DSP's is returned as bit mask
  809. ** Bit 0 - DSP1
  810. ** ...
  811. ** ...
  812. ** ...
  813. ** Bit 29 - DSP30
  814. */
  815. static dword diva_pri_detect_dsps(diva_os_xdi_adapter_t * a)
  816. {
  817. byte __iomem *base;
  818. byte __iomem *p;
  819. dword ret = 0;
  820. dword row_offset[7] = {
  821. 0x00000000,
  822. 0x00000800, /* 1 - ROW 1 */
  823. 0x00000840, /* 2 - ROW 2 */
  824. 0x00001000, /* 3 - ROW 3 */
  825. 0x00001040, /* 4 - ROW 4 */
  826. 0x00000000 /* 5 - ROW 0 */
  827. };
  828. byte __iomem *dsp_addr_port;
  829. byte __iomem *dsp_data_port;
  830. byte row_state;
  831. int dsp_row = 0, dsp_index, dsp_num;
  832. if (!a->xdi_adapter.Control || !a->xdi_adapter.reset) {
  833. return (0);
  834. }
  835. p = DIVA_OS_MEM_ATTACH_RESET(&a->xdi_adapter);
  836. WRITE_BYTE(p, _MP_RISC_RESET | _MP_DSP_RESET);
  837. DIVA_OS_MEM_DETACH_RESET(&a->xdi_adapter, p);
  838. diva_os_wait(5);
  839. base = DIVA_OS_MEM_ATTACH_CONTROL(&a->xdi_adapter);
  840. for (dsp_num = 0; dsp_num < 30; dsp_num++) {
  841. dsp_row = dsp_num / 7 + 1;
  842. dsp_index = dsp_num % 7;
  843. dsp_data_port = base;
  844. dsp_addr_port = base;
  845. dsp_data_port += row_offset[dsp_row];
  846. dsp_addr_port += row_offset[dsp_row];
  847. dsp_data_port += (dsp_index * 8);
  848. dsp_addr_port += (dsp_index * 8) + 0x80;
  849. if (!dsp_check_presence
  850. (dsp_addr_port, dsp_data_port, dsp_num + 1)) {
  851. ret |= (1 << dsp_num);
  852. }
  853. }
  854. DIVA_OS_MEM_DETACH_CONTROL(&a->xdi_adapter, base);
  855. p = DIVA_OS_MEM_ATTACH_RESET(&a->xdi_adapter);
  856. WRITE_BYTE(p, _MP_RISC_RESET | _MP_LED1 | _MP_LED2);
  857. DIVA_OS_MEM_DETACH_RESET(&a->xdi_adapter, p);
  858. diva_os_wait(5);
  859. /*
  860. Verify modules
  861. */
  862. for (dsp_row = 0; dsp_row < 4; dsp_row++) {
  863. row_state = ((ret >> (dsp_row * 7)) & 0x7F);
  864. if (row_state && (row_state != 0x7F)) {
  865. for (dsp_index = 0; dsp_index < 7; dsp_index++) {
  866. if (!(row_state & (1 << dsp_index))) {
  867. DBG_ERR(("A: MODULE[%d]-DSP[%d] failed",
  868. dsp_row + 1,
  869. dsp_index + 1))
  870. }
  871. }
  872. }
  873. }
  874. if (!(ret & 0x10000000)) {
  875. DBG_ERR(("A: ON BOARD-DSP[1] failed"))
  876. }
  877. if (!(ret & 0x20000000)) {
  878. DBG_ERR(("A: ON BOARD-DSP[2] failed"))
  879. }
  880. /*
  881. Print module population now
  882. */
  883. DBG_LOG(("+-----------------------+"))
  884. DBG_LOG(("| DSP MODULE POPULATION |"))
  885. DBG_LOG(("+-----------------------+"))
  886. DBG_LOG(("| 1 | 2 | 3 | 4 |"))
  887. DBG_LOG(("+-----------------------+"))
  888. DBG_LOG(("| %s | %s | %s | %s |",
  889. ((ret >> (0 * 7)) & 0x7F) ? "Y" : "N",
  890. ((ret >> (1 * 7)) & 0x7F) ? "Y" : "N",
  891. ((ret >> (2 * 7)) & 0x7F) ? "Y" : "N",
  892. ((ret >> (3 * 7)) & 0x7F) ? "Y" : "N"))
  893. DBG_LOG(("+-----------------------+"))
  894. DBG_LOG(("DSP's(present-absent):%08x-%08x", ret,
  895. ~ret & 0x3fffffff))
  896. return (ret);
  897. }