os_bri.c 20 KB

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  1. /* $Id: os_bri.c,v 1.21 2004/03/21 17:26:01 armin Exp $ */
  2. #include "platform.h"
  3. #include "debuglib.h"
  4. #include "cardtype.h"
  5. #include "pc.h"
  6. #include "pr_pc.h"
  7. #include "di_defs.h"
  8. #include "dsp_defs.h"
  9. #include "di.h"
  10. #include "io.h"
  11. #include "xdi_msg.h"
  12. #include "xdi_adapter.h"
  13. #include "os_bri.h"
  14. #include "diva_pci.h"
  15. #include "mi_pc.h"
  16. #include "pc_maint.h"
  17. /*
  18. ** IMPORTS
  19. */
  20. extern void prepare_maestra_functions(PISDN_ADAPTER IoAdapter);
  21. extern void diva_xdi_display_adapter_features(int card);
  22. extern int diva_card_read_xlog(diva_os_xdi_adapter_t * a);
  23. /*
  24. ** LOCALS
  25. */
  26. static int bri_bar_length[3] = {
  27. 0x80,
  28. 0x80,
  29. 0x20
  30. };
  31. static int diva_bri_cleanup_adapter(diva_os_xdi_adapter_t * a);
  32. static dword diva_bri_get_serial_number(diva_os_xdi_adapter_t * a);
  33. static int diva_bri_cmd_card_proc(struct _diva_os_xdi_adapter *a,
  34. diva_xdi_um_cfg_cmd_t * cmd, int length);
  35. static int diva_bri_reregister_io(diva_os_xdi_adapter_t * a);
  36. static int diva_bri_reset_adapter(PISDN_ADAPTER IoAdapter);
  37. static int diva_bri_write_sdram_block(PISDN_ADAPTER IoAdapter,
  38. dword address,
  39. const byte * data, dword length);
  40. static int diva_bri_start_adapter(PISDN_ADAPTER IoAdapter,
  41. dword start_address, dword features);
  42. static int diva_bri_stop_adapter(diva_os_xdi_adapter_t * a);
  43. static void diva_bri_set_addresses(diva_os_xdi_adapter_t * a)
  44. {
  45. a->resources.pci.mem_type_id[MEM_TYPE_RAM] = 0;
  46. a->resources.pci.mem_type_id[MEM_TYPE_CFG] = 1;
  47. a->resources.pci.mem_type_id[MEM_TYPE_ADDRESS] = 2;
  48. a->resources.pci.mem_type_id[MEM_TYPE_RESET] = 1;
  49. a->resources.pci.mem_type_id[MEM_TYPE_PORT] = 2;
  50. a->resources.pci.mem_type_id[MEM_TYPE_CTLREG] = 2;
  51. a->xdi_adapter.ram = a->resources.pci.addr[0];
  52. a->xdi_adapter.cfg = a->resources.pci.addr[1];
  53. a->xdi_adapter.Address = a->resources.pci.addr[2];
  54. a->xdi_adapter.reset = a->xdi_adapter.cfg;
  55. a->xdi_adapter.port = a->xdi_adapter.Address;
  56. a->xdi_adapter.ctlReg = a->xdi_adapter.port + M_PCI_RESET;
  57. a->xdi_adapter.reset += 0x4C; /* PLX 9050 !! */
  58. }
  59. /*
  60. ** BAR0 - MEM Addr - 0x80 - NOT USED
  61. ** BAR1 - I/O Addr - 0x80
  62. ** BAR2 - I/O Addr - 0x20
  63. */
  64. int diva_bri_init_card(diva_os_xdi_adapter_t * a)
  65. {
  66. int bar;
  67. dword bar2 = 0, bar2_length = 0xffffffff;
  68. word cmd = 0, cmd_org;
  69. byte Bus, Slot;
  70. void *hdev;
  71. byte __iomem *p;
  72. /*
  73. Set properties
  74. */
  75. a->xdi_adapter.Properties = CardProperties[a->CardOrdinal];
  76. DBG_LOG(("Load %s", a->xdi_adapter.Properties.Name))
  77. /*
  78. Get resources
  79. */
  80. for (bar = 0; bar < 3; bar++) {
  81. a->resources.pci.bar[bar] =
  82. divasa_get_pci_bar(a->resources.pci.bus,
  83. a->resources.pci.func, bar,
  84. a->resources.pci.hdev);
  85. if (!a->resources.pci.bar[bar]) {
  86. DBG_ERR(("A: can't get BAR[%d]", bar))
  87. return (-1);
  88. }
  89. }
  90. a->resources.pci.irq =
  91. (byte) divasa_get_pci_irq(a->resources.pci.bus,
  92. a->resources.pci.func,
  93. a->resources.pci.hdev);
  94. if (!a->resources.pci.irq) {
  95. DBG_ERR(("A: invalid irq"));
  96. return (-1);
  97. }
  98. /*
  99. Get length of I/O bar 2 - it is different by older
  100. EEPROM version
  101. */
  102. Bus = a->resources.pci.bus;
  103. Slot = a->resources.pci.func;
  104. hdev = a->resources.pci.hdev;
  105. /*
  106. Get plain original values of the BAR2 CDM registers
  107. */
  108. PCIread(Bus, Slot, 0x18, &bar2, sizeof(bar2), hdev);
  109. PCIread(Bus, Slot, 0x04, &cmd_org, sizeof(cmd_org), hdev);
  110. /*
  111. Disable device and get BAR2 length
  112. */
  113. PCIwrite(Bus, Slot, 0x04, &cmd, sizeof(cmd), hdev);
  114. PCIwrite(Bus, Slot, 0x18, &bar2_length, sizeof(bar2_length), hdev);
  115. PCIread(Bus, Slot, 0x18, &bar2_length, sizeof(bar2_length), hdev);
  116. /*
  117. Restore BAR2 and CMD registers
  118. */
  119. PCIwrite(Bus, Slot, 0x18, &bar2, sizeof(bar2), hdev);
  120. PCIwrite(Bus, Slot, 0x04, &cmd_org, sizeof(cmd_org), hdev);
  121. /*
  122. Calculate BAR2 length
  123. */
  124. bar2_length = (~(bar2_length & ~7)) + 1;
  125. DBG_LOG(("BAR[2] length=%lx", bar2_length))
  126. /*
  127. Map and register resources
  128. */
  129. if (!(a->resources.pci.addr[0] =
  130. divasa_remap_pci_bar(a, 0, a->resources.pci.bar[0],
  131. bri_bar_length[0]))) {
  132. DBG_ERR(("A: BRI, can't map BAR[0]"))
  133. diva_bri_cleanup_adapter(a);
  134. return (-1);
  135. }
  136. sprintf(&a->port_name[0], "BRI %02x:%02x",
  137. a->resources.pci.bus, a->resources.pci.func);
  138. if (diva_os_register_io_port(a, 1, a->resources.pci.bar[1],
  139. bri_bar_length[1], &a->port_name[0], 1)) {
  140. DBG_ERR(("A: BRI, can't register BAR[1]"))
  141. diva_bri_cleanup_adapter(a);
  142. return (-1);
  143. }
  144. a->resources.pci.addr[1] = (void *) (unsigned long) a->resources.pci.bar[1];
  145. a->resources.pci.length[1] = bri_bar_length[1];
  146. if (diva_os_register_io_port(a, 1, a->resources.pci.bar[2],
  147. bar2_length, &a->port_name[0], 2)) {
  148. DBG_ERR(("A: BRI, can't register BAR[2]"))
  149. diva_bri_cleanup_adapter(a);
  150. return (-1);
  151. }
  152. a->resources.pci.addr[2] = (void *) (unsigned long) a->resources.pci.bar[2];
  153. a->resources.pci.length[2] = bar2_length;
  154. /*
  155. Set all memory areas
  156. */
  157. diva_bri_set_addresses(a);
  158. /*
  159. Get Serial Number
  160. */
  161. a->xdi_adapter.serialNo = diva_bri_get_serial_number(a);
  162. /*
  163. Register I/O ports with correct name now
  164. */
  165. if (diva_bri_reregister_io(a)) {
  166. diva_bri_cleanup_adapter(a);
  167. return (-1);
  168. }
  169. /*
  170. Initialize OS dependent objects
  171. */
  172. if (diva_os_initialize_spin_lock
  173. (&a->xdi_adapter.isr_spin_lock, "isr")) {
  174. diva_bri_cleanup_adapter(a);
  175. return (-1);
  176. }
  177. if (diva_os_initialize_spin_lock
  178. (&a->xdi_adapter.data_spin_lock, "data")) {
  179. diva_bri_cleanup_adapter(a);
  180. return (-1);
  181. }
  182. strcpy(a->xdi_adapter.req_soft_isr.dpc_thread_name, "kdivasbrid");
  183. if (diva_os_initialize_soft_isr(&a->xdi_adapter.req_soft_isr,
  184. DIDpcRoutine, &a->xdi_adapter)) {
  185. diva_bri_cleanup_adapter(a);
  186. return (-1);
  187. }
  188. /*
  189. Do not initialize second DPC - only one thread will be created
  190. */
  191. a->xdi_adapter.isr_soft_isr.object = a->xdi_adapter.req_soft_isr.object;
  192. /*
  193. Create entity table
  194. */
  195. a->xdi_adapter.Channels = CardProperties[a->CardOrdinal].Channels;
  196. a->xdi_adapter.e_max = CardProperties[a->CardOrdinal].E_info;
  197. a->xdi_adapter.e_tbl = diva_os_malloc(0, a->xdi_adapter.e_max * sizeof(E_INFO));
  198. if (!a->xdi_adapter.e_tbl) {
  199. diva_bri_cleanup_adapter(a);
  200. return (-1);
  201. }
  202. memset(a->xdi_adapter.e_tbl, 0x00, a->xdi_adapter.e_max * sizeof(E_INFO));
  203. /*
  204. Set up interface
  205. */
  206. a->xdi_adapter.a.io = &a->xdi_adapter;
  207. a->xdi_adapter.DIRequest = request;
  208. a->interface.cleanup_adapter_proc = diva_bri_cleanup_adapter;
  209. a->interface.cmd_proc = diva_bri_cmd_card_proc;
  210. p = DIVA_OS_MEM_ATTACH_RESET(&a->xdi_adapter);
  211. outpp(p, 0x41);
  212. DIVA_OS_MEM_DETACH_RESET(&a->xdi_adapter, p);
  213. prepare_maestra_functions(&a->xdi_adapter);
  214. a->dsp_mask = 0x00000003;
  215. /*
  216. Set IRQ handler
  217. */
  218. a->xdi_adapter.irq_info.irq_nr = a->resources.pci.irq;
  219. sprintf(a->xdi_adapter.irq_info.irq_name, "DIVA BRI %ld",
  220. (long) a->xdi_adapter.serialNo);
  221. if (diva_os_register_irq(a, a->xdi_adapter.irq_info.irq_nr,
  222. a->xdi_adapter.irq_info.irq_name)) {
  223. diva_bri_cleanup_adapter(a);
  224. return (-1);
  225. }
  226. a->xdi_adapter.irq_info.registered = 1;
  227. diva_log_info("%s IRQ:%d SerNo:%d", a->xdi_adapter.Properties.Name,
  228. a->resources.pci.irq, a->xdi_adapter.serialNo);
  229. return (0);
  230. }
  231. static int diva_bri_cleanup_adapter(diva_os_xdi_adapter_t * a)
  232. {
  233. int i;
  234. if (a->xdi_adapter.Initialized) {
  235. diva_bri_stop_adapter(a);
  236. }
  237. /*
  238. Remove ISR Handler
  239. */
  240. if (a->xdi_adapter.irq_info.registered) {
  241. diva_os_remove_irq(a, a->xdi_adapter.irq_info.irq_nr);
  242. }
  243. a->xdi_adapter.irq_info.registered = 0;
  244. if (a->resources.pci.addr[0] && a->resources.pci.bar[0]) {
  245. divasa_unmap_pci_bar(a->resources.pci.addr[0]);
  246. a->resources.pci.addr[0] = NULL;
  247. a->resources.pci.bar[0] = 0;
  248. }
  249. for (i = 1; i < 3; i++) {
  250. if (a->resources.pci.addr[i] && a->resources.pci.bar[i]) {
  251. diva_os_register_io_port(a, 0,
  252. a->resources.pci.bar[i],
  253. a->resources.pci.
  254. length[i],
  255. &a->port_name[0], i);
  256. a->resources.pci.addr[i] = NULL;
  257. a->resources.pci.bar[i] = 0;
  258. }
  259. }
  260. /*
  261. Free OS objects
  262. */
  263. diva_os_cancel_soft_isr(&a->xdi_adapter.req_soft_isr);
  264. diva_os_cancel_soft_isr(&a->xdi_adapter.isr_soft_isr);
  265. diva_os_remove_soft_isr(&a->xdi_adapter.req_soft_isr);
  266. a->xdi_adapter.isr_soft_isr.object = NULL;
  267. diva_os_destroy_spin_lock(&a->xdi_adapter.isr_spin_lock, "rm");
  268. diva_os_destroy_spin_lock(&a->xdi_adapter.data_spin_lock, "rm");
  269. /*
  270. Free memory
  271. */
  272. if (a->xdi_adapter.e_tbl) {
  273. diva_os_free(0, a->xdi_adapter.e_tbl);
  274. a->xdi_adapter.e_tbl = NULL;
  275. }
  276. return (0);
  277. }
  278. void diva_os_prepare_maestra_functions(PISDN_ADAPTER IoAdapter)
  279. {
  280. }
  281. /*
  282. ** Get serial number
  283. */
  284. static dword diva_bri_get_serial_number(diva_os_xdi_adapter_t * a)
  285. {
  286. dword serNo = 0;
  287. byte __iomem *confIO;
  288. word serHi, serLo;
  289. word __iomem *confMem;
  290. confIO = DIVA_OS_MEM_ATTACH_CFG(&a->xdi_adapter);
  291. serHi = (word) (inppw(&confIO[0x22]) & 0x0FFF);
  292. serLo = (word) (inppw(&confIO[0x26]) & 0x0FFF);
  293. serNo = ((dword) serHi << 16) | (dword) serLo;
  294. DIVA_OS_MEM_DETACH_CFG(&a->xdi_adapter, confIO);
  295. if ((serNo == 0) || (serNo == 0xFFFFFFFF)) {
  296. DBG_FTL(("W: BRI use BAR[0] to get card serial number"))
  297. confMem = (word __iomem *)DIVA_OS_MEM_ATTACH_RAM(&a->xdi_adapter);
  298. serHi = (word) (READ_WORD(&confMem[0x11]) & 0x0FFF);
  299. serLo = (word) (READ_WORD(&confMem[0x13]) & 0x0FFF);
  300. serNo = (((dword) serHi) << 16) | ((dword) serLo);
  301. DIVA_OS_MEM_DETACH_RAM(&a->xdi_adapter, confMem);
  302. }
  303. DBG_LOG(("Serial Number=%ld", serNo))
  304. return (serNo);
  305. }
  306. /*
  307. ** Unregister I/O and register it with new name,
  308. ** based on Serial Number
  309. */
  310. static int diva_bri_reregister_io(diva_os_xdi_adapter_t * a)
  311. {
  312. int i;
  313. for (i = 1; i < 3; i++) {
  314. diva_os_register_io_port(a, 0, a->resources.pci.bar[i],
  315. a->resources.pci.length[i],
  316. &a->port_name[0], i);
  317. a->resources.pci.addr[i] = NULL;
  318. }
  319. sprintf(a->port_name, "DIVA BRI %ld",
  320. (long) a->xdi_adapter.serialNo);
  321. for (i = 1; i < 3; i++) {
  322. if (diva_os_register_io_port(a, 1, a->resources.pci.bar[i],
  323. a->resources.pci.length[i],
  324. &a->port_name[0], i)) {
  325. DBG_ERR(("A: failed to reregister BAR[%d]", i))
  326. return (-1);
  327. }
  328. a->resources.pci.addr[i] =
  329. (void *) (unsigned long) a->resources.pci.bar[i];
  330. }
  331. return (0);
  332. }
  333. /*
  334. ** Process command from user mode
  335. */
  336. static int
  337. diva_bri_cmd_card_proc(struct _diva_os_xdi_adapter *a,
  338. diva_xdi_um_cfg_cmd_t * cmd, int length)
  339. {
  340. int ret = -1;
  341. if (cmd->adapter != a->controller) {
  342. DBG_ERR(("A: pri_cmd, invalid controller=%d != %d",
  343. cmd->adapter, a->controller))
  344. return (-1);
  345. }
  346. switch (cmd->command) {
  347. case DIVA_XDI_UM_CMD_GET_CARD_ORDINAL:
  348. a->xdi_mbox.data_length = sizeof(dword);
  349. a->xdi_mbox.data =
  350. diva_os_malloc(0, a->xdi_mbox.data_length);
  351. if (a->xdi_mbox.data) {
  352. *(dword *) a->xdi_mbox.data =
  353. (dword) a->CardOrdinal;
  354. a->xdi_mbox.status = DIVA_XDI_MBOX_BUSY;
  355. ret = 0;
  356. }
  357. break;
  358. case DIVA_XDI_UM_CMD_GET_SERIAL_NR:
  359. a->xdi_mbox.data_length = sizeof(dword);
  360. a->xdi_mbox.data =
  361. diva_os_malloc(0, a->xdi_mbox.data_length);
  362. if (a->xdi_mbox.data) {
  363. *(dword *) a->xdi_mbox.data =
  364. (dword) a->xdi_adapter.serialNo;
  365. a->xdi_mbox.status = DIVA_XDI_MBOX_BUSY;
  366. ret = 0;
  367. }
  368. break;
  369. case DIVA_XDI_UM_CMD_GET_PCI_HW_CONFIG:
  370. a->xdi_mbox.data_length = sizeof(dword) * 9;
  371. a->xdi_mbox.data =
  372. diva_os_malloc(0, a->xdi_mbox.data_length);
  373. if (a->xdi_mbox.data) {
  374. int i;
  375. dword *data = (dword *) a->xdi_mbox.data;
  376. for (i = 0; i < 8; i++) {
  377. *data++ = a->resources.pci.bar[i];
  378. }
  379. *data++ = (dword) a->resources.pci.irq;
  380. a->xdi_mbox.status = DIVA_XDI_MBOX_BUSY;
  381. ret = 0;
  382. }
  383. break;
  384. case DIVA_XDI_UM_CMD_GET_CARD_STATE:
  385. a->xdi_mbox.data_length = sizeof(dword);
  386. a->xdi_mbox.data =
  387. diva_os_malloc(0, a->xdi_mbox.data_length);
  388. if (a->xdi_mbox.data) {
  389. dword *data = (dword *) a->xdi_mbox.data;
  390. if (!a->xdi_adapter.port) {
  391. *data = 3;
  392. } else if (a->xdi_adapter.trapped) {
  393. *data = 2;
  394. } else if (a->xdi_adapter.Initialized) {
  395. *data = 1;
  396. } else {
  397. *data = 0;
  398. }
  399. a->xdi_mbox.status = DIVA_XDI_MBOX_BUSY;
  400. ret = 0;
  401. }
  402. break;
  403. case DIVA_XDI_UM_CMD_RESET_ADAPTER:
  404. ret = diva_bri_reset_adapter(&a->xdi_adapter);
  405. break;
  406. case DIVA_XDI_UM_CMD_WRITE_SDRAM_BLOCK:
  407. ret = diva_bri_write_sdram_block(&a->xdi_adapter,
  408. cmd->command_data.
  409. write_sdram.offset,
  410. (byte *) & cmd[1],
  411. cmd->command_data.
  412. write_sdram.length);
  413. break;
  414. case DIVA_XDI_UM_CMD_START_ADAPTER:
  415. ret = diva_bri_start_adapter(&a->xdi_adapter,
  416. cmd->command_data.start.
  417. offset,
  418. cmd->command_data.start.
  419. features);
  420. break;
  421. case DIVA_XDI_UM_CMD_SET_PROTOCOL_FEATURES:
  422. a->xdi_adapter.features =
  423. cmd->command_data.features.features;
  424. a->xdi_adapter.a.protocol_capabilities =
  425. a->xdi_adapter.features;
  426. DBG_TRC(
  427. ("Set raw protocol features (%08x)",
  428. a->xdi_adapter.features)) ret = 0;
  429. break;
  430. case DIVA_XDI_UM_CMD_STOP_ADAPTER:
  431. ret = diva_bri_stop_adapter(a);
  432. break;
  433. case DIVA_XDI_UM_CMD_READ_XLOG_ENTRY:
  434. ret = diva_card_read_xlog(a);
  435. break;
  436. default:
  437. DBG_ERR(
  438. ("A: A(%d) invalid cmd=%d", a->controller,
  439. cmd->command))}
  440. return (ret);
  441. }
  442. static int diva_bri_reset_adapter(PISDN_ADAPTER IoAdapter)
  443. {
  444. byte __iomem *addrHi, *addrLo, *ioaddr;
  445. dword i;
  446. byte __iomem *Port;
  447. if (!IoAdapter->port) {
  448. return (-1);
  449. }
  450. if (IoAdapter->Initialized) {
  451. DBG_ERR(("A: A(%d) can't reset BRI adapter - please stop first",
  452. IoAdapter->ANum)) return (-1);
  453. }
  454. (*(IoAdapter->rstFnc)) (IoAdapter);
  455. diva_os_wait(100);
  456. Port = DIVA_OS_MEM_ATTACH_PORT(IoAdapter);
  457. addrHi = Port +
  458. ((IoAdapter->Properties.Bus == BUS_PCI) ? M_PCI_ADDRH : ADDRH);
  459. addrLo = Port + ADDR;
  460. ioaddr = Port + DATA;
  461. /*
  462. recover
  463. */
  464. outpp(addrHi, (byte) 0);
  465. outppw(addrLo, (word) 0);
  466. outppw(ioaddr, (word) 0);
  467. /*
  468. clear shared memory
  469. */
  470. outpp(addrHi,
  471. (byte) (
  472. (IoAdapter->MemoryBase + IoAdapter->MemorySize -
  473. BRI_SHARED_RAM_SIZE) >> 16));
  474. outppw(addrLo, 0);
  475. for (i = 0; i < 0x8000; outppw(ioaddr, 0), ++i);
  476. diva_os_wait(100);
  477. /*
  478. clear signature
  479. */
  480. outpp(addrHi,
  481. (byte) (
  482. (IoAdapter->MemoryBase + IoAdapter->MemorySize -
  483. BRI_SHARED_RAM_SIZE) >> 16));
  484. outppw(addrLo, 0x1e);
  485. outpp(ioaddr, 0);
  486. outpp(ioaddr, 0);
  487. outpp(addrHi, (byte) 0);
  488. outppw(addrLo, (word) 0);
  489. outppw(ioaddr, (word) 0);
  490. DIVA_OS_MEM_DETACH_PORT(IoAdapter, Port);
  491. /*
  492. Forget all outstanding entities
  493. */
  494. IoAdapter->e_count = 0;
  495. if (IoAdapter->e_tbl) {
  496. memset(IoAdapter->e_tbl, 0x00,
  497. IoAdapter->e_max * sizeof(E_INFO));
  498. }
  499. IoAdapter->head = 0;
  500. IoAdapter->tail = 0;
  501. IoAdapter->assign = 0;
  502. IoAdapter->trapped = 0;
  503. memset(&IoAdapter->a.IdTable[0], 0x00,
  504. sizeof(IoAdapter->a.IdTable));
  505. memset(&IoAdapter->a.IdTypeTable[0], 0x00,
  506. sizeof(IoAdapter->a.IdTypeTable));
  507. memset(&IoAdapter->a.FlowControlIdTable[0], 0x00,
  508. sizeof(IoAdapter->a.FlowControlIdTable));
  509. memset(&IoAdapter->a.FlowControlSkipTable[0], 0x00,
  510. sizeof(IoAdapter->a.FlowControlSkipTable));
  511. memset(&IoAdapter->a.misc_flags_table[0], 0x00,
  512. sizeof(IoAdapter->a.misc_flags_table));
  513. memset(&IoAdapter->a.rx_stream[0], 0x00,
  514. sizeof(IoAdapter->a.rx_stream));
  515. memset(&IoAdapter->a.tx_stream[0], 0x00,
  516. sizeof(IoAdapter->a.tx_stream));
  517. memset(&IoAdapter->a.tx_pos[0], 0x00, sizeof(IoAdapter->a.tx_pos));
  518. memset(&IoAdapter->a.rx_pos[0], 0x00, sizeof(IoAdapter->a.rx_pos));
  519. return (0);
  520. }
  521. static int
  522. diva_bri_write_sdram_block(PISDN_ADAPTER IoAdapter,
  523. dword address, const byte * data, dword length)
  524. {
  525. byte __iomem *addrHi, *addrLo, *ioaddr;
  526. byte __iomem *Port;
  527. if (!IoAdapter->port) {
  528. return (-1);
  529. }
  530. Port = DIVA_OS_MEM_ATTACH_PORT(IoAdapter);
  531. addrHi = Port +
  532. ((IoAdapter->Properties.Bus == BUS_PCI) ? M_PCI_ADDRH : ADDRH);
  533. addrLo = Port + ADDR;
  534. ioaddr = Port + DATA;
  535. while (length--) {
  536. outpp(addrHi, (word) (address >> 16));
  537. outppw(addrLo, (word) (address & 0x0000ffff));
  538. outpp(ioaddr, *data++);
  539. address++;
  540. }
  541. DIVA_OS_MEM_DETACH_PORT(IoAdapter, Port);
  542. return (0);
  543. }
  544. static int
  545. diva_bri_start_adapter(PISDN_ADAPTER IoAdapter,
  546. dword start_address, dword features)
  547. {
  548. byte __iomem *Port;
  549. dword i, test;
  550. byte __iomem *addrHi, *addrLo, *ioaddr;
  551. int started = 0;
  552. ADAPTER *a = &IoAdapter->a;
  553. if (IoAdapter->Initialized) {
  554. DBG_ERR(
  555. ("A: A(%d) bri_start_adapter, adapter already running",
  556. IoAdapter->ANum)) return (-1);
  557. }
  558. if (!IoAdapter->port) {
  559. DBG_ERR(("A: A(%d) bri_start_adapter, adapter not mapped",
  560. IoAdapter->ANum)) return (-1);
  561. }
  562. sprintf(IoAdapter->Name, "A(%d)", (int) IoAdapter->ANum);
  563. DBG_LOG(("A(%d) start BRI", IoAdapter->ANum))
  564. Port = DIVA_OS_MEM_ATTACH_PORT(IoAdapter);
  565. addrHi = Port +
  566. ((IoAdapter->Properties.Bus == BUS_PCI) ? M_PCI_ADDRH : ADDRH);
  567. addrLo = Port + ADDR;
  568. ioaddr = Port + DATA;
  569. outpp(addrHi,
  570. (byte) (
  571. (IoAdapter->MemoryBase + IoAdapter->MemorySize -
  572. BRI_SHARED_RAM_SIZE) >> 16));
  573. outppw(addrLo, 0x1e);
  574. outppw(ioaddr, 0x00);
  575. DIVA_OS_MEM_DETACH_PORT(IoAdapter, Port);
  576. /*
  577. start the protocol code
  578. */
  579. Port = DIVA_OS_MEM_ATTACH_CTLREG(IoAdapter);
  580. outpp(Port, 0x08);
  581. DIVA_OS_MEM_DETACH_CTLREG(IoAdapter, Port);
  582. Port = DIVA_OS_MEM_ATTACH_PORT(IoAdapter);
  583. addrHi = Port +
  584. ((IoAdapter->Properties.Bus == BUS_PCI) ? M_PCI_ADDRH : ADDRH);
  585. addrLo = Port + ADDR;
  586. ioaddr = Port + DATA;
  587. /*
  588. wait for signature (max. 3 seconds)
  589. */
  590. for (i = 0; i < 300; ++i) {
  591. diva_os_wait(10);
  592. outpp(addrHi,
  593. (byte) (
  594. (IoAdapter->MemoryBase +
  595. IoAdapter->MemorySize -
  596. BRI_SHARED_RAM_SIZE) >> 16));
  597. outppw(addrLo, 0x1e);
  598. test = (dword) inppw(ioaddr);
  599. if (test == 0x4447) {
  600. DBG_LOG(
  601. ("Protocol startup time %d.%02d seconds",
  602. (i / 100), (i % 100)))
  603. started = 1;
  604. break;
  605. }
  606. }
  607. DIVA_OS_MEM_DETACH_PORT(IoAdapter, Port);
  608. if (!started) {
  609. DBG_FTL(("A: A(%d) %s: Adapter selftest failed 0x%04X",
  610. IoAdapter->ANum, IoAdapter->Properties.Name,
  611. test))
  612. (*(IoAdapter->trapFnc)) (IoAdapter);
  613. return (-1);
  614. }
  615. IoAdapter->Initialized = 1;
  616. /*
  617. Check Interrupt
  618. */
  619. IoAdapter->IrqCount = 0;
  620. a->ReadyInt = 1;
  621. if (IoAdapter->reset) {
  622. Port = DIVA_OS_MEM_ATTACH_RESET(IoAdapter);
  623. outpp(Port, 0x41);
  624. DIVA_OS_MEM_DETACH_RESET(IoAdapter, Port);
  625. }
  626. a->ram_out(a, &PR_RAM->ReadyInt, 1);
  627. for (i = 0; ((!IoAdapter->IrqCount) && (i < 100)); i++) {
  628. diva_os_wait(10);
  629. }
  630. if (!IoAdapter->IrqCount) {
  631. DBG_ERR(
  632. ("A: A(%d) interrupt test failed",
  633. IoAdapter->ANum))
  634. IoAdapter->Initialized = 0;
  635. IoAdapter->stop(IoAdapter);
  636. return (-1);
  637. }
  638. IoAdapter->Properties.Features = (word) features;
  639. diva_xdi_display_adapter_features(IoAdapter->ANum);
  640. DBG_LOG(("A(%d) BRI adapter successfull started", IoAdapter->ANum))
  641. /*
  642. Register with DIDD
  643. */
  644. diva_xdi_didd_register_adapter(IoAdapter->ANum);
  645. return (0);
  646. }
  647. static void diva_bri_clear_interrupts(diva_os_xdi_adapter_t * a)
  648. {
  649. PISDN_ADAPTER IoAdapter = &a->xdi_adapter;
  650. /*
  651. clear any pending interrupt
  652. */
  653. IoAdapter->disIrq(IoAdapter);
  654. IoAdapter->tst_irq(&IoAdapter->a);
  655. IoAdapter->clr_irq(&IoAdapter->a);
  656. IoAdapter->tst_irq(&IoAdapter->a);
  657. /*
  658. kill pending dpcs
  659. */
  660. diva_os_cancel_soft_isr(&IoAdapter->req_soft_isr);
  661. diva_os_cancel_soft_isr(&IoAdapter->isr_soft_isr);
  662. }
  663. /*
  664. ** Stop card
  665. */
  666. static int diva_bri_stop_adapter(diva_os_xdi_adapter_t * a)
  667. {
  668. PISDN_ADAPTER IoAdapter = &a->xdi_adapter;
  669. int i = 100;
  670. if (!IoAdapter->port) {
  671. return (-1);
  672. }
  673. if (!IoAdapter->Initialized) {
  674. DBG_ERR(("A: A(%d) can't stop BRI adapter - not running",
  675. IoAdapter->ANum))
  676. return (-1); /* nothing to stop */
  677. }
  678. IoAdapter->Initialized = 0;
  679. /*
  680. Disconnect Adapter from DIDD
  681. */
  682. diva_xdi_didd_remove_adapter(IoAdapter->ANum);
  683. /*
  684. Stop interrupts
  685. */
  686. a->clear_interrupts_proc = diva_bri_clear_interrupts;
  687. IoAdapter->a.ReadyInt = 1;
  688. IoAdapter->a.ram_inc(&IoAdapter->a, &PR_RAM->ReadyInt);
  689. do {
  690. diva_os_sleep(10);
  691. } while (i-- && a->clear_interrupts_proc);
  692. if (a->clear_interrupts_proc) {
  693. diva_bri_clear_interrupts(a);
  694. a->clear_interrupts_proc = NULL;
  695. DBG_ERR(("A: A(%d) no final interrupt from BRI adapter",
  696. IoAdapter->ANum))
  697. }
  698. IoAdapter->a.ReadyInt = 0;
  699. /*
  700. Stop and reset adapter
  701. */
  702. IoAdapter->stop(IoAdapter);
  703. return (0);
  704. }