mthca_provider.c 20 KB

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  1. /*
  2. * Copyright (c) 2004, 2005 Topspin Communications. All rights reserved.
  3. * Copyright (c) 2005 Sun Microsystems, Inc. All rights reserved.
  4. *
  5. * This software is available to you under a choice of one of two
  6. * licenses. You may choose to be licensed under the terms of the GNU
  7. * General Public License (GPL) Version 2, available from the file
  8. * COPYING in the main directory of this source tree, or the
  9. * OpenIB.org BSD license below:
  10. *
  11. * Redistribution and use in source and binary forms, with or
  12. * without modification, are permitted provided that the following
  13. * conditions are met:
  14. *
  15. * - Redistributions of source code must retain the above
  16. * copyright notice, this list of conditions and the following
  17. * disclaimer.
  18. *
  19. * - Redistributions in binary form must reproduce the above
  20. * copyright notice, this list of conditions and the following
  21. * disclaimer in the documentation and/or other materials
  22. * provided with the distribution.
  23. *
  24. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  25. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  26. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  27. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  28. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  29. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  30. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  31. * SOFTWARE.
  32. *
  33. * $Id: mthca_provider.c 1397 2004-12-28 05:09:00Z roland $
  34. */
  35. #include <ib_smi.h>
  36. #include "mthca_dev.h"
  37. #include "mthca_cmd.h"
  38. static int mthca_query_device(struct ib_device *ibdev,
  39. struct ib_device_attr *props)
  40. {
  41. struct ib_smp *in_mad = NULL;
  42. struct ib_smp *out_mad = NULL;
  43. int err = -ENOMEM;
  44. struct mthca_dev* mdev = to_mdev(ibdev);
  45. u8 status;
  46. in_mad = kmalloc(sizeof *in_mad, GFP_KERNEL);
  47. out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
  48. if (!in_mad || !out_mad)
  49. goto out;
  50. memset(props, 0, sizeof *props);
  51. props->fw_ver = mdev->fw_ver;
  52. memset(in_mad, 0, sizeof *in_mad);
  53. in_mad->base_version = 1;
  54. in_mad->mgmt_class = IB_MGMT_CLASS_SUBN_LID_ROUTED;
  55. in_mad->class_version = 1;
  56. in_mad->method = IB_MGMT_METHOD_GET;
  57. in_mad->attr_id = IB_SMP_ATTR_NODE_INFO;
  58. err = mthca_MAD_IFC(mdev, 1, 1,
  59. 1, NULL, NULL, in_mad, out_mad,
  60. &status);
  61. if (err)
  62. goto out;
  63. if (status) {
  64. err = -EINVAL;
  65. goto out;
  66. }
  67. props->device_cap_flags = mdev->device_cap_flags;
  68. props->vendor_id = be32_to_cpup((u32 *) (out_mad->data + 36)) &
  69. 0xffffff;
  70. props->vendor_part_id = be16_to_cpup((u16 *) (out_mad->data + 30));
  71. props->hw_ver = be16_to_cpup((u16 *) (out_mad->data + 32));
  72. memcpy(&props->sys_image_guid, out_mad->data + 4, 8);
  73. memcpy(&props->node_guid, out_mad->data + 12, 8);
  74. props->max_mr_size = ~0ull;
  75. props->max_qp = mdev->limits.num_qps - mdev->limits.reserved_qps;
  76. props->max_qp_wr = 0xffff;
  77. props->max_sge = mdev->limits.max_sg;
  78. props->max_cq = mdev->limits.num_cqs - mdev->limits.reserved_cqs;
  79. props->max_cqe = 0xffff;
  80. props->max_mr = mdev->limits.num_mpts - mdev->limits.reserved_mrws;
  81. props->max_pd = mdev->limits.num_pds - mdev->limits.reserved_pds;
  82. props->max_qp_rd_atom = 1 << mdev->qp_table.rdb_shift;
  83. props->max_qp_init_rd_atom = 1 << mdev->qp_table.rdb_shift;
  84. props->local_ca_ack_delay = mdev->limits.local_ca_ack_delay;
  85. err = 0;
  86. out:
  87. kfree(in_mad);
  88. kfree(out_mad);
  89. return err;
  90. }
  91. static int mthca_query_port(struct ib_device *ibdev,
  92. u8 port, struct ib_port_attr *props)
  93. {
  94. struct ib_smp *in_mad = NULL;
  95. struct ib_smp *out_mad = NULL;
  96. int err = -ENOMEM;
  97. u8 status;
  98. in_mad = kmalloc(sizeof *in_mad, GFP_KERNEL);
  99. out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
  100. if (!in_mad || !out_mad)
  101. goto out;
  102. memset(in_mad, 0, sizeof *in_mad);
  103. in_mad->base_version = 1;
  104. in_mad->mgmt_class = IB_MGMT_CLASS_SUBN_LID_ROUTED;
  105. in_mad->class_version = 1;
  106. in_mad->method = IB_MGMT_METHOD_GET;
  107. in_mad->attr_id = IB_SMP_ATTR_PORT_INFO;
  108. in_mad->attr_mod = cpu_to_be32(port);
  109. err = mthca_MAD_IFC(to_mdev(ibdev), 1, 1,
  110. port, NULL, NULL, in_mad, out_mad,
  111. &status);
  112. if (err)
  113. goto out;
  114. if (status) {
  115. err = -EINVAL;
  116. goto out;
  117. }
  118. props->lid = be16_to_cpup((u16 *) (out_mad->data + 16));
  119. props->lmc = out_mad->data[34] & 0x7;
  120. props->sm_lid = be16_to_cpup((u16 *) (out_mad->data + 18));
  121. props->sm_sl = out_mad->data[36] & 0xf;
  122. props->state = out_mad->data[32] & 0xf;
  123. props->phys_state = out_mad->data[33] >> 4;
  124. props->port_cap_flags = be32_to_cpup((u32 *) (out_mad->data + 20));
  125. props->gid_tbl_len = to_mdev(ibdev)->limits.gid_table_len;
  126. props->pkey_tbl_len = to_mdev(ibdev)->limits.pkey_table_len;
  127. props->qkey_viol_cntr = be16_to_cpup((u16 *) (out_mad->data + 48));
  128. props->active_width = out_mad->data[31] & 0xf;
  129. props->active_speed = out_mad->data[35] >> 4;
  130. out:
  131. kfree(in_mad);
  132. kfree(out_mad);
  133. return err;
  134. }
  135. static int mthca_modify_port(struct ib_device *ibdev,
  136. u8 port, int port_modify_mask,
  137. struct ib_port_modify *props)
  138. {
  139. struct mthca_set_ib_param set_ib;
  140. struct ib_port_attr attr;
  141. int err;
  142. u8 status;
  143. if (down_interruptible(&to_mdev(ibdev)->cap_mask_mutex))
  144. return -ERESTARTSYS;
  145. err = mthca_query_port(ibdev, port, &attr);
  146. if (err)
  147. goto out;
  148. set_ib.set_si_guid = 0;
  149. set_ib.reset_qkey_viol = !!(port_modify_mask & IB_PORT_RESET_QKEY_CNTR);
  150. set_ib.cap_mask = (attr.port_cap_flags | props->set_port_cap_mask) &
  151. ~props->clr_port_cap_mask;
  152. err = mthca_SET_IB(to_mdev(ibdev), &set_ib, port, &status);
  153. if (err)
  154. goto out;
  155. if (status) {
  156. err = -EINVAL;
  157. goto out;
  158. }
  159. out:
  160. up(&to_mdev(ibdev)->cap_mask_mutex);
  161. return err;
  162. }
  163. static int mthca_query_pkey(struct ib_device *ibdev,
  164. u8 port, u16 index, u16 *pkey)
  165. {
  166. struct ib_smp *in_mad = NULL;
  167. struct ib_smp *out_mad = NULL;
  168. int err = -ENOMEM;
  169. u8 status;
  170. in_mad = kmalloc(sizeof *in_mad, GFP_KERNEL);
  171. out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
  172. if (!in_mad || !out_mad)
  173. goto out;
  174. memset(in_mad, 0, sizeof *in_mad);
  175. in_mad->base_version = 1;
  176. in_mad->mgmt_class = IB_MGMT_CLASS_SUBN_LID_ROUTED;
  177. in_mad->class_version = 1;
  178. in_mad->method = IB_MGMT_METHOD_GET;
  179. in_mad->attr_id = IB_SMP_ATTR_PKEY_TABLE;
  180. in_mad->attr_mod = cpu_to_be32(index / 32);
  181. err = mthca_MAD_IFC(to_mdev(ibdev), 1, 1,
  182. port, NULL, NULL, in_mad, out_mad,
  183. &status);
  184. if (err)
  185. goto out;
  186. if (status) {
  187. err = -EINVAL;
  188. goto out;
  189. }
  190. *pkey = be16_to_cpu(((u16 *) out_mad->data)[index % 32]);
  191. out:
  192. kfree(in_mad);
  193. kfree(out_mad);
  194. return err;
  195. }
  196. static int mthca_query_gid(struct ib_device *ibdev, u8 port,
  197. int index, union ib_gid *gid)
  198. {
  199. struct ib_smp *in_mad = NULL;
  200. struct ib_smp *out_mad = NULL;
  201. int err = -ENOMEM;
  202. u8 status;
  203. in_mad = kmalloc(sizeof *in_mad, GFP_KERNEL);
  204. out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
  205. if (!in_mad || !out_mad)
  206. goto out;
  207. memset(in_mad, 0, sizeof *in_mad);
  208. in_mad->base_version = 1;
  209. in_mad->mgmt_class = IB_MGMT_CLASS_SUBN_LID_ROUTED;
  210. in_mad->class_version = 1;
  211. in_mad->method = IB_MGMT_METHOD_GET;
  212. in_mad->attr_id = IB_SMP_ATTR_PORT_INFO;
  213. in_mad->attr_mod = cpu_to_be32(port);
  214. err = mthca_MAD_IFC(to_mdev(ibdev), 1, 1,
  215. port, NULL, NULL, in_mad, out_mad,
  216. &status);
  217. if (err)
  218. goto out;
  219. if (status) {
  220. err = -EINVAL;
  221. goto out;
  222. }
  223. memcpy(gid->raw, out_mad->data + 8, 8);
  224. memset(in_mad, 0, sizeof *in_mad);
  225. in_mad->base_version = 1;
  226. in_mad->mgmt_class = IB_MGMT_CLASS_SUBN_LID_ROUTED;
  227. in_mad->class_version = 1;
  228. in_mad->method = IB_MGMT_METHOD_GET;
  229. in_mad->attr_id = IB_SMP_ATTR_GUID_INFO;
  230. in_mad->attr_mod = cpu_to_be32(index / 8);
  231. err = mthca_MAD_IFC(to_mdev(ibdev), 1, 1,
  232. port, NULL, NULL, in_mad, out_mad,
  233. &status);
  234. if (err)
  235. goto out;
  236. if (status) {
  237. err = -EINVAL;
  238. goto out;
  239. }
  240. memcpy(gid->raw + 8, out_mad->data + (index % 8) * 16, 8);
  241. out:
  242. kfree(in_mad);
  243. kfree(out_mad);
  244. return err;
  245. }
  246. static struct ib_pd *mthca_alloc_pd(struct ib_device *ibdev)
  247. {
  248. struct mthca_pd *pd;
  249. int err;
  250. pd = kmalloc(sizeof *pd, GFP_KERNEL);
  251. if (!pd)
  252. return ERR_PTR(-ENOMEM);
  253. err = mthca_pd_alloc(to_mdev(ibdev), pd);
  254. if (err) {
  255. kfree(pd);
  256. return ERR_PTR(err);
  257. }
  258. return &pd->ibpd;
  259. }
  260. static int mthca_dealloc_pd(struct ib_pd *pd)
  261. {
  262. mthca_pd_free(to_mdev(pd->device), to_mpd(pd));
  263. kfree(pd);
  264. return 0;
  265. }
  266. static struct ib_ah *mthca_ah_create(struct ib_pd *pd,
  267. struct ib_ah_attr *ah_attr)
  268. {
  269. int err;
  270. struct mthca_ah *ah;
  271. ah = kmalloc(sizeof *ah, GFP_ATOMIC);
  272. if (!ah)
  273. return ERR_PTR(-ENOMEM);
  274. err = mthca_create_ah(to_mdev(pd->device), to_mpd(pd), ah_attr, ah);
  275. if (err) {
  276. kfree(ah);
  277. return ERR_PTR(err);
  278. }
  279. return &ah->ibah;
  280. }
  281. static int mthca_ah_destroy(struct ib_ah *ah)
  282. {
  283. mthca_destroy_ah(to_mdev(ah->device), to_mah(ah));
  284. kfree(ah);
  285. return 0;
  286. }
  287. static struct ib_qp *mthca_create_qp(struct ib_pd *pd,
  288. struct ib_qp_init_attr *init_attr)
  289. {
  290. struct mthca_qp *qp;
  291. int err;
  292. switch (init_attr->qp_type) {
  293. case IB_QPT_RC:
  294. case IB_QPT_UC:
  295. case IB_QPT_UD:
  296. {
  297. qp = kmalloc(sizeof *qp, GFP_KERNEL);
  298. if (!qp)
  299. return ERR_PTR(-ENOMEM);
  300. qp->sq.max = init_attr->cap.max_send_wr;
  301. qp->rq.max = init_attr->cap.max_recv_wr;
  302. qp->sq.max_gs = init_attr->cap.max_send_sge;
  303. qp->rq.max_gs = init_attr->cap.max_recv_sge;
  304. err = mthca_alloc_qp(to_mdev(pd->device), to_mpd(pd),
  305. to_mcq(init_attr->send_cq),
  306. to_mcq(init_attr->recv_cq),
  307. init_attr->qp_type, init_attr->sq_sig_type,
  308. qp);
  309. qp->ibqp.qp_num = qp->qpn;
  310. break;
  311. }
  312. case IB_QPT_SMI:
  313. case IB_QPT_GSI:
  314. {
  315. qp = kmalloc(sizeof (struct mthca_sqp), GFP_KERNEL);
  316. if (!qp)
  317. return ERR_PTR(-ENOMEM);
  318. qp->sq.max = init_attr->cap.max_send_wr;
  319. qp->rq.max = init_attr->cap.max_recv_wr;
  320. qp->sq.max_gs = init_attr->cap.max_send_sge;
  321. qp->rq.max_gs = init_attr->cap.max_recv_sge;
  322. qp->ibqp.qp_num = init_attr->qp_type == IB_QPT_SMI ? 0 : 1;
  323. err = mthca_alloc_sqp(to_mdev(pd->device), to_mpd(pd),
  324. to_mcq(init_attr->send_cq),
  325. to_mcq(init_attr->recv_cq),
  326. init_attr->sq_sig_type,
  327. qp->ibqp.qp_num, init_attr->port_num,
  328. to_msqp(qp));
  329. break;
  330. }
  331. default:
  332. /* Don't support raw QPs */
  333. return ERR_PTR(-ENOSYS);
  334. }
  335. if (err) {
  336. kfree(qp);
  337. return ERR_PTR(err);
  338. }
  339. init_attr->cap.max_inline_data = 0;
  340. return &qp->ibqp;
  341. }
  342. static int mthca_destroy_qp(struct ib_qp *qp)
  343. {
  344. mthca_free_qp(to_mdev(qp->device), to_mqp(qp));
  345. kfree(qp);
  346. return 0;
  347. }
  348. static struct ib_cq *mthca_create_cq(struct ib_device *ibdev, int entries)
  349. {
  350. struct mthca_cq *cq;
  351. int nent;
  352. int err;
  353. cq = kmalloc(sizeof *cq, GFP_KERNEL);
  354. if (!cq)
  355. return ERR_PTR(-ENOMEM);
  356. for (nent = 1; nent <= entries; nent <<= 1)
  357. ; /* nothing */
  358. err = mthca_init_cq(to_mdev(ibdev), nent, cq);
  359. if (err) {
  360. kfree(cq);
  361. cq = ERR_PTR(err);
  362. }
  363. return &cq->ibcq;
  364. }
  365. static int mthca_destroy_cq(struct ib_cq *cq)
  366. {
  367. mthca_free_cq(to_mdev(cq->device), to_mcq(cq));
  368. kfree(cq);
  369. return 0;
  370. }
  371. static inline u32 convert_access(int acc)
  372. {
  373. return (acc & IB_ACCESS_REMOTE_ATOMIC ? MTHCA_MPT_FLAG_ATOMIC : 0) |
  374. (acc & IB_ACCESS_REMOTE_WRITE ? MTHCA_MPT_FLAG_REMOTE_WRITE : 0) |
  375. (acc & IB_ACCESS_REMOTE_READ ? MTHCA_MPT_FLAG_REMOTE_READ : 0) |
  376. (acc & IB_ACCESS_LOCAL_WRITE ? MTHCA_MPT_FLAG_LOCAL_WRITE : 0) |
  377. MTHCA_MPT_FLAG_LOCAL_READ;
  378. }
  379. static struct ib_mr *mthca_get_dma_mr(struct ib_pd *pd, int acc)
  380. {
  381. struct mthca_mr *mr;
  382. int err;
  383. mr = kmalloc(sizeof *mr, GFP_KERNEL);
  384. if (!mr)
  385. return ERR_PTR(-ENOMEM);
  386. err = mthca_mr_alloc_notrans(to_mdev(pd->device),
  387. to_mpd(pd)->pd_num,
  388. convert_access(acc), mr);
  389. if (err) {
  390. kfree(mr);
  391. return ERR_PTR(err);
  392. }
  393. return &mr->ibmr;
  394. }
  395. static struct ib_mr *mthca_reg_phys_mr(struct ib_pd *pd,
  396. struct ib_phys_buf *buffer_list,
  397. int num_phys_buf,
  398. int acc,
  399. u64 *iova_start)
  400. {
  401. struct mthca_mr *mr;
  402. u64 *page_list;
  403. u64 total_size;
  404. u64 mask;
  405. int shift;
  406. int npages;
  407. int err;
  408. int i, j, n;
  409. /* First check that we have enough alignment */
  410. if ((*iova_start & ~PAGE_MASK) != (buffer_list[0].addr & ~PAGE_MASK))
  411. return ERR_PTR(-EINVAL);
  412. if (num_phys_buf > 1 &&
  413. ((buffer_list[0].addr + buffer_list[0].size) & ~PAGE_MASK))
  414. return ERR_PTR(-EINVAL);
  415. mask = 0;
  416. total_size = 0;
  417. for (i = 0; i < num_phys_buf; ++i) {
  418. if (i != 0 && buffer_list[i].addr & ~PAGE_MASK)
  419. return ERR_PTR(-EINVAL);
  420. if (i != 0 && i != num_phys_buf - 1 &&
  421. (buffer_list[i].size & ~PAGE_MASK))
  422. return ERR_PTR(-EINVAL);
  423. total_size += buffer_list[i].size;
  424. if (i > 0)
  425. mask |= buffer_list[i].addr;
  426. }
  427. /* Find largest page shift we can use to cover buffers */
  428. for (shift = PAGE_SHIFT; shift < 31; ++shift)
  429. if (num_phys_buf > 1) {
  430. if ((1ULL << shift) & mask)
  431. break;
  432. } else {
  433. if (1ULL << shift >=
  434. buffer_list[0].size +
  435. (buffer_list[0].addr & ((1ULL << shift) - 1)))
  436. break;
  437. }
  438. buffer_list[0].size += buffer_list[0].addr & ((1ULL << shift) - 1);
  439. buffer_list[0].addr &= ~0ull << shift;
  440. mr = kmalloc(sizeof *mr, GFP_KERNEL);
  441. if (!mr)
  442. return ERR_PTR(-ENOMEM);
  443. npages = 0;
  444. for (i = 0; i < num_phys_buf; ++i)
  445. npages += (buffer_list[i].size + (1ULL << shift) - 1) >> shift;
  446. if (!npages)
  447. return &mr->ibmr;
  448. page_list = kmalloc(npages * sizeof *page_list, GFP_KERNEL);
  449. if (!page_list) {
  450. kfree(mr);
  451. return ERR_PTR(-ENOMEM);
  452. }
  453. n = 0;
  454. for (i = 0; i < num_phys_buf; ++i)
  455. for (j = 0;
  456. j < (buffer_list[i].size + (1ULL << shift) - 1) >> shift;
  457. ++j)
  458. page_list[n++] = buffer_list[i].addr + ((u64) j << shift);
  459. mthca_dbg(to_mdev(pd->device), "Registering memory at %llx (iova %llx) "
  460. "in PD %x; shift %d, npages %d.\n",
  461. (unsigned long long) buffer_list[0].addr,
  462. (unsigned long long) *iova_start,
  463. to_mpd(pd)->pd_num,
  464. shift, npages);
  465. err = mthca_mr_alloc_phys(to_mdev(pd->device),
  466. to_mpd(pd)->pd_num,
  467. page_list, shift, npages,
  468. *iova_start, total_size,
  469. convert_access(acc), mr);
  470. if (err) {
  471. kfree(page_list);
  472. kfree(mr);
  473. return ERR_PTR(err);
  474. }
  475. kfree(page_list);
  476. return &mr->ibmr;
  477. }
  478. static int mthca_dereg_mr(struct ib_mr *mr)
  479. {
  480. struct mthca_mr *mmr = to_mmr(mr);
  481. mthca_free_mr(to_mdev(mr->device), mmr);
  482. kfree(mmr);
  483. return 0;
  484. }
  485. static struct ib_fmr *mthca_alloc_fmr(struct ib_pd *pd, int mr_access_flags,
  486. struct ib_fmr_attr *fmr_attr)
  487. {
  488. struct mthca_fmr *fmr;
  489. int err;
  490. fmr = kmalloc(sizeof *fmr, GFP_KERNEL);
  491. if (!fmr)
  492. return ERR_PTR(-ENOMEM);
  493. memcpy(&fmr->attr, fmr_attr, sizeof *fmr_attr);
  494. err = mthca_fmr_alloc(to_mdev(pd->device), to_mpd(pd)->pd_num,
  495. convert_access(mr_access_flags), fmr);
  496. if (err) {
  497. kfree(fmr);
  498. return ERR_PTR(err);
  499. }
  500. return &fmr->ibmr;
  501. }
  502. static int mthca_dealloc_fmr(struct ib_fmr *fmr)
  503. {
  504. struct mthca_fmr *mfmr = to_mfmr(fmr);
  505. int err;
  506. err = mthca_free_fmr(to_mdev(fmr->device), mfmr);
  507. if (err)
  508. return err;
  509. kfree(mfmr);
  510. return 0;
  511. }
  512. static int mthca_unmap_fmr(struct list_head *fmr_list)
  513. {
  514. struct ib_fmr *fmr;
  515. int err;
  516. u8 status;
  517. struct mthca_dev *mdev = NULL;
  518. list_for_each_entry(fmr, fmr_list, list) {
  519. if (mdev && to_mdev(fmr->device) != mdev)
  520. return -EINVAL;
  521. mdev = to_mdev(fmr->device);
  522. }
  523. if (!mdev)
  524. return 0;
  525. if (mthca_is_memfree(mdev)) {
  526. list_for_each_entry(fmr, fmr_list, list)
  527. mthca_arbel_fmr_unmap(mdev, to_mfmr(fmr));
  528. wmb();
  529. } else
  530. list_for_each_entry(fmr, fmr_list, list)
  531. mthca_tavor_fmr_unmap(mdev, to_mfmr(fmr));
  532. err = mthca_SYNC_TPT(mdev, &status);
  533. if (err)
  534. return err;
  535. if (status)
  536. return -EINVAL;
  537. return 0;
  538. }
  539. static ssize_t show_rev(struct class_device *cdev, char *buf)
  540. {
  541. struct mthca_dev *dev = container_of(cdev, struct mthca_dev, ib_dev.class_dev);
  542. return sprintf(buf, "%x\n", dev->rev_id);
  543. }
  544. static ssize_t show_fw_ver(struct class_device *cdev, char *buf)
  545. {
  546. struct mthca_dev *dev = container_of(cdev, struct mthca_dev, ib_dev.class_dev);
  547. return sprintf(buf, "%x.%x.%x\n", (int) (dev->fw_ver >> 32),
  548. (int) (dev->fw_ver >> 16) & 0xffff,
  549. (int) dev->fw_ver & 0xffff);
  550. }
  551. static ssize_t show_hca(struct class_device *cdev, char *buf)
  552. {
  553. struct mthca_dev *dev = container_of(cdev, struct mthca_dev, ib_dev.class_dev);
  554. switch (dev->pdev->device) {
  555. case PCI_DEVICE_ID_MELLANOX_TAVOR:
  556. return sprintf(buf, "MT23108\n");
  557. case PCI_DEVICE_ID_MELLANOX_ARBEL_COMPAT:
  558. return sprintf(buf, "MT25208 (MT23108 compat mode)\n");
  559. case PCI_DEVICE_ID_MELLANOX_ARBEL:
  560. return sprintf(buf, "MT25208\n");
  561. case PCI_DEVICE_ID_MELLANOX_SINAI:
  562. case PCI_DEVICE_ID_MELLANOX_SINAI_OLD:
  563. return sprintf(buf, "MT25204\n");
  564. default:
  565. return sprintf(buf, "unknown\n");
  566. }
  567. }
  568. static CLASS_DEVICE_ATTR(hw_rev, S_IRUGO, show_rev, NULL);
  569. static CLASS_DEVICE_ATTR(fw_ver, S_IRUGO, show_fw_ver, NULL);
  570. static CLASS_DEVICE_ATTR(hca_type, S_IRUGO, show_hca, NULL);
  571. static struct class_device_attribute *mthca_class_attributes[] = {
  572. &class_device_attr_hw_rev,
  573. &class_device_attr_fw_ver,
  574. &class_device_attr_hca_type
  575. };
  576. int mthca_register_device(struct mthca_dev *dev)
  577. {
  578. int ret;
  579. int i;
  580. strlcpy(dev->ib_dev.name, "mthca%d", IB_DEVICE_NAME_MAX);
  581. dev->ib_dev.node_type = IB_NODE_CA;
  582. dev->ib_dev.phys_port_cnt = dev->limits.num_ports;
  583. dev->ib_dev.dma_device = &dev->pdev->dev;
  584. dev->ib_dev.class_dev.dev = &dev->pdev->dev;
  585. dev->ib_dev.query_device = mthca_query_device;
  586. dev->ib_dev.query_port = mthca_query_port;
  587. dev->ib_dev.modify_port = mthca_modify_port;
  588. dev->ib_dev.query_pkey = mthca_query_pkey;
  589. dev->ib_dev.query_gid = mthca_query_gid;
  590. dev->ib_dev.alloc_pd = mthca_alloc_pd;
  591. dev->ib_dev.dealloc_pd = mthca_dealloc_pd;
  592. dev->ib_dev.create_ah = mthca_ah_create;
  593. dev->ib_dev.destroy_ah = mthca_ah_destroy;
  594. dev->ib_dev.create_qp = mthca_create_qp;
  595. dev->ib_dev.modify_qp = mthca_modify_qp;
  596. dev->ib_dev.destroy_qp = mthca_destroy_qp;
  597. dev->ib_dev.create_cq = mthca_create_cq;
  598. dev->ib_dev.destroy_cq = mthca_destroy_cq;
  599. dev->ib_dev.poll_cq = mthca_poll_cq;
  600. dev->ib_dev.get_dma_mr = mthca_get_dma_mr;
  601. dev->ib_dev.reg_phys_mr = mthca_reg_phys_mr;
  602. dev->ib_dev.dereg_mr = mthca_dereg_mr;
  603. if (dev->mthca_flags & MTHCA_FLAG_FMR) {
  604. dev->ib_dev.alloc_fmr = mthca_alloc_fmr;
  605. dev->ib_dev.unmap_fmr = mthca_unmap_fmr;
  606. dev->ib_dev.dealloc_fmr = mthca_dealloc_fmr;
  607. if (mthca_is_memfree(dev))
  608. dev->ib_dev.map_phys_fmr = mthca_arbel_map_phys_fmr;
  609. else
  610. dev->ib_dev.map_phys_fmr = mthca_tavor_map_phys_fmr;
  611. }
  612. dev->ib_dev.attach_mcast = mthca_multicast_attach;
  613. dev->ib_dev.detach_mcast = mthca_multicast_detach;
  614. dev->ib_dev.process_mad = mthca_process_mad;
  615. if (mthca_is_memfree(dev)) {
  616. dev->ib_dev.req_notify_cq = mthca_arbel_arm_cq;
  617. dev->ib_dev.post_send = mthca_arbel_post_send;
  618. dev->ib_dev.post_recv = mthca_arbel_post_receive;
  619. } else {
  620. dev->ib_dev.req_notify_cq = mthca_tavor_arm_cq;
  621. dev->ib_dev.post_send = mthca_tavor_post_send;
  622. dev->ib_dev.post_recv = mthca_tavor_post_receive;
  623. }
  624. init_MUTEX(&dev->cap_mask_mutex);
  625. ret = ib_register_device(&dev->ib_dev);
  626. if (ret)
  627. return ret;
  628. for (i = 0; i < ARRAY_SIZE(mthca_class_attributes); ++i) {
  629. ret = class_device_create_file(&dev->ib_dev.class_dev,
  630. mthca_class_attributes[i]);
  631. if (ret) {
  632. ib_unregister_device(&dev->ib_dev);
  633. return ret;
  634. }
  635. }
  636. return 0;
  637. }
  638. void mthca_unregister_device(struct mthca_dev *dev)
  639. {
  640. ib_unregister_device(&dev->ib_dev);
  641. }