i8xx_tco.c 14 KB

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  1. /*
  2. * i8xx_tco 0.07: TCO timer driver for i8xx chipsets
  3. *
  4. * (c) Copyright 2000 kernel concepts <nils@kernelconcepts.de>, All Rights Reserved.
  5. * http://www.kernelconcepts.de
  6. *
  7. * This program is free software; you can redistribute it and/or
  8. * modify it under the terms of the GNU General Public License
  9. * as published by the Free Software Foundation; either version
  10. * 2 of the License, or (at your option) any later version.
  11. *
  12. * Neither kernel concepts nor Nils Faerber admit liability nor provide
  13. * warranty for any of this software. This material is provided
  14. * "AS-IS" and at no charge.
  15. *
  16. * (c) Copyright 2000 kernel concepts <nils@kernelconcepts.de>
  17. * developed for
  18. * Jentro AG, Haar/Munich (Germany)
  19. *
  20. * TCO timer driver for i8xx chipsets
  21. * based on softdog.c by Alan Cox <alan@redhat.com>
  22. *
  23. * The TCO timer is implemented in the following I/O controller hubs:
  24. * (See the intel documentation on http://developer.intel.com.)
  25. * 82801AA (ICH) : document number 290655-003, 290677-014,
  26. * 82801AB (ICHO) : document number 290655-003, 290677-014,
  27. * 82801BA (ICH2) : document number 290687-002, 298242-027,
  28. * 82801BAM (ICH2-M) : document number 290687-002, 298242-027,
  29. * 82801CA (ICH3-S) : document number 290733-003, 290739-013,
  30. * 82801CAM (ICH3-M) : document number 290716-001, 290718-007,
  31. * 82801DB (ICH4) : document number 290744-001, 290745-020,
  32. * 82801DBM (ICH4-M) : document number 252337-001, 252663-005,
  33. * 82801E (C-ICH) : document number 273599-001, 273645-002,
  34. * 82801EB (ICH5) : document number 252516-001, 252517-003,
  35. * 82801ER (ICH5R) : document number 252516-001, 252517-003,
  36. * 82801FB (ICH6) : document number 301473-002, 301474-007,
  37. * 82801FR (ICH6R) : document number 301473-002, 301474-007,
  38. * 82801FBM (ICH6-M) : document number 301473-002, 301474-007,
  39. * 82801FW (ICH6W) : document number 301473-001, 301474-007,
  40. * 82801FRW (ICH6RW) : document number 301473-001, 301474-007
  41. *
  42. * 20000710 Nils Faerber
  43. * Initial Version 0.01
  44. * 20000728 Nils Faerber
  45. * 0.02 Fix for SMI_EN->TCO_EN bit, some cleanups
  46. * 20011214 Matt Domsch <Matt_Domsch@dell.com>
  47. * 0.03 Added nowayout module option to override CONFIG_WATCHDOG_NOWAYOUT
  48. * Didn't add timeout option as i810_margin already exists.
  49. * 20020224 Joel Becker, Wim Van Sebroeck
  50. * 0.04 Support for 82801CA(M) chipset, timer margin needs to be > 3,
  51. * add support for WDIOC_SETTIMEOUT and WDIOC_GETTIMEOUT.
  52. * 20020412 Rob Radez <rob@osinvestor.com>, Wim Van Sebroeck
  53. * 0.05 Fix possible timer_alive race, add expect close support,
  54. * clean up ioctls (WDIOC_GETSTATUS, WDIOC_GETBOOTSTATUS and
  55. * WDIOC_SETOPTIONS), made i810tco_getdevice __init,
  56. * removed boot_status, removed tco_timer_read,
  57. * added support for 82801DB and 82801E chipset,
  58. * added support for 82801EB and 8280ER chipset,
  59. * general cleanup.
  60. * 20030921 Wim Van Sebroeck <wim@iguana.be>
  61. * 0.06 change i810_margin to heartbeat, use module_param,
  62. * added notify system support, renamed module to i8xx_tco.
  63. * 20050128 Wim Van Sebroeck <wim@iguana.be>
  64. * 0.07 Added support for the ICH4-M, ICH6, ICH6R, ICH6-M, ICH6W and ICH6RW
  65. * chipsets. Also added support for the "undocumented" ICH7 chipset.
  66. */
  67. /*
  68. * Includes, defines, variables, module parameters, ...
  69. */
  70. #include <linux/module.h>
  71. #include <linux/moduleparam.h>
  72. #include <linux/types.h>
  73. #include <linux/miscdevice.h>
  74. #include <linux/watchdog.h>
  75. #include <linux/notifier.h>
  76. #include <linux/reboot.h>
  77. #include <linux/init.h>
  78. #include <linux/fs.h>
  79. #include <linux/pci.h>
  80. #include <linux/ioport.h>
  81. #include <asm/uaccess.h>
  82. #include <asm/io.h>
  83. #include "i8xx_tco.h"
  84. /* Module and version information */
  85. #define TCO_VERSION "0.07"
  86. #define TCO_MODULE_NAME "i8xx TCO timer"
  87. #define TCO_DRIVER_NAME TCO_MODULE_NAME ", v" TCO_VERSION
  88. #define PFX TCO_MODULE_NAME ": "
  89. /* internal variables */
  90. static unsigned int ACPIBASE;
  91. static spinlock_t tco_lock; /* Guards the hardware */
  92. static unsigned long timer_alive;
  93. static char tco_expect_close;
  94. static struct pci_dev *i8xx_tco_pci;
  95. /* module parameters */
  96. #define WATCHDOG_HEARTBEAT 30 /* 30 sec default heartbeat (2<heartbeat<39) */
  97. static int heartbeat = WATCHDOG_HEARTBEAT; /* in seconds */
  98. module_param(heartbeat, int, 0);
  99. MODULE_PARM_DESC(heartbeat, "Watchdog heartbeat in seconds. (2<heartbeat<39, default=" __MODULE_STRING(WATCHDOG_HEARTBEAT) ")");
  100. #ifdef CONFIG_WATCHDOG_NOWAYOUT
  101. static int nowayout = 1;
  102. #else
  103. static int nowayout = 0;
  104. #endif
  105. module_param(nowayout, int, 0);
  106. MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=CONFIG_WATCHDOG_NOWAYOUT)");
  107. /*
  108. * Some TCO specific functions
  109. */
  110. static inline unsigned char seconds_to_ticks(int seconds)
  111. {
  112. /* the internal timer is stored as ticks which decrement
  113. * every 0.6 seconds */
  114. return (seconds * 10) / 6;
  115. }
  116. static int tco_timer_start (void)
  117. {
  118. unsigned char val;
  119. spin_lock(&tco_lock);
  120. val = inb (TCO1_CNT + 1);
  121. val &= 0xf7;
  122. outb (val, TCO1_CNT + 1);
  123. val = inb (TCO1_CNT + 1);
  124. spin_unlock(&tco_lock);
  125. if (val & 0x08)
  126. return -1;
  127. return 0;
  128. }
  129. static int tco_timer_stop (void)
  130. {
  131. unsigned char val;
  132. spin_lock(&tco_lock);
  133. val = inb (TCO1_CNT + 1);
  134. val |= 0x08;
  135. outb (val, TCO1_CNT + 1);
  136. val = inb (TCO1_CNT + 1);
  137. spin_unlock(&tco_lock);
  138. if ((val & 0x08) == 0)
  139. return -1;
  140. return 0;
  141. }
  142. static int tco_timer_keepalive (void)
  143. {
  144. spin_lock(&tco_lock);
  145. outb (0x01, TCO1_RLD);
  146. spin_unlock(&tco_lock);
  147. return 0;
  148. }
  149. static int tco_timer_set_heartbeat (int t)
  150. {
  151. unsigned char val;
  152. unsigned char tmrval;
  153. tmrval = seconds_to_ticks(t);
  154. /* from the specs: */
  155. /* "Values of 0h-3h are ignored and should not be attempted" */
  156. if (tmrval > 0x3f || tmrval < 0x04)
  157. return -EINVAL;
  158. /* Write new heartbeat to watchdog */
  159. spin_lock(&tco_lock);
  160. val = inb (TCO1_TMR);
  161. val &= 0xc0;
  162. val |= tmrval;
  163. outb (val, TCO1_TMR);
  164. val = inb (TCO1_TMR);
  165. spin_unlock(&tco_lock);
  166. if ((val & 0x3f) != tmrval)
  167. return -EINVAL;
  168. heartbeat = t;
  169. return 0;
  170. }
  171. /*
  172. * /dev/watchdog handling
  173. */
  174. static int i8xx_tco_open (struct inode *inode, struct file *file)
  175. {
  176. /* /dev/watchdog can only be opened once */
  177. if (test_and_set_bit(0, &timer_alive))
  178. return -EBUSY;
  179. /*
  180. * Reload and activate timer
  181. */
  182. tco_timer_keepalive ();
  183. tco_timer_start ();
  184. return nonseekable_open(inode, file);
  185. }
  186. static int i8xx_tco_release (struct inode *inode, struct file *file)
  187. {
  188. /*
  189. * Shut off the timer.
  190. */
  191. if (tco_expect_close == 42) {
  192. tco_timer_stop ();
  193. } else {
  194. printk(KERN_CRIT PFX "Unexpected close, not stopping watchdog!\n");
  195. tco_timer_keepalive ();
  196. }
  197. clear_bit(0, &timer_alive);
  198. tco_expect_close = 0;
  199. return 0;
  200. }
  201. static ssize_t i8xx_tco_write (struct file *file, const char __user *data,
  202. size_t len, loff_t * ppos)
  203. {
  204. /* See if we got the magic character 'V' and reload the timer */
  205. if (len) {
  206. if (!nowayout) {
  207. size_t i;
  208. /* note: just in case someone wrote the magic character
  209. * five months ago... */
  210. tco_expect_close = 0;
  211. /* scan to see whether or not we got the magic character */
  212. for (i = 0; i != len; i++) {
  213. char c;
  214. if(get_user(c, data+i))
  215. return -EFAULT;
  216. if (c == 'V')
  217. tco_expect_close = 42;
  218. }
  219. }
  220. /* someone wrote to us, we should reload the timer */
  221. tco_timer_keepalive ();
  222. }
  223. return len;
  224. }
  225. static int i8xx_tco_ioctl (struct inode *inode, struct file *file,
  226. unsigned int cmd, unsigned long arg)
  227. {
  228. int new_options, retval = -EINVAL;
  229. int new_heartbeat;
  230. void __user *argp = (void __user *)arg;
  231. int __user *p = argp;
  232. static struct watchdog_info ident = {
  233. .options = WDIOF_SETTIMEOUT |
  234. WDIOF_KEEPALIVEPING |
  235. WDIOF_MAGICCLOSE,
  236. .firmware_version = 0,
  237. .identity = TCO_MODULE_NAME,
  238. };
  239. switch (cmd) {
  240. case WDIOC_GETSUPPORT:
  241. return copy_to_user(argp, &ident,
  242. sizeof (ident)) ? -EFAULT : 0;
  243. case WDIOC_GETSTATUS:
  244. case WDIOC_GETBOOTSTATUS:
  245. return put_user (0, p);
  246. case WDIOC_KEEPALIVE:
  247. tco_timer_keepalive ();
  248. return 0;
  249. case WDIOC_SETOPTIONS:
  250. {
  251. if (get_user (new_options, p))
  252. return -EFAULT;
  253. if (new_options & WDIOS_DISABLECARD) {
  254. tco_timer_stop ();
  255. retval = 0;
  256. }
  257. if (new_options & WDIOS_ENABLECARD) {
  258. tco_timer_keepalive ();
  259. tco_timer_start ();
  260. retval = 0;
  261. }
  262. return retval;
  263. }
  264. case WDIOC_SETTIMEOUT:
  265. {
  266. if (get_user(new_heartbeat, p))
  267. return -EFAULT;
  268. if (tco_timer_set_heartbeat(new_heartbeat))
  269. return -EINVAL;
  270. tco_timer_keepalive ();
  271. /* Fall */
  272. }
  273. case WDIOC_GETTIMEOUT:
  274. return put_user(heartbeat, p);
  275. default:
  276. return -ENOIOCTLCMD;
  277. }
  278. }
  279. /*
  280. * Notify system
  281. */
  282. static int i8xx_tco_notify_sys (struct notifier_block *this, unsigned long code, void *unused)
  283. {
  284. if (code==SYS_DOWN || code==SYS_HALT) {
  285. /* Turn the WDT off */
  286. tco_timer_stop ();
  287. }
  288. return NOTIFY_DONE;
  289. }
  290. /*
  291. * Kernel Interfaces
  292. */
  293. static struct file_operations i8xx_tco_fops = {
  294. .owner = THIS_MODULE,
  295. .llseek = no_llseek,
  296. .write = i8xx_tco_write,
  297. .ioctl = i8xx_tco_ioctl,
  298. .open = i8xx_tco_open,
  299. .release = i8xx_tco_release,
  300. };
  301. static struct miscdevice i8xx_tco_miscdev = {
  302. .minor = WATCHDOG_MINOR,
  303. .name = "watchdog",
  304. .fops = &i8xx_tco_fops,
  305. };
  306. static struct notifier_block i8xx_tco_notifier = {
  307. .notifier_call = i8xx_tco_notify_sys,
  308. };
  309. /*
  310. * Data for PCI driver interface
  311. *
  312. * This data only exists for exporting the supported
  313. * PCI ids via MODULE_DEVICE_TABLE. We do not actually
  314. * register a pci_driver, because someone else might one day
  315. * want to register another driver on the same PCI id.
  316. */
  317. static struct pci_device_id i8xx_tco_pci_tbl[] = {
  318. { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801AA_0, PCI_ANY_ID, PCI_ANY_ID, },
  319. { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801AB_0, PCI_ANY_ID, PCI_ANY_ID, },
  320. { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801BA_0, PCI_ANY_ID, PCI_ANY_ID, },
  321. { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801BA_10, PCI_ANY_ID, PCI_ANY_ID, },
  322. { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801CA_0, PCI_ANY_ID, PCI_ANY_ID, },
  323. { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801CA_12, PCI_ANY_ID, PCI_ANY_ID, },
  324. { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801DB_0, PCI_ANY_ID, PCI_ANY_ID, },
  325. { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801DB_12, PCI_ANY_ID, PCI_ANY_ID, },
  326. { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801E_0, PCI_ANY_ID, PCI_ANY_ID, },
  327. { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801EB_0, PCI_ANY_ID, PCI_ANY_ID, },
  328. { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH6_0, PCI_ANY_ID, PCI_ANY_ID, },
  329. { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH6_1, PCI_ANY_ID, PCI_ANY_ID, },
  330. { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH6_2, PCI_ANY_ID, PCI_ANY_ID, },
  331. { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH7_0, PCI_ANY_ID, PCI_ANY_ID, },
  332. { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH7_1, PCI_ANY_ID, PCI_ANY_ID, },
  333. { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ESB_1, PCI_ANY_ID, PCI_ANY_ID, },
  334. { 0, }, /* End of list */
  335. };
  336. MODULE_DEVICE_TABLE (pci, i8xx_tco_pci_tbl);
  337. /*
  338. * Init & exit routines
  339. */
  340. static unsigned char __init i8xx_tco_getdevice (void)
  341. {
  342. struct pci_dev *dev = NULL;
  343. u8 val1, val2;
  344. u16 badr;
  345. /*
  346. * Find the PCI device
  347. */
  348. while ((dev = pci_find_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) {
  349. if (pci_match_device(i8xx_tco_pci_tbl, dev)) {
  350. i8xx_tco_pci = dev;
  351. break;
  352. }
  353. }
  354. if (i8xx_tco_pci) {
  355. /*
  356. * Find the ACPI base I/O address which is the base
  357. * for the TCO registers (TCOBASE=ACPIBASE + 0x60)
  358. * ACPIBASE is bits [15:7] from 0x40-0x43
  359. */
  360. pci_read_config_byte (i8xx_tco_pci, 0x40, &val1);
  361. pci_read_config_byte (i8xx_tco_pci, 0x41, &val2);
  362. badr = ((val2 << 1) | (val1 >> 7)) << 7;
  363. ACPIBASE = badr;
  364. /* Something's wrong here, ACPIBASE has to be set */
  365. if (badr == 0x0001 || badr == 0x0000) {
  366. printk (KERN_ERR PFX "failed to get TCOBASE address\n");
  367. return 0;
  368. }
  369. /*
  370. * Check chipset's NO_REBOOT bit
  371. */
  372. pci_read_config_byte (i8xx_tco_pci, 0xd4, &val1);
  373. if (val1 & 0x02) {
  374. val1 &= 0xfd;
  375. pci_write_config_byte (i8xx_tco_pci, 0xd4, val1);
  376. pci_read_config_byte (i8xx_tco_pci, 0xd4, &val1);
  377. if (val1 & 0x02) {
  378. printk (KERN_ERR PFX "failed to reset NO_REBOOT flag, reboot disabled by hardware\n");
  379. return 0; /* Cannot reset NO_REBOOT bit */
  380. }
  381. }
  382. /* Set the TCO_EN bit in SMI_EN register */
  383. if (!request_region (SMI_EN + 1, 1, "i8xx TCO")) {
  384. printk (KERN_ERR PFX "I/O address 0x%04x already in use\n",
  385. SMI_EN + 1);
  386. return 0;
  387. }
  388. val1 = inb (SMI_EN + 1);
  389. val1 &= 0xdf;
  390. outb (val1, SMI_EN + 1);
  391. release_region (SMI_EN + 1, 1);
  392. return 1;
  393. }
  394. return 0;
  395. }
  396. static int __init watchdog_init (void)
  397. {
  398. int ret;
  399. spin_lock_init(&tco_lock);
  400. /* Check whether or not the hardware watchdog is there */
  401. if (!i8xx_tco_getdevice () || i8xx_tco_pci == NULL)
  402. return -ENODEV;
  403. if (!request_region (TCOBASE, 0x10, "i8xx TCO")) {
  404. printk (KERN_ERR PFX "I/O address 0x%04x already in use\n",
  405. TCOBASE);
  406. ret = -EIO;
  407. goto out;
  408. }
  409. /* Clear out the (probably old) status */
  410. outb (0, TCO1_STS);
  411. outb (3, TCO2_STS);
  412. /* Check that the heartbeat value is within it's range ; if not reset to the default */
  413. if (tco_timer_set_heartbeat (heartbeat)) {
  414. heartbeat = WATCHDOG_HEARTBEAT;
  415. tco_timer_set_heartbeat (heartbeat);
  416. printk(KERN_INFO PFX "heartbeat value must be 2<heartbeat<39, using %d\n",
  417. heartbeat);
  418. }
  419. ret = register_reboot_notifier(&i8xx_tco_notifier);
  420. if (ret != 0) {
  421. printk(KERN_ERR PFX "cannot register reboot notifier (err=%d)\n",
  422. ret);
  423. goto unreg_region;
  424. }
  425. ret = misc_register(&i8xx_tco_miscdev);
  426. if (ret != 0) {
  427. printk(KERN_ERR PFX "cannot register miscdev on minor=%d (err=%d)\n",
  428. WATCHDOG_MINOR, ret);
  429. goto unreg_notifier;
  430. }
  431. tco_timer_stop ();
  432. printk (KERN_INFO PFX "initialized (0x%04x). heartbeat=%d sec (nowayout=%d)\n",
  433. TCOBASE, heartbeat, nowayout);
  434. return 0;
  435. unreg_notifier:
  436. unregister_reboot_notifier(&i8xx_tco_notifier);
  437. unreg_region:
  438. release_region (TCOBASE, 0x10);
  439. out:
  440. return ret;
  441. }
  442. static void __exit watchdog_cleanup (void)
  443. {
  444. u8 val;
  445. /* Stop the timer before we leave */
  446. if (!nowayout)
  447. tco_timer_stop ();
  448. /* Set the NO_REBOOT bit to prevent later reboots, just for sure */
  449. pci_read_config_byte (i8xx_tco_pci, 0xd4, &val);
  450. val |= 0x02;
  451. pci_write_config_byte (i8xx_tco_pci, 0xd4, val);
  452. /* Deregister */
  453. misc_deregister (&i8xx_tco_miscdev);
  454. unregister_reboot_notifier(&i8xx_tco_notifier);
  455. release_region (TCOBASE, 0x10);
  456. }
  457. module_init(watchdog_init);
  458. module_exit(watchdog_cleanup);
  459. MODULE_AUTHOR("Nils Faerber");
  460. MODULE_DESCRIPTION("TCO timer driver for i8xx chipsets");
  461. MODULE_LICENSE("GPL");
  462. MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);