i915_dma.c 18 KB

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  1. /* i915_dma.c -- DMA support for the I915 -*- linux-c -*-
  2. */
  3. /**************************************************************************
  4. *
  5. * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
  6. * All Rights Reserved.
  7. *
  8. * Permission is hereby granted, free of charge, to any person obtaining a
  9. * copy of this software and associated documentation files (the
  10. * "Software"), to deal in the Software without restriction, including
  11. * without limitation the rights to use, copy, modify, merge, publish,
  12. * distribute, sub license, and/or sell copies of the Software, and to
  13. * permit persons to whom the Software is furnished to do so, subject to
  14. * the following conditions:
  15. *
  16. * The above copyright notice and this permission notice (including the
  17. * next paragraph) shall be included in all copies or substantial portions
  18. * of the Software.
  19. *
  20. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  21. * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  22. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  23. * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
  24. * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  25. * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  26. * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  27. *
  28. **************************************************************************/
  29. #include "drmP.h"
  30. #include "drm.h"
  31. #include "i915_drm.h"
  32. #include "i915_drv.h"
  33. drm_ioctl_desc_t i915_ioctls[] = {
  34. [DRM_IOCTL_NR(DRM_I915_INIT)] = {i915_dma_init, 1, 1},
  35. [DRM_IOCTL_NR(DRM_I915_FLUSH)] = {i915_flush_ioctl, 1, 0},
  36. [DRM_IOCTL_NR(DRM_I915_FLIP)] = {i915_flip_bufs, 1, 0},
  37. [DRM_IOCTL_NR(DRM_I915_BATCHBUFFER)] = {i915_batchbuffer, 1, 0},
  38. [DRM_IOCTL_NR(DRM_I915_IRQ_EMIT)] = {i915_irq_emit, 1, 0},
  39. [DRM_IOCTL_NR(DRM_I915_IRQ_WAIT)] = {i915_irq_wait, 1, 0},
  40. [DRM_IOCTL_NR(DRM_I915_GETPARAM)] = {i915_getparam, 1, 0},
  41. [DRM_IOCTL_NR(DRM_I915_SETPARAM)] = {i915_setparam, 1, 1},
  42. [DRM_IOCTL_NR(DRM_I915_ALLOC)] = {i915_mem_alloc, 1, 0},
  43. [DRM_IOCTL_NR(DRM_I915_FREE)] = {i915_mem_free, 1, 0},
  44. [DRM_IOCTL_NR(DRM_I915_INIT_HEAP)] = {i915_mem_init_heap, 1, 1},
  45. [DRM_IOCTL_NR(DRM_I915_CMDBUFFER)] = {i915_cmdbuffer, 1, 0}
  46. };
  47. int i915_max_ioctl = DRM_ARRAY_SIZE(i915_ioctls);
  48. /* Really want an OS-independent resettable timer. Would like to have
  49. * this loop run for (eg) 3 sec, but have the timer reset every time
  50. * the head pointer changes, so that EBUSY only happens if the ring
  51. * actually stalls for (eg) 3 seconds.
  52. */
  53. int i915_wait_ring(drm_device_t * dev, int n, const char *caller)
  54. {
  55. drm_i915_private_t *dev_priv = dev->dev_private;
  56. drm_i915_ring_buffer_t *ring = &(dev_priv->ring);
  57. u32 last_head = I915_READ(LP_RING + RING_HEAD) & HEAD_ADDR;
  58. int i;
  59. for (i = 0; i < 10000; i++) {
  60. ring->head = I915_READ(LP_RING + RING_HEAD) & HEAD_ADDR;
  61. ring->space = ring->head - (ring->tail + 8);
  62. if (ring->space < 0)
  63. ring->space += ring->Size;
  64. if (ring->space >= n)
  65. return 0;
  66. dev_priv->sarea_priv->perf_boxes |= I915_BOX_WAIT;
  67. if (ring->head != last_head)
  68. i = 0;
  69. last_head = ring->head;
  70. }
  71. return DRM_ERR(EBUSY);
  72. }
  73. void i915_kernel_lost_context(drm_device_t * dev)
  74. {
  75. drm_i915_private_t *dev_priv = dev->dev_private;
  76. drm_i915_ring_buffer_t *ring = &(dev_priv->ring);
  77. ring->head = I915_READ(LP_RING + RING_HEAD) & HEAD_ADDR;
  78. ring->tail = I915_READ(LP_RING + RING_TAIL) & TAIL_ADDR;
  79. ring->space = ring->head - (ring->tail + 8);
  80. if (ring->space < 0)
  81. ring->space += ring->Size;
  82. if (ring->head == ring->tail)
  83. dev_priv->sarea_priv->perf_boxes |= I915_BOX_RING_EMPTY;
  84. }
  85. int i915_dma_cleanup(drm_device_t * dev)
  86. {
  87. /* Make sure interrupts are disabled here because the uninstall ioctl
  88. * may not have been called from userspace and after dev_private
  89. * is freed, it's too late.
  90. */
  91. if (dev->irq)
  92. drm_irq_uninstall (dev);
  93. if (dev->dev_private) {
  94. drm_i915_private_t *dev_priv =
  95. (drm_i915_private_t *) dev->dev_private;
  96. if (dev_priv->ring.virtual_start) {
  97. drm_core_ioremapfree( &dev_priv->ring.map, dev);
  98. }
  99. if (dev_priv->hw_status_page) {
  100. drm_pci_free(dev, PAGE_SIZE, dev_priv->hw_status_page,
  101. dev_priv->dma_status_page);
  102. /* Need to rewrite hardware status page */
  103. I915_WRITE(0x02080, 0x1ffff000);
  104. }
  105. drm_free (dev->dev_private, sizeof(drm_i915_private_t),
  106. DRM_MEM_DRIVER);
  107. dev->dev_private = NULL;
  108. }
  109. return 0;
  110. }
  111. static int i915_initialize(drm_device_t * dev,
  112. drm_i915_private_t * dev_priv,
  113. drm_i915_init_t * init)
  114. {
  115. memset(dev_priv, 0, sizeof(drm_i915_private_t));
  116. DRM_GETSAREA();
  117. if (!dev_priv->sarea) {
  118. DRM_ERROR("can not find sarea!\n");
  119. dev->dev_private = (void *)dev_priv;
  120. i915_dma_cleanup(dev);
  121. return DRM_ERR(EINVAL);
  122. }
  123. dev_priv->mmio_map = drm_core_findmap(dev, init->mmio_offset);
  124. if (!dev_priv->mmio_map) {
  125. dev->dev_private = (void *)dev_priv;
  126. i915_dma_cleanup(dev);
  127. DRM_ERROR("can not find mmio map!\n");
  128. return DRM_ERR(EINVAL);
  129. }
  130. dev_priv->sarea_priv = (drm_i915_sarea_t *)
  131. ((u8 *) dev_priv->sarea->handle + init->sarea_priv_offset);
  132. dev_priv->ring.Start = init->ring_start;
  133. dev_priv->ring.End = init->ring_end;
  134. dev_priv->ring.Size = init->ring_size;
  135. dev_priv->ring.tail_mask = dev_priv->ring.Size - 1;
  136. dev_priv->ring.map.offset = init->ring_start;
  137. dev_priv->ring.map.size = init->ring_size;
  138. dev_priv->ring.map.type = 0;
  139. dev_priv->ring.map.flags = 0;
  140. dev_priv->ring.map.mtrr = 0;
  141. drm_core_ioremap( &dev_priv->ring.map, dev );
  142. if (dev_priv->ring.map.handle == NULL) {
  143. dev->dev_private = (void *)dev_priv;
  144. i915_dma_cleanup(dev);
  145. DRM_ERROR("can not ioremap virtual address for"
  146. " ring buffer\n");
  147. return DRM_ERR(ENOMEM);
  148. }
  149. dev_priv->ring.virtual_start = dev_priv->ring.map.handle;
  150. dev_priv->back_offset = init->back_offset;
  151. dev_priv->front_offset = init->front_offset;
  152. dev_priv->current_page = 0;
  153. dev_priv->sarea_priv->pf_current_page = dev_priv->current_page;
  154. /* We are using separate values as placeholders for mechanisms for
  155. * private backbuffer/depthbuffer usage.
  156. */
  157. dev_priv->use_mi_batchbuffer_start = 0;
  158. /* Allow hardware batchbuffers unless told otherwise.
  159. */
  160. dev_priv->allow_batchbuffer = 1;
  161. /* Program Hardware Status Page */
  162. dev_priv->hw_status_page = drm_pci_alloc(dev, PAGE_SIZE, PAGE_SIZE,
  163. 0xffffffff,
  164. &dev_priv->dma_status_page);
  165. if (!dev_priv->hw_status_page) {
  166. dev->dev_private = (void *)dev_priv;
  167. i915_dma_cleanup(dev);
  168. DRM_ERROR("Can not allocate hardware status page\n");
  169. return DRM_ERR(ENOMEM);
  170. }
  171. memset(dev_priv->hw_status_page, 0, PAGE_SIZE);
  172. DRM_DEBUG("hw status page @ %p\n", dev_priv->hw_status_page);
  173. I915_WRITE(0x02080, dev_priv->dma_status_page);
  174. DRM_DEBUG("Enabled hardware status page\n");
  175. dev->dev_private = (void *)dev_priv;
  176. return 0;
  177. }
  178. static int i915_resume(drm_device_t * dev)
  179. {
  180. drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
  181. DRM_DEBUG("%s\n", __FUNCTION__);
  182. if (!dev_priv->sarea) {
  183. DRM_ERROR("can not find sarea!\n");
  184. return DRM_ERR(EINVAL);
  185. }
  186. if (!dev_priv->mmio_map) {
  187. DRM_ERROR("can not find mmio map!\n");
  188. return DRM_ERR(EINVAL);
  189. }
  190. if (dev_priv->ring.map.handle == NULL) {
  191. DRM_ERROR("can not ioremap virtual address for"
  192. " ring buffer\n");
  193. return DRM_ERR(ENOMEM);
  194. }
  195. /* Program Hardware Status Page */
  196. if (!dev_priv->hw_status_page) {
  197. DRM_ERROR("Can not find hardware status page\n");
  198. return DRM_ERR(EINVAL);
  199. }
  200. DRM_DEBUG("hw status page @ %p\n", dev_priv->hw_status_page);
  201. I915_WRITE(0x02080, dev_priv->dma_status_page);
  202. DRM_DEBUG("Enabled hardware status page\n");
  203. return 0;
  204. }
  205. int i915_dma_init(DRM_IOCTL_ARGS)
  206. {
  207. DRM_DEVICE;
  208. drm_i915_private_t *dev_priv;
  209. drm_i915_init_t init;
  210. int retcode = 0;
  211. DRM_COPY_FROM_USER_IOCTL(init, (drm_i915_init_t __user *) data,
  212. sizeof(init));
  213. switch (init.func) {
  214. case I915_INIT_DMA:
  215. dev_priv = drm_alloc (sizeof(drm_i915_private_t),
  216. DRM_MEM_DRIVER);
  217. if (dev_priv == NULL)
  218. return DRM_ERR(ENOMEM);
  219. retcode = i915_initialize(dev, dev_priv, &init);
  220. break;
  221. case I915_CLEANUP_DMA:
  222. retcode = i915_dma_cleanup(dev);
  223. break;
  224. case I915_RESUME_DMA:
  225. retcode = i915_resume(dev);
  226. break;
  227. default:
  228. retcode = -EINVAL;
  229. break;
  230. }
  231. return retcode;
  232. }
  233. /* Implement basically the same security restrictions as hardware does
  234. * for MI_BATCH_NON_SECURE. These can be made stricter at any time.
  235. *
  236. * Most of the calculations below involve calculating the size of a
  237. * particular instruction. It's important to get the size right as
  238. * that tells us where the next instruction to check is. Any illegal
  239. * instruction detected will be given a size of zero, which is a
  240. * signal to abort the rest of the buffer.
  241. */
  242. static int do_validate_cmd(int cmd)
  243. {
  244. switch (((cmd >> 29) & 0x7)) {
  245. case 0x0:
  246. switch ((cmd >> 23) & 0x3f) {
  247. case 0x0:
  248. return 1; /* MI_NOOP */
  249. case 0x4:
  250. return 1; /* MI_FLUSH */
  251. default:
  252. return 0; /* disallow everything else */
  253. }
  254. break;
  255. case 0x1:
  256. return 0; /* reserved */
  257. case 0x2:
  258. return (cmd & 0xff) + 2; /* 2d commands */
  259. case 0x3:
  260. if (((cmd >> 24) & 0x1f) <= 0x18)
  261. return 1;
  262. switch ((cmd >> 24) & 0x1f) {
  263. case 0x1c:
  264. return 1;
  265. case 0x1d:
  266. switch ((cmd>>16)&0xff) {
  267. case 0x3:
  268. return (cmd & 0x1f) + 2;
  269. case 0x4:
  270. return (cmd & 0xf) + 2;
  271. default:
  272. return (cmd & 0xffff) + 2;
  273. }
  274. case 0x1e:
  275. if (cmd & (1 << 23))
  276. return (cmd & 0xffff) + 1;
  277. else
  278. return 1;
  279. case 0x1f:
  280. if ((cmd & (1 << 23)) == 0) /* inline vertices */
  281. return (cmd & 0x1ffff) + 2;
  282. else if (cmd & (1 << 17)) /* indirect random */
  283. if ((cmd & 0xffff) == 0)
  284. return 0; /* unknown length, too hard */
  285. else
  286. return (((cmd & 0xffff) + 1) / 2) + 1;
  287. else
  288. return 2; /* indirect sequential */
  289. default:
  290. return 0;
  291. }
  292. default:
  293. return 0;
  294. }
  295. return 0;
  296. }
  297. static int validate_cmd(int cmd)
  298. {
  299. int ret = do_validate_cmd(cmd);
  300. /* printk("validate_cmd( %x ): %d\n", cmd, ret); */
  301. return ret;
  302. }
  303. static int i915_emit_cmds(drm_device_t * dev, int __user * buffer, int dwords)
  304. {
  305. drm_i915_private_t *dev_priv = dev->dev_private;
  306. int i;
  307. RING_LOCALS;
  308. for (i = 0; i < dwords;) {
  309. int cmd, sz;
  310. if (DRM_COPY_FROM_USER_UNCHECKED(&cmd, &buffer[i], sizeof(cmd)))
  311. return DRM_ERR(EINVAL);
  312. /* printk("%d/%d ", i, dwords); */
  313. if ((sz = validate_cmd(cmd)) == 0 || i + sz > dwords)
  314. return DRM_ERR(EINVAL);
  315. BEGIN_LP_RING(sz);
  316. OUT_RING(cmd);
  317. while (++i, --sz) {
  318. if (DRM_COPY_FROM_USER_UNCHECKED(&cmd, &buffer[i],
  319. sizeof(cmd))) {
  320. return DRM_ERR(EINVAL);
  321. }
  322. OUT_RING(cmd);
  323. }
  324. ADVANCE_LP_RING();
  325. }
  326. return 0;
  327. }
  328. static int i915_emit_box(drm_device_t * dev,
  329. drm_clip_rect_t __user * boxes,
  330. int i, int DR1, int DR4)
  331. {
  332. drm_i915_private_t *dev_priv = dev->dev_private;
  333. drm_clip_rect_t box;
  334. RING_LOCALS;
  335. if (DRM_COPY_FROM_USER_UNCHECKED(&box, &boxes[i], sizeof(box))) {
  336. return EFAULT;
  337. }
  338. if (box.y2 <= box.y1 || box.x2 <= box.x1 || box.y2 <= 0 || box.x2 <= 0) {
  339. DRM_ERROR("Bad box %d,%d..%d,%d\n",
  340. box.x1, box.y1, box.x2, box.y2);
  341. return DRM_ERR(EINVAL);
  342. }
  343. BEGIN_LP_RING(6);
  344. OUT_RING(GFX_OP_DRAWRECT_INFO);
  345. OUT_RING(DR1);
  346. OUT_RING((box.x1 & 0xffff) | (box.y1 << 16));
  347. OUT_RING(((box.x2 - 1) & 0xffff) | ((box.y2 - 1) << 16));
  348. OUT_RING(DR4);
  349. OUT_RING(0);
  350. ADVANCE_LP_RING();
  351. return 0;
  352. }
  353. static int i915_dispatch_cmdbuffer(drm_device_t * dev,
  354. drm_i915_cmdbuffer_t * cmd)
  355. {
  356. int nbox = cmd->num_cliprects;
  357. int i = 0, count, ret;
  358. if (cmd->sz & 0x3) {
  359. DRM_ERROR("alignment");
  360. return DRM_ERR(EINVAL);
  361. }
  362. i915_kernel_lost_context(dev);
  363. count = nbox ? nbox : 1;
  364. for (i = 0; i < count; i++) {
  365. if (i < nbox) {
  366. ret = i915_emit_box(dev, cmd->cliprects, i,
  367. cmd->DR1, cmd->DR4);
  368. if (ret)
  369. return ret;
  370. }
  371. ret = i915_emit_cmds(dev, (int __user *)cmd->buf, cmd->sz / 4);
  372. if (ret)
  373. return ret;
  374. }
  375. return 0;
  376. }
  377. static int i915_dispatch_batchbuffer(drm_device_t * dev,
  378. drm_i915_batchbuffer_t * batch)
  379. {
  380. drm_i915_private_t *dev_priv = dev->dev_private;
  381. drm_clip_rect_t __user *boxes = batch->cliprects;
  382. int nbox = batch->num_cliprects;
  383. int i = 0, count;
  384. RING_LOCALS;
  385. if ((batch->start | batch->used) & 0x7) {
  386. DRM_ERROR("alignment");
  387. return DRM_ERR(EINVAL);
  388. }
  389. i915_kernel_lost_context(dev);
  390. count = nbox ? nbox : 1;
  391. for (i = 0; i < count; i++) {
  392. if (i < nbox) {
  393. int ret = i915_emit_box(dev, boxes, i,
  394. batch->DR1, batch->DR4);
  395. if (ret)
  396. return ret;
  397. }
  398. if (dev_priv->use_mi_batchbuffer_start) {
  399. BEGIN_LP_RING(2);
  400. OUT_RING(MI_BATCH_BUFFER_START | (2 << 6));
  401. OUT_RING(batch->start | MI_BATCH_NON_SECURE);
  402. ADVANCE_LP_RING();
  403. } else {
  404. BEGIN_LP_RING(4);
  405. OUT_RING(MI_BATCH_BUFFER);
  406. OUT_RING(batch->start | MI_BATCH_NON_SECURE);
  407. OUT_RING(batch->start + batch->used - 4);
  408. OUT_RING(0);
  409. ADVANCE_LP_RING();
  410. }
  411. }
  412. dev_priv->sarea_priv->last_enqueue = dev_priv->counter++;
  413. BEGIN_LP_RING(4);
  414. OUT_RING(CMD_STORE_DWORD_IDX);
  415. OUT_RING(20);
  416. OUT_RING(dev_priv->counter);
  417. OUT_RING(0);
  418. ADVANCE_LP_RING();
  419. return 0;
  420. }
  421. static int i915_dispatch_flip(drm_device_t * dev)
  422. {
  423. drm_i915_private_t *dev_priv = dev->dev_private;
  424. RING_LOCALS;
  425. DRM_DEBUG("%s: page=%d pfCurrentPage=%d\n",
  426. __FUNCTION__,
  427. dev_priv->current_page,
  428. dev_priv->sarea_priv->pf_current_page);
  429. i915_kernel_lost_context(dev);
  430. BEGIN_LP_RING(2);
  431. OUT_RING(INST_PARSER_CLIENT | INST_OP_FLUSH | INST_FLUSH_MAP_CACHE);
  432. OUT_RING(0);
  433. ADVANCE_LP_RING();
  434. BEGIN_LP_RING(6);
  435. OUT_RING(CMD_OP_DISPLAYBUFFER_INFO | ASYNC_FLIP);
  436. OUT_RING(0);
  437. if (dev_priv->current_page == 0) {
  438. OUT_RING(dev_priv->back_offset);
  439. dev_priv->current_page = 1;
  440. } else {
  441. OUT_RING(dev_priv->front_offset);
  442. dev_priv->current_page = 0;
  443. }
  444. OUT_RING(0);
  445. ADVANCE_LP_RING();
  446. BEGIN_LP_RING(2);
  447. OUT_RING(MI_WAIT_FOR_EVENT | MI_WAIT_FOR_PLANE_A_FLIP);
  448. OUT_RING(0);
  449. ADVANCE_LP_RING();
  450. dev_priv->sarea_priv->last_enqueue = dev_priv->counter++;
  451. BEGIN_LP_RING(4);
  452. OUT_RING(CMD_STORE_DWORD_IDX);
  453. OUT_RING(20);
  454. OUT_RING(dev_priv->counter);
  455. OUT_RING(0);
  456. ADVANCE_LP_RING();
  457. dev_priv->sarea_priv->pf_current_page = dev_priv->current_page;
  458. return 0;
  459. }
  460. static int i915_quiescent(drm_device_t * dev)
  461. {
  462. drm_i915_private_t *dev_priv = dev->dev_private;
  463. i915_kernel_lost_context(dev);
  464. return i915_wait_ring(dev, dev_priv->ring.Size - 8, __FUNCTION__);
  465. }
  466. int i915_flush_ioctl(DRM_IOCTL_ARGS)
  467. {
  468. DRM_DEVICE;
  469. LOCK_TEST_WITH_RETURN(dev, filp);
  470. return i915_quiescent(dev);
  471. }
  472. int i915_batchbuffer(DRM_IOCTL_ARGS)
  473. {
  474. DRM_DEVICE;
  475. drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
  476. u32 *hw_status = dev_priv->hw_status_page;
  477. drm_i915_sarea_t *sarea_priv = (drm_i915_sarea_t *)
  478. dev_priv->sarea_priv;
  479. drm_i915_batchbuffer_t batch;
  480. int ret;
  481. if (!dev_priv->allow_batchbuffer) {
  482. DRM_ERROR("Batchbuffer ioctl disabled\n");
  483. return DRM_ERR(EINVAL);
  484. }
  485. DRM_COPY_FROM_USER_IOCTL(batch, (drm_i915_batchbuffer_t __user *) data,
  486. sizeof(batch));
  487. DRM_DEBUG("i915 batchbuffer, start %x used %d cliprects %d\n",
  488. batch.start, batch.used, batch.num_cliprects);
  489. LOCK_TEST_WITH_RETURN(dev, filp);
  490. if (batch.num_cliprects && DRM_VERIFYAREA_READ(batch.cliprects,
  491. batch.num_cliprects *
  492. sizeof(drm_clip_rect_t)))
  493. return DRM_ERR(EFAULT);
  494. ret = i915_dispatch_batchbuffer(dev, &batch);
  495. sarea_priv->last_dispatch = (int)hw_status[5];
  496. return ret;
  497. }
  498. int i915_cmdbuffer(DRM_IOCTL_ARGS)
  499. {
  500. DRM_DEVICE;
  501. drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
  502. u32 *hw_status = dev_priv->hw_status_page;
  503. drm_i915_sarea_t *sarea_priv = (drm_i915_sarea_t *)
  504. dev_priv->sarea_priv;
  505. drm_i915_cmdbuffer_t cmdbuf;
  506. int ret;
  507. DRM_COPY_FROM_USER_IOCTL(cmdbuf, (drm_i915_cmdbuffer_t __user *) data,
  508. sizeof(cmdbuf));
  509. DRM_DEBUG("i915 cmdbuffer, buf %p sz %d cliprects %d\n",
  510. cmdbuf.buf, cmdbuf.sz, cmdbuf.num_cliprects);
  511. LOCK_TEST_WITH_RETURN(dev, filp);
  512. if (cmdbuf.num_cliprects &&
  513. DRM_VERIFYAREA_READ(cmdbuf.cliprects,
  514. cmdbuf.num_cliprects *
  515. sizeof(drm_clip_rect_t))) {
  516. DRM_ERROR("Fault accessing cliprects\n");
  517. return DRM_ERR(EFAULT);
  518. }
  519. ret = i915_dispatch_cmdbuffer(dev, &cmdbuf);
  520. if (ret) {
  521. DRM_ERROR("i915_dispatch_cmdbuffer failed\n");
  522. return ret;
  523. }
  524. sarea_priv->last_dispatch = (int)hw_status[5];
  525. return 0;
  526. }
  527. int i915_do_cleanup_pageflip(drm_device_t * dev)
  528. {
  529. drm_i915_private_t *dev_priv = dev->dev_private;
  530. DRM_DEBUG("%s\n", __FUNCTION__);
  531. if (dev_priv->current_page != 0)
  532. i915_dispatch_flip(dev);
  533. return 0;
  534. }
  535. int i915_flip_bufs(DRM_IOCTL_ARGS)
  536. {
  537. DRM_DEVICE;
  538. DRM_DEBUG("%s\n", __FUNCTION__);
  539. LOCK_TEST_WITH_RETURN(dev, filp);
  540. return i915_dispatch_flip(dev);
  541. }
  542. int i915_getparam(DRM_IOCTL_ARGS)
  543. {
  544. DRM_DEVICE;
  545. drm_i915_private_t *dev_priv = dev->dev_private;
  546. drm_i915_getparam_t param;
  547. int value;
  548. if (!dev_priv) {
  549. DRM_ERROR("%s called with no initialization\n", __FUNCTION__);
  550. return DRM_ERR(EINVAL);
  551. }
  552. DRM_COPY_FROM_USER_IOCTL(param, (drm_i915_getparam_t __user *) data,
  553. sizeof(param));
  554. switch (param.param) {
  555. case I915_PARAM_IRQ_ACTIVE:
  556. value = dev->irq ? 1 : 0;
  557. break;
  558. case I915_PARAM_ALLOW_BATCHBUFFER:
  559. value = dev_priv->allow_batchbuffer ? 1 : 0;
  560. break;
  561. default:
  562. DRM_ERROR("Unkown parameter %d\n", param.param);
  563. return DRM_ERR(EINVAL);
  564. }
  565. if (DRM_COPY_TO_USER(param.value, &value, sizeof(int))) {
  566. DRM_ERROR("DRM_COPY_TO_USER failed\n");
  567. return DRM_ERR(EFAULT);
  568. }
  569. return 0;
  570. }
  571. int i915_setparam(DRM_IOCTL_ARGS)
  572. {
  573. DRM_DEVICE;
  574. drm_i915_private_t *dev_priv = dev->dev_private;
  575. drm_i915_setparam_t param;
  576. if (!dev_priv) {
  577. DRM_ERROR("%s called with no initialization\n", __FUNCTION__);
  578. return DRM_ERR(EINVAL);
  579. }
  580. DRM_COPY_FROM_USER_IOCTL(param, (drm_i915_setparam_t __user *) data,
  581. sizeof(param));
  582. switch (param.param) {
  583. case I915_SETPARAM_USE_MI_BATCHBUFFER_START:
  584. dev_priv->use_mi_batchbuffer_start = param.value;
  585. break;
  586. case I915_SETPARAM_TEX_LRU_LOG_GRANULARITY:
  587. dev_priv->tex_lru_log_granularity = param.value;
  588. break;
  589. case I915_SETPARAM_ALLOW_BATCHBUFFER:
  590. dev_priv->allow_batchbuffer = param.value;
  591. break;
  592. default:
  593. DRM_ERROR("unknown parameter %d\n", param.param);
  594. return DRM_ERR(EINVAL);
  595. }
  596. return 0;
  597. }
  598. void i915_driver_pretakedown(drm_device_t *dev)
  599. {
  600. if ( dev->dev_private ) {
  601. drm_i915_private_t *dev_priv = dev->dev_private;
  602. i915_mem_takedown( &(dev_priv->agp_heap) );
  603. }
  604. i915_dma_cleanup( dev );
  605. }
  606. void i915_driver_prerelease(drm_device_t *dev, DRMFILE filp)
  607. {
  608. if ( dev->dev_private ) {
  609. drm_i915_private_t *dev_priv = dev->dev_private;
  610. i915_mem_release( dev, filp, dev_priv->agp_heap );
  611. }
  612. }