nicstar.c 88 KB

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  1. /******************************************************************************
  2. *
  3. * nicstar.c
  4. *
  5. * Device driver supporting CBR for IDT 77201/77211 "NICStAR" based cards.
  6. *
  7. * IMPORTANT: The included file nicstarmac.c was NOT WRITTEN BY ME.
  8. * It was taken from the frle-0.22 device driver.
  9. * As the file doesn't have a copyright notice, in the file
  10. * nicstarmac.copyright I put the copyright notice from the
  11. * frle-0.22 device driver.
  12. * Some code is based on the nicstar driver by M. Welsh.
  13. *
  14. * Author: Rui Prior (rprior@inescn.pt)
  15. * PowerPC support by Jay Talbott (jay_talbott@mcg.mot.com) April 1999
  16. *
  17. *
  18. * (C) INESC 1999
  19. *
  20. *
  21. ******************************************************************************/
  22. /**** IMPORTANT INFORMATION ***************************************************
  23. *
  24. * There are currently three types of spinlocks:
  25. *
  26. * 1 - Per card interrupt spinlock (to protect structures and such)
  27. * 2 - Per SCQ scq spinlock
  28. * 3 - Per card resource spinlock (to access registers, etc.)
  29. *
  30. * These must NEVER be grabbed in reverse order.
  31. *
  32. ******************************************************************************/
  33. /* Header files ***************************************************************/
  34. #include <linux/module.h>
  35. #include <linux/config.h>
  36. #include <linux/kernel.h>
  37. #include <linux/skbuff.h>
  38. #include <linux/atmdev.h>
  39. #include <linux/atm.h>
  40. #include <linux/pci.h>
  41. #include <linux/types.h>
  42. #include <linux/string.h>
  43. #include <linux/delay.h>
  44. #include <linux/init.h>
  45. #include <linux/sched.h>
  46. #include <linux/timer.h>
  47. #include <linux/interrupt.h>
  48. #include <linux/bitops.h>
  49. #include <asm/io.h>
  50. #include <asm/uaccess.h>
  51. #include <asm/atomic.h>
  52. #include "nicstar.h"
  53. #ifdef CONFIG_ATM_NICSTAR_USE_SUNI
  54. #include "suni.h"
  55. #endif /* CONFIG_ATM_NICSTAR_USE_SUNI */
  56. #ifdef CONFIG_ATM_NICSTAR_USE_IDT77105
  57. #include "idt77105.h"
  58. #endif /* CONFIG_ATM_NICSTAR_USE_IDT77105 */
  59. #if BITS_PER_LONG != 32
  60. # error FIXME: this driver requires a 32-bit platform
  61. #endif
  62. /* Additional code ************************************************************/
  63. #include "nicstarmac.c"
  64. /* Configurable parameters ****************************************************/
  65. #undef PHY_LOOPBACK
  66. #undef TX_DEBUG
  67. #undef RX_DEBUG
  68. #undef GENERAL_DEBUG
  69. #undef EXTRA_DEBUG
  70. #undef NS_USE_DESTRUCTORS /* For now keep this undefined unless you know
  71. you're going to use only raw ATM */
  72. /* Do not touch these *********************************************************/
  73. #ifdef TX_DEBUG
  74. #define TXPRINTK(args...) printk(args)
  75. #else
  76. #define TXPRINTK(args...)
  77. #endif /* TX_DEBUG */
  78. #ifdef RX_DEBUG
  79. #define RXPRINTK(args...) printk(args)
  80. #else
  81. #define RXPRINTK(args...)
  82. #endif /* RX_DEBUG */
  83. #ifdef GENERAL_DEBUG
  84. #define PRINTK(args...) printk(args)
  85. #else
  86. #define PRINTK(args...)
  87. #endif /* GENERAL_DEBUG */
  88. #ifdef EXTRA_DEBUG
  89. #define XPRINTK(args...) printk(args)
  90. #else
  91. #define XPRINTK(args...)
  92. #endif /* EXTRA_DEBUG */
  93. /* Macros *********************************************************************/
  94. #define CMD_BUSY(card) (readl((card)->membase + STAT) & NS_STAT_CMDBZ)
  95. #define NS_DELAY mdelay(1)
  96. #define ALIGN_BUS_ADDR(addr, alignment) \
  97. ((((u32) (addr)) + (((u32) (alignment)) - 1)) & ~(((u32) (alignment)) - 1))
  98. #define ALIGN_ADDRESS(addr, alignment) \
  99. bus_to_virt(ALIGN_BUS_ADDR(virt_to_bus(addr), alignment))
  100. #undef CEIL
  101. #ifndef ATM_SKB
  102. #define ATM_SKB(s) (&(s)->atm)
  103. #endif
  104. /* Spinlock debugging stuff */
  105. #ifdef NS_DEBUG_SPINLOCKS /* See nicstar.h */
  106. #define ns_grab_int_lock(card,flags) \
  107. do { \
  108. unsigned long nsdsf, nsdsf2; \
  109. local_irq_save(flags); \
  110. save_flags(nsdsf); cli();\
  111. if (nsdsf & (1<<9)) printk ("nicstar.c: ints %sabled -> enabled.\n", \
  112. (flags)&(1<<9)?"en":"dis"); \
  113. if (spin_is_locked(&(card)->int_lock) && \
  114. (card)->cpu_int == smp_processor_id()) { \
  115. printk("nicstar.c: line %d (cpu %d) int_lock already locked at line %d (cpu %d)\n", \
  116. __LINE__, smp_processor_id(), (card)->has_int_lock, \
  117. (card)->cpu_int); \
  118. printk("nicstar.c: ints were %sabled.\n", ((flags)&(1<<9)?"en":"dis")); \
  119. } \
  120. if (spin_is_locked(&(card)->res_lock) && \
  121. (card)->cpu_res == smp_processor_id()) { \
  122. printk("nicstar.c: line %d (cpu %d) res_lock locked at line %d (cpu %d)(trying int)\n", \
  123. __LINE__, smp_processor_id(), (card)->has_res_lock, \
  124. (card)->cpu_res); \
  125. printk("nicstar.c: ints were %sabled.\n", ((flags)&(1<<9)?"en":"dis")); \
  126. } \
  127. spin_lock_irq(&(card)->int_lock); \
  128. (card)->has_int_lock = __LINE__; \
  129. (card)->cpu_int = smp_processor_id(); \
  130. restore_flags(nsdsf); } while (0)
  131. #define ns_grab_res_lock(card,flags) \
  132. do { \
  133. unsigned long nsdsf, nsdsf2; \
  134. local_irq_save(flags); \
  135. save_flags(nsdsf); cli();\
  136. if (nsdsf & (1<<9)) printk ("nicstar.c: ints %sabled -> enabled.\n", \
  137. (flags)&(1<<9)?"en":"dis"); \
  138. if (spin_is_locked(&(card)->res_lock) && \
  139. (card)->cpu_res == smp_processor_id()) { \
  140. printk("nicstar.c: line %d (cpu %d) res_lock already locked at line %d (cpu %d)\n", \
  141. __LINE__, smp_processor_id(), (card)->has_res_lock, \
  142. (card)->cpu_res); \
  143. printk("nicstar.c: ints were %sabled.\n", ((flags)&(1<<9)?"en":"dis")); \
  144. } \
  145. spin_lock_irq(&(card)->res_lock); \
  146. (card)->has_res_lock = __LINE__; \
  147. (card)->cpu_res = smp_processor_id(); \
  148. restore_flags(nsdsf); } while (0)
  149. #define ns_grab_scq_lock(card,scq,flags) \
  150. do { \
  151. unsigned long nsdsf, nsdsf2; \
  152. local_irq_save(flags); \
  153. save_flags(nsdsf); cli();\
  154. if (nsdsf & (1<<9)) printk ("nicstar.c: ints %sabled -> enabled.\n", \
  155. (flags)&(1<<9)?"en":"dis"); \
  156. if (spin_is_locked(&(scq)->lock) && \
  157. (scq)->cpu_lock == smp_processor_id()) { \
  158. printk("nicstar.c: line %d (cpu %d) this scq_lock already locked at line %d (cpu %d)\n", \
  159. __LINE__, smp_processor_id(), (scq)->has_lock, \
  160. (scq)->cpu_lock); \
  161. printk("nicstar.c: ints were %sabled.\n", ((flags)&(1<<9)?"en":"dis")); \
  162. } \
  163. if (spin_is_locked(&(card)->res_lock) && \
  164. (card)->cpu_res == smp_processor_id()) { \
  165. printk("nicstar.c: line %d (cpu %d) res_lock locked at line %d (cpu %d)(trying scq)\n", \
  166. __LINE__, smp_processor_id(), (card)->has_res_lock, \
  167. (card)->cpu_res); \
  168. printk("nicstar.c: ints were %sabled.\n", ((flags)&(1<<9)?"en":"dis")); \
  169. } \
  170. spin_lock_irq(&(scq)->lock); \
  171. (scq)->has_lock = __LINE__; \
  172. (scq)->cpu_lock = smp_processor_id(); \
  173. restore_flags(nsdsf); } while (0)
  174. #else /* !NS_DEBUG_SPINLOCKS */
  175. #define ns_grab_int_lock(card,flags) \
  176. spin_lock_irqsave(&(card)->int_lock,(flags))
  177. #define ns_grab_res_lock(card,flags) \
  178. spin_lock_irqsave(&(card)->res_lock,(flags))
  179. #define ns_grab_scq_lock(card,scq,flags) \
  180. spin_lock_irqsave(&(scq)->lock,flags)
  181. #endif /* NS_DEBUG_SPINLOCKS */
  182. /* Function declarations ******************************************************/
  183. static u32 ns_read_sram(ns_dev *card, u32 sram_address);
  184. static void ns_write_sram(ns_dev *card, u32 sram_address, u32 *value, int count);
  185. static int __devinit ns_init_card(int i, struct pci_dev *pcidev);
  186. static void __devinit ns_init_card_error(ns_dev *card, int error);
  187. static scq_info *get_scq(int size, u32 scd);
  188. static void free_scq(scq_info *scq, struct atm_vcc *vcc);
  189. static void push_rxbufs(ns_dev *card, u32 type, u32 handle1, u32 addr1,
  190. u32 handle2, u32 addr2);
  191. static irqreturn_t ns_irq_handler(int irq, void *dev_id, struct pt_regs *regs);
  192. static int ns_open(struct atm_vcc *vcc);
  193. static void ns_close(struct atm_vcc *vcc);
  194. static void fill_tst(ns_dev *card, int n, vc_map *vc);
  195. static int ns_send(struct atm_vcc *vcc, struct sk_buff *skb);
  196. static int push_scqe(ns_dev *card, vc_map *vc, scq_info *scq, ns_scqe *tbd,
  197. struct sk_buff *skb);
  198. static void process_tsq(ns_dev *card);
  199. static void drain_scq(ns_dev *card, scq_info *scq, int pos);
  200. static void process_rsq(ns_dev *card);
  201. static void dequeue_rx(ns_dev *card, ns_rsqe *rsqe);
  202. #ifdef NS_USE_DESTRUCTORS
  203. static void ns_sb_destructor(struct sk_buff *sb);
  204. static void ns_lb_destructor(struct sk_buff *lb);
  205. static void ns_hb_destructor(struct sk_buff *hb);
  206. #endif /* NS_USE_DESTRUCTORS */
  207. static void recycle_rx_buf(ns_dev *card, struct sk_buff *skb);
  208. static void recycle_iovec_rx_bufs(ns_dev *card, struct iovec *iov, int count);
  209. static void recycle_iov_buf(ns_dev *card, struct sk_buff *iovb);
  210. static void dequeue_sm_buf(ns_dev *card, struct sk_buff *sb);
  211. static void dequeue_lg_buf(ns_dev *card, struct sk_buff *lb);
  212. static int ns_proc_read(struct atm_dev *dev, loff_t *pos, char *page);
  213. static int ns_ioctl(struct atm_dev *dev, unsigned int cmd, void __user *arg);
  214. static void which_list(ns_dev *card, struct sk_buff *skb);
  215. static void ns_poll(unsigned long arg);
  216. static int ns_parse_mac(char *mac, unsigned char *esi);
  217. static short ns_h2i(char c);
  218. static void ns_phy_put(struct atm_dev *dev, unsigned char value,
  219. unsigned long addr);
  220. static unsigned char ns_phy_get(struct atm_dev *dev, unsigned long addr);
  221. /* Global variables ***********************************************************/
  222. static struct ns_dev *cards[NS_MAX_CARDS];
  223. static unsigned num_cards;
  224. static struct atmdev_ops atm_ops =
  225. {
  226. .open = ns_open,
  227. .close = ns_close,
  228. .ioctl = ns_ioctl,
  229. .send = ns_send,
  230. .phy_put = ns_phy_put,
  231. .phy_get = ns_phy_get,
  232. .proc_read = ns_proc_read,
  233. .owner = THIS_MODULE,
  234. };
  235. static struct timer_list ns_timer;
  236. static char *mac[NS_MAX_CARDS];
  237. module_param_array(mac, charp, NULL, 0);
  238. MODULE_LICENSE("GPL");
  239. /* Functions*******************************************************************/
  240. static int __devinit nicstar_init_one(struct pci_dev *pcidev,
  241. const struct pci_device_id *ent)
  242. {
  243. static int index = -1;
  244. unsigned int error;
  245. index++;
  246. cards[index] = NULL;
  247. error = ns_init_card(index, pcidev);
  248. if (error) {
  249. cards[index--] = NULL; /* don't increment index */
  250. goto err_out;
  251. }
  252. return 0;
  253. err_out:
  254. return -ENODEV;
  255. }
  256. static void __devexit nicstar_remove_one(struct pci_dev *pcidev)
  257. {
  258. int i, j;
  259. ns_dev *card = pci_get_drvdata(pcidev);
  260. struct sk_buff *hb;
  261. struct sk_buff *iovb;
  262. struct sk_buff *lb;
  263. struct sk_buff *sb;
  264. i = card->index;
  265. if (cards[i] == NULL)
  266. return;
  267. if (card->atmdev->phy && card->atmdev->phy->stop)
  268. card->atmdev->phy->stop(card->atmdev);
  269. /* Stop everything */
  270. writel(0x00000000, card->membase + CFG);
  271. /* De-register device */
  272. atm_dev_deregister(card->atmdev);
  273. /* Disable PCI device */
  274. pci_disable_device(pcidev);
  275. /* Free up resources */
  276. j = 0;
  277. PRINTK("nicstar%d: freeing %d huge buffers.\n", i, card->hbpool.count);
  278. while ((hb = skb_dequeue(&card->hbpool.queue)) != NULL)
  279. {
  280. dev_kfree_skb_any(hb);
  281. j++;
  282. }
  283. PRINTK("nicstar%d: %d huge buffers freed.\n", i, j);
  284. j = 0;
  285. PRINTK("nicstar%d: freeing %d iovec buffers.\n", i, card->iovpool.count);
  286. while ((iovb = skb_dequeue(&card->iovpool.queue)) != NULL)
  287. {
  288. dev_kfree_skb_any(iovb);
  289. j++;
  290. }
  291. PRINTK("nicstar%d: %d iovec buffers freed.\n", i, j);
  292. while ((lb = skb_dequeue(&card->lbpool.queue)) != NULL)
  293. dev_kfree_skb_any(lb);
  294. while ((sb = skb_dequeue(&card->sbpool.queue)) != NULL)
  295. dev_kfree_skb_any(sb);
  296. free_scq(card->scq0, NULL);
  297. for (j = 0; j < NS_FRSCD_NUM; j++)
  298. {
  299. if (card->scd2vc[j] != NULL)
  300. free_scq(card->scd2vc[j]->scq, card->scd2vc[j]->tx_vcc);
  301. }
  302. kfree(card->rsq.org);
  303. kfree(card->tsq.org);
  304. free_irq(card->pcidev->irq, card);
  305. iounmap(card->membase);
  306. kfree(card);
  307. }
  308. static struct pci_device_id nicstar_pci_tbl[] __devinitdata =
  309. {
  310. {PCI_VENDOR_ID_IDT, PCI_DEVICE_ID_IDT_IDT77201,
  311. PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
  312. {0,} /* terminate list */
  313. };
  314. MODULE_DEVICE_TABLE(pci, nicstar_pci_tbl);
  315. static struct pci_driver nicstar_driver = {
  316. .name = "nicstar",
  317. .id_table = nicstar_pci_tbl,
  318. .probe = nicstar_init_one,
  319. .remove = __devexit_p(nicstar_remove_one),
  320. };
  321. static int __init nicstar_init(void)
  322. {
  323. unsigned error = 0; /* Initialized to remove compile warning */
  324. XPRINTK("nicstar: nicstar_init() called.\n");
  325. error = pci_register_driver(&nicstar_driver);
  326. TXPRINTK("nicstar: TX debug enabled.\n");
  327. RXPRINTK("nicstar: RX debug enabled.\n");
  328. PRINTK("nicstar: General debug enabled.\n");
  329. #ifdef PHY_LOOPBACK
  330. printk("nicstar: using PHY loopback.\n");
  331. #endif /* PHY_LOOPBACK */
  332. XPRINTK("nicstar: nicstar_init() returned.\n");
  333. if (!error) {
  334. init_timer(&ns_timer);
  335. ns_timer.expires = jiffies + NS_POLL_PERIOD;
  336. ns_timer.data = 0UL;
  337. ns_timer.function = ns_poll;
  338. add_timer(&ns_timer);
  339. }
  340. return error;
  341. }
  342. static void __exit nicstar_cleanup(void)
  343. {
  344. XPRINTK("nicstar: nicstar_cleanup() called.\n");
  345. del_timer(&ns_timer);
  346. pci_unregister_driver(&nicstar_driver);
  347. XPRINTK("nicstar: nicstar_cleanup() returned.\n");
  348. }
  349. static u32 ns_read_sram(ns_dev *card, u32 sram_address)
  350. {
  351. unsigned long flags;
  352. u32 data;
  353. sram_address <<= 2;
  354. sram_address &= 0x0007FFFC; /* address must be dword aligned */
  355. sram_address |= 0x50000000; /* SRAM read command */
  356. ns_grab_res_lock(card, flags);
  357. while (CMD_BUSY(card));
  358. writel(sram_address, card->membase + CMD);
  359. while (CMD_BUSY(card));
  360. data = readl(card->membase + DR0);
  361. spin_unlock_irqrestore(&card->res_lock, flags);
  362. return data;
  363. }
  364. static void ns_write_sram(ns_dev *card, u32 sram_address, u32 *value, int count)
  365. {
  366. unsigned long flags;
  367. int i, c;
  368. count--; /* count range now is 0..3 instead of 1..4 */
  369. c = count;
  370. c <<= 2; /* to use increments of 4 */
  371. ns_grab_res_lock(card, flags);
  372. while (CMD_BUSY(card));
  373. for (i = 0; i <= c; i += 4)
  374. writel(*(value++), card->membase + i);
  375. /* Note: DR# registers are the first 4 dwords in nicstar's memspace,
  376. so card->membase + DR0 == card->membase */
  377. sram_address <<= 2;
  378. sram_address &= 0x0007FFFC;
  379. sram_address |= (0x40000000 | count);
  380. writel(sram_address, card->membase + CMD);
  381. spin_unlock_irqrestore(&card->res_lock, flags);
  382. }
  383. static int __devinit ns_init_card(int i, struct pci_dev *pcidev)
  384. {
  385. int j;
  386. struct ns_dev *card = NULL;
  387. unsigned char pci_latency;
  388. unsigned error;
  389. u32 data;
  390. u32 u32d[4];
  391. u32 ns_cfg_rctsize;
  392. int bcount;
  393. unsigned long membase;
  394. error = 0;
  395. if (pci_enable_device(pcidev))
  396. {
  397. printk("nicstar%d: can't enable PCI device\n", i);
  398. error = 2;
  399. ns_init_card_error(card, error);
  400. return error;
  401. }
  402. if ((card = kmalloc(sizeof(ns_dev), GFP_KERNEL)) == NULL)
  403. {
  404. printk("nicstar%d: can't allocate memory for device structure.\n", i);
  405. error = 2;
  406. ns_init_card_error(card, error);
  407. return error;
  408. }
  409. cards[i] = card;
  410. spin_lock_init(&card->int_lock);
  411. spin_lock_init(&card->res_lock);
  412. pci_set_drvdata(pcidev, card);
  413. card->index = i;
  414. card->atmdev = NULL;
  415. card->pcidev = pcidev;
  416. membase = pci_resource_start(pcidev, 1);
  417. card->membase = ioremap(membase, NS_IOREMAP_SIZE);
  418. if (card->membase == 0)
  419. {
  420. printk("nicstar%d: can't ioremap() membase.\n",i);
  421. error = 3;
  422. ns_init_card_error(card, error);
  423. return error;
  424. }
  425. PRINTK("nicstar%d: membase at 0x%x.\n", i, card->membase);
  426. pci_set_master(pcidev);
  427. if (pci_read_config_byte(pcidev, PCI_LATENCY_TIMER, &pci_latency) != 0)
  428. {
  429. printk("nicstar%d: can't read PCI latency timer.\n", i);
  430. error = 6;
  431. ns_init_card_error(card, error);
  432. return error;
  433. }
  434. #ifdef NS_PCI_LATENCY
  435. if (pci_latency < NS_PCI_LATENCY)
  436. {
  437. PRINTK("nicstar%d: setting PCI latency timer to %d.\n", i, NS_PCI_LATENCY);
  438. for (j = 1; j < 4; j++)
  439. {
  440. if (pci_write_config_byte(pcidev, PCI_LATENCY_TIMER, NS_PCI_LATENCY) != 0)
  441. break;
  442. }
  443. if (j == 4)
  444. {
  445. printk("nicstar%d: can't set PCI latency timer to %d.\n", i, NS_PCI_LATENCY);
  446. error = 7;
  447. ns_init_card_error(card, error);
  448. return error;
  449. }
  450. }
  451. #endif /* NS_PCI_LATENCY */
  452. /* Clear timer overflow */
  453. data = readl(card->membase + STAT);
  454. if (data & NS_STAT_TMROF)
  455. writel(NS_STAT_TMROF, card->membase + STAT);
  456. /* Software reset */
  457. writel(NS_CFG_SWRST, card->membase + CFG);
  458. NS_DELAY;
  459. writel(0x00000000, card->membase + CFG);
  460. /* PHY reset */
  461. writel(0x00000008, card->membase + GP);
  462. NS_DELAY;
  463. writel(0x00000001, card->membase + GP);
  464. NS_DELAY;
  465. while (CMD_BUSY(card));
  466. writel(NS_CMD_WRITE_UTILITY | 0x00000100, card->membase + CMD); /* Sync UTOPIA with SAR clock */
  467. NS_DELAY;
  468. /* Detect PHY type */
  469. while (CMD_BUSY(card));
  470. writel(NS_CMD_READ_UTILITY | 0x00000200, card->membase + CMD);
  471. while (CMD_BUSY(card));
  472. data = readl(card->membase + DR0);
  473. switch(data) {
  474. case 0x00000009:
  475. printk("nicstar%d: PHY seems to be 25 Mbps.\n", i);
  476. card->max_pcr = ATM_25_PCR;
  477. while(CMD_BUSY(card));
  478. writel(0x00000008, card->membase + DR0);
  479. writel(NS_CMD_WRITE_UTILITY | 0x00000200, card->membase + CMD);
  480. /* Clear an eventual pending interrupt */
  481. writel(NS_STAT_SFBQF, card->membase + STAT);
  482. #ifdef PHY_LOOPBACK
  483. while(CMD_BUSY(card));
  484. writel(0x00000022, card->membase + DR0);
  485. writel(NS_CMD_WRITE_UTILITY | 0x00000202, card->membase + CMD);
  486. #endif /* PHY_LOOPBACK */
  487. break;
  488. case 0x00000030:
  489. case 0x00000031:
  490. printk("nicstar%d: PHY seems to be 155 Mbps.\n", i);
  491. card->max_pcr = ATM_OC3_PCR;
  492. #ifdef PHY_LOOPBACK
  493. while(CMD_BUSY(card));
  494. writel(0x00000002, card->membase + DR0);
  495. writel(NS_CMD_WRITE_UTILITY | 0x00000205, card->membase + CMD);
  496. #endif /* PHY_LOOPBACK */
  497. break;
  498. default:
  499. printk("nicstar%d: unknown PHY type (0x%08X).\n", i, data);
  500. error = 8;
  501. ns_init_card_error(card, error);
  502. return error;
  503. }
  504. writel(0x00000000, card->membase + GP);
  505. /* Determine SRAM size */
  506. data = 0x76543210;
  507. ns_write_sram(card, 0x1C003, &data, 1);
  508. data = 0x89ABCDEF;
  509. ns_write_sram(card, 0x14003, &data, 1);
  510. if (ns_read_sram(card, 0x14003) == 0x89ABCDEF &&
  511. ns_read_sram(card, 0x1C003) == 0x76543210)
  512. card->sram_size = 128;
  513. else
  514. card->sram_size = 32;
  515. PRINTK("nicstar%d: %dK x 32bit SRAM size.\n", i, card->sram_size);
  516. card->rct_size = NS_MAX_RCTSIZE;
  517. #if (NS_MAX_RCTSIZE == 4096)
  518. if (card->sram_size == 128)
  519. printk("nicstar%d: limiting maximum VCI. See NS_MAX_RCTSIZE in nicstar.h\n", i);
  520. #elif (NS_MAX_RCTSIZE == 16384)
  521. if (card->sram_size == 32)
  522. {
  523. printk("nicstar%d: wasting memory. See NS_MAX_RCTSIZE in nicstar.h\n", i);
  524. card->rct_size = 4096;
  525. }
  526. #else
  527. #error NS_MAX_RCTSIZE must be either 4096 or 16384 in nicstar.c
  528. #endif
  529. card->vpibits = NS_VPIBITS;
  530. if (card->rct_size == 4096)
  531. card->vcibits = 12 - NS_VPIBITS;
  532. else /* card->rct_size == 16384 */
  533. card->vcibits = 14 - NS_VPIBITS;
  534. /* Initialize the nicstar eeprom/eprom stuff, for the MAC addr */
  535. if (mac[i] == NULL)
  536. nicstar_init_eprom(card->membase);
  537. if (request_irq(pcidev->irq, &ns_irq_handler, SA_INTERRUPT | SA_SHIRQ, "nicstar", card) != 0)
  538. {
  539. printk("nicstar%d: can't allocate IRQ %d.\n", i, pcidev->irq);
  540. error = 9;
  541. ns_init_card_error(card, error);
  542. return error;
  543. }
  544. /* Set the VPI/VCI MSb mask to zero so we can receive OAM cells */
  545. writel(0x00000000, card->membase + VPM);
  546. /* Initialize TSQ */
  547. card->tsq.org = kmalloc(NS_TSQSIZE + NS_TSQ_ALIGNMENT, GFP_KERNEL);
  548. if (card->tsq.org == NULL)
  549. {
  550. printk("nicstar%d: can't allocate TSQ.\n", i);
  551. error = 10;
  552. ns_init_card_error(card, error);
  553. return error;
  554. }
  555. card->tsq.base = (ns_tsi *) ALIGN_ADDRESS(card->tsq.org, NS_TSQ_ALIGNMENT);
  556. card->tsq.next = card->tsq.base;
  557. card->tsq.last = card->tsq.base + (NS_TSQ_NUM_ENTRIES - 1);
  558. for (j = 0; j < NS_TSQ_NUM_ENTRIES; j++)
  559. ns_tsi_init(card->tsq.base + j);
  560. writel(0x00000000, card->membase + TSQH);
  561. writel((u32) virt_to_bus(card->tsq.base), card->membase + TSQB);
  562. PRINTK("nicstar%d: TSQ base at 0x%x 0x%x 0x%x.\n", i, (u32) card->tsq.base,
  563. (u32) virt_to_bus(card->tsq.base), readl(card->membase + TSQB));
  564. /* Initialize RSQ */
  565. card->rsq.org = kmalloc(NS_RSQSIZE + NS_RSQ_ALIGNMENT, GFP_KERNEL);
  566. if (card->rsq.org == NULL)
  567. {
  568. printk("nicstar%d: can't allocate RSQ.\n", i);
  569. error = 11;
  570. ns_init_card_error(card, error);
  571. return error;
  572. }
  573. card->rsq.base = (ns_rsqe *) ALIGN_ADDRESS(card->rsq.org, NS_RSQ_ALIGNMENT);
  574. card->rsq.next = card->rsq.base;
  575. card->rsq.last = card->rsq.base + (NS_RSQ_NUM_ENTRIES - 1);
  576. for (j = 0; j < NS_RSQ_NUM_ENTRIES; j++)
  577. ns_rsqe_init(card->rsq.base + j);
  578. writel(0x00000000, card->membase + RSQH);
  579. writel((u32) virt_to_bus(card->rsq.base), card->membase + RSQB);
  580. PRINTK("nicstar%d: RSQ base at 0x%x.\n", i, (u32) card->rsq.base);
  581. /* Initialize SCQ0, the only VBR SCQ used */
  582. card->scq1 = NULL;
  583. card->scq2 = NULL;
  584. card->scq0 = get_scq(VBR_SCQSIZE, NS_VRSCD0);
  585. if (card->scq0 == NULL)
  586. {
  587. printk("nicstar%d: can't get SCQ0.\n", i);
  588. error = 12;
  589. ns_init_card_error(card, error);
  590. return error;
  591. }
  592. u32d[0] = (u32) virt_to_bus(card->scq0->base);
  593. u32d[1] = (u32) 0x00000000;
  594. u32d[2] = (u32) 0xffffffff;
  595. u32d[3] = (u32) 0x00000000;
  596. ns_write_sram(card, NS_VRSCD0, u32d, 4);
  597. ns_write_sram(card, NS_VRSCD1, u32d, 4); /* These last two won't be used */
  598. ns_write_sram(card, NS_VRSCD2, u32d, 4); /* but are initialized, just in case... */
  599. card->scq0->scd = NS_VRSCD0;
  600. PRINTK("nicstar%d: VBR-SCQ0 base at 0x%x.\n", i, (u32) card->scq0->base);
  601. /* Initialize TSTs */
  602. card->tst_addr = NS_TST0;
  603. card->tst_free_entries = NS_TST_NUM_ENTRIES;
  604. data = NS_TST_OPCODE_VARIABLE;
  605. for (j = 0; j < NS_TST_NUM_ENTRIES; j++)
  606. ns_write_sram(card, NS_TST0 + j, &data, 1);
  607. data = ns_tste_make(NS_TST_OPCODE_END, NS_TST0);
  608. ns_write_sram(card, NS_TST0 + NS_TST_NUM_ENTRIES, &data, 1);
  609. for (j = 0; j < NS_TST_NUM_ENTRIES; j++)
  610. ns_write_sram(card, NS_TST1 + j, &data, 1);
  611. data = ns_tste_make(NS_TST_OPCODE_END, NS_TST1);
  612. ns_write_sram(card, NS_TST1 + NS_TST_NUM_ENTRIES, &data, 1);
  613. for (j = 0; j < NS_TST_NUM_ENTRIES; j++)
  614. card->tste2vc[j] = NULL;
  615. writel(NS_TST0 << 2, card->membase + TSTB);
  616. /* Initialize RCT. AAL type is set on opening the VC. */
  617. #ifdef RCQ_SUPPORT
  618. u32d[0] = NS_RCTE_RAWCELLINTEN;
  619. #else
  620. u32d[0] = 0x00000000;
  621. #endif /* RCQ_SUPPORT */
  622. u32d[1] = 0x00000000;
  623. u32d[2] = 0x00000000;
  624. u32d[3] = 0xFFFFFFFF;
  625. for (j = 0; j < card->rct_size; j++)
  626. ns_write_sram(card, j * 4, u32d, 4);
  627. memset(card->vcmap, 0, NS_MAX_RCTSIZE * sizeof(vc_map));
  628. for (j = 0; j < NS_FRSCD_NUM; j++)
  629. card->scd2vc[j] = NULL;
  630. /* Initialize buffer levels */
  631. card->sbnr.min = MIN_SB;
  632. card->sbnr.init = NUM_SB;
  633. card->sbnr.max = MAX_SB;
  634. card->lbnr.min = MIN_LB;
  635. card->lbnr.init = NUM_LB;
  636. card->lbnr.max = MAX_LB;
  637. card->iovnr.min = MIN_IOVB;
  638. card->iovnr.init = NUM_IOVB;
  639. card->iovnr.max = MAX_IOVB;
  640. card->hbnr.min = MIN_HB;
  641. card->hbnr.init = NUM_HB;
  642. card->hbnr.max = MAX_HB;
  643. card->sm_handle = 0x00000000;
  644. card->sm_addr = 0x00000000;
  645. card->lg_handle = 0x00000000;
  646. card->lg_addr = 0x00000000;
  647. card->efbie = 1; /* To prevent push_rxbufs from enabling the interrupt */
  648. /* Pre-allocate some huge buffers */
  649. skb_queue_head_init(&card->hbpool.queue);
  650. card->hbpool.count = 0;
  651. for (j = 0; j < NUM_HB; j++)
  652. {
  653. struct sk_buff *hb;
  654. hb = __dev_alloc_skb(NS_HBUFSIZE, GFP_KERNEL);
  655. if (hb == NULL)
  656. {
  657. printk("nicstar%d: can't allocate %dth of %d huge buffers.\n",
  658. i, j, NUM_HB);
  659. error = 13;
  660. ns_init_card_error(card, error);
  661. return error;
  662. }
  663. skb_queue_tail(&card->hbpool.queue, hb);
  664. card->hbpool.count++;
  665. }
  666. /* Allocate large buffers */
  667. skb_queue_head_init(&card->lbpool.queue);
  668. card->lbpool.count = 0; /* Not used */
  669. for (j = 0; j < NUM_LB; j++)
  670. {
  671. struct sk_buff *lb;
  672. lb = __dev_alloc_skb(NS_LGSKBSIZE, GFP_KERNEL);
  673. if (lb == NULL)
  674. {
  675. printk("nicstar%d: can't allocate %dth of %d large buffers.\n",
  676. i, j, NUM_LB);
  677. error = 14;
  678. ns_init_card_error(card, error);
  679. return error;
  680. }
  681. skb_queue_tail(&card->lbpool.queue, lb);
  682. skb_reserve(lb, NS_SMBUFSIZE);
  683. push_rxbufs(card, BUF_LG, (u32) lb, (u32) virt_to_bus(lb->data), 0, 0);
  684. /* Due to the implementation of push_rxbufs() this is 1, not 0 */
  685. if (j == 1)
  686. {
  687. card->rcbuf = lb;
  688. card->rawch = (u32) virt_to_bus(lb->data);
  689. }
  690. }
  691. /* Test for strange behaviour which leads to crashes */
  692. if ((bcount = ns_stat_lfbqc_get(readl(card->membase + STAT))) < card->lbnr.min)
  693. {
  694. printk("nicstar%d: Strange... Just allocated %d large buffers and lfbqc = %d.\n",
  695. i, j, bcount);
  696. error = 14;
  697. ns_init_card_error(card, error);
  698. return error;
  699. }
  700. /* Allocate small buffers */
  701. skb_queue_head_init(&card->sbpool.queue);
  702. card->sbpool.count = 0; /* Not used */
  703. for (j = 0; j < NUM_SB; j++)
  704. {
  705. struct sk_buff *sb;
  706. sb = __dev_alloc_skb(NS_SMSKBSIZE, GFP_KERNEL);
  707. if (sb == NULL)
  708. {
  709. printk("nicstar%d: can't allocate %dth of %d small buffers.\n",
  710. i, j, NUM_SB);
  711. error = 15;
  712. ns_init_card_error(card, error);
  713. return error;
  714. }
  715. skb_queue_tail(&card->sbpool.queue, sb);
  716. skb_reserve(sb, NS_AAL0_HEADER);
  717. push_rxbufs(card, BUF_SM, (u32) sb, (u32) virt_to_bus(sb->data), 0, 0);
  718. }
  719. /* Test for strange behaviour which leads to crashes */
  720. if ((bcount = ns_stat_sfbqc_get(readl(card->membase + STAT))) < card->sbnr.min)
  721. {
  722. printk("nicstar%d: Strange... Just allocated %d small buffers and sfbqc = %d.\n",
  723. i, j, bcount);
  724. error = 15;
  725. ns_init_card_error(card, error);
  726. return error;
  727. }
  728. /* Allocate iovec buffers */
  729. skb_queue_head_init(&card->iovpool.queue);
  730. card->iovpool.count = 0;
  731. for (j = 0; j < NUM_IOVB; j++)
  732. {
  733. struct sk_buff *iovb;
  734. iovb = alloc_skb(NS_IOVBUFSIZE, GFP_KERNEL);
  735. if (iovb == NULL)
  736. {
  737. printk("nicstar%d: can't allocate %dth of %d iovec buffers.\n",
  738. i, j, NUM_IOVB);
  739. error = 16;
  740. ns_init_card_error(card, error);
  741. return error;
  742. }
  743. skb_queue_tail(&card->iovpool.queue, iovb);
  744. card->iovpool.count++;
  745. }
  746. card->intcnt = 0;
  747. /* Configure NICStAR */
  748. if (card->rct_size == 4096)
  749. ns_cfg_rctsize = NS_CFG_RCTSIZE_4096_ENTRIES;
  750. else /* (card->rct_size == 16384) */
  751. ns_cfg_rctsize = NS_CFG_RCTSIZE_16384_ENTRIES;
  752. card->efbie = 1;
  753. /* Register device */
  754. card->atmdev = atm_dev_register("nicstar", &atm_ops, -1, NULL);
  755. if (card->atmdev == NULL)
  756. {
  757. printk("nicstar%d: can't register device.\n", i);
  758. error = 17;
  759. ns_init_card_error(card, error);
  760. return error;
  761. }
  762. if (ns_parse_mac(mac[i], card->atmdev->esi)) {
  763. nicstar_read_eprom(card->membase, NICSTAR_EPROM_MAC_ADDR_OFFSET,
  764. card->atmdev->esi, 6);
  765. if (memcmp(card->atmdev->esi, "\x00\x00\x00\x00\x00\x00", 6) == 0) {
  766. nicstar_read_eprom(card->membase, NICSTAR_EPROM_MAC_ADDR_OFFSET_ALT,
  767. card->atmdev->esi, 6);
  768. }
  769. }
  770. printk("nicstar%d: MAC address %02X:%02X:%02X:%02X:%02X:%02X\n", i,
  771. card->atmdev->esi[0], card->atmdev->esi[1], card->atmdev->esi[2],
  772. card->atmdev->esi[3], card->atmdev->esi[4], card->atmdev->esi[5]);
  773. card->atmdev->dev_data = card;
  774. card->atmdev->ci_range.vpi_bits = card->vpibits;
  775. card->atmdev->ci_range.vci_bits = card->vcibits;
  776. card->atmdev->link_rate = card->max_pcr;
  777. card->atmdev->phy = NULL;
  778. #ifdef CONFIG_ATM_NICSTAR_USE_SUNI
  779. if (card->max_pcr == ATM_OC3_PCR)
  780. suni_init(card->atmdev);
  781. #endif /* CONFIG_ATM_NICSTAR_USE_SUNI */
  782. #ifdef CONFIG_ATM_NICSTAR_USE_IDT77105
  783. if (card->max_pcr == ATM_25_PCR)
  784. idt77105_init(card->atmdev);
  785. #endif /* CONFIG_ATM_NICSTAR_USE_IDT77105 */
  786. if (card->atmdev->phy && card->atmdev->phy->start)
  787. card->atmdev->phy->start(card->atmdev);
  788. writel(NS_CFG_RXPATH |
  789. NS_CFG_SMBUFSIZE |
  790. NS_CFG_LGBUFSIZE |
  791. NS_CFG_EFBIE |
  792. NS_CFG_RSQSIZE |
  793. NS_CFG_VPIBITS |
  794. ns_cfg_rctsize |
  795. NS_CFG_RXINT_NODELAY |
  796. NS_CFG_RAWIE | /* Only enabled if RCQ_SUPPORT */
  797. NS_CFG_RSQAFIE |
  798. NS_CFG_TXEN |
  799. NS_CFG_TXIE |
  800. NS_CFG_TSQFIE_OPT | /* Only enabled if ENABLE_TSQFIE */
  801. NS_CFG_PHYIE,
  802. card->membase + CFG);
  803. num_cards++;
  804. return error;
  805. }
  806. static void __devinit ns_init_card_error(ns_dev *card, int error)
  807. {
  808. if (error >= 17)
  809. {
  810. writel(0x00000000, card->membase + CFG);
  811. }
  812. if (error >= 16)
  813. {
  814. struct sk_buff *iovb;
  815. while ((iovb = skb_dequeue(&card->iovpool.queue)) != NULL)
  816. dev_kfree_skb_any(iovb);
  817. }
  818. if (error >= 15)
  819. {
  820. struct sk_buff *sb;
  821. while ((sb = skb_dequeue(&card->sbpool.queue)) != NULL)
  822. dev_kfree_skb_any(sb);
  823. free_scq(card->scq0, NULL);
  824. }
  825. if (error >= 14)
  826. {
  827. struct sk_buff *lb;
  828. while ((lb = skb_dequeue(&card->lbpool.queue)) != NULL)
  829. dev_kfree_skb_any(lb);
  830. }
  831. if (error >= 13)
  832. {
  833. struct sk_buff *hb;
  834. while ((hb = skb_dequeue(&card->hbpool.queue)) != NULL)
  835. dev_kfree_skb_any(hb);
  836. }
  837. if (error >= 12)
  838. {
  839. kfree(card->rsq.org);
  840. }
  841. if (error >= 11)
  842. {
  843. kfree(card->tsq.org);
  844. }
  845. if (error >= 10)
  846. {
  847. free_irq(card->pcidev->irq, card);
  848. }
  849. if (error >= 4)
  850. {
  851. iounmap(card->membase);
  852. }
  853. if (error >= 3)
  854. {
  855. pci_disable_device(card->pcidev);
  856. kfree(card);
  857. }
  858. }
  859. static scq_info *get_scq(int size, u32 scd)
  860. {
  861. scq_info *scq;
  862. int i;
  863. if (size != VBR_SCQSIZE && size != CBR_SCQSIZE)
  864. return NULL;
  865. scq = (scq_info *) kmalloc(sizeof(scq_info), GFP_KERNEL);
  866. if (scq == NULL)
  867. return NULL;
  868. scq->org = kmalloc(2 * size, GFP_KERNEL);
  869. if (scq->org == NULL)
  870. {
  871. kfree(scq);
  872. return NULL;
  873. }
  874. scq->skb = (struct sk_buff **) kmalloc(sizeof(struct sk_buff *) *
  875. (size / NS_SCQE_SIZE), GFP_KERNEL);
  876. if (scq->skb == NULL)
  877. {
  878. kfree(scq->org);
  879. kfree(scq);
  880. return NULL;
  881. }
  882. scq->num_entries = size / NS_SCQE_SIZE;
  883. scq->base = (ns_scqe *) ALIGN_ADDRESS(scq->org, size);
  884. scq->next = scq->base;
  885. scq->last = scq->base + (scq->num_entries - 1);
  886. scq->tail = scq->last;
  887. scq->scd = scd;
  888. scq->num_entries = size / NS_SCQE_SIZE;
  889. scq->tbd_count = 0;
  890. init_waitqueue_head(&scq->scqfull_waitq);
  891. scq->full = 0;
  892. spin_lock_init(&scq->lock);
  893. for (i = 0; i < scq->num_entries; i++)
  894. scq->skb[i] = NULL;
  895. return scq;
  896. }
  897. /* For variable rate SCQ vcc must be NULL */
  898. static void free_scq(scq_info *scq, struct atm_vcc *vcc)
  899. {
  900. int i;
  901. if (scq->num_entries == VBR_SCQ_NUM_ENTRIES)
  902. for (i = 0; i < scq->num_entries; i++)
  903. {
  904. if (scq->skb[i] != NULL)
  905. {
  906. vcc = ATM_SKB(scq->skb[i])->vcc;
  907. if (vcc->pop != NULL)
  908. vcc->pop(vcc, scq->skb[i]);
  909. else
  910. dev_kfree_skb_any(scq->skb[i]);
  911. }
  912. }
  913. else /* vcc must be != NULL */
  914. {
  915. if (vcc == NULL)
  916. {
  917. printk("nicstar: free_scq() called with vcc == NULL for fixed rate scq.");
  918. for (i = 0; i < scq->num_entries; i++)
  919. dev_kfree_skb_any(scq->skb[i]);
  920. }
  921. else
  922. for (i = 0; i < scq->num_entries; i++)
  923. {
  924. if (scq->skb[i] != NULL)
  925. {
  926. if (vcc->pop != NULL)
  927. vcc->pop(vcc, scq->skb[i]);
  928. else
  929. dev_kfree_skb_any(scq->skb[i]);
  930. }
  931. }
  932. }
  933. kfree(scq->skb);
  934. kfree(scq->org);
  935. kfree(scq);
  936. }
  937. /* The handles passed must be pointers to the sk_buff containing the small
  938. or large buffer(s) cast to u32. */
  939. static void push_rxbufs(ns_dev *card, u32 type, u32 handle1, u32 addr1,
  940. u32 handle2, u32 addr2)
  941. {
  942. u32 stat;
  943. unsigned long flags;
  944. #ifdef GENERAL_DEBUG
  945. if (!addr1)
  946. printk("nicstar%d: push_rxbufs called with addr1 = 0.\n", card->index);
  947. #endif /* GENERAL_DEBUG */
  948. stat = readl(card->membase + STAT);
  949. card->sbfqc = ns_stat_sfbqc_get(stat);
  950. card->lbfqc = ns_stat_lfbqc_get(stat);
  951. if (type == BUF_SM)
  952. {
  953. if (!addr2)
  954. {
  955. if (card->sm_addr)
  956. {
  957. addr2 = card->sm_addr;
  958. handle2 = card->sm_handle;
  959. card->sm_addr = 0x00000000;
  960. card->sm_handle = 0x00000000;
  961. }
  962. else /* (!sm_addr) */
  963. {
  964. card->sm_addr = addr1;
  965. card->sm_handle = handle1;
  966. }
  967. }
  968. }
  969. else /* type == BUF_LG */
  970. {
  971. if (!addr2)
  972. {
  973. if (card->lg_addr)
  974. {
  975. addr2 = card->lg_addr;
  976. handle2 = card->lg_handle;
  977. card->lg_addr = 0x00000000;
  978. card->lg_handle = 0x00000000;
  979. }
  980. else /* (!lg_addr) */
  981. {
  982. card->lg_addr = addr1;
  983. card->lg_handle = handle1;
  984. }
  985. }
  986. }
  987. if (addr2)
  988. {
  989. if (type == BUF_SM)
  990. {
  991. if (card->sbfqc >= card->sbnr.max)
  992. {
  993. skb_unlink((struct sk_buff *) handle1);
  994. dev_kfree_skb_any((struct sk_buff *) handle1);
  995. skb_unlink((struct sk_buff *) handle2);
  996. dev_kfree_skb_any((struct sk_buff *) handle2);
  997. return;
  998. }
  999. else
  1000. card->sbfqc += 2;
  1001. }
  1002. else /* (type == BUF_LG) */
  1003. {
  1004. if (card->lbfqc >= card->lbnr.max)
  1005. {
  1006. skb_unlink((struct sk_buff *) handle1);
  1007. dev_kfree_skb_any((struct sk_buff *) handle1);
  1008. skb_unlink((struct sk_buff *) handle2);
  1009. dev_kfree_skb_any((struct sk_buff *) handle2);
  1010. return;
  1011. }
  1012. else
  1013. card->lbfqc += 2;
  1014. }
  1015. ns_grab_res_lock(card, flags);
  1016. while (CMD_BUSY(card));
  1017. writel(addr2, card->membase + DR3);
  1018. writel(handle2, card->membase + DR2);
  1019. writel(addr1, card->membase + DR1);
  1020. writel(handle1, card->membase + DR0);
  1021. writel(NS_CMD_WRITE_FREEBUFQ | (u32) type, card->membase + CMD);
  1022. spin_unlock_irqrestore(&card->res_lock, flags);
  1023. XPRINTK("nicstar%d: Pushing %s buffers at 0x%x and 0x%x.\n", card->index,
  1024. (type == BUF_SM ? "small" : "large"), addr1, addr2);
  1025. }
  1026. if (!card->efbie && card->sbfqc >= card->sbnr.min &&
  1027. card->lbfqc >= card->lbnr.min)
  1028. {
  1029. card->efbie = 1;
  1030. writel((readl(card->membase + CFG) | NS_CFG_EFBIE), card->membase + CFG);
  1031. }
  1032. return;
  1033. }
  1034. static irqreturn_t ns_irq_handler(int irq, void *dev_id, struct pt_regs *regs)
  1035. {
  1036. u32 stat_r;
  1037. ns_dev *card;
  1038. struct atm_dev *dev;
  1039. unsigned long flags;
  1040. card = (ns_dev *) dev_id;
  1041. dev = card->atmdev;
  1042. card->intcnt++;
  1043. PRINTK("nicstar%d: NICStAR generated an interrupt\n", card->index);
  1044. ns_grab_int_lock(card, flags);
  1045. stat_r = readl(card->membase + STAT);
  1046. /* Transmit Status Indicator has been written to T. S. Queue */
  1047. if (stat_r & NS_STAT_TSIF)
  1048. {
  1049. TXPRINTK("nicstar%d: TSI interrupt\n", card->index);
  1050. process_tsq(card);
  1051. writel(NS_STAT_TSIF, card->membase + STAT);
  1052. }
  1053. /* Incomplete CS-PDU has been transmitted */
  1054. if (stat_r & NS_STAT_TXICP)
  1055. {
  1056. writel(NS_STAT_TXICP, card->membase + STAT);
  1057. TXPRINTK("nicstar%d: Incomplete CS-PDU transmitted.\n",
  1058. card->index);
  1059. }
  1060. /* Transmit Status Queue 7/8 full */
  1061. if (stat_r & NS_STAT_TSQF)
  1062. {
  1063. writel(NS_STAT_TSQF, card->membase + STAT);
  1064. PRINTK("nicstar%d: TSQ full.\n", card->index);
  1065. process_tsq(card);
  1066. }
  1067. /* Timer overflow */
  1068. if (stat_r & NS_STAT_TMROF)
  1069. {
  1070. writel(NS_STAT_TMROF, card->membase + STAT);
  1071. PRINTK("nicstar%d: Timer overflow.\n", card->index);
  1072. }
  1073. /* PHY device interrupt signal active */
  1074. if (stat_r & NS_STAT_PHYI)
  1075. {
  1076. writel(NS_STAT_PHYI, card->membase + STAT);
  1077. PRINTK("nicstar%d: PHY interrupt.\n", card->index);
  1078. if (dev->phy && dev->phy->interrupt) {
  1079. dev->phy->interrupt(dev);
  1080. }
  1081. }
  1082. /* Small Buffer Queue is full */
  1083. if (stat_r & NS_STAT_SFBQF)
  1084. {
  1085. writel(NS_STAT_SFBQF, card->membase + STAT);
  1086. printk("nicstar%d: Small free buffer queue is full.\n", card->index);
  1087. }
  1088. /* Large Buffer Queue is full */
  1089. if (stat_r & NS_STAT_LFBQF)
  1090. {
  1091. writel(NS_STAT_LFBQF, card->membase + STAT);
  1092. printk("nicstar%d: Large free buffer queue is full.\n", card->index);
  1093. }
  1094. /* Receive Status Queue is full */
  1095. if (stat_r & NS_STAT_RSQF)
  1096. {
  1097. writel(NS_STAT_RSQF, card->membase + STAT);
  1098. printk("nicstar%d: RSQ full.\n", card->index);
  1099. process_rsq(card);
  1100. }
  1101. /* Complete CS-PDU received */
  1102. if (stat_r & NS_STAT_EOPDU)
  1103. {
  1104. RXPRINTK("nicstar%d: End of CS-PDU received.\n", card->index);
  1105. process_rsq(card);
  1106. writel(NS_STAT_EOPDU, card->membase + STAT);
  1107. }
  1108. /* Raw cell received */
  1109. if (stat_r & NS_STAT_RAWCF)
  1110. {
  1111. writel(NS_STAT_RAWCF, card->membase + STAT);
  1112. #ifndef RCQ_SUPPORT
  1113. printk("nicstar%d: Raw cell received and no support yet...\n",
  1114. card->index);
  1115. #endif /* RCQ_SUPPORT */
  1116. /* NOTE: the following procedure may keep a raw cell pending until the
  1117. next interrupt. As this preliminary support is only meant to
  1118. avoid buffer leakage, this is not an issue. */
  1119. while (readl(card->membase + RAWCT) != card->rawch)
  1120. {
  1121. ns_rcqe *rawcell;
  1122. rawcell = (ns_rcqe *) bus_to_virt(card->rawch);
  1123. if (ns_rcqe_islast(rawcell))
  1124. {
  1125. struct sk_buff *oldbuf;
  1126. oldbuf = card->rcbuf;
  1127. card->rcbuf = (struct sk_buff *) ns_rcqe_nextbufhandle(rawcell);
  1128. card->rawch = (u32) virt_to_bus(card->rcbuf->data);
  1129. recycle_rx_buf(card, oldbuf);
  1130. }
  1131. else
  1132. card->rawch += NS_RCQE_SIZE;
  1133. }
  1134. }
  1135. /* Small buffer queue is empty */
  1136. if (stat_r & NS_STAT_SFBQE)
  1137. {
  1138. int i;
  1139. struct sk_buff *sb;
  1140. writel(NS_STAT_SFBQE, card->membase + STAT);
  1141. printk("nicstar%d: Small free buffer queue empty.\n",
  1142. card->index);
  1143. for (i = 0; i < card->sbnr.min; i++)
  1144. {
  1145. sb = dev_alloc_skb(NS_SMSKBSIZE);
  1146. if (sb == NULL)
  1147. {
  1148. writel(readl(card->membase + CFG) & ~NS_CFG_EFBIE, card->membase + CFG);
  1149. card->efbie = 0;
  1150. break;
  1151. }
  1152. skb_queue_tail(&card->sbpool.queue, sb);
  1153. skb_reserve(sb, NS_AAL0_HEADER);
  1154. push_rxbufs(card, BUF_SM, (u32) sb, (u32) virt_to_bus(sb->data), 0, 0);
  1155. }
  1156. card->sbfqc = i;
  1157. process_rsq(card);
  1158. }
  1159. /* Large buffer queue empty */
  1160. if (stat_r & NS_STAT_LFBQE)
  1161. {
  1162. int i;
  1163. struct sk_buff *lb;
  1164. writel(NS_STAT_LFBQE, card->membase + STAT);
  1165. printk("nicstar%d: Large free buffer queue empty.\n",
  1166. card->index);
  1167. for (i = 0; i < card->lbnr.min; i++)
  1168. {
  1169. lb = dev_alloc_skb(NS_LGSKBSIZE);
  1170. if (lb == NULL)
  1171. {
  1172. writel(readl(card->membase + CFG) & ~NS_CFG_EFBIE, card->membase + CFG);
  1173. card->efbie = 0;
  1174. break;
  1175. }
  1176. skb_queue_tail(&card->lbpool.queue, lb);
  1177. skb_reserve(lb, NS_SMBUFSIZE);
  1178. push_rxbufs(card, BUF_LG, (u32) lb, (u32) virt_to_bus(lb->data), 0, 0);
  1179. }
  1180. card->lbfqc = i;
  1181. process_rsq(card);
  1182. }
  1183. /* Receive Status Queue is 7/8 full */
  1184. if (stat_r & NS_STAT_RSQAF)
  1185. {
  1186. writel(NS_STAT_RSQAF, card->membase + STAT);
  1187. RXPRINTK("nicstar%d: RSQ almost full.\n", card->index);
  1188. process_rsq(card);
  1189. }
  1190. spin_unlock_irqrestore(&card->int_lock, flags);
  1191. PRINTK("nicstar%d: end of interrupt service\n", card->index);
  1192. return IRQ_HANDLED;
  1193. }
  1194. static int ns_open(struct atm_vcc *vcc)
  1195. {
  1196. ns_dev *card;
  1197. vc_map *vc;
  1198. unsigned long tmpl, modl;
  1199. int tcr, tcra; /* target cell rate, and absolute value */
  1200. int n = 0; /* Number of entries in the TST. Initialized to remove
  1201. the compiler warning. */
  1202. u32 u32d[4];
  1203. int frscdi = 0; /* Index of the SCD. Initialized to remove the compiler
  1204. warning. How I wish compilers were clever enough to
  1205. tell which variables can truly be used
  1206. uninitialized... */
  1207. int inuse; /* tx or rx vc already in use by another vcc */
  1208. short vpi = vcc->vpi;
  1209. int vci = vcc->vci;
  1210. card = (ns_dev *) vcc->dev->dev_data;
  1211. PRINTK("nicstar%d: opening vpi.vci %d.%d \n", card->index, (int) vpi, vci);
  1212. if (vcc->qos.aal != ATM_AAL5 && vcc->qos.aal != ATM_AAL0)
  1213. {
  1214. PRINTK("nicstar%d: unsupported AAL.\n", card->index);
  1215. return -EINVAL;
  1216. }
  1217. vc = &(card->vcmap[vpi << card->vcibits | vci]);
  1218. vcc->dev_data = vc;
  1219. inuse = 0;
  1220. if (vcc->qos.txtp.traffic_class != ATM_NONE && vc->tx)
  1221. inuse = 1;
  1222. if (vcc->qos.rxtp.traffic_class != ATM_NONE && vc->rx)
  1223. inuse += 2;
  1224. if (inuse)
  1225. {
  1226. printk("nicstar%d: %s vci already in use.\n", card->index,
  1227. inuse == 1 ? "tx" : inuse == 2 ? "rx" : "tx and rx");
  1228. return -EINVAL;
  1229. }
  1230. set_bit(ATM_VF_ADDR,&vcc->flags);
  1231. /* NOTE: You are not allowed to modify an open connection's QOS. To change
  1232. that, remove the ATM_VF_PARTIAL flag checking. There may be other changes
  1233. needed to do that. */
  1234. if (!test_bit(ATM_VF_PARTIAL,&vcc->flags))
  1235. {
  1236. scq_info *scq;
  1237. set_bit(ATM_VF_PARTIAL,&vcc->flags);
  1238. if (vcc->qos.txtp.traffic_class == ATM_CBR)
  1239. {
  1240. /* Check requested cell rate and availability of SCD */
  1241. if (vcc->qos.txtp.max_pcr == 0 && vcc->qos.txtp.pcr == 0 &&
  1242. vcc->qos.txtp.min_pcr == 0)
  1243. {
  1244. PRINTK("nicstar%d: trying to open a CBR vc with cell rate = 0 \n",
  1245. card->index);
  1246. clear_bit(ATM_VF_PARTIAL,&vcc->flags);
  1247. clear_bit(ATM_VF_ADDR,&vcc->flags);
  1248. return -EINVAL;
  1249. }
  1250. tcr = atm_pcr_goal(&(vcc->qos.txtp));
  1251. tcra = tcr >= 0 ? tcr : -tcr;
  1252. PRINTK("nicstar%d: target cell rate = %d.\n", card->index,
  1253. vcc->qos.txtp.max_pcr);
  1254. tmpl = (unsigned long)tcra * (unsigned long)NS_TST_NUM_ENTRIES;
  1255. modl = tmpl % card->max_pcr;
  1256. n = (int)(tmpl / card->max_pcr);
  1257. if (tcr > 0)
  1258. {
  1259. if (modl > 0) n++;
  1260. }
  1261. else if (tcr == 0)
  1262. {
  1263. if ((n = (card->tst_free_entries - NS_TST_RESERVED)) <= 0)
  1264. {
  1265. PRINTK("nicstar%d: no CBR bandwidth free.\n", card->index);
  1266. clear_bit(ATM_VF_PARTIAL,&vcc->flags);
  1267. clear_bit(ATM_VF_ADDR,&vcc->flags);
  1268. return -EINVAL;
  1269. }
  1270. }
  1271. if (n == 0)
  1272. {
  1273. printk("nicstar%d: selected bandwidth < granularity.\n", card->index);
  1274. clear_bit(ATM_VF_PARTIAL,&vcc->flags);
  1275. clear_bit(ATM_VF_ADDR,&vcc->flags);
  1276. return -EINVAL;
  1277. }
  1278. if (n > (card->tst_free_entries - NS_TST_RESERVED))
  1279. {
  1280. PRINTK("nicstar%d: not enough free CBR bandwidth.\n", card->index);
  1281. clear_bit(ATM_VF_PARTIAL,&vcc->flags);
  1282. clear_bit(ATM_VF_ADDR,&vcc->flags);
  1283. return -EINVAL;
  1284. }
  1285. else
  1286. card->tst_free_entries -= n;
  1287. XPRINTK("nicstar%d: writing %d tst entries.\n", card->index, n);
  1288. for (frscdi = 0; frscdi < NS_FRSCD_NUM; frscdi++)
  1289. {
  1290. if (card->scd2vc[frscdi] == NULL)
  1291. {
  1292. card->scd2vc[frscdi] = vc;
  1293. break;
  1294. }
  1295. }
  1296. if (frscdi == NS_FRSCD_NUM)
  1297. {
  1298. PRINTK("nicstar%d: no SCD available for CBR channel.\n", card->index);
  1299. card->tst_free_entries += n;
  1300. clear_bit(ATM_VF_PARTIAL,&vcc->flags);
  1301. clear_bit(ATM_VF_ADDR,&vcc->flags);
  1302. return -EBUSY;
  1303. }
  1304. vc->cbr_scd = NS_FRSCD + frscdi * NS_FRSCD_SIZE;
  1305. scq = get_scq(CBR_SCQSIZE, vc->cbr_scd);
  1306. if (scq == NULL)
  1307. {
  1308. PRINTK("nicstar%d: can't get fixed rate SCQ.\n", card->index);
  1309. card->scd2vc[frscdi] = NULL;
  1310. card->tst_free_entries += n;
  1311. clear_bit(ATM_VF_PARTIAL,&vcc->flags);
  1312. clear_bit(ATM_VF_ADDR,&vcc->flags);
  1313. return -ENOMEM;
  1314. }
  1315. vc->scq = scq;
  1316. u32d[0] = (u32) virt_to_bus(scq->base);
  1317. u32d[1] = (u32) 0x00000000;
  1318. u32d[2] = (u32) 0xffffffff;
  1319. u32d[3] = (u32) 0x00000000;
  1320. ns_write_sram(card, vc->cbr_scd, u32d, 4);
  1321. fill_tst(card, n, vc);
  1322. }
  1323. else if (vcc->qos.txtp.traffic_class == ATM_UBR)
  1324. {
  1325. vc->cbr_scd = 0x00000000;
  1326. vc->scq = card->scq0;
  1327. }
  1328. if (vcc->qos.txtp.traffic_class != ATM_NONE)
  1329. {
  1330. vc->tx = 1;
  1331. vc->tx_vcc = vcc;
  1332. vc->tbd_count = 0;
  1333. }
  1334. if (vcc->qos.rxtp.traffic_class != ATM_NONE)
  1335. {
  1336. u32 status;
  1337. vc->rx = 1;
  1338. vc->rx_vcc = vcc;
  1339. vc->rx_iov = NULL;
  1340. /* Open the connection in hardware */
  1341. if (vcc->qos.aal == ATM_AAL5)
  1342. status = NS_RCTE_AAL5 | NS_RCTE_CONNECTOPEN;
  1343. else /* vcc->qos.aal == ATM_AAL0 */
  1344. status = NS_RCTE_AAL0 | NS_RCTE_CONNECTOPEN;
  1345. #ifdef RCQ_SUPPORT
  1346. status |= NS_RCTE_RAWCELLINTEN;
  1347. #endif /* RCQ_SUPPORT */
  1348. ns_write_sram(card, NS_RCT + (vpi << card->vcibits | vci) *
  1349. NS_RCT_ENTRY_SIZE, &status, 1);
  1350. }
  1351. }
  1352. set_bit(ATM_VF_READY,&vcc->flags);
  1353. return 0;
  1354. }
  1355. static void ns_close(struct atm_vcc *vcc)
  1356. {
  1357. vc_map *vc;
  1358. ns_dev *card;
  1359. u32 data;
  1360. int i;
  1361. vc = vcc->dev_data;
  1362. card = vcc->dev->dev_data;
  1363. PRINTK("nicstar%d: closing vpi.vci %d.%d \n", card->index,
  1364. (int) vcc->vpi, vcc->vci);
  1365. clear_bit(ATM_VF_READY,&vcc->flags);
  1366. if (vcc->qos.rxtp.traffic_class != ATM_NONE)
  1367. {
  1368. u32 addr;
  1369. unsigned long flags;
  1370. addr = NS_RCT + (vcc->vpi << card->vcibits | vcc->vci) * NS_RCT_ENTRY_SIZE;
  1371. ns_grab_res_lock(card, flags);
  1372. while(CMD_BUSY(card));
  1373. writel(NS_CMD_CLOSE_CONNECTION | addr << 2, card->membase + CMD);
  1374. spin_unlock_irqrestore(&card->res_lock, flags);
  1375. vc->rx = 0;
  1376. if (vc->rx_iov != NULL)
  1377. {
  1378. struct sk_buff *iovb;
  1379. u32 stat;
  1380. stat = readl(card->membase + STAT);
  1381. card->sbfqc = ns_stat_sfbqc_get(stat);
  1382. card->lbfqc = ns_stat_lfbqc_get(stat);
  1383. PRINTK("nicstar%d: closing a VC with pending rx buffers.\n",
  1384. card->index);
  1385. iovb = vc->rx_iov;
  1386. recycle_iovec_rx_bufs(card, (struct iovec *) iovb->data,
  1387. NS_SKB(iovb)->iovcnt);
  1388. NS_SKB(iovb)->iovcnt = 0;
  1389. NS_SKB(iovb)->vcc = NULL;
  1390. ns_grab_int_lock(card, flags);
  1391. recycle_iov_buf(card, iovb);
  1392. spin_unlock_irqrestore(&card->int_lock, flags);
  1393. vc->rx_iov = NULL;
  1394. }
  1395. }
  1396. if (vcc->qos.txtp.traffic_class != ATM_NONE)
  1397. {
  1398. vc->tx = 0;
  1399. }
  1400. if (vcc->qos.txtp.traffic_class == ATM_CBR)
  1401. {
  1402. unsigned long flags;
  1403. ns_scqe *scqep;
  1404. scq_info *scq;
  1405. scq = vc->scq;
  1406. for (;;)
  1407. {
  1408. ns_grab_scq_lock(card, scq, flags);
  1409. scqep = scq->next;
  1410. if (scqep == scq->base)
  1411. scqep = scq->last;
  1412. else
  1413. scqep--;
  1414. if (scqep == scq->tail)
  1415. {
  1416. spin_unlock_irqrestore(&scq->lock, flags);
  1417. break;
  1418. }
  1419. /* If the last entry is not a TSR, place one in the SCQ in order to
  1420. be able to completely drain it and then close. */
  1421. if (!ns_scqe_is_tsr(scqep) && scq->tail != scq->next)
  1422. {
  1423. ns_scqe tsr;
  1424. u32 scdi, scqi;
  1425. u32 data;
  1426. int index;
  1427. tsr.word_1 = ns_tsr_mkword_1(NS_TSR_INTENABLE);
  1428. scdi = (vc->cbr_scd - NS_FRSCD) / NS_FRSCD_SIZE;
  1429. scqi = scq->next - scq->base;
  1430. tsr.word_2 = ns_tsr_mkword_2(scdi, scqi);
  1431. tsr.word_3 = 0x00000000;
  1432. tsr.word_4 = 0x00000000;
  1433. *scq->next = tsr;
  1434. index = (int) scqi;
  1435. scq->skb[index] = NULL;
  1436. if (scq->next == scq->last)
  1437. scq->next = scq->base;
  1438. else
  1439. scq->next++;
  1440. data = (u32) virt_to_bus(scq->next);
  1441. ns_write_sram(card, scq->scd, &data, 1);
  1442. }
  1443. spin_unlock_irqrestore(&scq->lock, flags);
  1444. schedule();
  1445. }
  1446. /* Free all TST entries */
  1447. data = NS_TST_OPCODE_VARIABLE;
  1448. for (i = 0; i < NS_TST_NUM_ENTRIES; i++)
  1449. {
  1450. if (card->tste2vc[i] == vc)
  1451. {
  1452. ns_write_sram(card, card->tst_addr + i, &data, 1);
  1453. card->tste2vc[i] = NULL;
  1454. card->tst_free_entries++;
  1455. }
  1456. }
  1457. card->scd2vc[(vc->cbr_scd - NS_FRSCD) / NS_FRSCD_SIZE] = NULL;
  1458. free_scq(vc->scq, vcc);
  1459. }
  1460. /* remove all references to vcc before deleting it */
  1461. if (vcc->qos.txtp.traffic_class != ATM_NONE)
  1462. {
  1463. unsigned long flags;
  1464. scq_info *scq = card->scq0;
  1465. ns_grab_scq_lock(card, scq, flags);
  1466. for(i = 0; i < scq->num_entries; i++) {
  1467. if(scq->skb[i] && ATM_SKB(scq->skb[i])->vcc == vcc) {
  1468. ATM_SKB(scq->skb[i])->vcc = NULL;
  1469. atm_return(vcc, scq->skb[i]->truesize);
  1470. PRINTK("nicstar: deleted pending vcc mapping\n");
  1471. }
  1472. }
  1473. spin_unlock_irqrestore(&scq->lock, flags);
  1474. }
  1475. vcc->dev_data = NULL;
  1476. clear_bit(ATM_VF_PARTIAL,&vcc->flags);
  1477. clear_bit(ATM_VF_ADDR,&vcc->flags);
  1478. #ifdef RX_DEBUG
  1479. {
  1480. u32 stat, cfg;
  1481. stat = readl(card->membase + STAT);
  1482. cfg = readl(card->membase + CFG);
  1483. printk("STAT = 0x%08X CFG = 0x%08X \n", stat, cfg);
  1484. printk("TSQ: base = 0x%08X next = 0x%08X last = 0x%08X TSQT = 0x%08X \n",
  1485. (u32) card->tsq.base, (u32) card->tsq.next,(u32) card->tsq.last,
  1486. readl(card->membase + TSQT));
  1487. printk("RSQ: base = 0x%08X next = 0x%08X last = 0x%08X RSQT = 0x%08X \n",
  1488. (u32) card->rsq.base, (u32) card->rsq.next,(u32) card->rsq.last,
  1489. readl(card->membase + RSQT));
  1490. printk("Empty free buffer queue interrupt %s \n",
  1491. card->efbie ? "enabled" : "disabled");
  1492. printk("SBCNT = %d count = %d LBCNT = %d count = %d \n",
  1493. ns_stat_sfbqc_get(stat), card->sbpool.count,
  1494. ns_stat_lfbqc_get(stat), card->lbpool.count);
  1495. printk("hbpool.count = %d iovpool.count = %d \n",
  1496. card->hbpool.count, card->iovpool.count);
  1497. }
  1498. #endif /* RX_DEBUG */
  1499. }
  1500. static void fill_tst(ns_dev *card, int n, vc_map *vc)
  1501. {
  1502. u32 new_tst;
  1503. unsigned long cl;
  1504. int e, r;
  1505. u32 data;
  1506. /* It would be very complicated to keep the two TSTs synchronized while
  1507. assuring that writes are only made to the inactive TST. So, for now I
  1508. will use only one TST. If problems occur, I will change this again */
  1509. new_tst = card->tst_addr;
  1510. /* Fill procedure */
  1511. for (e = 0; e < NS_TST_NUM_ENTRIES; e++)
  1512. {
  1513. if (card->tste2vc[e] == NULL)
  1514. break;
  1515. }
  1516. if (e == NS_TST_NUM_ENTRIES) {
  1517. printk("nicstar%d: No free TST entries found. \n", card->index);
  1518. return;
  1519. }
  1520. r = n;
  1521. cl = NS_TST_NUM_ENTRIES;
  1522. data = ns_tste_make(NS_TST_OPCODE_FIXED, vc->cbr_scd);
  1523. while (r > 0)
  1524. {
  1525. if (cl >= NS_TST_NUM_ENTRIES && card->tste2vc[e] == NULL)
  1526. {
  1527. card->tste2vc[e] = vc;
  1528. ns_write_sram(card, new_tst + e, &data, 1);
  1529. cl -= NS_TST_NUM_ENTRIES;
  1530. r--;
  1531. }
  1532. if (++e == NS_TST_NUM_ENTRIES) {
  1533. e = 0;
  1534. }
  1535. cl += n;
  1536. }
  1537. /* End of fill procedure */
  1538. data = ns_tste_make(NS_TST_OPCODE_END, new_tst);
  1539. ns_write_sram(card, new_tst + NS_TST_NUM_ENTRIES, &data, 1);
  1540. ns_write_sram(card, card->tst_addr + NS_TST_NUM_ENTRIES, &data, 1);
  1541. card->tst_addr = new_tst;
  1542. }
  1543. static int ns_send(struct atm_vcc *vcc, struct sk_buff *skb)
  1544. {
  1545. ns_dev *card;
  1546. vc_map *vc;
  1547. scq_info *scq;
  1548. unsigned long buflen;
  1549. ns_scqe scqe;
  1550. u32 flags; /* TBD flags, not CPU flags */
  1551. card = vcc->dev->dev_data;
  1552. TXPRINTK("nicstar%d: ns_send() called.\n", card->index);
  1553. if ((vc = (vc_map *) vcc->dev_data) == NULL)
  1554. {
  1555. printk("nicstar%d: vcc->dev_data == NULL on ns_send().\n", card->index);
  1556. atomic_inc(&vcc->stats->tx_err);
  1557. dev_kfree_skb_any(skb);
  1558. return -EINVAL;
  1559. }
  1560. if (!vc->tx)
  1561. {
  1562. printk("nicstar%d: Trying to transmit on a non-tx VC.\n", card->index);
  1563. atomic_inc(&vcc->stats->tx_err);
  1564. dev_kfree_skb_any(skb);
  1565. return -EINVAL;
  1566. }
  1567. if (vcc->qos.aal != ATM_AAL5 && vcc->qos.aal != ATM_AAL0)
  1568. {
  1569. printk("nicstar%d: Only AAL0 and AAL5 are supported.\n", card->index);
  1570. atomic_inc(&vcc->stats->tx_err);
  1571. dev_kfree_skb_any(skb);
  1572. return -EINVAL;
  1573. }
  1574. if (skb_shinfo(skb)->nr_frags != 0)
  1575. {
  1576. printk("nicstar%d: No scatter-gather yet.\n", card->index);
  1577. atomic_inc(&vcc->stats->tx_err);
  1578. dev_kfree_skb_any(skb);
  1579. return -EINVAL;
  1580. }
  1581. ATM_SKB(skb)->vcc = vcc;
  1582. if (vcc->qos.aal == ATM_AAL5)
  1583. {
  1584. buflen = (skb->len + 47 + 8) / 48 * 48; /* Multiple of 48 */
  1585. flags = NS_TBD_AAL5;
  1586. scqe.word_2 = cpu_to_le32((u32) virt_to_bus(skb->data));
  1587. scqe.word_3 = cpu_to_le32((u32) skb->len);
  1588. scqe.word_4 = ns_tbd_mkword_4(0, (u32) vcc->vpi, (u32) vcc->vci, 0,
  1589. ATM_SKB(skb)->atm_options & ATM_ATMOPT_CLP ? 1 : 0);
  1590. flags |= NS_TBD_EOPDU;
  1591. }
  1592. else /* (vcc->qos.aal == ATM_AAL0) */
  1593. {
  1594. buflen = ATM_CELL_PAYLOAD; /* i.e., 48 bytes */
  1595. flags = NS_TBD_AAL0;
  1596. scqe.word_2 = cpu_to_le32((u32) virt_to_bus(skb->data) + NS_AAL0_HEADER);
  1597. scqe.word_3 = cpu_to_le32(0x00000000);
  1598. if (*skb->data & 0x02) /* Payload type 1 - end of pdu */
  1599. flags |= NS_TBD_EOPDU;
  1600. scqe.word_4 = cpu_to_le32(*((u32 *) skb->data) & ~NS_TBD_VC_MASK);
  1601. /* Force the VPI/VCI to be the same as in VCC struct */
  1602. scqe.word_4 |= cpu_to_le32((((u32) vcc->vpi) << NS_TBD_VPI_SHIFT |
  1603. ((u32) vcc->vci) << NS_TBD_VCI_SHIFT) &
  1604. NS_TBD_VC_MASK);
  1605. }
  1606. if (vcc->qos.txtp.traffic_class == ATM_CBR)
  1607. {
  1608. scqe.word_1 = ns_tbd_mkword_1_novbr(flags, (u32) buflen);
  1609. scq = ((vc_map *) vcc->dev_data)->scq;
  1610. }
  1611. else
  1612. {
  1613. scqe.word_1 = ns_tbd_mkword_1(flags, (u32) 1, (u32) 1, (u32) buflen);
  1614. scq = card->scq0;
  1615. }
  1616. if (push_scqe(card, vc, scq, &scqe, skb) != 0)
  1617. {
  1618. atomic_inc(&vcc->stats->tx_err);
  1619. dev_kfree_skb_any(skb);
  1620. return -EIO;
  1621. }
  1622. atomic_inc(&vcc->stats->tx);
  1623. return 0;
  1624. }
  1625. static int push_scqe(ns_dev *card, vc_map *vc, scq_info *scq, ns_scqe *tbd,
  1626. struct sk_buff *skb)
  1627. {
  1628. unsigned long flags;
  1629. ns_scqe tsr;
  1630. u32 scdi, scqi;
  1631. int scq_is_vbr;
  1632. u32 data;
  1633. int index;
  1634. ns_grab_scq_lock(card, scq, flags);
  1635. while (scq->tail == scq->next)
  1636. {
  1637. if (in_interrupt()) {
  1638. spin_unlock_irqrestore(&scq->lock, flags);
  1639. printk("nicstar%d: Error pushing TBD.\n", card->index);
  1640. return 1;
  1641. }
  1642. scq->full = 1;
  1643. spin_unlock_irqrestore(&scq->lock, flags);
  1644. interruptible_sleep_on_timeout(&scq->scqfull_waitq, SCQFULL_TIMEOUT);
  1645. ns_grab_scq_lock(card, scq, flags);
  1646. if (scq->full) {
  1647. spin_unlock_irqrestore(&scq->lock, flags);
  1648. printk("nicstar%d: Timeout pushing TBD.\n", card->index);
  1649. return 1;
  1650. }
  1651. }
  1652. *scq->next = *tbd;
  1653. index = (int) (scq->next - scq->base);
  1654. scq->skb[index] = skb;
  1655. XPRINTK("nicstar%d: sending skb at 0x%x (pos %d).\n",
  1656. card->index, (u32) skb, index);
  1657. XPRINTK("nicstar%d: TBD written:\n0x%x\n0x%x\n0x%x\n0x%x\n at 0x%x.\n",
  1658. card->index, le32_to_cpu(tbd->word_1), le32_to_cpu(tbd->word_2),
  1659. le32_to_cpu(tbd->word_3), le32_to_cpu(tbd->word_4),
  1660. (u32) scq->next);
  1661. if (scq->next == scq->last)
  1662. scq->next = scq->base;
  1663. else
  1664. scq->next++;
  1665. vc->tbd_count++;
  1666. if (scq->num_entries == VBR_SCQ_NUM_ENTRIES)
  1667. {
  1668. scq->tbd_count++;
  1669. scq_is_vbr = 1;
  1670. }
  1671. else
  1672. scq_is_vbr = 0;
  1673. if (vc->tbd_count >= MAX_TBD_PER_VC || scq->tbd_count >= MAX_TBD_PER_SCQ)
  1674. {
  1675. int has_run = 0;
  1676. while (scq->tail == scq->next)
  1677. {
  1678. if (in_interrupt()) {
  1679. data = (u32) virt_to_bus(scq->next);
  1680. ns_write_sram(card, scq->scd, &data, 1);
  1681. spin_unlock_irqrestore(&scq->lock, flags);
  1682. printk("nicstar%d: Error pushing TSR.\n", card->index);
  1683. return 0;
  1684. }
  1685. scq->full = 1;
  1686. if (has_run++) break;
  1687. spin_unlock_irqrestore(&scq->lock, flags);
  1688. interruptible_sleep_on_timeout(&scq->scqfull_waitq, SCQFULL_TIMEOUT);
  1689. ns_grab_scq_lock(card, scq, flags);
  1690. }
  1691. if (!scq->full)
  1692. {
  1693. tsr.word_1 = ns_tsr_mkword_1(NS_TSR_INTENABLE);
  1694. if (scq_is_vbr)
  1695. scdi = NS_TSR_SCDISVBR;
  1696. else
  1697. scdi = (vc->cbr_scd - NS_FRSCD) / NS_FRSCD_SIZE;
  1698. scqi = scq->next - scq->base;
  1699. tsr.word_2 = ns_tsr_mkword_2(scdi, scqi);
  1700. tsr.word_3 = 0x00000000;
  1701. tsr.word_4 = 0x00000000;
  1702. *scq->next = tsr;
  1703. index = (int) scqi;
  1704. scq->skb[index] = NULL;
  1705. XPRINTK("nicstar%d: TSR written:\n0x%x\n0x%x\n0x%x\n0x%x\n at 0x%x.\n",
  1706. card->index, le32_to_cpu(tsr.word_1), le32_to_cpu(tsr.word_2),
  1707. le32_to_cpu(tsr.word_3), le32_to_cpu(tsr.word_4),
  1708. (u32) scq->next);
  1709. if (scq->next == scq->last)
  1710. scq->next = scq->base;
  1711. else
  1712. scq->next++;
  1713. vc->tbd_count = 0;
  1714. scq->tbd_count = 0;
  1715. }
  1716. else
  1717. PRINTK("nicstar%d: Timeout pushing TSR.\n", card->index);
  1718. }
  1719. data = (u32) virt_to_bus(scq->next);
  1720. ns_write_sram(card, scq->scd, &data, 1);
  1721. spin_unlock_irqrestore(&scq->lock, flags);
  1722. return 0;
  1723. }
  1724. static void process_tsq(ns_dev *card)
  1725. {
  1726. u32 scdi;
  1727. scq_info *scq;
  1728. ns_tsi *previous = NULL, *one_ahead, *two_ahead;
  1729. int serviced_entries; /* flag indicating at least on entry was serviced */
  1730. serviced_entries = 0;
  1731. if (card->tsq.next == card->tsq.last)
  1732. one_ahead = card->tsq.base;
  1733. else
  1734. one_ahead = card->tsq.next + 1;
  1735. if (one_ahead == card->tsq.last)
  1736. two_ahead = card->tsq.base;
  1737. else
  1738. two_ahead = one_ahead + 1;
  1739. while (!ns_tsi_isempty(card->tsq.next) || !ns_tsi_isempty(one_ahead) ||
  1740. !ns_tsi_isempty(two_ahead))
  1741. /* At most two empty, as stated in the 77201 errata */
  1742. {
  1743. serviced_entries = 1;
  1744. /* Skip the one or two possible empty entries */
  1745. while (ns_tsi_isempty(card->tsq.next)) {
  1746. if (card->tsq.next == card->tsq.last)
  1747. card->tsq.next = card->tsq.base;
  1748. else
  1749. card->tsq.next++;
  1750. }
  1751. if (!ns_tsi_tmrof(card->tsq.next))
  1752. {
  1753. scdi = ns_tsi_getscdindex(card->tsq.next);
  1754. if (scdi == NS_TSI_SCDISVBR)
  1755. scq = card->scq0;
  1756. else
  1757. {
  1758. if (card->scd2vc[scdi] == NULL)
  1759. {
  1760. printk("nicstar%d: could not find VC from SCD index.\n",
  1761. card->index);
  1762. ns_tsi_init(card->tsq.next);
  1763. return;
  1764. }
  1765. scq = card->scd2vc[scdi]->scq;
  1766. }
  1767. drain_scq(card, scq, ns_tsi_getscqpos(card->tsq.next));
  1768. scq->full = 0;
  1769. wake_up_interruptible(&(scq->scqfull_waitq));
  1770. }
  1771. ns_tsi_init(card->tsq.next);
  1772. previous = card->tsq.next;
  1773. if (card->tsq.next == card->tsq.last)
  1774. card->tsq.next = card->tsq.base;
  1775. else
  1776. card->tsq.next++;
  1777. if (card->tsq.next == card->tsq.last)
  1778. one_ahead = card->tsq.base;
  1779. else
  1780. one_ahead = card->tsq.next + 1;
  1781. if (one_ahead == card->tsq.last)
  1782. two_ahead = card->tsq.base;
  1783. else
  1784. two_ahead = one_ahead + 1;
  1785. }
  1786. if (serviced_entries) {
  1787. writel((((u32) previous) - ((u32) card->tsq.base)),
  1788. card->membase + TSQH);
  1789. }
  1790. }
  1791. static void drain_scq(ns_dev *card, scq_info *scq, int pos)
  1792. {
  1793. struct atm_vcc *vcc;
  1794. struct sk_buff *skb;
  1795. int i;
  1796. unsigned long flags;
  1797. XPRINTK("nicstar%d: drain_scq() called, scq at 0x%x, pos %d.\n",
  1798. card->index, (u32) scq, pos);
  1799. if (pos >= scq->num_entries)
  1800. {
  1801. printk("nicstar%d: Bad index on drain_scq().\n", card->index);
  1802. return;
  1803. }
  1804. ns_grab_scq_lock(card, scq, flags);
  1805. i = (int) (scq->tail - scq->base);
  1806. if (++i == scq->num_entries)
  1807. i = 0;
  1808. while (i != pos)
  1809. {
  1810. skb = scq->skb[i];
  1811. XPRINTK("nicstar%d: freeing skb at 0x%x (index %d).\n",
  1812. card->index, (u32) skb, i);
  1813. if (skb != NULL)
  1814. {
  1815. vcc = ATM_SKB(skb)->vcc;
  1816. if (vcc && vcc->pop != NULL) {
  1817. vcc->pop(vcc, skb);
  1818. } else {
  1819. dev_kfree_skb_irq(skb);
  1820. }
  1821. scq->skb[i] = NULL;
  1822. }
  1823. if (++i == scq->num_entries)
  1824. i = 0;
  1825. }
  1826. scq->tail = scq->base + pos;
  1827. spin_unlock_irqrestore(&scq->lock, flags);
  1828. }
  1829. static void process_rsq(ns_dev *card)
  1830. {
  1831. ns_rsqe *previous;
  1832. if (!ns_rsqe_valid(card->rsq.next))
  1833. return;
  1834. while (ns_rsqe_valid(card->rsq.next))
  1835. {
  1836. dequeue_rx(card, card->rsq.next);
  1837. ns_rsqe_init(card->rsq.next);
  1838. previous = card->rsq.next;
  1839. if (card->rsq.next == card->rsq.last)
  1840. card->rsq.next = card->rsq.base;
  1841. else
  1842. card->rsq.next++;
  1843. }
  1844. writel((((u32) previous) - ((u32) card->rsq.base)),
  1845. card->membase + RSQH);
  1846. }
  1847. static void dequeue_rx(ns_dev *card, ns_rsqe *rsqe)
  1848. {
  1849. u32 vpi, vci;
  1850. vc_map *vc;
  1851. struct sk_buff *iovb;
  1852. struct iovec *iov;
  1853. struct atm_vcc *vcc;
  1854. struct sk_buff *skb;
  1855. unsigned short aal5_len;
  1856. int len;
  1857. u32 stat;
  1858. stat = readl(card->membase + STAT);
  1859. card->sbfqc = ns_stat_sfbqc_get(stat);
  1860. card->lbfqc = ns_stat_lfbqc_get(stat);
  1861. skb = (struct sk_buff *) le32_to_cpu(rsqe->buffer_handle);
  1862. vpi = ns_rsqe_vpi(rsqe);
  1863. vci = ns_rsqe_vci(rsqe);
  1864. if (vpi >= 1UL << card->vpibits || vci >= 1UL << card->vcibits)
  1865. {
  1866. printk("nicstar%d: SDU received for out-of-range vc %d.%d.\n",
  1867. card->index, vpi, vci);
  1868. recycle_rx_buf(card, skb);
  1869. return;
  1870. }
  1871. vc = &(card->vcmap[vpi << card->vcibits | vci]);
  1872. if (!vc->rx)
  1873. {
  1874. RXPRINTK("nicstar%d: SDU received on non-rx vc %d.%d.\n",
  1875. card->index, vpi, vci);
  1876. recycle_rx_buf(card, skb);
  1877. return;
  1878. }
  1879. vcc = vc->rx_vcc;
  1880. if (vcc->qos.aal == ATM_AAL0)
  1881. {
  1882. struct sk_buff *sb;
  1883. unsigned char *cell;
  1884. int i;
  1885. cell = skb->data;
  1886. for (i = ns_rsqe_cellcount(rsqe); i; i--)
  1887. {
  1888. if ((sb = dev_alloc_skb(NS_SMSKBSIZE)) == NULL)
  1889. {
  1890. printk("nicstar%d: Can't allocate buffers for aal0.\n",
  1891. card->index);
  1892. atomic_add(i,&vcc->stats->rx_drop);
  1893. break;
  1894. }
  1895. if (!atm_charge(vcc, sb->truesize))
  1896. {
  1897. RXPRINTK("nicstar%d: atm_charge() dropped aal0 packets.\n",
  1898. card->index);
  1899. atomic_add(i-1,&vcc->stats->rx_drop); /* already increased by 1 */
  1900. dev_kfree_skb_any(sb);
  1901. break;
  1902. }
  1903. /* Rebuild the header */
  1904. *((u32 *) sb->data) = le32_to_cpu(rsqe->word_1) << 4 |
  1905. (ns_rsqe_clp(rsqe) ? 0x00000001 : 0x00000000);
  1906. if (i == 1 && ns_rsqe_eopdu(rsqe))
  1907. *((u32 *) sb->data) |= 0x00000002;
  1908. skb_put(sb, NS_AAL0_HEADER);
  1909. memcpy(sb->tail, cell, ATM_CELL_PAYLOAD);
  1910. skb_put(sb, ATM_CELL_PAYLOAD);
  1911. ATM_SKB(sb)->vcc = vcc;
  1912. do_gettimeofday(&sb->stamp);
  1913. vcc->push(vcc, sb);
  1914. atomic_inc(&vcc->stats->rx);
  1915. cell += ATM_CELL_PAYLOAD;
  1916. }
  1917. recycle_rx_buf(card, skb);
  1918. return;
  1919. }
  1920. /* To reach this point, the AAL layer can only be AAL5 */
  1921. if ((iovb = vc->rx_iov) == NULL)
  1922. {
  1923. iovb = skb_dequeue(&(card->iovpool.queue));
  1924. if (iovb == NULL) /* No buffers in the queue */
  1925. {
  1926. iovb = alloc_skb(NS_IOVBUFSIZE, GFP_ATOMIC);
  1927. if (iovb == NULL)
  1928. {
  1929. printk("nicstar%d: Out of iovec buffers.\n", card->index);
  1930. atomic_inc(&vcc->stats->rx_drop);
  1931. recycle_rx_buf(card, skb);
  1932. return;
  1933. }
  1934. }
  1935. else
  1936. if (--card->iovpool.count < card->iovnr.min)
  1937. {
  1938. struct sk_buff *new_iovb;
  1939. if ((new_iovb = alloc_skb(NS_IOVBUFSIZE, GFP_ATOMIC)) != NULL)
  1940. {
  1941. skb_queue_tail(&card->iovpool.queue, new_iovb);
  1942. card->iovpool.count++;
  1943. }
  1944. }
  1945. vc->rx_iov = iovb;
  1946. NS_SKB(iovb)->iovcnt = 0;
  1947. iovb->len = 0;
  1948. iovb->tail = iovb->data = iovb->head;
  1949. NS_SKB(iovb)->vcc = vcc;
  1950. /* IMPORTANT: a pointer to the sk_buff containing the small or large
  1951. buffer is stored as iovec base, NOT a pointer to the
  1952. small or large buffer itself. */
  1953. }
  1954. else if (NS_SKB(iovb)->iovcnt >= NS_MAX_IOVECS)
  1955. {
  1956. printk("nicstar%d: received too big AAL5 SDU.\n", card->index);
  1957. atomic_inc(&vcc->stats->rx_err);
  1958. recycle_iovec_rx_bufs(card, (struct iovec *) iovb->data, NS_MAX_IOVECS);
  1959. NS_SKB(iovb)->iovcnt = 0;
  1960. iovb->len = 0;
  1961. iovb->tail = iovb->data = iovb->head;
  1962. NS_SKB(iovb)->vcc = vcc;
  1963. }
  1964. iov = &((struct iovec *) iovb->data)[NS_SKB(iovb)->iovcnt++];
  1965. iov->iov_base = (void *) skb;
  1966. iov->iov_len = ns_rsqe_cellcount(rsqe) * 48;
  1967. iovb->len += iov->iov_len;
  1968. if (NS_SKB(iovb)->iovcnt == 1)
  1969. {
  1970. if (skb->list != &card->sbpool.queue)
  1971. {
  1972. printk("nicstar%d: Expected a small buffer, and this is not one.\n",
  1973. card->index);
  1974. which_list(card, skb);
  1975. atomic_inc(&vcc->stats->rx_err);
  1976. recycle_rx_buf(card, skb);
  1977. vc->rx_iov = NULL;
  1978. recycle_iov_buf(card, iovb);
  1979. return;
  1980. }
  1981. }
  1982. else /* NS_SKB(iovb)->iovcnt >= 2 */
  1983. {
  1984. if (skb->list != &card->lbpool.queue)
  1985. {
  1986. printk("nicstar%d: Expected a large buffer, and this is not one.\n",
  1987. card->index);
  1988. which_list(card, skb);
  1989. atomic_inc(&vcc->stats->rx_err);
  1990. recycle_iovec_rx_bufs(card, (struct iovec *) iovb->data,
  1991. NS_SKB(iovb)->iovcnt);
  1992. vc->rx_iov = NULL;
  1993. recycle_iov_buf(card, iovb);
  1994. return;
  1995. }
  1996. }
  1997. if (ns_rsqe_eopdu(rsqe))
  1998. {
  1999. /* This works correctly regardless of the endianness of the host */
  2000. unsigned char *L1L2 = (unsigned char *)((u32)skb->data +
  2001. iov->iov_len - 6);
  2002. aal5_len = L1L2[0] << 8 | L1L2[1];
  2003. len = (aal5_len == 0x0000) ? 0x10000 : aal5_len;
  2004. if (ns_rsqe_crcerr(rsqe) ||
  2005. len + 8 > iovb->len || len + (47 + 8) < iovb->len)
  2006. {
  2007. printk("nicstar%d: AAL5 CRC error", card->index);
  2008. if (len + 8 > iovb->len || len + (47 + 8) < iovb->len)
  2009. printk(" - PDU size mismatch.\n");
  2010. else
  2011. printk(".\n");
  2012. atomic_inc(&vcc->stats->rx_err);
  2013. recycle_iovec_rx_bufs(card, (struct iovec *) iovb->data,
  2014. NS_SKB(iovb)->iovcnt);
  2015. vc->rx_iov = NULL;
  2016. recycle_iov_buf(card, iovb);
  2017. return;
  2018. }
  2019. /* By this point we (hopefully) have a complete SDU without errors. */
  2020. if (NS_SKB(iovb)->iovcnt == 1) /* Just a small buffer */
  2021. {
  2022. /* skb points to a small buffer */
  2023. if (!atm_charge(vcc, skb->truesize))
  2024. {
  2025. push_rxbufs(card, BUF_SM, (u32) skb, (u32) virt_to_bus(skb->data),
  2026. 0, 0);
  2027. atomic_inc(&vcc->stats->rx_drop);
  2028. }
  2029. else
  2030. {
  2031. skb_put(skb, len);
  2032. dequeue_sm_buf(card, skb);
  2033. #ifdef NS_USE_DESTRUCTORS
  2034. skb->destructor = ns_sb_destructor;
  2035. #endif /* NS_USE_DESTRUCTORS */
  2036. ATM_SKB(skb)->vcc = vcc;
  2037. do_gettimeofday(&skb->stamp);
  2038. vcc->push(vcc, skb);
  2039. atomic_inc(&vcc->stats->rx);
  2040. }
  2041. }
  2042. else if (NS_SKB(iovb)->iovcnt == 2) /* One small plus one large buffer */
  2043. {
  2044. struct sk_buff *sb;
  2045. sb = (struct sk_buff *) (iov - 1)->iov_base;
  2046. /* skb points to a large buffer */
  2047. if (len <= NS_SMBUFSIZE)
  2048. {
  2049. if (!atm_charge(vcc, sb->truesize))
  2050. {
  2051. push_rxbufs(card, BUF_SM, (u32) sb, (u32) virt_to_bus(sb->data),
  2052. 0, 0);
  2053. atomic_inc(&vcc->stats->rx_drop);
  2054. }
  2055. else
  2056. {
  2057. skb_put(sb, len);
  2058. dequeue_sm_buf(card, sb);
  2059. #ifdef NS_USE_DESTRUCTORS
  2060. sb->destructor = ns_sb_destructor;
  2061. #endif /* NS_USE_DESTRUCTORS */
  2062. ATM_SKB(sb)->vcc = vcc;
  2063. do_gettimeofday(&sb->stamp);
  2064. vcc->push(vcc, sb);
  2065. atomic_inc(&vcc->stats->rx);
  2066. }
  2067. push_rxbufs(card, BUF_LG, (u32) skb,
  2068. (u32) virt_to_bus(skb->data), 0, 0);
  2069. }
  2070. else /* len > NS_SMBUFSIZE, the usual case */
  2071. {
  2072. if (!atm_charge(vcc, skb->truesize))
  2073. {
  2074. push_rxbufs(card, BUF_LG, (u32) skb,
  2075. (u32) virt_to_bus(skb->data), 0, 0);
  2076. atomic_inc(&vcc->stats->rx_drop);
  2077. }
  2078. else
  2079. {
  2080. dequeue_lg_buf(card, skb);
  2081. #ifdef NS_USE_DESTRUCTORS
  2082. skb->destructor = ns_lb_destructor;
  2083. #endif /* NS_USE_DESTRUCTORS */
  2084. skb_push(skb, NS_SMBUFSIZE);
  2085. memcpy(skb->data, sb->data, NS_SMBUFSIZE);
  2086. skb_put(skb, len - NS_SMBUFSIZE);
  2087. ATM_SKB(skb)->vcc = vcc;
  2088. do_gettimeofday(&skb->stamp);
  2089. vcc->push(vcc, skb);
  2090. atomic_inc(&vcc->stats->rx);
  2091. }
  2092. push_rxbufs(card, BUF_SM, (u32) sb, (u32) virt_to_bus(sb->data),
  2093. 0, 0);
  2094. }
  2095. }
  2096. else /* Must push a huge buffer */
  2097. {
  2098. struct sk_buff *hb, *sb, *lb;
  2099. int remaining, tocopy;
  2100. int j;
  2101. hb = skb_dequeue(&(card->hbpool.queue));
  2102. if (hb == NULL) /* No buffers in the queue */
  2103. {
  2104. hb = dev_alloc_skb(NS_HBUFSIZE);
  2105. if (hb == NULL)
  2106. {
  2107. printk("nicstar%d: Out of huge buffers.\n", card->index);
  2108. atomic_inc(&vcc->stats->rx_drop);
  2109. recycle_iovec_rx_bufs(card, (struct iovec *) iovb->data,
  2110. NS_SKB(iovb)->iovcnt);
  2111. vc->rx_iov = NULL;
  2112. recycle_iov_buf(card, iovb);
  2113. return;
  2114. }
  2115. else if (card->hbpool.count < card->hbnr.min)
  2116. {
  2117. struct sk_buff *new_hb;
  2118. if ((new_hb = dev_alloc_skb(NS_HBUFSIZE)) != NULL)
  2119. {
  2120. skb_queue_tail(&card->hbpool.queue, new_hb);
  2121. card->hbpool.count++;
  2122. }
  2123. }
  2124. }
  2125. else
  2126. if (--card->hbpool.count < card->hbnr.min)
  2127. {
  2128. struct sk_buff *new_hb;
  2129. if ((new_hb = dev_alloc_skb(NS_HBUFSIZE)) != NULL)
  2130. {
  2131. skb_queue_tail(&card->hbpool.queue, new_hb);
  2132. card->hbpool.count++;
  2133. }
  2134. if (card->hbpool.count < card->hbnr.min)
  2135. {
  2136. if ((new_hb = dev_alloc_skb(NS_HBUFSIZE)) != NULL)
  2137. {
  2138. skb_queue_tail(&card->hbpool.queue, new_hb);
  2139. card->hbpool.count++;
  2140. }
  2141. }
  2142. }
  2143. iov = (struct iovec *) iovb->data;
  2144. if (!atm_charge(vcc, hb->truesize))
  2145. {
  2146. recycle_iovec_rx_bufs(card, iov, NS_SKB(iovb)->iovcnt);
  2147. if (card->hbpool.count < card->hbnr.max)
  2148. {
  2149. skb_queue_tail(&card->hbpool.queue, hb);
  2150. card->hbpool.count++;
  2151. }
  2152. else
  2153. dev_kfree_skb_any(hb);
  2154. atomic_inc(&vcc->stats->rx_drop);
  2155. }
  2156. else
  2157. {
  2158. /* Copy the small buffer to the huge buffer */
  2159. sb = (struct sk_buff *) iov->iov_base;
  2160. memcpy(hb->data, sb->data, iov->iov_len);
  2161. skb_put(hb, iov->iov_len);
  2162. remaining = len - iov->iov_len;
  2163. iov++;
  2164. /* Free the small buffer */
  2165. push_rxbufs(card, BUF_SM, (u32) sb, (u32) virt_to_bus(sb->data),
  2166. 0, 0);
  2167. /* Copy all large buffers to the huge buffer and free them */
  2168. for (j = 1; j < NS_SKB(iovb)->iovcnt; j++)
  2169. {
  2170. lb = (struct sk_buff *) iov->iov_base;
  2171. tocopy = min_t(int, remaining, iov->iov_len);
  2172. memcpy(hb->tail, lb->data, tocopy);
  2173. skb_put(hb, tocopy);
  2174. iov++;
  2175. remaining -= tocopy;
  2176. push_rxbufs(card, BUF_LG, (u32) lb,
  2177. (u32) virt_to_bus(lb->data), 0, 0);
  2178. }
  2179. #ifdef EXTRA_DEBUG
  2180. if (remaining != 0 || hb->len != len)
  2181. printk("nicstar%d: Huge buffer len mismatch.\n", card->index);
  2182. #endif /* EXTRA_DEBUG */
  2183. ATM_SKB(hb)->vcc = vcc;
  2184. #ifdef NS_USE_DESTRUCTORS
  2185. hb->destructor = ns_hb_destructor;
  2186. #endif /* NS_USE_DESTRUCTORS */
  2187. do_gettimeofday(&hb->stamp);
  2188. vcc->push(vcc, hb);
  2189. atomic_inc(&vcc->stats->rx);
  2190. }
  2191. }
  2192. vc->rx_iov = NULL;
  2193. recycle_iov_buf(card, iovb);
  2194. }
  2195. }
  2196. #ifdef NS_USE_DESTRUCTORS
  2197. static void ns_sb_destructor(struct sk_buff *sb)
  2198. {
  2199. ns_dev *card;
  2200. u32 stat;
  2201. card = (ns_dev *) ATM_SKB(sb)->vcc->dev->dev_data;
  2202. stat = readl(card->membase + STAT);
  2203. card->sbfqc = ns_stat_sfbqc_get(stat);
  2204. card->lbfqc = ns_stat_lfbqc_get(stat);
  2205. do
  2206. {
  2207. sb = __dev_alloc_skb(NS_SMSKBSIZE, GFP_KERNEL);
  2208. if (sb == NULL)
  2209. break;
  2210. skb_queue_tail(&card->sbpool.queue, sb);
  2211. skb_reserve(sb, NS_AAL0_HEADER);
  2212. push_rxbufs(card, BUF_SM, (u32) sb, (u32) virt_to_bus(sb->data), 0, 0);
  2213. } while (card->sbfqc < card->sbnr.min);
  2214. }
  2215. static void ns_lb_destructor(struct sk_buff *lb)
  2216. {
  2217. ns_dev *card;
  2218. u32 stat;
  2219. card = (ns_dev *) ATM_SKB(lb)->vcc->dev->dev_data;
  2220. stat = readl(card->membase + STAT);
  2221. card->sbfqc = ns_stat_sfbqc_get(stat);
  2222. card->lbfqc = ns_stat_lfbqc_get(stat);
  2223. do
  2224. {
  2225. lb = __dev_alloc_skb(NS_LGSKBSIZE, GFP_KERNEL);
  2226. if (lb == NULL)
  2227. break;
  2228. skb_queue_tail(&card->lbpool.queue, lb);
  2229. skb_reserve(lb, NS_SMBUFSIZE);
  2230. push_rxbufs(card, BUF_LG, (u32) lb, (u32) virt_to_bus(lb->data), 0, 0);
  2231. } while (card->lbfqc < card->lbnr.min);
  2232. }
  2233. static void ns_hb_destructor(struct sk_buff *hb)
  2234. {
  2235. ns_dev *card;
  2236. card = (ns_dev *) ATM_SKB(hb)->vcc->dev->dev_data;
  2237. while (card->hbpool.count < card->hbnr.init)
  2238. {
  2239. hb = __dev_alloc_skb(NS_HBUFSIZE, GFP_KERNEL);
  2240. if (hb == NULL)
  2241. break;
  2242. skb_queue_tail(&card->hbpool.queue, hb);
  2243. card->hbpool.count++;
  2244. }
  2245. }
  2246. #endif /* NS_USE_DESTRUCTORS */
  2247. static void recycle_rx_buf(ns_dev *card, struct sk_buff *skb)
  2248. {
  2249. if (skb->list == &card->sbpool.queue)
  2250. push_rxbufs(card, BUF_SM, (u32) skb, (u32) virt_to_bus(skb->data), 0, 0);
  2251. else if (skb->list == &card->lbpool.queue)
  2252. push_rxbufs(card, BUF_LG, (u32) skb, (u32) virt_to_bus(skb->data), 0, 0);
  2253. else
  2254. {
  2255. printk("nicstar%d: What kind of rx buffer is this?\n", card->index);
  2256. dev_kfree_skb_any(skb);
  2257. }
  2258. }
  2259. static void recycle_iovec_rx_bufs(ns_dev *card, struct iovec *iov, int count)
  2260. {
  2261. struct sk_buff *skb;
  2262. for (; count > 0; count--)
  2263. {
  2264. skb = (struct sk_buff *) (iov++)->iov_base;
  2265. if (skb->list == &card->sbpool.queue)
  2266. push_rxbufs(card, BUF_SM, (u32) skb, (u32) virt_to_bus(skb->data),
  2267. 0, 0);
  2268. else if (skb->list == &card->lbpool.queue)
  2269. push_rxbufs(card, BUF_LG, (u32) skb, (u32) virt_to_bus(skb->data),
  2270. 0, 0);
  2271. else
  2272. {
  2273. printk("nicstar%d: What kind of rx buffer is this?\n", card->index);
  2274. dev_kfree_skb_any(skb);
  2275. }
  2276. }
  2277. }
  2278. static void recycle_iov_buf(ns_dev *card, struct sk_buff *iovb)
  2279. {
  2280. if (card->iovpool.count < card->iovnr.max)
  2281. {
  2282. skb_queue_tail(&card->iovpool.queue, iovb);
  2283. card->iovpool.count++;
  2284. }
  2285. else
  2286. dev_kfree_skb_any(iovb);
  2287. }
  2288. static void dequeue_sm_buf(ns_dev *card, struct sk_buff *sb)
  2289. {
  2290. skb_unlink(sb);
  2291. #ifdef NS_USE_DESTRUCTORS
  2292. if (card->sbfqc < card->sbnr.min)
  2293. #else
  2294. if (card->sbfqc < card->sbnr.init)
  2295. {
  2296. struct sk_buff *new_sb;
  2297. if ((new_sb = dev_alloc_skb(NS_SMSKBSIZE)) != NULL)
  2298. {
  2299. skb_queue_tail(&card->sbpool.queue, new_sb);
  2300. skb_reserve(new_sb, NS_AAL0_HEADER);
  2301. push_rxbufs(card, BUF_SM, (u32) new_sb,
  2302. (u32) virt_to_bus(new_sb->data), 0, 0);
  2303. }
  2304. }
  2305. if (card->sbfqc < card->sbnr.init)
  2306. #endif /* NS_USE_DESTRUCTORS */
  2307. {
  2308. struct sk_buff *new_sb;
  2309. if ((new_sb = dev_alloc_skb(NS_SMSKBSIZE)) != NULL)
  2310. {
  2311. skb_queue_tail(&card->sbpool.queue, new_sb);
  2312. skb_reserve(new_sb, NS_AAL0_HEADER);
  2313. push_rxbufs(card, BUF_SM, (u32) new_sb,
  2314. (u32) virt_to_bus(new_sb->data), 0, 0);
  2315. }
  2316. }
  2317. }
  2318. static void dequeue_lg_buf(ns_dev *card, struct sk_buff *lb)
  2319. {
  2320. skb_unlink(lb);
  2321. #ifdef NS_USE_DESTRUCTORS
  2322. if (card->lbfqc < card->lbnr.min)
  2323. #else
  2324. if (card->lbfqc < card->lbnr.init)
  2325. {
  2326. struct sk_buff *new_lb;
  2327. if ((new_lb = dev_alloc_skb(NS_LGSKBSIZE)) != NULL)
  2328. {
  2329. skb_queue_tail(&card->lbpool.queue, new_lb);
  2330. skb_reserve(new_lb, NS_SMBUFSIZE);
  2331. push_rxbufs(card, BUF_LG, (u32) new_lb,
  2332. (u32) virt_to_bus(new_lb->data), 0, 0);
  2333. }
  2334. }
  2335. if (card->lbfqc < card->lbnr.init)
  2336. #endif /* NS_USE_DESTRUCTORS */
  2337. {
  2338. struct sk_buff *new_lb;
  2339. if ((new_lb = dev_alloc_skb(NS_LGSKBSIZE)) != NULL)
  2340. {
  2341. skb_queue_tail(&card->lbpool.queue, new_lb);
  2342. skb_reserve(new_lb, NS_SMBUFSIZE);
  2343. push_rxbufs(card, BUF_LG, (u32) new_lb,
  2344. (u32) virt_to_bus(new_lb->data), 0, 0);
  2345. }
  2346. }
  2347. }
  2348. static int ns_proc_read(struct atm_dev *dev, loff_t *pos, char *page)
  2349. {
  2350. u32 stat;
  2351. ns_dev *card;
  2352. int left;
  2353. left = (int) *pos;
  2354. card = (ns_dev *) dev->dev_data;
  2355. stat = readl(card->membase + STAT);
  2356. if (!left--)
  2357. return sprintf(page, "Pool count min init max \n");
  2358. if (!left--)
  2359. return sprintf(page, "Small %5d %5d %5d %5d \n",
  2360. ns_stat_sfbqc_get(stat), card->sbnr.min, card->sbnr.init,
  2361. card->sbnr.max);
  2362. if (!left--)
  2363. return sprintf(page, "Large %5d %5d %5d %5d \n",
  2364. ns_stat_lfbqc_get(stat), card->lbnr.min, card->lbnr.init,
  2365. card->lbnr.max);
  2366. if (!left--)
  2367. return sprintf(page, "Huge %5d %5d %5d %5d \n", card->hbpool.count,
  2368. card->hbnr.min, card->hbnr.init, card->hbnr.max);
  2369. if (!left--)
  2370. return sprintf(page, "Iovec %5d %5d %5d %5d \n", card->iovpool.count,
  2371. card->iovnr.min, card->iovnr.init, card->iovnr.max);
  2372. if (!left--)
  2373. {
  2374. int retval;
  2375. retval = sprintf(page, "Interrupt counter: %u \n", card->intcnt);
  2376. card->intcnt = 0;
  2377. return retval;
  2378. }
  2379. #if 0
  2380. /* Dump 25.6 Mbps PHY registers */
  2381. /* Now there's a 25.6 Mbps PHY driver this code isn't needed. I left it
  2382. here just in case it's needed for debugging. */
  2383. if (card->max_pcr == ATM_25_PCR && !left--)
  2384. {
  2385. u32 phy_regs[4];
  2386. u32 i;
  2387. for (i = 0; i < 4; i++)
  2388. {
  2389. while (CMD_BUSY(card));
  2390. writel(NS_CMD_READ_UTILITY | 0x00000200 | i, card->membase + CMD);
  2391. while (CMD_BUSY(card));
  2392. phy_regs[i] = readl(card->membase + DR0) & 0x000000FF;
  2393. }
  2394. return sprintf(page, "PHY regs: 0x%02X 0x%02X 0x%02X 0x%02X \n",
  2395. phy_regs[0], phy_regs[1], phy_regs[2], phy_regs[3]);
  2396. }
  2397. #endif /* 0 - Dump 25.6 Mbps PHY registers */
  2398. #if 0
  2399. /* Dump TST */
  2400. if (left-- < NS_TST_NUM_ENTRIES)
  2401. {
  2402. if (card->tste2vc[left + 1] == NULL)
  2403. return sprintf(page, "%5d - VBR/UBR \n", left + 1);
  2404. else
  2405. return sprintf(page, "%5d - %d %d \n", left + 1,
  2406. card->tste2vc[left + 1]->tx_vcc->vpi,
  2407. card->tste2vc[left + 1]->tx_vcc->vci);
  2408. }
  2409. #endif /* 0 */
  2410. return 0;
  2411. }
  2412. static int ns_ioctl(struct atm_dev *dev, unsigned int cmd, void __user *arg)
  2413. {
  2414. ns_dev *card;
  2415. pool_levels pl;
  2416. int btype;
  2417. unsigned long flags;
  2418. card = dev->dev_data;
  2419. switch (cmd)
  2420. {
  2421. case NS_GETPSTAT:
  2422. if (get_user(pl.buftype, &((pool_levels __user *) arg)->buftype))
  2423. return -EFAULT;
  2424. switch (pl.buftype)
  2425. {
  2426. case NS_BUFTYPE_SMALL:
  2427. pl.count = ns_stat_sfbqc_get(readl(card->membase + STAT));
  2428. pl.level.min = card->sbnr.min;
  2429. pl.level.init = card->sbnr.init;
  2430. pl.level.max = card->sbnr.max;
  2431. break;
  2432. case NS_BUFTYPE_LARGE:
  2433. pl.count = ns_stat_lfbqc_get(readl(card->membase + STAT));
  2434. pl.level.min = card->lbnr.min;
  2435. pl.level.init = card->lbnr.init;
  2436. pl.level.max = card->lbnr.max;
  2437. break;
  2438. case NS_BUFTYPE_HUGE:
  2439. pl.count = card->hbpool.count;
  2440. pl.level.min = card->hbnr.min;
  2441. pl.level.init = card->hbnr.init;
  2442. pl.level.max = card->hbnr.max;
  2443. break;
  2444. case NS_BUFTYPE_IOVEC:
  2445. pl.count = card->iovpool.count;
  2446. pl.level.min = card->iovnr.min;
  2447. pl.level.init = card->iovnr.init;
  2448. pl.level.max = card->iovnr.max;
  2449. break;
  2450. default:
  2451. return -ENOIOCTLCMD;
  2452. }
  2453. if (!copy_to_user((pool_levels __user *) arg, &pl, sizeof(pl)))
  2454. return (sizeof(pl));
  2455. else
  2456. return -EFAULT;
  2457. case NS_SETBUFLEV:
  2458. if (!capable(CAP_NET_ADMIN))
  2459. return -EPERM;
  2460. if (copy_from_user(&pl, (pool_levels __user *) arg, sizeof(pl)))
  2461. return -EFAULT;
  2462. if (pl.level.min >= pl.level.init || pl.level.init >= pl.level.max)
  2463. return -EINVAL;
  2464. if (pl.level.min == 0)
  2465. return -EINVAL;
  2466. switch (pl.buftype)
  2467. {
  2468. case NS_BUFTYPE_SMALL:
  2469. if (pl.level.max > TOP_SB)
  2470. return -EINVAL;
  2471. card->sbnr.min = pl.level.min;
  2472. card->sbnr.init = pl.level.init;
  2473. card->sbnr.max = pl.level.max;
  2474. break;
  2475. case NS_BUFTYPE_LARGE:
  2476. if (pl.level.max > TOP_LB)
  2477. return -EINVAL;
  2478. card->lbnr.min = pl.level.min;
  2479. card->lbnr.init = pl.level.init;
  2480. card->lbnr.max = pl.level.max;
  2481. break;
  2482. case NS_BUFTYPE_HUGE:
  2483. if (pl.level.max > TOP_HB)
  2484. return -EINVAL;
  2485. card->hbnr.min = pl.level.min;
  2486. card->hbnr.init = pl.level.init;
  2487. card->hbnr.max = pl.level.max;
  2488. break;
  2489. case NS_BUFTYPE_IOVEC:
  2490. if (pl.level.max > TOP_IOVB)
  2491. return -EINVAL;
  2492. card->iovnr.min = pl.level.min;
  2493. card->iovnr.init = pl.level.init;
  2494. card->iovnr.max = pl.level.max;
  2495. break;
  2496. default:
  2497. return -EINVAL;
  2498. }
  2499. return 0;
  2500. case NS_ADJBUFLEV:
  2501. if (!capable(CAP_NET_ADMIN))
  2502. return -EPERM;
  2503. btype = (int) arg; /* an int is the same size as a pointer */
  2504. switch (btype)
  2505. {
  2506. case NS_BUFTYPE_SMALL:
  2507. while (card->sbfqc < card->sbnr.init)
  2508. {
  2509. struct sk_buff *sb;
  2510. sb = __dev_alloc_skb(NS_SMSKBSIZE, GFP_KERNEL);
  2511. if (sb == NULL)
  2512. return -ENOMEM;
  2513. skb_queue_tail(&card->sbpool.queue, sb);
  2514. skb_reserve(sb, NS_AAL0_HEADER);
  2515. push_rxbufs(card, BUF_SM, (u32) sb, (u32) virt_to_bus(sb->data), 0, 0);
  2516. }
  2517. break;
  2518. case NS_BUFTYPE_LARGE:
  2519. while (card->lbfqc < card->lbnr.init)
  2520. {
  2521. struct sk_buff *lb;
  2522. lb = __dev_alloc_skb(NS_LGSKBSIZE, GFP_KERNEL);
  2523. if (lb == NULL)
  2524. return -ENOMEM;
  2525. skb_queue_tail(&card->lbpool.queue, lb);
  2526. skb_reserve(lb, NS_SMBUFSIZE);
  2527. push_rxbufs(card, BUF_LG, (u32) lb, (u32) virt_to_bus(lb->data), 0, 0);
  2528. }
  2529. break;
  2530. case NS_BUFTYPE_HUGE:
  2531. while (card->hbpool.count > card->hbnr.init)
  2532. {
  2533. struct sk_buff *hb;
  2534. ns_grab_int_lock(card, flags);
  2535. hb = skb_dequeue(&card->hbpool.queue);
  2536. card->hbpool.count--;
  2537. spin_unlock_irqrestore(&card->int_lock, flags);
  2538. if (hb == NULL)
  2539. printk("nicstar%d: huge buffer count inconsistent.\n",
  2540. card->index);
  2541. else
  2542. dev_kfree_skb_any(hb);
  2543. }
  2544. while (card->hbpool.count < card->hbnr.init)
  2545. {
  2546. struct sk_buff *hb;
  2547. hb = __dev_alloc_skb(NS_HBUFSIZE, GFP_KERNEL);
  2548. if (hb == NULL)
  2549. return -ENOMEM;
  2550. ns_grab_int_lock(card, flags);
  2551. skb_queue_tail(&card->hbpool.queue, hb);
  2552. card->hbpool.count++;
  2553. spin_unlock_irqrestore(&card->int_lock, flags);
  2554. }
  2555. break;
  2556. case NS_BUFTYPE_IOVEC:
  2557. while (card->iovpool.count > card->iovnr.init)
  2558. {
  2559. struct sk_buff *iovb;
  2560. ns_grab_int_lock(card, flags);
  2561. iovb = skb_dequeue(&card->iovpool.queue);
  2562. card->iovpool.count--;
  2563. spin_unlock_irqrestore(&card->int_lock, flags);
  2564. if (iovb == NULL)
  2565. printk("nicstar%d: iovec buffer count inconsistent.\n",
  2566. card->index);
  2567. else
  2568. dev_kfree_skb_any(iovb);
  2569. }
  2570. while (card->iovpool.count < card->iovnr.init)
  2571. {
  2572. struct sk_buff *iovb;
  2573. iovb = alloc_skb(NS_IOVBUFSIZE, GFP_KERNEL);
  2574. if (iovb == NULL)
  2575. return -ENOMEM;
  2576. ns_grab_int_lock(card, flags);
  2577. skb_queue_tail(&card->iovpool.queue, iovb);
  2578. card->iovpool.count++;
  2579. spin_unlock_irqrestore(&card->int_lock, flags);
  2580. }
  2581. break;
  2582. default:
  2583. return -EINVAL;
  2584. }
  2585. return 0;
  2586. default:
  2587. if (dev->phy && dev->phy->ioctl) {
  2588. return dev->phy->ioctl(dev, cmd, arg);
  2589. }
  2590. else {
  2591. printk("nicstar%d: %s == NULL \n", card->index,
  2592. dev->phy ? "dev->phy->ioctl" : "dev->phy");
  2593. return -ENOIOCTLCMD;
  2594. }
  2595. }
  2596. }
  2597. static void which_list(ns_dev *card, struct sk_buff *skb)
  2598. {
  2599. printk("It's a %s buffer.\n", skb->list == &card->sbpool.queue ?
  2600. "small" : skb->list == &card->lbpool.queue ? "large" :
  2601. skb->list == &card->hbpool.queue ? "huge" :
  2602. skb->list == &card->iovpool.queue ? "iovec" : "unknown");
  2603. }
  2604. static void ns_poll(unsigned long arg)
  2605. {
  2606. int i;
  2607. ns_dev *card;
  2608. unsigned long flags;
  2609. u32 stat_r, stat_w;
  2610. PRINTK("nicstar: Entering ns_poll().\n");
  2611. for (i = 0; i < num_cards; i++)
  2612. {
  2613. card = cards[i];
  2614. if (spin_is_locked(&card->int_lock)) {
  2615. /* Probably it isn't worth spinning */
  2616. continue;
  2617. }
  2618. ns_grab_int_lock(card, flags);
  2619. stat_w = 0;
  2620. stat_r = readl(card->membase + STAT);
  2621. if (stat_r & NS_STAT_TSIF)
  2622. stat_w |= NS_STAT_TSIF;
  2623. if (stat_r & NS_STAT_EOPDU)
  2624. stat_w |= NS_STAT_EOPDU;
  2625. process_tsq(card);
  2626. process_rsq(card);
  2627. writel(stat_w, card->membase + STAT);
  2628. spin_unlock_irqrestore(&card->int_lock, flags);
  2629. }
  2630. mod_timer(&ns_timer, jiffies + NS_POLL_PERIOD);
  2631. PRINTK("nicstar: Leaving ns_poll().\n");
  2632. }
  2633. static int ns_parse_mac(char *mac, unsigned char *esi)
  2634. {
  2635. int i, j;
  2636. short byte1, byte0;
  2637. if (mac == NULL || esi == NULL)
  2638. return -1;
  2639. j = 0;
  2640. for (i = 0; i < 6; i++)
  2641. {
  2642. if ((byte1 = ns_h2i(mac[j++])) < 0)
  2643. return -1;
  2644. if ((byte0 = ns_h2i(mac[j++])) < 0)
  2645. return -1;
  2646. esi[i] = (unsigned char) (byte1 * 16 + byte0);
  2647. if (i < 5)
  2648. {
  2649. if (mac[j++] != ':')
  2650. return -1;
  2651. }
  2652. }
  2653. return 0;
  2654. }
  2655. static short ns_h2i(char c)
  2656. {
  2657. if (c >= '0' && c <= '9')
  2658. return (short) (c - '0');
  2659. if (c >= 'A' && c <= 'F')
  2660. return (short) (c - 'A' + 10);
  2661. if (c >= 'a' && c <= 'f')
  2662. return (short) (c - 'a' + 10);
  2663. return -1;
  2664. }
  2665. static void ns_phy_put(struct atm_dev *dev, unsigned char value,
  2666. unsigned long addr)
  2667. {
  2668. ns_dev *card;
  2669. unsigned long flags;
  2670. card = dev->dev_data;
  2671. ns_grab_res_lock(card, flags);
  2672. while(CMD_BUSY(card));
  2673. writel((unsigned long) value, card->membase + DR0);
  2674. writel(NS_CMD_WRITE_UTILITY | 0x00000200 | (addr & 0x000000FF),
  2675. card->membase + CMD);
  2676. spin_unlock_irqrestore(&card->res_lock, flags);
  2677. }
  2678. static unsigned char ns_phy_get(struct atm_dev *dev, unsigned long addr)
  2679. {
  2680. ns_dev *card;
  2681. unsigned long flags;
  2682. unsigned long data;
  2683. card = dev->dev_data;
  2684. ns_grab_res_lock(card, flags);
  2685. while(CMD_BUSY(card));
  2686. writel(NS_CMD_READ_UTILITY | 0x00000200 | (addr & 0x000000FF),
  2687. card->membase + CMD);
  2688. while(CMD_BUSY(card));
  2689. data = readl(card->membase + DR0) & 0x000000FF;
  2690. spin_unlock_irqrestore(&card->res_lock, flags);
  2691. return (unsigned char) data;
  2692. }
  2693. module_init(nicstar_init);
  2694. module_exit(nicstar_cleanup);