head64.S 25 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784
  1. /*
  2. * arch/s390/kernel/head.S
  3. *
  4. * S390 version
  5. * Copyright (C) 1999,2000 IBM Deutschland Entwicklung GmbH, IBM Corporation
  6. * Author(s): Hartmut Penner (hp@de.ibm.com),
  7. * Martin Schwidefsky (schwidefsky@de.ibm.com),
  8. * Rob van der Heij (rvdhei@iae.nl)
  9. *
  10. * There are 5 different IPL methods
  11. * 1) load the image directly into ram at address 0 and do an PSW restart
  12. * 2) linload will load the image from address 0x10000 to memory 0x10000
  13. * and start the code thru LPSW 0x0008000080010000 (VM only, deprecated)
  14. * 3) generate the tape ipl header, store the generated image on a tape
  15. * and ipl from it
  16. * In case of SL tape you need to IPL 5 times to get past VOL1 etc
  17. * 4) generate the vm reader ipl header, move the generated image to the
  18. * VM reader (use option NOH!) and do a ipl from reader (VM only)
  19. * 5) direct call of start by the SALIPL loader
  20. * We use the cpuid to distinguish between VM and native ipl
  21. * params for kernel are pushed to 0x10400 (see setup.h)
  22. Changes:
  23. Okt 25 2000 <rvdheij@iae.nl>
  24. added code to skip HDR and EOF to allow SL tape IPL (5 retries)
  25. changed first CCW from rewind to backspace block
  26. */
  27. #include <linux/config.h>
  28. #include <asm/setup.h>
  29. #include <asm/lowcore.h>
  30. #include <asm/offsets.h>
  31. #include <asm/thread_info.h>
  32. #include <asm/page.h>
  33. #ifndef CONFIG_IPL
  34. .org 0
  35. .long 0x00080000,0x80000000+startup # Just a restart PSW
  36. #else
  37. #ifdef CONFIG_IPL_TAPE
  38. #define IPL_BS 1024
  39. .org 0
  40. .long 0x00080000,0x80000000+iplstart # The first 24 bytes are loaded
  41. .long 0x27000000,0x60000001 # by ipl to addresses 0-23.
  42. .long 0x02000000,0x20000000+IPL_BS # (a PSW and two CCWs).
  43. .long 0x00000000,0x00000000 # external old psw
  44. .long 0x00000000,0x00000000 # svc old psw
  45. .long 0x00000000,0x00000000 # program check old psw
  46. .long 0x00000000,0x00000000 # machine check old psw
  47. .long 0x00000000,0x00000000 # io old psw
  48. .long 0x00000000,0x00000000
  49. .long 0x00000000,0x00000000
  50. .long 0x00000000,0x00000000
  51. .long 0x000a0000,0x00000058 # external new psw
  52. .long 0x000a0000,0x00000060 # svc new psw
  53. .long 0x000a0000,0x00000068 # program check new psw
  54. .long 0x000a0000,0x00000070 # machine check new psw
  55. .long 0x00080000,0x80000000+.Lioint # io new psw
  56. .org 0x100
  57. #
  58. # subroutine for loading from tape
  59. # Paramters:
  60. # R1 = device number
  61. # R2 = load address
  62. .Lloader:
  63. st %r14,.Lldret
  64. la %r3,.Lorbread # r3 = address of orb
  65. la %r5,.Lirb # r5 = address of irb
  66. st %r2,.Lccwread+4 # initialize CCW data addresses
  67. lctl %c6,%c6,.Lcr6
  68. slr %r2,%r2
  69. .Lldlp:
  70. la %r6,3 # 3 retries
  71. .Lssch:
  72. ssch 0(%r3) # load chunk of IPL_BS bytes
  73. bnz .Llderr
  74. .Lw4end:
  75. bas %r14,.Lwait4io
  76. tm 8(%r5),0x82 # do we have a problem ?
  77. bnz .Lrecov
  78. slr %r7,%r7
  79. icm %r7,3,10(%r5) # get residual count
  80. lcr %r7,%r7
  81. la %r7,IPL_BS(%r7) # IPL_BS-residual=#bytes read
  82. ar %r2,%r7 # add to total size
  83. tm 8(%r5),0x01 # found a tape mark ?
  84. bnz .Ldone
  85. l %r0,.Lccwread+4 # update CCW data addresses
  86. ar %r0,%r7
  87. st %r0,.Lccwread+4
  88. b .Lldlp
  89. .Ldone:
  90. l %r14,.Lldret
  91. br %r14 # r2 contains the total size
  92. .Lrecov:
  93. bas %r14,.Lsense # do the sensing
  94. bct %r6,.Lssch # dec. retry count & branch
  95. b .Llderr
  96. #
  97. # Sense subroutine
  98. #
  99. .Lsense:
  100. st %r14,.Lsnsret
  101. la %r7,.Lorbsense
  102. ssch 0(%r7) # start sense command
  103. bnz .Llderr
  104. bas %r14,.Lwait4io
  105. l %r14,.Lsnsret
  106. tm 8(%r5),0x82 # do we have a problem ?
  107. bnz .Llderr
  108. br %r14
  109. #
  110. # Wait for interrupt subroutine
  111. #
  112. .Lwait4io:
  113. lpsw .Lwaitpsw
  114. .Lioint:
  115. c %r1,0xb8 # compare subchannel number
  116. bne .Lwait4io
  117. tsch 0(%r5)
  118. slr %r0,%r0
  119. tm 8(%r5),0x82 # do we have a problem ?
  120. bnz .Lwtexit
  121. tm 8(%r5),0x04 # got device end ?
  122. bz .Lwait4io
  123. .Lwtexit:
  124. br %r14
  125. .Llderr:
  126. lpsw .Lcrash
  127. .align 8
  128. .Lorbread:
  129. .long 0x00000000,0x0080ff00,.Lccwread
  130. .align 8
  131. .Lorbsense:
  132. .long 0x00000000,0x0080ff00,.Lccwsense
  133. .align 8
  134. .Lccwread:
  135. .long 0x02200000+IPL_BS,0x00000000
  136. .Lccwsense:
  137. .long 0x04200001,0x00000000
  138. .Lwaitpsw:
  139. .long 0x020a0000,0x80000000+.Lioint
  140. .Lirb: .long 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
  141. .Lcr6: .long 0xff000000
  142. .align 8
  143. .Lcrash:.long 0x000a0000,0x00000000
  144. .Lldret:.long 0
  145. .Lsnsret: .long 0
  146. #endif /* CONFIG_IPL_TAPE */
  147. #ifdef CONFIG_IPL_VM
  148. #define IPL_BS 0x730
  149. .org 0
  150. .long 0x00080000,0x80000000+iplstart # The first 24 bytes are loaded
  151. .long 0x02000018,0x60000050 # by ipl to addresses 0-23.
  152. .long 0x02000068,0x60000050 # (a PSW and two CCWs).
  153. .fill 80-24,1,0x40 # bytes 24-79 are discarded !!
  154. .long 0x020000f0,0x60000050 # The next 160 byte are loaded
  155. .long 0x02000140,0x60000050 # to addresses 0x18-0xb7
  156. .long 0x02000190,0x60000050 # They form the continuation
  157. .long 0x020001e0,0x60000050 # of the CCW program started
  158. .long 0x02000230,0x60000050 # by ipl and load the range
  159. .long 0x02000280,0x60000050 # 0x0f0-0x730 from the image
  160. .long 0x020002d0,0x60000050 # to the range 0x0f0-0x730
  161. .long 0x02000320,0x60000050 # in memory. At the end of
  162. .long 0x02000370,0x60000050 # the channel program the PSW
  163. .long 0x020003c0,0x60000050 # at location 0 is loaded.
  164. .long 0x02000410,0x60000050 # Initial processing starts
  165. .long 0x02000460,0x60000050 # at 0xf0 = iplstart.
  166. .long 0x020004b0,0x60000050
  167. .long 0x02000500,0x60000050
  168. .long 0x02000550,0x60000050
  169. .long 0x020005a0,0x60000050
  170. .long 0x020005f0,0x60000050
  171. .long 0x02000640,0x60000050
  172. .long 0x02000690,0x60000050
  173. .long 0x020006e0,0x20000050
  174. .org 0xf0
  175. #
  176. # subroutine for loading cards from the reader
  177. #
  178. .Lloader:
  179. la %r3,.Lorb # r2 = address of orb into r2
  180. la %r5,.Lirb # r4 = address of irb
  181. la %r6,.Lccws
  182. la %r7,20
  183. .Linit:
  184. st %r2,4(%r6) # initialize CCW data addresses
  185. la %r2,0x50(%r2)
  186. la %r6,8(%r6)
  187. bct 7,.Linit
  188. lctl %c6,%c6,.Lcr6 # set IO subclass mask
  189. slr %r2,%r2
  190. .Lldlp:
  191. ssch 0(%r3) # load chunk of 1600 bytes
  192. bnz .Llderr
  193. .Lwait4irq:
  194. mvc 0x78(8),.Lnewpsw # set up IO interrupt psw
  195. lpsw .Lwaitpsw
  196. .Lioint:
  197. c %r1,0xb8 # compare subchannel number
  198. bne .Lwait4irq
  199. tsch 0(%r5)
  200. slr %r0,%r0
  201. ic %r0,8(%r5) # get device status
  202. chi %r0,8 # channel end ?
  203. be .Lcont
  204. chi %r0,12 # channel end + device end ?
  205. be .Lcont
  206. l %r0,4(%r5)
  207. s %r0,8(%r3) # r0/8 = number of ccws executed
  208. mhi %r0,10 # *10 = number of bytes in ccws
  209. lh %r3,10(%r5) # get residual count
  210. sr %r0,%r3 # #ccws*80-residual=#bytes read
  211. ar %r2,%r0
  212. br %r14 # r2 contains the total size
  213. .Lcont:
  214. ahi %r2,0x640 # add 0x640 to total size
  215. la %r6,.Lccws
  216. la %r7,20
  217. .Lincr:
  218. l %r0,4(%r6) # update CCW data addresses
  219. ahi %r0,0x640
  220. st %r0,4(%r6)
  221. ahi %r6,8
  222. bct 7,.Lincr
  223. b .Lldlp
  224. .Llderr:
  225. lpsw .Lcrash
  226. .align 8
  227. .Lorb: .long 0x00000000,0x0080ff00,.Lccws
  228. .Lirb: .long 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
  229. .Lcr6: .long 0xff000000
  230. .Lloadp:.long 0,0
  231. .align 8
  232. .Lcrash:.long 0x000a0000,0x00000000
  233. .Lnewpsw:
  234. .long 0x00080000,0x80000000+.Lioint
  235. .Lwaitpsw:
  236. .long 0x020a0000,0x80000000+.Lioint
  237. .align 8
  238. .Lccws: .rept 19
  239. .long 0x02600050,0x00000000
  240. .endr
  241. .long 0x02200050,0x00000000
  242. #endif /* CONFIG_IPL_VM */
  243. iplstart:
  244. lh %r1,0xb8 # test if subchannel number
  245. bct %r1,.Lnoload # is valid
  246. l %r1,0xb8 # load ipl subchannel number
  247. la %r2,IPL_BS # load start address
  248. bas %r14,.Lloader # load rest of ipl image
  249. larl %r12,_pstart # pointer to parameter area
  250. st %r1,IPL_DEVICE+4-PARMAREA(%r12) # store ipl device number
  251. #
  252. # load parameter file from ipl device
  253. #
  254. .Lagain1:
  255. l %r2,INITRD_START+4-PARMAREA(%r12)# use ramdisk location as temp
  256. bas %r14,.Lloader # load parameter file
  257. ltr %r2,%r2 # got anything ?
  258. bz .Lnopf
  259. chi %r2,895
  260. bnh .Lnotrunc
  261. la %r2,895
  262. .Lnotrunc:
  263. l %r4,INITRD_START+4-PARMAREA(%r12)
  264. clc 0(3,%r4),.L_hdr # if it is HDRx
  265. bz .Lagain1 # skip dataset header
  266. clc 0(3,%r4),.L_eof # if it is EOFx
  267. bz .Lagain1 # skip dateset trailer
  268. la %r5,0(%r4,%r2)
  269. lr %r3,%r2
  270. .Lidebc:
  271. tm 0(%r5),0x80 # high order bit set ?
  272. bo .Ldocv # yes -> convert from EBCDIC
  273. ahi %r5,-1
  274. bct %r3,.Lidebc
  275. b .Lnocv
  276. .Ldocv:
  277. l %r3,.Lcvtab
  278. tr 0(256,%r4),0(%r3) # convert parameters to ascii
  279. tr 256(256,%r4),0(%r3)
  280. tr 512(256,%r4),0(%r3)
  281. tr 768(122,%r4),0(%r3)
  282. .Lnocv: la %r3,COMMAND_LINE-PARMAREA(%r12) # load adr. of command line
  283. mvc 0(256,%r3),0(%r4)
  284. mvc 256(256,%r3),256(%r4)
  285. mvc 512(256,%r3),512(%r4)
  286. mvc 768(122,%r3),768(%r4)
  287. slr %r0,%r0
  288. b .Lcntlp
  289. .Ldelspc:
  290. ic %r0,0(%r2,%r3)
  291. chi %r0,0x20 # is it a space ?
  292. be .Lcntlp
  293. ahi %r2,1
  294. b .Leolp
  295. .Lcntlp:
  296. brct %r2,.Ldelspc
  297. .Leolp:
  298. slr %r0,%r0
  299. stc %r0,0(%r2,%r3) # terminate buffer
  300. .Lnopf:
  301. #
  302. # load ramdisk from ipl device
  303. #
  304. .Lagain2:
  305. l %r2,INITRD_START+4-PARMAREA(%r12)# load adr. of ramdisk
  306. bas %r14,.Lloader # load ramdisk
  307. st %r2,INITRD_SIZE+4-PARMAREA(%r12) # store size of ramdisk
  308. ltr %r2,%r2
  309. bnz .Lrdcont
  310. st %r2,INITRD_START+4-PARMAREA(%r12)# no ramdisk found, null it
  311. .Lrdcont:
  312. l %r2,INITRD_START+4-PARMAREA(%r12)
  313. clc 0(3,%r2),.L_hdr # skip HDRx and EOFx
  314. bz .Lagain2
  315. clc 0(3,%r2),.L_eof
  316. bz .Lagain2
  317. #ifdef CONFIG_IPL_VM
  318. #
  319. # reset files in VM reader
  320. #
  321. stidp __LC_CPUID # store cpuid
  322. tm __LC_CPUID,0xff # running VM ?
  323. bno .Lnoreset
  324. la %r2,.Lreset
  325. lhi %r3,26
  326. diag %r2,%r3,8
  327. mvc 0x78(8),.Lrdrnewpsw # set up IO interrupt psw
  328. .Lwaitrdrirq:
  329. lpsw .Lrdrwaitpsw
  330. .Lrdrint:
  331. c %r1,0xb8 # compare subchannel number
  332. bne .Lwaitrdrirq
  333. la %r5,.Lirb
  334. tsch 0(%r5)
  335. .Lnoreset:
  336. b .Lnoload
  337. .align 8
  338. .Lrdrnewpsw:
  339. .long 0x00080000,0x80000000+.Lrdrint
  340. .Lrdrwaitpsw:
  341. .long 0x020a0000,0x80000000+.Lrdrint
  342. #endif
  343. #
  344. # everything loaded, go for it
  345. #
  346. .Lnoload:
  347. l %r1,.Lstartup
  348. br %r1
  349. .Lstartup: .long startup
  350. .Lcvtab:.long _ebcasc # ebcdic to ascii table
  351. .Lreset:.byte 0xc3,0xc8,0xc1,0xd5,0xc7,0xc5,0x40,0xd9,0xc4,0xd9,0x40
  352. .byte 0xc1,0xd3,0xd3,0x40,0xd2,0xc5,0xc5,0xd7,0x40,0xd5,0xd6
  353. .byte 0xc8,0xd6,0xd3,0xc4 # "change rdr all keep nohold"
  354. .L_eof: .long 0xc5d6c600 /* C'EOF' */
  355. .L_hdr: .long 0xc8c4d900 /* C'HDR' */
  356. #endif /* CONFIG_IPL */
  357. #
  358. # SALIPL loader support. Based on a patch by Rob van der Heij.
  359. # This entry point is called directly from the SALIPL loader and
  360. # doesn't need a builtin ipl record.
  361. #
  362. .org 0x800
  363. .globl start
  364. start:
  365. stm %r0,%r15,0x07b0 # store registers
  366. basr %r12,%r0
  367. .base:
  368. l %r11,.parm
  369. l %r8,.cmd # pointer to command buffer
  370. ltr %r9,%r9 # do we have SALIPL parameters?
  371. bp .sk8x8
  372. mvc 0(64,%r8),0x00b0 # copy saved registers
  373. xc 64(240-64,%r8),0(%r8) # remainder of buffer
  374. tr 0(64,%r8),.lowcase
  375. b .gotr
  376. .sk8x8:
  377. mvc 0(240,%r8),0(%r9) # copy iplparms into buffer
  378. .gotr:
  379. l %r10,.tbl # EBCDIC to ASCII table
  380. tr 0(240,%r8),0(%r10)
  381. stidp __LC_CPUID # Are we running on VM maybe
  382. cli __LC_CPUID,0xff
  383. bnz .test
  384. .long 0x83300060 # diag 3,0,x'0060' - storage size
  385. b .done
  386. .test:
  387. mvc 0x68(8),.pgmnw # set up pgm check handler
  388. l %r2,.fourmeg
  389. lr %r3,%r2
  390. bctr %r3,%r0 # 4M-1
  391. .loop: iske %r0,%r3
  392. ar %r3,%r2
  393. .pgmx:
  394. sr %r3,%r2
  395. la %r3,1(%r3)
  396. .done:
  397. l %r1,.memsize
  398. st %r3,4(%r1)
  399. slr %r0,%r0
  400. st %r0,INITRD_SIZE+4-PARMAREA(%r11)
  401. st %r0,INITRD_START+4-PARMAREA(%r11)
  402. j startup # continue with startup
  403. .tbl: .long _ebcasc # translate table
  404. .cmd: .long COMMAND_LINE # address of command line buffer
  405. .parm: .long PARMAREA
  406. .fourmeg: .long 0x00400000 # 4M
  407. .pgmnw: .long 0x00080000,.pgmx
  408. .memsize: .long memory_size
  409. .lowcase:
  410. .byte 0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07
  411. .byte 0x08,0x09,0x0a,0x0b,0x0c,0x0d,0x0e,0x0f
  412. .byte 0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17
  413. .byte 0x18,0x19,0x1a,0x1b,0x1c,0x1d,0x1e,0x1f
  414. .byte 0x20,0x21,0x22,0x23,0x24,0x25,0x26,0x27
  415. .byte 0x28,0x29,0x2a,0x2b,0x2c,0x2d,0x2e,0x2f
  416. .byte 0x30,0x31,0x32,0x33,0x34,0x35,0x36,0x37
  417. .byte 0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f
  418. .byte 0x40,0x41,0x42,0x43,0x44,0x45,0x46,0x47
  419. .byte 0x48,0x49,0x4a,0x4b,0x4c,0x4d,0x4e,0x4f
  420. .byte 0x50,0x51,0x52,0x53,0x54,0x55,0x56,0x57
  421. .byte 0x58,0x59,0x5a,0x5b,0x5c,0x5d,0x5e,0x5f
  422. .byte 0x60,0x61,0x62,0x63,0x64,0x65,0x66,0x67
  423. .byte 0x68,0x69,0x6a,0x6b,0x6c,0x6d,0x6e,0x6f
  424. .byte 0x70,0x71,0x72,0x73,0x74,0x75,0x76,0x77
  425. .byte 0x78,0x79,0x7a,0x7b,0x7c,0x7d,0x7e,0x7f
  426. .byte 0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87
  427. .byte 0x88,0x89,0x8a,0x8b,0x8c,0x8d,0x8e,0x8f
  428. .byte 0x90,0x91,0x92,0x93,0x94,0x95,0x96,0x97
  429. .byte 0x98,0x99,0x9a,0x9b,0x9c,0x9d,0x9e,0x9f
  430. .byte 0xa0,0xa1,0xa2,0xa3,0xa4,0xa5,0xa6,0xa7
  431. .byte 0xa8,0xa9,0xaa,0xab,0xac,0xad,0xae,0xaf
  432. .byte 0xb0,0xb1,0xb2,0xb3,0xb4,0xb5,0xb6,0xb7
  433. .byte 0xb8,0xb9,0xba,0xbb,0xbc,0xbd,0xbe,0xbf
  434. .byte 0xc0,0x81,0x82,0x83,0x84,0x85,0x86,0x87 # .abcdefg
  435. .byte 0x88,0x89,0xca,0xcb,0xcc,0xcd,0xce,0xcf # hi
  436. .byte 0xd0,0x91,0x92,0x93,0x94,0x95,0x96,0x97 # .jklmnop
  437. .byte 0x98,0x99,0xda,0xdb,0xdc,0xdd,0xde,0xdf # qr
  438. .byte 0xe0,0xe1,0xa2,0xa3,0xa4,0xa5,0xa6,0xa7 # ..stuvwx
  439. .byte 0xa8,0xa9,0xea,0xeb,0xec,0xed,0xee,0xef # yz
  440. .byte 0xf0,0xf1,0xf2,0xf3,0xf4,0xf5,0xf6,0xf7
  441. .byte 0xf8,0xf9,0xfa,0xfb,0xfc,0xfd,0xfe,0xff
  442. #
  443. # startup-code at 0x10000, running in real mode
  444. # this is called either by the ipl loader or directly by PSW restart
  445. # or linload or SALIPL
  446. #
  447. .org 0x10000
  448. startup:basr %r13,0 # get base
  449. .LPG1: sll %r13,1 # remove high order bit
  450. srl %r13,1
  451. lhi %r1,1 # mode 1 = esame
  452. slr %r0,%r0 # set cpuid to zero
  453. sigp %r1,%r0,0x12 # switch to esame mode
  454. sam64 # switch to 64 bit mode
  455. lctlg %c0,%c15,.Lctl-.LPG1(%r13) # load control registers
  456. larl %r12,_pstart # pointer to parameter area
  457. # move IPL device to lowcore
  458. mvc __LC_IPLDEV(4),IPL_DEVICE+4-PARMAREA(%r12)
  459. #
  460. # clear bss memory
  461. #
  462. larl %r2,__bss_start # start of bss segment
  463. larl %r3,_end # end of bss segment
  464. sgr %r3,%r2 # length of bss
  465. sgr %r4,%r4 #
  466. sgr %r5,%r5 # set src,length and pad to zero
  467. mvcle %r2,%r4,0 # clear mem
  468. jo .-4 # branch back, if not finish
  469. l %r2,.Lrcp-.LPG1(%r13) # Read SCP forced command word
  470. .Lservicecall:
  471. stosm .Lpmask-.LPG1(%r13),0x01 # authorize ext interrupts
  472. stctg %r0,%r0,.Lcr-.LPG1(%r13) # get cr0
  473. la %r1,0x200 # set bit 22
  474. og %r1,.Lcr-.LPG1(%r13) # or old cr0 with r1
  475. stg %r1,.Lcr-.LPG1(%r13)
  476. lctlg %r0,%r0,.Lcr-.LPG1(%r13) # load modified cr0
  477. mvc __LC_EXT_NEW_PSW(8),.Lpcmsk-.LPG1(%r13) # set postcall psw
  478. larl %r1,.Lsclph
  479. stg %r1,__LC_EXT_NEW_PSW+8 # set handler
  480. larl %r4,_pstart # %r4 is our index for sccb stuff
  481. la %r1,.Lsccb-PARMAREA(%r4) # our sccb
  482. .insn rre,0xb2200000,%r2,%r1 # service call
  483. ipm %r1
  484. srl %r1,28 # get cc code
  485. xr %r3,%r3
  486. chi %r1,3
  487. be .Lfchunk-.LPG1(%r13) # leave
  488. chi %r1,2
  489. be .Lservicecall-.LPG1(%r13)
  490. lpsw .Lwaitsclp-.LPG1(%r13)
  491. .Lsclph:
  492. lh %r1,.Lsccbr-PARMAREA(%r4)
  493. chi %r1,0x10 # 0x0010 is the sucess code
  494. je .Lprocsccb # let's process the sccb
  495. chi %r1,0x1f0
  496. bne .Lfchunk-.LPG1(%r13) # unhandled error code
  497. c %r2,.Lrcp-.LPG1(%r13) # Did we try Read SCP forced
  498. bne .Lfchunk-.LPG1(%r13) # if no, give up
  499. l %r2,.Lrcp2-.LPG1(%r13) # try with Read SCP
  500. b .Lservicecall-.LPG1(%r13)
  501. .Lprocsccb:
  502. lghi %r1,0
  503. icm %r1,3,.Lscpincr1-PARMAREA(%r4) # use this one if != 0
  504. jnz .Lscnd
  505. lg %r1,.Lscpincr2-PARMAREA(%r4) # otherwise use this one
  506. .Lscnd:
  507. xr %r3,%r3 # same logic
  508. ic %r3,.Lscpa1-PARMAREA(%r4)
  509. chi %r3,0x00
  510. jne .Lcompmem
  511. l %r3,.Lscpa2-PARMAREA(%r13)
  512. .Lcompmem:
  513. mlgr %r2,%r1 # mem in MB on 128-bit
  514. l %r1,.Lonemb-.LPG1(%r13)
  515. mlgr %r2,%r1 # mem size in bytes in %r3
  516. b .Lfchunk-.LPG1(%r13)
  517. .Lpmask:
  518. .byte 0
  519. .align 8
  520. .Lcr:
  521. .quad 0x00 # place holder for cr0
  522. .Lwaitsclp:
  523. .long 0x020A0000
  524. .quad .Lsclph
  525. .Lrcp:
  526. .int 0x00120001 # Read SCP forced code
  527. .Lrcp2:
  528. .int 0x00020001 # Read SCP code
  529. .Lonemb:
  530. .int 0x100000
  531. .Lfchunk:
  532. # set program check new psw mask
  533. mvc __LC_PGM_NEW_PSW(8),.Lpcmsk-.LPG1(%r13)
  534. #
  535. # find memory chunks.
  536. #
  537. lgr %r9,%r3 # end of mem
  538. larl %r1,.Lchkmem # set program check address
  539. stg %r1,__LC_PGM_NEW_PSW+8
  540. la %r1,1 # test in increments of 128KB
  541. sllg %r1,%r1,17
  542. larl %r3,memory_chunk
  543. slgr %r4,%r4 # set start of chunk to zero
  544. slgr %r5,%r5 # set end of chunk to zero
  545. slr %r6,%r6 # set access code to zero
  546. la %r10,MEMORY_CHUNKS # number of chunks
  547. .Lloop:
  548. tprot 0(%r5),0 # test protection of first byte
  549. ipm %r7
  550. srl %r7,28
  551. clr %r6,%r7 # compare cc with last access code
  552. je .Lsame
  553. j .Lchkmem
  554. .Lsame:
  555. algr %r5,%r1 # add 128KB to end of chunk
  556. # no need to check here,
  557. brc 12,.Lloop # this is the same chunk
  558. .Lchkmem: # > 16EB or tprot got a program check
  559. clgr %r4,%r5 # chunk size > 0?
  560. je .Lchkloop
  561. stg %r4,0(%r3) # store start address of chunk
  562. lgr %r0,%r5
  563. slgr %r0,%r4
  564. stg %r0,8(%r3) # store size of chunk
  565. st %r6,20(%r3) # store type of chunk
  566. la %r3,24(%r3)
  567. larl %r8,memory_size
  568. stg %r5,0(%r8) # store memory size
  569. ahi %r10,-1 # update chunk number
  570. .Lchkloop:
  571. lr %r6,%r7 # set access code to last cc
  572. # we got an exception or we're starting a new
  573. # chunk , we must check if we should
  574. # still try to find valid memory (if we detected
  575. # the amount of available storage), and if we
  576. # have chunks left
  577. lghi %r4,1
  578. sllg %r4,%r4,31
  579. clgr %r5,%r4
  580. je .Lhsaskip
  581. xr %r0, %r0
  582. clgr %r0, %r9 # did we detect memory?
  583. je .Ldonemem # if not, leave
  584. chi %r10, 0 # do we have chunks left?
  585. je .Ldonemem
  586. .Lhsaskip:
  587. algr %r5,%r1 # add 128KB to end of chunk
  588. lgr %r4,%r5 # potential new chunk
  589. clgr %r5,%r9 # should we go on?
  590. jl .Lloop
  591. .Ldonemem:
  592. larl %r12,machine_flags
  593. #
  594. # find out if we are running under VM
  595. #
  596. stidp __LC_CPUID # store cpuid
  597. tm __LC_CPUID,0xff # running under VM ?
  598. bno 0f-.LPG1(%r13)
  599. oi 7(%r12),1 # set VM flag
  600. 0: lh %r0,__LC_CPUID+4 # get cpu version
  601. chi %r0,0x7490 # running on a P/390 ?
  602. bne 1f-.LPG1(%r13)
  603. oi 7(%r12),4 # set P/390 flag
  604. 1:
  605. #
  606. # find out if we have the MVPG instruction
  607. #
  608. la %r1,0f-.LPG1(%r13) # set program check address
  609. stg %r1,__LC_PGM_NEW_PSW+8
  610. sgr %r0,%r0
  611. lghi %r1,0
  612. lghi %r2,0
  613. mvpg %r1,%r2 # test MVPG instruction
  614. oi 7(%r12),16 # set MVPG flag
  615. 0:
  616. #
  617. # find out if the diag 0x44 works in 64 bit mode
  618. #
  619. la %r1,0f-.LPG1(%r13) # set program check address
  620. stg %r1,__LC_PGM_NEW_PSW+8
  621. mvc __LC_DIAG44_OPCODE(8),.Lnop-.LPG1(%r13)
  622. diag 0,0,0x44 # test diag 0x44
  623. oi 7(%r12),32 # set diag44 flag
  624. mvc __LC_DIAG44_OPCODE(8),.Ldiag44-.LPG1(%r13)
  625. 0:
  626. #
  627. # find out if we have the IDTE instruction
  628. #
  629. la %r1,0f-.LPG1(%r13) # set program check address
  630. stg %r1,__LC_PGM_NEW_PSW+8
  631. .long 0xb2b10000 # store facility list
  632. tm 0xc8,0x08 # check bit for clearing-by-ASCE
  633. bno 0f-.LPG1(%r13)
  634. lhi %r1,2094
  635. lhi %r2,0
  636. .long 0xb98e2001
  637. oi 7(%r12),0x80 # set IDTE flag
  638. 0:
  639. lpswe .Lentry-.LPG1(13) # jump to _stext in primary-space,
  640. # virtual and never return ...
  641. .align 16
  642. .Lentry:.quad 0x0000000180000000,_stext
  643. .Lctl: .quad 0x04b50002 # cr0: various things
  644. .quad 0 # cr1: primary space segment table
  645. .quad .Lduct # cr2: dispatchable unit control table
  646. .quad 0 # cr3: instruction authorization
  647. .quad 0 # cr4: instruction authorization
  648. .quad 0xffffffffffffffff # cr5: primary-aste origin
  649. .quad 0 # cr6: I/O interrupts
  650. .quad 0 # cr7: secondary space segment table
  651. .quad 0 # cr8: access registers translation
  652. .quad 0 # cr9: tracing off
  653. .quad 0 # cr10: tracing off
  654. .quad 0 # cr11: tracing off
  655. .quad 0 # cr12: tracing off
  656. .quad 0 # cr13: home space segment table
  657. .quad 0xc0000000 # cr14: machine check handling off
  658. .quad 0 # cr15: linkage stack operations
  659. .Lpcmsk:.quad 0x0000000180000000
  660. .L4malign:.quad 0xffffffffffc00000
  661. .Lscan2g:.quad 0x80000000 + 0x20000 - 8 # 2GB + 128K - 8
  662. .Lnop: .long 0x07000700
  663. .Ldiag44:.long 0x83000044
  664. .org PARMAREA-64
  665. .Lduct: .long 0,0,0,0,0,0,0,0
  666. .long 0,0,0,0,0,0,0,0
  667. #
  668. # params at 10400 (setup.h)
  669. #
  670. .org PARMAREA
  671. .global _pstart
  672. _pstart:
  673. .quad 0 # IPL_DEVICE
  674. .quad RAMDISK_ORIGIN # INITRD_START
  675. .quad RAMDISK_SIZE # INITRD_SIZE
  676. .org COMMAND_LINE
  677. .byte "root=/dev/ram0 ro"
  678. .byte 0
  679. .org 0x11000
  680. .Lsccb:
  681. .hword 0x1000 # length, one page
  682. .byte 0x00,0x00,0x00
  683. .byte 0x80 # variable response bit set
  684. .Lsccbr:
  685. .hword 0x00 # response code
  686. .Lscpincr1:
  687. .hword 0x00
  688. .Lscpa1:
  689. .byte 0x00
  690. .fill 89,1,0
  691. .Lscpa2:
  692. .int 0x00
  693. .Lscpincr2:
  694. .quad 0x00
  695. .fill 3984,1,0
  696. .org 0x12000
  697. .global _pend
  698. _pend:
  699. #ifdef CONFIG_SHARED_KERNEL
  700. .org 0x100000
  701. #endif
  702. #
  703. # startup-code, running in virtual mode
  704. #
  705. .globl _stext
  706. _stext: basr %r13,0 # get base
  707. .LPG2:
  708. #
  709. # Setup stack
  710. #
  711. larl %r15,init_thread_union
  712. lg %r14,__TI_task(%r15) # cache current in lowcore
  713. stg %r14,__LC_CURRENT
  714. aghi %r15,1<<(PAGE_SHIFT+THREAD_ORDER) # init_task_union + THREAD_SIZE
  715. stg %r15,__LC_KERNEL_STACK # set end of kernel stack
  716. aghi %r15,-160
  717. xc __SF_BACKCHAIN(4,%r15),__SF_BACKCHAIN(%r15) # clear backchain
  718. # check control registers
  719. stctg %c0,%c15,0(%r15)
  720. oi 6(%r15),0x20 # enable sigp external interrupts
  721. oi 4(%r15),0x10 # switch on low address proctection
  722. lctlg %c0,%c15,0(%r15)
  723. #
  724. lam 0,15,.Laregs-.LPG2(%r13) # load access regs needed by uaccess
  725. brasl %r14,start_kernel # go to C code
  726. #
  727. # We returned from start_kernel ?!? PANIK
  728. #
  729. basr %r13,0
  730. lpswe .Ldw-.(%r13) # load disabled wait psw
  731. #
  732. .align 8
  733. .Ldw: .quad 0x0002000180000000,0x0000000000000000
  734. .Laregs: .long 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0