tlb.c 4.6 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180
  1. /*
  2. * This file contains the routines for flushing entries from the
  3. * TLB and MMU hash table.
  4. *
  5. * Derived from arch/ppc64/mm/init.c:
  6. * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
  7. *
  8. * Modifications by Paul Mackerras (PowerMac) (paulus@cs.anu.edu.au)
  9. * and Cort Dougan (PReP) (cort@cs.nmt.edu)
  10. * Copyright (C) 1996 Paul Mackerras
  11. * Amiga/APUS changes by Jesper Skov (jskov@cygnus.co.uk).
  12. *
  13. * Derived from "arch/i386/mm/init.c"
  14. * Copyright (C) 1991, 1992, 1993, 1994 Linus Torvalds
  15. *
  16. * Dave Engebretsen <engebret@us.ibm.com>
  17. * Rework for PPC64 port.
  18. *
  19. * This program is free software; you can redistribute it and/or
  20. * modify it under the terms of the GNU General Public License
  21. * as published by the Free Software Foundation; either version
  22. * 2 of the License, or (at your option) any later version.
  23. */
  24. #include <linux/config.h>
  25. #include <linux/kernel.h>
  26. #include <linux/mm.h>
  27. #include <linux/init.h>
  28. #include <linux/percpu.h>
  29. #include <linux/hardirq.h>
  30. #include <asm/pgalloc.h>
  31. #include <asm/tlbflush.h>
  32. #include <asm/tlb.h>
  33. #include <linux/highmem.h>
  34. DEFINE_PER_CPU(struct ppc64_tlb_batch, ppc64_tlb_batch);
  35. /* This is declared as we are using the more or less generic
  36. * include/asm-ppc64/tlb.h file -- tgall
  37. */
  38. DEFINE_PER_CPU(struct mmu_gather, mmu_gathers);
  39. DEFINE_PER_CPU(struct pte_freelist_batch *, pte_freelist_cur);
  40. unsigned long pte_freelist_forced_free;
  41. void __pte_free_tlb(struct mmu_gather *tlb, struct page *ptepage)
  42. {
  43. /* This is safe as we are holding page_table_lock */
  44. cpumask_t local_cpumask = cpumask_of_cpu(smp_processor_id());
  45. struct pte_freelist_batch **batchp = &__get_cpu_var(pte_freelist_cur);
  46. if (atomic_read(&tlb->mm->mm_users) < 2 ||
  47. cpus_equal(tlb->mm->cpu_vm_mask, local_cpumask)) {
  48. pte_free(ptepage);
  49. return;
  50. }
  51. if (*batchp == NULL) {
  52. *batchp = (struct pte_freelist_batch *)__get_free_page(GFP_ATOMIC);
  53. if (*batchp == NULL) {
  54. pte_free_now(ptepage);
  55. return;
  56. }
  57. (*batchp)->index = 0;
  58. }
  59. (*batchp)->pages[(*batchp)->index++] = ptepage;
  60. if ((*batchp)->index == PTE_FREELIST_SIZE) {
  61. pte_free_submit(*batchp);
  62. *batchp = NULL;
  63. }
  64. }
  65. /*
  66. * Update the MMU hash table to correspond with a change to
  67. * a Linux PTE. If wrprot is true, it is permissible to
  68. * change the existing HPTE to read-only rather than removing it
  69. * (if we remove it we should clear the _PTE_HPTEFLAGS bits).
  70. */
  71. void hpte_update(struct mm_struct *mm, unsigned long addr,
  72. unsigned long pte, int wrprot)
  73. {
  74. int i;
  75. unsigned long context = 0;
  76. struct ppc64_tlb_batch *batch = &__get_cpu_var(ppc64_tlb_batch);
  77. if (REGION_ID(addr) == USER_REGION_ID)
  78. context = mm->context.id;
  79. i = batch->index;
  80. /*
  81. * This can happen when we are in the middle of a TLB batch and
  82. * we encounter memory pressure (eg copy_page_range when it tries
  83. * to allocate a new pte). If we have to reclaim memory and end
  84. * up scanning and resetting referenced bits then our batch context
  85. * will change mid stream.
  86. */
  87. if (unlikely(i != 0 && context != batch->context)) {
  88. flush_tlb_pending();
  89. i = 0;
  90. }
  91. if (i == 0) {
  92. batch->context = context;
  93. batch->mm = mm;
  94. }
  95. batch->pte[i] = __pte(pte);
  96. batch->addr[i] = addr;
  97. batch->index = ++i;
  98. if (i >= PPC64_TLB_BATCH_NR)
  99. flush_tlb_pending();
  100. }
  101. void __flush_tlb_pending(struct ppc64_tlb_batch *batch)
  102. {
  103. int i;
  104. int cpu;
  105. cpumask_t tmp;
  106. int local = 0;
  107. BUG_ON(in_interrupt());
  108. cpu = get_cpu();
  109. i = batch->index;
  110. tmp = cpumask_of_cpu(cpu);
  111. if (cpus_equal(batch->mm->cpu_vm_mask, tmp))
  112. local = 1;
  113. if (i == 1)
  114. flush_hash_page(batch->context, batch->addr[0], batch->pte[0],
  115. local);
  116. else
  117. flush_hash_range(batch->context, i, local);
  118. batch->index = 0;
  119. put_cpu();
  120. }
  121. #ifdef CONFIG_SMP
  122. static void pte_free_smp_sync(void *arg)
  123. {
  124. /* Do nothing, just ensure we sync with all CPUs */
  125. }
  126. #endif
  127. /* This is only called when we are critically out of memory
  128. * (and fail to get a page in pte_free_tlb).
  129. */
  130. void pte_free_now(struct page *ptepage)
  131. {
  132. pte_freelist_forced_free++;
  133. smp_call_function(pte_free_smp_sync, NULL, 0, 1);
  134. pte_free(ptepage);
  135. }
  136. static void pte_free_rcu_callback(struct rcu_head *head)
  137. {
  138. struct pte_freelist_batch *batch =
  139. container_of(head, struct pte_freelist_batch, rcu);
  140. unsigned int i;
  141. for (i = 0; i < batch->index; i++)
  142. pte_free(batch->pages[i]);
  143. free_page((unsigned long)batch);
  144. }
  145. void pte_free_submit(struct pte_freelist_batch *batch)
  146. {
  147. INIT_RCU_HEAD(&batch->rcu);
  148. call_rcu(&batch->rcu, pte_free_rcu_callback);
  149. }
  150. void pte_free_finish(void)
  151. {
  152. /* This is safe as we are holding page_table_lock */
  153. struct pte_freelist_batch **batchp = &__get_cpu_var(pte_freelist_cur);
  154. if (*batchp == NULL)
  155. return;
  156. pte_free_submit(*batchp);
  157. *batchp = NULL;
  158. }