mpc834x_sys.c 7.5 KB

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  1. /*
  2. * arch/ppc/platforms/83xx/mpc834x_sys.c
  3. *
  4. * MPC834x SYS board specific routines
  5. *
  6. * Maintainer: Kumar Gala <kumar.gala@freescale.com>
  7. *
  8. * Copyright 2005 Freescale Semiconductor Inc.
  9. *
  10. * This program is free software; you can redistribute it and/or modify it
  11. * under the terms of the GNU General Public License as published by the
  12. * Free Software Foundation; either version 2 of the License, or (at your
  13. * option) any later version.
  14. */
  15. #include <linux/config.h>
  16. #include <linux/stddef.h>
  17. #include <linux/kernel.h>
  18. #include <linux/init.h>
  19. #include <linux/errno.h>
  20. #include <linux/reboot.h>
  21. #include <linux/pci.h>
  22. #include <linux/kdev_t.h>
  23. #include <linux/major.h>
  24. #include <linux/console.h>
  25. #include <linux/delay.h>
  26. #include <linux/irq.h>
  27. #include <linux/seq_file.h>
  28. #include <linux/root_dev.h>
  29. #include <linux/serial.h>
  30. #include <linux/tty.h> /* for linux/serial_core.h */
  31. #include <linux/serial_core.h>
  32. #include <linux/initrd.h>
  33. #include <linux/module.h>
  34. #include <linux/fsl_devices.h>
  35. #include <asm/system.h>
  36. #include <asm/pgtable.h>
  37. #include <asm/page.h>
  38. #include <asm/atomic.h>
  39. #include <asm/time.h>
  40. #include <asm/io.h>
  41. #include <asm/machdep.h>
  42. #include <asm/ipic.h>
  43. #include <asm/bootinfo.h>
  44. #include <asm/pci-bridge.h>
  45. #include <asm/mpc83xx.h>
  46. #include <asm/irq.h>
  47. #include <asm/kgdb.h>
  48. #include <asm/ppc_sys.h>
  49. #include <mm/mmu_decl.h>
  50. #include <syslib/ppc83xx_setup.h>
  51. #ifndef CONFIG_PCI
  52. unsigned long isa_io_base = 0;
  53. unsigned long isa_mem_base = 0;
  54. #endif
  55. extern unsigned long total_memory; /* in mm/init */
  56. unsigned char __res[sizeof (bd_t)];
  57. #ifdef CONFIG_PCI
  58. #error "PCI is not supported"
  59. /* NEED mpc83xx_map_irq & mpc83xx_exclude_device
  60. see platforms/85xx/mpc85xx_ads_common.c */
  61. #endif /* CONFIG_PCI */
  62. /* ************************************************************************
  63. *
  64. * Setup the architecture
  65. *
  66. */
  67. static void __init
  68. mpc834x_sys_setup_arch(void)
  69. {
  70. bd_t *binfo = (bd_t *) __res;
  71. unsigned int freq;
  72. struct gianfar_platform_data *pdata;
  73. /* get the core frequency */
  74. freq = binfo->bi_intfreq;
  75. /* Set loops_per_jiffy to a half-way reasonable value,
  76. for use until calibrate_delay gets called. */
  77. loops_per_jiffy = freq / HZ;
  78. #ifdef CONFIG_PCI
  79. /* setup PCI host bridges */
  80. mpc83xx_sys_setup_hose();
  81. #endif
  82. mpc83xx_early_serial_map();
  83. /* setup the board related information for the enet controllers */
  84. pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC83xx_TSEC1);
  85. if (pdata) {
  86. pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR;
  87. pdata->interruptPHY = MPC83xx_IRQ_EXT1;
  88. pdata->phyid = 0;
  89. /* fixup phy address */
  90. pdata->phy_reg_addr += binfo->bi_immr_base;
  91. memcpy(pdata->mac_addr, binfo->bi_enetaddr, 6);
  92. }
  93. pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC83xx_TSEC2);
  94. if (pdata) {
  95. pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR;
  96. pdata->interruptPHY = MPC83xx_IRQ_EXT2;
  97. pdata->phyid = 1;
  98. /* fixup phy address */
  99. pdata->phy_reg_addr += binfo->bi_immr_base;
  100. memcpy(pdata->mac_addr, binfo->bi_enet1addr, 6);
  101. }
  102. #ifdef CONFIG_BLK_DEV_INITRD
  103. if (initrd_start)
  104. ROOT_DEV = Root_RAM0;
  105. else
  106. #endif
  107. #ifdef CONFIG_ROOT_NFS
  108. ROOT_DEV = Root_NFS;
  109. #else
  110. ROOT_DEV = Root_HDA1;
  111. #endif
  112. }
  113. static void __init
  114. mpc834x_sys_map_io(void)
  115. {
  116. /* we steal the lowest ioremap addr for virt space */
  117. io_block_mapping(VIRT_IMMRBAR, immrbar, 1024*1024, _PAGE_IO);
  118. }
  119. int
  120. mpc834x_sys_show_cpuinfo(struct seq_file *m)
  121. {
  122. uint pvid, svid, phid1;
  123. bd_t *binfo = (bd_t *) __res;
  124. unsigned int freq;
  125. /* get the core frequency */
  126. freq = binfo->bi_intfreq;
  127. pvid = mfspr(SPRN_PVR);
  128. svid = mfspr(SPRN_SVR);
  129. seq_printf(m, "Vendor\t\t: Freescale Inc.\n");
  130. seq_printf(m, "Machine\t\t: mpc%s sys\n", cur_ppc_sys_spec->ppc_sys_name);
  131. seq_printf(m, "core clock\t: %d MHz\n"
  132. "bus clock\t: %d MHz\n",
  133. (int)(binfo->bi_intfreq / 1000000),
  134. (int)(binfo->bi_busfreq / 1000000));
  135. seq_printf(m, "PVR\t\t: 0x%x\n", pvid);
  136. seq_printf(m, "SVR\t\t: 0x%x\n", svid);
  137. /* Display cpu Pll setting */
  138. phid1 = mfspr(SPRN_HID1);
  139. seq_printf(m, "PLL setting\t: 0x%x\n", ((phid1 >> 24) & 0x3f));
  140. /* Display the amount of memory */
  141. seq_printf(m, "Memory\t\t: %d MB\n", (int)(binfo->bi_memsize / (1024 * 1024)));
  142. return 0;
  143. }
  144. void __init
  145. mpc834x_sys_init_IRQ(void)
  146. {
  147. bd_t *binfo = (bd_t *) __res;
  148. u8 senses[8] = {
  149. 0, /* EXT 0 */
  150. IRQ_SENSE_LEVEL, /* EXT 1 */
  151. IRQ_SENSE_LEVEL, /* EXT 2 */
  152. 0, /* EXT 3 */
  153. 0, /* EXT 4 */
  154. 0, /* EXT 5 */
  155. 0, /* EXT 6 */
  156. 0, /* EXT 7 */
  157. };
  158. ipic_init(binfo->bi_immr_base + 0x00700, 0, MPC83xx_IPIC_IRQ_OFFSET, senses, 8);
  159. /* Initialize the default interrupt mapping priorities,
  160. * in case the boot rom changed something on us.
  161. */
  162. ipic_set_default_priority();
  163. }
  164. #if defined(CONFIG_I2C_MPC) && defined(CONFIG_SENSORS_DS1374)
  165. extern ulong ds1374_get_rtc_time(void);
  166. extern int ds1374_set_rtc_time(ulong);
  167. static int __init
  168. mpc834x_rtc_hookup(void)
  169. {
  170. struct timespec tv;
  171. ppc_md.get_rtc_time = ds1374_get_rtc_time;
  172. ppc_md.set_rtc_time = ds1374_set_rtc_time;
  173. tv.tv_nsec = 0;
  174. tv.tv_sec = (ppc_md.get_rtc_time)();
  175. do_settimeofday(&tv);
  176. return 0;
  177. }
  178. late_initcall(mpc834x_rtc_hookup);
  179. #endif
  180. static __inline__ void
  181. mpc834x_sys_set_bat(void)
  182. {
  183. /* we steal the lowest ioremap addr for virt space */
  184. mb();
  185. mtspr(SPRN_DBAT1U, VIRT_IMMRBAR | 0x1e);
  186. mtspr(SPRN_DBAT1L, immrbar | 0x2a);
  187. mb();
  188. }
  189. void __init
  190. platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
  191. unsigned long r6, unsigned long r7)
  192. {
  193. bd_t *binfo = (bd_t *) __res;
  194. /* parse_bootinfo must always be called first */
  195. parse_bootinfo(find_bootinfo());
  196. /*
  197. * If we were passed in a board information, copy it into the
  198. * residual data area.
  199. */
  200. if (r3) {
  201. memcpy((void *) __res, (void *) (r3 + KERNELBASE),
  202. sizeof (bd_t));
  203. }
  204. #if defined(CONFIG_BLK_DEV_INITRD)
  205. /*
  206. * If the init RAM disk has been configured in, and there's a valid
  207. * starting address for it, set it up.
  208. */
  209. if (r4) {
  210. initrd_start = r4 + KERNELBASE;
  211. initrd_end = r5 + KERNELBASE;
  212. }
  213. #endif /* CONFIG_BLK_DEV_INITRD */
  214. /* Copy the kernel command line arguments to a safe place. */
  215. if (r6) {
  216. *(char *) (r7 + KERNELBASE) = 0;
  217. strcpy(cmd_line, (char *) (r6 + KERNELBASE));
  218. }
  219. immrbar = binfo->bi_immr_base;
  220. mpc834x_sys_set_bat();
  221. #if defined(CONFIG_SERIAL_8250) && defined(CONFIG_SERIAL_TEXT_DEBUG)
  222. {
  223. struct uart_port p;
  224. memset(&p, 0, sizeof (p));
  225. p.iotype = SERIAL_IO_MEM;
  226. p.membase = (unsigned char __iomem *)(VIRT_IMMRBAR + 0x4500);
  227. p.uartclk = binfo->bi_busfreq;
  228. gen550_init(0, &p);
  229. memset(&p, 0, sizeof (p));
  230. p.iotype = SERIAL_IO_MEM;
  231. p.membase = (unsigned char __iomem *)(VIRT_IMMRBAR + 0x4600);
  232. p.uartclk = binfo->bi_busfreq;
  233. gen550_init(1, &p);
  234. }
  235. #endif
  236. identify_ppc_sys_by_id(mfspr(SPRN_SVR));
  237. /* setup the PowerPC module struct */
  238. ppc_md.setup_arch = mpc834x_sys_setup_arch;
  239. ppc_md.show_cpuinfo = mpc834x_sys_show_cpuinfo;
  240. ppc_md.init_IRQ = mpc834x_sys_init_IRQ;
  241. ppc_md.get_irq = ipic_get_irq;
  242. ppc_md.restart = mpc83xx_restart;
  243. ppc_md.power_off = mpc83xx_power_off;
  244. ppc_md.halt = mpc83xx_halt;
  245. ppc_md.find_end_of_memory = mpc83xx_find_end_of_memory;
  246. ppc_md.setup_io_mappings = mpc834x_sys_map_io;
  247. ppc_md.time_init = mpc83xx_time_init;
  248. ppc_md.set_rtc_time = NULL;
  249. ppc_md.get_rtc_time = NULL;
  250. ppc_md.calibrate_decr = mpc83xx_calibrate_decr;
  251. ppc_md.early_serial_map = mpc83xx_early_serial_map;
  252. #if defined(CONFIG_SERIAL_8250) && defined(CONFIG_SERIAL_TEXT_DEBUG)
  253. ppc_md.progress = gen550_progress;
  254. #endif /* CONFIG_SERIAL_8250 && CONFIG_SERIAL_TEXT_DEBUG */
  255. if (ppc_md.progress)
  256. ppc_md.progress("mpc834x_sys_init(): exit", 0);
  257. return;
  258. }