ash.h 2.5 KB

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  1. /*
  2. * arch/ppc/platforms/4xx/ash.h
  3. *
  4. * Macros, definitions, and data structures specific to the IBM PowerPC
  5. * Ash eval board.
  6. *
  7. * Author: Armin Kuster <akuster@mvista.com>
  8. *
  9. * 2000-2002 (c) MontaVista, Software, Inc. This file is licensed under
  10. * the terms of the GNU General Public License version 2. This program
  11. * is licensed "as is" without any warranty of any kind, whether express
  12. * or implied.
  13. */
  14. #ifdef __KERNEL__
  15. #ifndef __ASM_ASH_H__
  16. #define __ASM_ASH_H__
  17. #include <platforms/4xx/ibmnp405h.h>
  18. #ifndef __ASSEMBLY__
  19. /*
  20. * Data structure defining board information maintained by the boot
  21. * ROM on IBM's "Ash" evaluation board. An effort has been made to
  22. * keep the field names consistent with the 8xx 'bd_t' board info
  23. * structures.
  24. */
  25. typedef struct board_info {
  26. unsigned char bi_s_version[4]; /* Version of this structure */
  27. unsigned char bi_r_version[30]; /* Version of the IBM ROM */
  28. unsigned int bi_memsize; /* DRAM installed, in bytes */
  29. unsigned char bi_enetaddr[4][6]; /* Local Ethernet MAC address */
  30. unsigned char bi_pci_enetaddr[6];
  31. unsigned int bi_intfreq; /* Processor speed, in Hz */
  32. unsigned int bi_busfreq; /* PLB Bus speed, in Hz */
  33. unsigned int bi_pci_busfreq; /* PCI speed in Hz */
  34. } bd_t;
  35. /* Some 4xx parts use a different timebase frequency from the internal clock.
  36. */
  37. #define bi_tbfreq bi_intfreq
  38. /* Memory map for the IBM "Ash" NP405H evaluation board.
  39. */
  40. extern void *ash_rtc_base;
  41. #define ASH_RTC_PADDR ((uint)0xf0000000)
  42. #define ASH_RTC_VADDR ASH_RTC_PADDR
  43. #define ASH_RTC_SIZE ((uint)8*1024)
  44. /* Early initialization address mapping for block_io.
  45. * Standard 405GP map.
  46. */
  47. #define PPC4xx_PCI_IO_PADDR ((uint)PPC405_PCI_PHY_IO_BASE)
  48. #define PPC4xx_PCI_IO_VADDR PPC4xx_PCI_IO_PADDR
  49. #define PPC4xx_PCI_IO_SIZE ((uint)64*1024)
  50. #define PPC4xx_PCI_CFG_PADDR ((uint)PPC405_PCI_CONFIG_ADDR)
  51. #define PPC4xx_PCI_CFG_VADDR PPC4xx_PCI_CFG_PADDR
  52. #define PPC4xx_PCI_CFG_SIZE ((uint)4*1024)
  53. #define PPC4xx_PCI_LCFG_PADDR ((uint)0xef400000)
  54. #define PPC4xx_PCI_LCFG_VADDR PPC4xx_PCI_LCFG_PADDR
  55. #define PPC4xx_PCI_LCFG_SIZE ((uint)4*1024)
  56. #define PPC4xx_ONB_IO_PADDR ((uint)0xef600000)
  57. #define PPC4xx_ONB_IO_VADDR PPC4xx_ONB_IO_PADDR
  58. #define PPC4xx_ONB_IO_SIZE ((uint)4*1024)
  59. #define NR_BOARD_IRQS 32
  60. #ifdef CONFIG_PPC405GP_INTERNAL_CLOCK
  61. #define BASE_BAUD 201600
  62. #else
  63. #define BASE_BAUD 691200
  64. #endif
  65. #define PPC4xx_MACHINE_NAME "IBM NP405H Ash"
  66. extern char pci_irq_table[][4];
  67. #endif /* !__ASSEMBLY__ */
  68. #endif /* __ASM_ASH_H__ */
  69. #endif /* __KERNEL__ */