head.S 6.5 KB

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  1. /*****************************************************************************/
  2. /*
  3. * head.S -- common startup code for ColdFire CPUs.
  4. *
  5. * (C) Copyright 1999-2004, Greg Ungerer (gerg@snapgear.com).
  6. */
  7. /*****************************************************************************/
  8. #include <linux/config.h>
  9. #include <linux/sys.h>
  10. #include <linux/linkage.h>
  11. #include <asm/asm-offsets.h>
  12. #include <asm/coldfire.h>
  13. #include <asm/mcfcache.h>
  14. #include <asm/mcfsim.h>
  15. /*****************************************************************************/
  16. /*
  17. * Define fixed memory sizes. Configuration of a fixed memory size
  18. * overrides everything else. If the user defined a size we just
  19. * blindly use it (they know what they are doing right :-)
  20. */
  21. #if defined(CONFIG_RAM32MB)
  22. #define MEM_SIZE 0x02000000 /* memory size 32Mb */
  23. #elif defined(CONFIG_RAM16MB)
  24. #define MEM_SIZE 0x01000000 /* memory size 16Mb */
  25. #elif defined(CONFIG_RAM8MB)
  26. #define MEM_SIZE 0x00800000 /* memory size 8Mb */
  27. #elif defined(CONFIG_RAM4MB)
  28. #define MEM_SIZE 0x00400000 /* memory size 4Mb */
  29. #elif defined(CONFIG_RAM1MB)
  30. #define MEM_SIZE 0x00100000 /* memory size 1Mb */
  31. #endif
  32. /*
  33. * Memory size exceptions for special cases. Some boards may be set
  34. * for auto memory sizing, but we can't do it that way for some reason.
  35. * For example the 5206eLITE board has static RAM, and auto-detecting
  36. * the SDRAM will do you no good at all.
  37. */
  38. #ifdef CONFIG_RAMAUTO
  39. #if defined(CONFIG_M5206eLITE)
  40. #define MEM_SIZE 0x00100000 /* 1MiB default memory */
  41. #endif
  42. #endif /* CONFIG_RAMAUTO */
  43. /*
  44. * If we don't have a fixed memory size now, then lets build in code
  45. * to auto detect the DRAM size. Obviously this is the prefered
  46. * method, and should work for most boards (it won't work for those
  47. * that do not have their RAM starting at address 0).
  48. */
  49. #if defined(MEM_SIZE)
  50. .macro GET_MEM_SIZE
  51. movel #MEM_SIZE,%d0 /* hard coded memory size */
  52. .endm
  53. #elif defined(CONFIG_M5206) || defined(CONFIG_M5206e) || \
  54. defined(CONFIG_M5249) || defined(CONFIG_M527x) || \
  55. defined(CONFIG_M528x) || defined(CONFIG_M5307) || \
  56. defined(CONFIG_M5407)
  57. /*
  58. * Not all these devices have exactly the same DRAM controller,
  59. * but the DCMR register is virtually identical - give or take
  60. * a couple of bits. The only exception is the 5272 devices, their
  61. * DRAM controller is quite different.
  62. */
  63. .macro GET_MEM_SIZE
  64. movel MCF_MBAR+MCFSIM_DMR0,%d0 /* get mask for 1st bank */
  65. btst #0,%d0 /* check if region enabled */
  66. beq 1f
  67. andl #0xfffc0000,%d0
  68. beq 1f
  69. addl #0x00040000,%d0 /* convert mask to size */
  70. 1:
  71. movel MCF_MBAR+MCFSIM_DMR1,%d1 /* get mask for 2nd bank */
  72. btst #0,%d1 /* check if region enabled */
  73. beq 2f
  74. andl #0xfffc0000, %d1
  75. beq 2f
  76. addl #0x00040000,%d1
  77. addl %d1,%d0 /* total mem size in d0 */
  78. 2:
  79. .endm
  80. #elif defined(CONFIG_M5272)
  81. .macro GET_MEM_SIZE
  82. movel MCF_MBAR+MCFSIM_CSOR7,%d0 /* get SDRAM address mask */
  83. andil #0xfffff000,%d0 /* mask out chip select options */
  84. negl %d0 /* negate bits */
  85. .endm
  86. #else
  87. #error "ERROR: I don't know how to determine your boards memory size?"
  88. #endif
  89. /*
  90. * Most ColdFire boards have their DRAM starting at address 0.
  91. * Notable exception is the 5206eLITE board.
  92. */
  93. #if defined(CONFIG_M5206eLITE)
  94. #define MEM_BASE 0x30000000
  95. #endif
  96. #ifndef MEM_BASE
  97. #define MEM_BASE 0x00000000 /* memory base at address 0 */
  98. #endif
  99. /*
  100. * The default location for the vectors is at the base of RAM.
  101. * Some boards might like to use internal SRAM or something like
  102. * that. If no board specific header defines an alternative then
  103. * use the base of RAM.
  104. */
  105. #ifndef VBR_BASE
  106. #define VBR_BASE MEM_BASE /* vector address */
  107. #endif
  108. /*****************************************************************************/
  109. /*
  110. * Boards and platforms can do specific early hardware setup if
  111. * they need to. Most don't need this, define away if not required.
  112. */
  113. #ifndef PLATFORM_SETUP
  114. #define PLATFORM_SETUP
  115. #endif
  116. /*****************************************************************************/
  117. .global _start
  118. .global _rambase
  119. .global _ramvec
  120. .global _ramstart
  121. .global _ramend
  122. /*****************************************************************************/
  123. .data
  124. /*
  125. * During startup we store away the RAM setup. These are not in the
  126. * bss, since their values are determined and written before the bss
  127. * has been cleared.
  128. */
  129. _rambase:
  130. .long 0
  131. _ramvec:
  132. .long 0
  133. _ramstart:
  134. .long 0
  135. _ramend:
  136. .long 0
  137. /*****************************************************************************/
  138. .text
  139. /*
  140. * This is the codes first entry point. This is where it all
  141. * begins...
  142. */
  143. _start:
  144. nop /* filler */
  145. movew #0x2700, %sr /* no interrupts */
  146. /*
  147. * Do any platform or board specific setup now. Most boards
  148. * don't need anything. Those exceptions are define this in
  149. * their board specific includes.
  150. */
  151. PLATFORM_SETUP
  152. /*
  153. * Create basic memory configuration. Set VBR accordingly,
  154. * and size memory.
  155. */
  156. movel #VBR_BASE,%a7
  157. movec %a7,%VBR /* set vectors addr */
  158. movel %a7,_ramvec
  159. movel #MEM_BASE,%a7 /* mark the base of RAM */
  160. movel %a7,_rambase
  161. GET_MEM_SIZE /* macro code determines size */
  162. movel %d0,_ramend /* set end ram addr */
  163. /*
  164. * Now that we know what the memory is, lets enable cache
  165. * and get things moving. This is Coldfire CPU specific.
  166. */
  167. CACHE_ENABLE /* enable CPU cache */
  168. #ifdef CONFIG_ROMFS_FS
  169. /*
  170. * Move ROM filesystem above bss :-)
  171. */
  172. lea _sbss,%a0 /* get start of bss */
  173. lea _ebss,%a1 /* set up destination */
  174. movel %a0,%a2 /* copy of bss start */
  175. movel 8(%a0),%d0 /* get size of ROMFS */
  176. addql #8,%d0 /* allow for rounding */
  177. andl #0xfffffffc, %d0 /* whole words */
  178. addl %d0,%a0 /* copy from end */
  179. addl %d0,%a1 /* copy from end */
  180. movel %a1,_ramstart /* set start of ram */
  181. _copy_romfs:
  182. movel -(%a0),%d0 /* copy dword */
  183. movel %d0,-(%a1)
  184. cmpl %a0,%a2 /* check if at end */
  185. bne _copy_romfs
  186. #else /* CONFIG_ROMFS_FS */
  187. lea _ebss,%a1
  188. movel %a1,_ramstart
  189. #endif /* CONFIG_ROMFS_FS */
  190. /*
  191. * Zero out the bss region.
  192. */
  193. lea _sbss,%a0 /* get start of bss */
  194. lea _ebss,%a1 /* get end of bss */
  195. clrl %d0 /* set value */
  196. _clear_bss:
  197. movel %d0,(%a0)+ /* clear each word */
  198. cmpl %a0,%a1 /* check if at end */
  199. bne _clear_bss
  200. /*
  201. * Load the current task pointer and stack.
  202. */
  203. lea init_thread_union,%a0
  204. lea THREAD_SIZE(%a0),%sp
  205. /*
  206. * Assember start up done, start code proper.
  207. */
  208. jsr start_kernel /* start Linux kernel */
  209. _exit:
  210. jmp _exit /* should never get here */
  211. /*****************************************************************************/