swiotlb.c 18 KB

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  1. /*
  2. * Dynamic DMA mapping support.
  3. *
  4. * This implementation is for IA-64 platforms that do not support
  5. * I/O TLBs (aka DMA address translation hardware).
  6. * Copyright (C) 2000 Asit Mallick <Asit.K.Mallick@intel.com>
  7. * Copyright (C) 2000 Goutham Rao <goutham.rao@intel.com>
  8. * Copyright (C) 2000, 2003 Hewlett-Packard Co
  9. * David Mosberger-Tang <davidm@hpl.hp.com>
  10. *
  11. * 03/05/07 davidm Switch from PCI-DMA to generic device DMA API.
  12. * 00/12/13 davidm Rename to swiotlb.c and add mark_clean() to avoid
  13. * unnecessary i-cache flushing.
  14. * 04/07/.. ak Better overflow handling. Assorted fixes.
  15. */
  16. #include <linux/cache.h>
  17. #include <linux/mm.h>
  18. #include <linux/module.h>
  19. #include <linux/pci.h>
  20. #include <linux/spinlock.h>
  21. #include <linux/string.h>
  22. #include <linux/types.h>
  23. #include <linux/ctype.h>
  24. #include <asm/io.h>
  25. #include <asm/pci.h>
  26. #include <asm/dma.h>
  27. #include <linux/init.h>
  28. #include <linux/bootmem.h>
  29. #define OFFSET(val,align) ((unsigned long) \
  30. ( (val) & ( (align) - 1)))
  31. #define SG_ENT_VIRT_ADDRESS(sg) (page_address((sg)->page) + (sg)->offset)
  32. #define SG_ENT_PHYS_ADDRESS(SG) virt_to_phys(SG_ENT_VIRT_ADDRESS(SG))
  33. /*
  34. * Maximum allowable number of contiguous slabs to map,
  35. * must be a power of 2. What is the appropriate value ?
  36. * The complexity of {map,unmap}_single is linearly dependent on this value.
  37. */
  38. #define IO_TLB_SEGSIZE 128
  39. /*
  40. * log of the size of each IO TLB slab. The number of slabs is command line
  41. * controllable.
  42. */
  43. #define IO_TLB_SHIFT 11
  44. int swiotlb_force;
  45. /*
  46. * Used to do a quick range check in swiotlb_unmap_single and
  47. * swiotlb_sync_single_*, to see if the memory was in fact allocated by this
  48. * API.
  49. */
  50. static char *io_tlb_start, *io_tlb_end;
  51. /*
  52. * The number of IO TLB blocks (in groups of 64) betweeen io_tlb_start and
  53. * io_tlb_end. This is command line adjustable via setup_io_tlb_npages.
  54. */
  55. static unsigned long io_tlb_nslabs;
  56. /*
  57. * When the IOMMU overflows we return a fallback buffer. This sets the size.
  58. */
  59. static unsigned long io_tlb_overflow = 32*1024;
  60. void *io_tlb_overflow_buffer;
  61. /*
  62. * This is a free list describing the number of free entries available from
  63. * each index
  64. */
  65. static unsigned int *io_tlb_list;
  66. static unsigned int io_tlb_index;
  67. /*
  68. * We need to save away the original address corresponding to a mapped entry
  69. * for the sync operations.
  70. */
  71. static unsigned char **io_tlb_orig_addr;
  72. /*
  73. * Protect the above data structures in the map and unmap calls
  74. */
  75. static DEFINE_SPINLOCK(io_tlb_lock);
  76. static int __init
  77. setup_io_tlb_npages(char *str)
  78. {
  79. if (isdigit(*str)) {
  80. io_tlb_nslabs = simple_strtoul(str, &str, 0) <<
  81. (PAGE_SHIFT - IO_TLB_SHIFT);
  82. /* avoid tail segment of size < IO_TLB_SEGSIZE */
  83. io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
  84. }
  85. if (*str == ',')
  86. ++str;
  87. if (!strcmp(str, "force"))
  88. swiotlb_force = 1;
  89. return 1;
  90. }
  91. __setup("swiotlb=", setup_io_tlb_npages);
  92. /* make io_tlb_overflow tunable too? */
  93. /*
  94. * Statically reserve bounce buffer space and initialize bounce buffer data
  95. * structures for the software IO TLB used to implement the PCI DMA API.
  96. */
  97. void
  98. swiotlb_init_with_default_size (size_t default_size)
  99. {
  100. unsigned long i;
  101. if (!io_tlb_nslabs) {
  102. io_tlb_nslabs = (default_size >> PAGE_SHIFT);
  103. io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
  104. }
  105. /*
  106. * Get IO TLB memory from the low pages
  107. */
  108. io_tlb_start = alloc_bootmem_low_pages(io_tlb_nslabs *
  109. (1 << IO_TLB_SHIFT));
  110. if (!io_tlb_start)
  111. panic("Cannot allocate SWIOTLB buffer");
  112. io_tlb_end = io_tlb_start + io_tlb_nslabs * (1 << IO_TLB_SHIFT);
  113. /*
  114. * Allocate and initialize the free list array. This array is used
  115. * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE
  116. * between io_tlb_start and io_tlb_end.
  117. */
  118. io_tlb_list = alloc_bootmem(io_tlb_nslabs * sizeof(int));
  119. for (i = 0; i < io_tlb_nslabs; i++)
  120. io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE);
  121. io_tlb_index = 0;
  122. io_tlb_orig_addr = alloc_bootmem(io_tlb_nslabs * sizeof(char *));
  123. /*
  124. * Get the overflow emergency buffer
  125. */
  126. io_tlb_overflow_buffer = alloc_bootmem_low(io_tlb_overflow);
  127. printk(KERN_INFO "Placing software IO TLB between 0x%lx - 0x%lx\n",
  128. virt_to_phys(io_tlb_start), virt_to_phys(io_tlb_end));
  129. }
  130. void
  131. swiotlb_init (void)
  132. {
  133. swiotlb_init_with_default_size(64 * (1<<20)); /* default to 64MB */
  134. }
  135. static inline int
  136. address_needs_mapping(struct device *hwdev, dma_addr_t addr)
  137. {
  138. dma_addr_t mask = 0xffffffff;
  139. /* If the device has a mask, use it, otherwise default to 32 bits */
  140. if (hwdev && hwdev->dma_mask)
  141. mask = *hwdev->dma_mask;
  142. return (addr & ~mask) != 0;
  143. }
  144. /*
  145. * Allocates bounce buffer and returns its kernel virtual address.
  146. */
  147. static void *
  148. map_single(struct device *hwdev, char *buffer, size_t size, int dir)
  149. {
  150. unsigned long flags;
  151. char *dma_addr;
  152. unsigned int nslots, stride, index, wrap;
  153. int i;
  154. /*
  155. * For mappings greater than a page, we limit the stride (and
  156. * hence alignment) to a page size.
  157. */
  158. nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
  159. if (size > PAGE_SIZE)
  160. stride = (1 << (PAGE_SHIFT - IO_TLB_SHIFT));
  161. else
  162. stride = 1;
  163. if (!nslots)
  164. BUG();
  165. /*
  166. * Find suitable number of IO TLB entries size that will fit this
  167. * request and allocate a buffer from that IO TLB pool.
  168. */
  169. spin_lock_irqsave(&io_tlb_lock, flags);
  170. {
  171. wrap = index = ALIGN(io_tlb_index, stride);
  172. if (index >= io_tlb_nslabs)
  173. wrap = index = 0;
  174. do {
  175. /*
  176. * If we find a slot that indicates we have 'nslots'
  177. * number of contiguous buffers, we allocate the
  178. * buffers from that slot and mark the entries as '0'
  179. * indicating unavailable.
  180. */
  181. if (io_tlb_list[index] >= nslots) {
  182. int count = 0;
  183. for (i = index; i < (int) (index + nslots); i++)
  184. io_tlb_list[i] = 0;
  185. for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE -1) && io_tlb_list[i]; i--)
  186. io_tlb_list[i] = ++count;
  187. dma_addr = io_tlb_start + (index << IO_TLB_SHIFT);
  188. /*
  189. * Update the indices to avoid searching in
  190. * the next round.
  191. */
  192. io_tlb_index = ((index + nslots) < io_tlb_nslabs
  193. ? (index + nslots) : 0);
  194. goto found;
  195. }
  196. index += stride;
  197. if (index >= io_tlb_nslabs)
  198. index = 0;
  199. } while (index != wrap);
  200. spin_unlock_irqrestore(&io_tlb_lock, flags);
  201. return NULL;
  202. }
  203. found:
  204. spin_unlock_irqrestore(&io_tlb_lock, flags);
  205. /*
  206. * Save away the mapping from the original address to the DMA address.
  207. * This is needed when we sync the memory. Then we sync the buffer if
  208. * needed.
  209. */
  210. io_tlb_orig_addr[index] = buffer;
  211. if (dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL)
  212. memcpy(dma_addr, buffer, size);
  213. return dma_addr;
  214. }
  215. /*
  216. * dma_addr is the kernel virtual address of the bounce buffer to unmap.
  217. */
  218. static void
  219. unmap_single(struct device *hwdev, char *dma_addr, size_t size, int dir)
  220. {
  221. unsigned long flags;
  222. int i, count, nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
  223. int index = (dma_addr - io_tlb_start) >> IO_TLB_SHIFT;
  224. char *buffer = io_tlb_orig_addr[index];
  225. /*
  226. * First, sync the memory before unmapping the entry
  227. */
  228. if (buffer && ((dir == DMA_FROM_DEVICE) || (dir == DMA_BIDIRECTIONAL)))
  229. /*
  230. * bounce... copy the data back into the original buffer * and
  231. * delete the bounce buffer.
  232. */
  233. memcpy(buffer, dma_addr, size);
  234. /*
  235. * Return the buffer to the free list by setting the corresponding
  236. * entries to indicate the number of contigous entries available.
  237. * While returning the entries to the free list, we merge the entries
  238. * with slots below and above the pool being returned.
  239. */
  240. spin_lock_irqsave(&io_tlb_lock, flags);
  241. {
  242. count = ((index + nslots) < ALIGN(index + 1, IO_TLB_SEGSIZE) ?
  243. io_tlb_list[index + nslots] : 0);
  244. /*
  245. * Step 1: return the slots to the free list, merging the
  246. * slots with superceeding slots
  247. */
  248. for (i = index + nslots - 1; i >= index; i--)
  249. io_tlb_list[i] = ++count;
  250. /*
  251. * Step 2: merge the returned slots with the preceding slots,
  252. * if available (non zero)
  253. */
  254. for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE -1) && io_tlb_list[i]; i--)
  255. io_tlb_list[i] = ++count;
  256. }
  257. spin_unlock_irqrestore(&io_tlb_lock, flags);
  258. }
  259. static void
  260. sync_single(struct device *hwdev, char *dma_addr, size_t size, int dir)
  261. {
  262. int index = (dma_addr - io_tlb_start) >> IO_TLB_SHIFT;
  263. char *buffer = io_tlb_orig_addr[index];
  264. /*
  265. * bounce... copy the data back into/from the original buffer
  266. * XXX How do you handle DMA_BIDIRECTIONAL here ?
  267. */
  268. if (dir == DMA_FROM_DEVICE)
  269. memcpy(buffer, dma_addr, size);
  270. else if (dir == DMA_TO_DEVICE)
  271. memcpy(dma_addr, buffer, size);
  272. else
  273. BUG();
  274. }
  275. void *
  276. swiotlb_alloc_coherent(struct device *hwdev, size_t size,
  277. dma_addr_t *dma_handle, int flags)
  278. {
  279. unsigned long dev_addr;
  280. void *ret;
  281. int order = get_order(size);
  282. /*
  283. * XXX fix me: the DMA API should pass us an explicit DMA mask
  284. * instead, or use ZONE_DMA32 (ia64 overloads ZONE_DMA to be a ~32
  285. * bit range instead of a 16MB one).
  286. */
  287. flags |= GFP_DMA;
  288. ret = (void *)__get_free_pages(flags, order);
  289. if (ret && address_needs_mapping(hwdev, virt_to_phys(ret))) {
  290. /*
  291. * The allocated memory isn't reachable by the device.
  292. * Fall back on swiotlb_map_single().
  293. */
  294. free_pages((unsigned long) ret, order);
  295. ret = NULL;
  296. }
  297. if (!ret) {
  298. /*
  299. * We are either out of memory or the device can't DMA
  300. * to GFP_DMA memory; fall back on
  301. * swiotlb_map_single(), which will grab memory from
  302. * the lowest available address range.
  303. */
  304. dma_addr_t handle;
  305. handle = swiotlb_map_single(NULL, NULL, size, DMA_FROM_DEVICE);
  306. if (dma_mapping_error(handle))
  307. return NULL;
  308. ret = phys_to_virt(handle);
  309. }
  310. memset(ret, 0, size);
  311. dev_addr = virt_to_phys(ret);
  312. /* Confirm address can be DMA'd by device */
  313. if (address_needs_mapping(hwdev, dev_addr)) {
  314. printk("hwdev DMA mask = 0x%016Lx, dev_addr = 0x%016lx\n",
  315. (unsigned long long)*hwdev->dma_mask, dev_addr);
  316. panic("swiotlb_alloc_coherent: allocated memory is out of "
  317. "range for device");
  318. }
  319. *dma_handle = dev_addr;
  320. return ret;
  321. }
  322. void
  323. swiotlb_free_coherent(struct device *hwdev, size_t size, void *vaddr,
  324. dma_addr_t dma_handle)
  325. {
  326. if (!(vaddr >= (void *)io_tlb_start
  327. && vaddr < (void *)io_tlb_end))
  328. free_pages((unsigned long) vaddr, get_order(size));
  329. else
  330. /* DMA_TO_DEVICE to avoid memcpy in unmap_single */
  331. swiotlb_unmap_single (hwdev, dma_handle, size, DMA_TO_DEVICE);
  332. }
  333. static void
  334. swiotlb_full(struct device *dev, size_t size, int dir, int do_panic)
  335. {
  336. /*
  337. * Ran out of IOMMU space for this operation. This is very bad.
  338. * Unfortunately the drivers cannot handle this operation properly.
  339. * unless they check for pci_dma_mapping_error (most don't)
  340. * When the mapping is small enough return a static buffer to limit
  341. * the damage, or panic when the transfer is too big.
  342. */
  343. printk(KERN_ERR "PCI-DMA: Out of SW-IOMMU space for %lu bytes at "
  344. "device %s\n", size, dev ? dev->bus_id : "?");
  345. if (size > io_tlb_overflow && do_panic) {
  346. if (dir == PCI_DMA_FROMDEVICE || dir == PCI_DMA_BIDIRECTIONAL)
  347. panic("PCI-DMA: Memory would be corrupted\n");
  348. if (dir == PCI_DMA_TODEVICE || dir == PCI_DMA_BIDIRECTIONAL)
  349. panic("PCI-DMA: Random memory would be DMAed\n");
  350. }
  351. }
  352. /*
  353. * Map a single buffer of the indicated size for DMA in streaming mode. The
  354. * PCI address to use is returned.
  355. *
  356. * Once the device is given the dma address, the device owns this memory until
  357. * either swiotlb_unmap_single or swiotlb_dma_sync_single is performed.
  358. */
  359. dma_addr_t
  360. swiotlb_map_single(struct device *hwdev, void *ptr, size_t size, int dir)
  361. {
  362. unsigned long dev_addr = virt_to_phys(ptr);
  363. void *map;
  364. if (dir == DMA_NONE)
  365. BUG();
  366. /*
  367. * If the pointer passed in happens to be in the device's DMA window,
  368. * we can safely return the device addr and not worry about bounce
  369. * buffering it.
  370. */
  371. if (!address_needs_mapping(hwdev, dev_addr) && !swiotlb_force)
  372. return dev_addr;
  373. /*
  374. * Oh well, have to allocate and map a bounce buffer.
  375. */
  376. map = map_single(hwdev, ptr, size, dir);
  377. if (!map) {
  378. swiotlb_full(hwdev, size, dir, 1);
  379. map = io_tlb_overflow_buffer;
  380. }
  381. dev_addr = virt_to_phys(map);
  382. /*
  383. * Ensure that the address returned is DMA'ble
  384. */
  385. if (address_needs_mapping(hwdev, dev_addr))
  386. panic("map_single: bounce buffer is not DMA'ble");
  387. return dev_addr;
  388. }
  389. /*
  390. * Since DMA is i-cache coherent, any (complete) pages that were written via
  391. * DMA can be marked as "clean" so that lazy_mmu_prot_update() doesn't have to
  392. * flush them when they get mapped into an executable vm-area.
  393. */
  394. static void
  395. mark_clean(void *addr, size_t size)
  396. {
  397. unsigned long pg_addr, end;
  398. pg_addr = PAGE_ALIGN((unsigned long) addr);
  399. end = (unsigned long) addr + size;
  400. while (pg_addr + PAGE_SIZE <= end) {
  401. struct page *page = virt_to_page(pg_addr);
  402. set_bit(PG_arch_1, &page->flags);
  403. pg_addr += PAGE_SIZE;
  404. }
  405. }
  406. /*
  407. * Unmap a single streaming mode DMA translation. The dma_addr and size must
  408. * match what was provided for in a previous swiotlb_map_single call. All
  409. * other usages are undefined.
  410. *
  411. * After this call, reads by the cpu to the buffer are guaranteed to see
  412. * whatever the device wrote there.
  413. */
  414. void
  415. swiotlb_unmap_single(struct device *hwdev, dma_addr_t dev_addr, size_t size,
  416. int dir)
  417. {
  418. char *dma_addr = phys_to_virt(dev_addr);
  419. if (dir == DMA_NONE)
  420. BUG();
  421. if (dma_addr >= io_tlb_start && dma_addr < io_tlb_end)
  422. unmap_single(hwdev, dma_addr, size, dir);
  423. else if (dir == DMA_FROM_DEVICE)
  424. mark_clean(dma_addr, size);
  425. }
  426. /*
  427. * Make physical memory consistent for a single streaming mode DMA translation
  428. * after a transfer.
  429. *
  430. * If you perform a swiotlb_map_single() but wish to interrogate the buffer
  431. * using the cpu, yet do not wish to teardown the PCI dma mapping, you must
  432. * call this function before doing so. At the next point you give the PCI dma
  433. * address back to the card, you must first perform a
  434. * swiotlb_dma_sync_for_device, and then the device again owns the buffer
  435. */
  436. void
  437. swiotlb_sync_single_for_cpu(struct device *hwdev, dma_addr_t dev_addr,
  438. size_t size, int dir)
  439. {
  440. char *dma_addr = phys_to_virt(dev_addr);
  441. if (dir == DMA_NONE)
  442. BUG();
  443. if (dma_addr >= io_tlb_start && dma_addr < io_tlb_end)
  444. sync_single(hwdev, dma_addr, size, dir);
  445. else if (dir == DMA_FROM_DEVICE)
  446. mark_clean(dma_addr, size);
  447. }
  448. void
  449. swiotlb_sync_single_for_device(struct device *hwdev, dma_addr_t dev_addr,
  450. size_t size, int dir)
  451. {
  452. char *dma_addr = phys_to_virt(dev_addr);
  453. if (dir == DMA_NONE)
  454. BUG();
  455. if (dma_addr >= io_tlb_start && dma_addr < io_tlb_end)
  456. sync_single(hwdev, dma_addr, size, dir);
  457. else if (dir == DMA_FROM_DEVICE)
  458. mark_clean(dma_addr, size);
  459. }
  460. /*
  461. * Map a set of buffers described by scatterlist in streaming mode for DMA.
  462. * This is the scatter-gather version of the above swiotlb_map_single
  463. * interface. Here the scatter gather list elements are each tagged with the
  464. * appropriate dma address and length. They are obtained via
  465. * sg_dma_{address,length}(SG).
  466. *
  467. * NOTE: An implementation may be able to use a smaller number of
  468. * DMA address/length pairs than there are SG table elements.
  469. * (for example via virtual mapping capabilities)
  470. * The routine returns the number of addr/length pairs actually
  471. * used, at most nents.
  472. *
  473. * Device ownership issues as mentioned above for swiotlb_map_single are the
  474. * same here.
  475. */
  476. int
  477. swiotlb_map_sg(struct device *hwdev, struct scatterlist *sg, int nelems,
  478. int dir)
  479. {
  480. void *addr;
  481. unsigned long dev_addr;
  482. int i;
  483. if (dir == DMA_NONE)
  484. BUG();
  485. for (i = 0; i < nelems; i++, sg++) {
  486. addr = SG_ENT_VIRT_ADDRESS(sg);
  487. dev_addr = virt_to_phys(addr);
  488. if (swiotlb_force || address_needs_mapping(hwdev, dev_addr)) {
  489. sg->dma_address = (dma_addr_t) virt_to_phys(map_single(hwdev, addr, sg->length, dir));
  490. if (!sg->dma_address) {
  491. /* Don't panic here, we expect map_sg users
  492. to do proper error handling. */
  493. swiotlb_full(hwdev, sg->length, dir, 0);
  494. swiotlb_unmap_sg(hwdev, sg - i, i, dir);
  495. sg[0].dma_length = 0;
  496. return 0;
  497. }
  498. } else
  499. sg->dma_address = dev_addr;
  500. sg->dma_length = sg->length;
  501. }
  502. return nelems;
  503. }
  504. /*
  505. * Unmap a set of streaming mode DMA translations. Again, cpu read rules
  506. * concerning calls here are the same as for swiotlb_unmap_single() above.
  507. */
  508. void
  509. swiotlb_unmap_sg(struct device *hwdev, struct scatterlist *sg, int nelems,
  510. int dir)
  511. {
  512. int i;
  513. if (dir == DMA_NONE)
  514. BUG();
  515. for (i = 0; i < nelems; i++, sg++)
  516. if (sg->dma_address != SG_ENT_PHYS_ADDRESS(sg))
  517. unmap_single(hwdev, (void *) phys_to_virt(sg->dma_address), sg->dma_length, dir);
  518. else if (dir == DMA_FROM_DEVICE)
  519. mark_clean(SG_ENT_VIRT_ADDRESS(sg), sg->dma_length);
  520. }
  521. /*
  522. * Make physical memory consistent for a set of streaming mode DMA translations
  523. * after a transfer.
  524. *
  525. * The same as swiotlb_sync_single_* but for a scatter-gather list, same rules
  526. * and usage.
  527. */
  528. void
  529. swiotlb_sync_sg_for_cpu(struct device *hwdev, struct scatterlist *sg,
  530. int nelems, int dir)
  531. {
  532. int i;
  533. if (dir == DMA_NONE)
  534. BUG();
  535. for (i = 0; i < nelems; i++, sg++)
  536. if (sg->dma_address != SG_ENT_PHYS_ADDRESS(sg))
  537. sync_single(hwdev, (void *) sg->dma_address,
  538. sg->dma_length, dir);
  539. }
  540. void
  541. swiotlb_sync_sg_for_device(struct device *hwdev, struct scatterlist *sg,
  542. int nelems, int dir)
  543. {
  544. int i;
  545. if (dir == DMA_NONE)
  546. BUG();
  547. for (i = 0; i < nelems; i++, sg++)
  548. if (sg->dma_address != SG_ENT_PHYS_ADDRESS(sg))
  549. sync_single(hwdev, (void *) sg->dma_address,
  550. sg->dma_length, dir);
  551. }
  552. int
  553. swiotlb_dma_mapping_error(dma_addr_t dma_addr)
  554. {
  555. return (dma_addr == virt_to_phys(io_tlb_overflow_buffer));
  556. }
  557. /*
  558. * Return whether the given PCI device DMA address mask can be supported
  559. * properly. For example, if your device can only drive the low 24-bits
  560. * during PCI bus mastering, then you would pass 0x00ffffff as the mask to
  561. * this function.
  562. */
  563. int
  564. swiotlb_dma_supported (struct device *hwdev, u64 mask)
  565. {
  566. return (virt_to_phys (io_tlb_end) - 1) <= mask;
  567. }
  568. EXPORT_SYMBOL(swiotlb_init);
  569. EXPORT_SYMBOL(swiotlb_map_single);
  570. EXPORT_SYMBOL(swiotlb_unmap_single);
  571. EXPORT_SYMBOL(swiotlb_map_sg);
  572. EXPORT_SYMBOL(swiotlb_unmap_sg);
  573. EXPORT_SYMBOL(swiotlb_sync_single_for_cpu);
  574. EXPORT_SYMBOL(swiotlb_sync_single_for_device);
  575. EXPORT_SYMBOL(swiotlb_sync_sg_for_cpu);
  576. EXPORT_SYMBOL(swiotlb_sync_sg_for_device);
  577. EXPORT_SYMBOL(swiotlb_dma_mapping_error);
  578. EXPORT_SYMBOL(swiotlb_alloc_coherent);
  579. EXPORT_SYMBOL(swiotlb_free_coherent);
  580. EXPORT_SYMBOL(swiotlb_dma_supported);