powernow-k8.c 31 KB

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  1. /*
  2. * (c) 2003, 2004 Advanced Micro Devices, Inc.
  3. * Your use of this code is subject to the terms and conditions of the
  4. * GNU general public license version 2. See "COPYING" or
  5. * http://www.gnu.org/licenses/gpl.html
  6. *
  7. * Support : mark.langsdorf@amd.com
  8. *
  9. * Based on the powernow-k7.c module written by Dave Jones.
  10. * (C) 2003 Dave Jones <davej@codemonkey.org.uk> on behalf of SuSE Labs
  11. * (C) 2004 Dominik Brodowski <linux@brodo.de>
  12. * (C) 2004 Pavel Machek <pavel@suse.cz>
  13. * Licensed under the terms of the GNU GPL License version 2.
  14. * Based upon datasheets & sample CPUs kindly provided by AMD.
  15. *
  16. * Valuable input gratefully received from Dave Jones, Pavel Machek,
  17. * Dominik Brodowski, and others.
  18. * Originally developed by Paul Devriendt.
  19. * Processor information obtained from Chapter 9 (Power and Thermal Management)
  20. * of the "BIOS and Kernel Developer's Guide for the AMD Athlon 64 and AMD
  21. * Opteron Processors" available for download from www.amd.com
  22. *
  23. * Tables for specific CPUs can be infrerred from
  24. * http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/30430.pdf
  25. */
  26. #include <linux/kernel.h>
  27. #include <linux/smp.h>
  28. #include <linux/module.h>
  29. #include <linux/init.h>
  30. #include <linux/cpufreq.h>
  31. #include <linux/slab.h>
  32. #include <linux/string.h>
  33. #include <linux/cpumask.h>
  34. #include <asm/msr.h>
  35. #include <asm/io.h>
  36. #include <asm/delay.h>
  37. #ifdef CONFIG_X86_POWERNOW_K8_ACPI
  38. #include <linux/acpi.h>
  39. #include <acpi/processor.h>
  40. #endif
  41. #define PFX "powernow-k8: "
  42. #define BFX PFX "BIOS error: "
  43. #define VERSION "version 1.40.2"
  44. #include "powernow-k8.h"
  45. /* serialize freq changes */
  46. static DECLARE_MUTEX(fidvid_sem);
  47. static struct powernow_k8_data *powernow_data[NR_CPUS];
  48. #ifndef CONFIG_SMP
  49. static cpumask_t cpu_core_map[1];
  50. #endif
  51. /* Return a frequency in MHz, given an input fid */
  52. static u32 find_freq_from_fid(u32 fid)
  53. {
  54. return 800 + (fid * 100);
  55. }
  56. /* Return a frequency in KHz, given an input fid */
  57. static u32 find_khz_freq_from_fid(u32 fid)
  58. {
  59. return 1000 * find_freq_from_fid(fid);
  60. }
  61. /* Return a voltage in miliVolts, given an input vid */
  62. static u32 find_millivolts_from_vid(struct powernow_k8_data *data, u32 vid)
  63. {
  64. return 1550-vid*25;
  65. }
  66. /* Return the vco fid for an input fid
  67. *
  68. * Each "low" fid has corresponding "high" fid, and you can get to "low" fids
  69. * only from corresponding high fids. This returns "high" fid corresponding to
  70. * "low" one.
  71. */
  72. static u32 convert_fid_to_vco_fid(u32 fid)
  73. {
  74. if (fid < HI_FID_TABLE_BOTTOM) {
  75. return 8 + (2 * fid);
  76. } else {
  77. return fid;
  78. }
  79. }
  80. /*
  81. * Return 1 if the pending bit is set. Unless we just instructed the processor
  82. * to transition to a new state, seeing this bit set is really bad news.
  83. */
  84. static int pending_bit_stuck(void)
  85. {
  86. u32 lo, hi;
  87. rdmsr(MSR_FIDVID_STATUS, lo, hi);
  88. return lo & MSR_S_LO_CHANGE_PENDING ? 1 : 0;
  89. }
  90. /*
  91. * Update the global current fid / vid values from the status msr.
  92. * Returns 1 on error.
  93. */
  94. static int query_current_values_with_pending_wait(struct powernow_k8_data *data)
  95. {
  96. u32 lo, hi;
  97. u32 i = 0;
  98. lo = MSR_S_LO_CHANGE_PENDING;
  99. while (lo & MSR_S_LO_CHANGE_PENDING) {
  100. if (i++ > 0x1000000) {
  101. printk(KERN_ERR PFX "detected change pending stuck\n");
  102. return 1;
  103. }
  104. rdmsr(MSR_FIDVID_STATUS, lo, hi);
  105. }
  106. data->currvid = hi & MSR_S_HI_CURRENT_VID;
  107. data->currfid = lo & MSR_S_LO_CURRENT_FID;
  108. return 0;
  109. }
  110. /* the isochronous relief time */
  111. static void count_off_irt(struct powernow_k8_data *data)
  112. {
  113. udelay((1 << data->irt) * 10);
  114. return;
  115. }
  116. /* the voltage stabalization time */
  117. static void count_off_vst(struct powernow_k8_data *data)
  118. {
  119. udelay(data->vstable * VST_UNITS_20US);
  120. return;
  121. }
  122. /* need to init the control msr to a safe value (for each cpu) */
  123. static void fidvid_msr_init(void)
  124. {
  125. u32 lo, hi;
  126. u8 fid, vid;
  127. rdmsr(MSR_FIDVID_STATUS, lo, hi);
  128. vid = hi & MSR_S_HI_CURRENT_VID;
  129. fid = lo & MSR_S_LO_CURRENT_FID;
  130. lo = fid | (vid << MSR_C_LO_VID_SHIFT);
  131. hi = MSR_C_HI_STP_GNT_BENIGN;
  132. dprintk("cpu%d, init lo 0x%x, hi 0x%x\n", smp_processor_id(), lo, hi);
  133. wrmsr(MSR_FIDVID_CTL, lo, hi);
  134. }
  135. /* write the new fid value along with the other control fields to the msr */
  136. static int write_new_fid(struct powernow_k8_data *data, u32 fid)
  137. {
  138. u32 lo;
  139. u32 savevid = data->currvid;
  140. if ((fid & INVALID_FID_MASK) || (data->currvid & INVALID_VID_MASK)) {
  141. printk(KERN_ERR PFX "internal error - overflow on fid write\n");
  142. return 1;
  143. }
  144. lo = fid | (data->currvid << MSR_C_LO_VID_SHIFT) | MSR_C_LO_INIT_FID_VID;
  145. dprintk("writing fid 0x%x, lo 0x%x, hi 0x%x\n",
  146. fid, lo, data->plllock * PLL_LOCK_CONVERSION);
  147. wrmsr(MSR_FIDVID_CTL, lo, data->plllock * PLL_LOCK_CONVERSION);
  148. if (query_current_values_with_pending_wait(data))
  149. return 1;
  150. count_off_irt(data);
  151. if (savevid != data->currvid) {
  152. printk(KERN_ERR PFX "vid change on fid trans, old 0x%x, new 0x%x\n",
  153. savevid, data->currvid);
  154. return 1;
  155. }
  156. if (fid != data->currfid) {
  157. printk(KERN_ERR PFX "fid trans failed, fid 0x%x, curr 0x%x\n", fid,
  158. data->currfid);
  159. return 1;
  160. }
  161. return 0;
  162. }
  163. /* Write a new vid to the hardware */
  164. static int write_new_vid(struct powernow_k8_data *data, u32 vid)
  165. {
  166. u32 lo;
  167. u32 savefid = data->currfid;
  168. if ((data->currfid & INVALID_FID_MASK) || (vid & INVALID_VID_MASK)) {
  169. printk(KERN_ERR PFX "internal error - overflow on vid write\n");
  170. return 1;
  171. }
  172. lo = data->currfid | (vid << MSR_C_LO_VID_SHIFT) | MSR_C_LO_INIT_FID_VID;
  173. dprintk("writing vid 0x%x, lo 0x%x, hi 0x%x\n",
  174. vid, lo, STOP_GRANT_5NS);
  175. wrmsr(MSR_FIDVID_CTL, lo, STOP_GRANT_5NS);
  176. if (query_current_values_with_pending_wait(data))
  177. return 1;
  178. if (savefid != data->currfid) {
  179. printk(KERN_ERR PFX "fid changed on vid trans, old 0x%x new 0x%x\n",
  180. savefid, data->currfid);
  181. return 1;
  182. }
  183. if (vid != data->currvid) {
  184. printk(KERN_ERR PFX "vid trans failed, vid 0x%x, curr 0x%x\n", vid,
  185. data->currvid);
  186. return 1;
  187. }
  188. return 0;
  189. }
  190. /*
  191. * Reduce the vid by the max of step or reqvid.
  192. * Decreasing vid codes represent increasing voltages:
  193. * vid of 0 is 1.550V, vid of 0x1e is 0.800V, vid of 0x1f is off.
  194. */
  195. static int decrease_vid_code_by_step(struct powernow_k8_data *data, u32 reqvid, u32 step)
  196. {
  197. if ((data->currvid - reqvid) > step)
  198. reqvid = data->currvid - step;
  199. if (write_new_vid(data, reqvid))
  200. return 1;
  201. count_off_vst(data);
  202. return 0;
  203. }
  204. /* Change the fid and vid, by the 3 phases. */
  205. static int transition_fid_vid(struct powernow_k8_data *data, u32 reqfid, u32 reqvid)
  206. {
  207. if (core_voltage_pre_transition(data, reqvid))
  208. return 1;
  209. if (core_frequency_transition(data, reqfid))
  210. return 1;
  211. if (core_voltage_post_transition(data, reqvid))
  212. return 1;
  213. if (query_current_values_with_pending_wait(data))
  214. return 1;
  215. if ((reqfid != data->currfid) || (reqvid != data->currvid)) {
  216. printk(KERN_ERR PFX "failed (cpu%d): req 0x%x 0x%x, curr 0x%x 0x%x\n",
  217. smp_processor_id(),
  218. reqfid, reqvid, data->currfid, data->currvid);
  219. return 1;
  220. }
  221. dprintk("transitioned (cpu%d): new fid 0x%x, vid 0x%x\n",
  222. smp_processor_id(), data->currfid, data->currvid);
  223. return 0;
  224. }
  225. /* Phase 1 - core voltage transition ... setup voltage */
  226. static int core_voltage_pre_transition(struct powernow_k8_data *data, u32 reqvid)
  227. {
  228. u32 rvosteps = data->rvo;
  229. u32 savefid = data->currfid;
  230. u32 maxvid, lo;
  231. dprintk("ph1 (cpu%d): start, currfid 0x%x, currvid 0x%x, reqvid 0x%x, rvo 0x%x\n",
  232. smp_processor_id(),
  233. data->currfid, data->currvid, reqvid, data->rvo);
  234. rdmsr(MSR_FIDVID_STATUS, lo, maxvid);
  235. maxvid = 0x1f & (maxvid >> 16);
  236. dprintk("ph1 maxvid=0x%x\n", maxvid);
  237. if (reqvid < maxvid) /* lower numbers are higher voltages */
  238. reqvid = maxvid;
  239. while (data->currvid > reqvid) {
  240. dprintk("ph1: curr 0x%x, req vid 0x%x\n",
  241. data->currvid, reqvid);
  242. if (decrease_vid_code_by_step(data, reqvid, data->vidmvs))
  243. return 1;
  244. }
  245. while ((rvosteps > 0) && ((data->rvo + data->currvid) > reqvid)) {
  246. if (data->currvid == maxvid) {
  247. rvosteps = 0;
  248. } else {
  249. dprintk("ph1: changing vid for rvo, req 0x%x\n",
  250. data->currvid - 1);
  251. if (decrease_vid_code_by_step(data, data->currvid - 1, 1))
  252. return 1;
  253. rvosteps--;
  254. }
  255. }
  256. if (query_current_values_with_pending_wait(data))
  257. return 1;
  258. if (savefid != data->currfid) {
  259. printk(KERN_ERR PFX "ph1 err, currfid changed 0x%x\n", data->currfid);
  260. return 1;
  261. }
  262. dprintk("ph1 complete, currfid 0x%x, currvid 0x%x\n",
  263. data->currfid, data->currvid);
  264. return 0;
  265. }
  266. /* Phase 2 - core frequency transition */
  267. static int core_frequency_transition(struct powernow_k8_data *data, u32 reqfid)
  268. {
  269. u32 vcoreqfid, vcocurrfid, vcofiddiff, savevid = data->currvid;
  270. if ((reqfid < HI_FID_TABLE_BOTTOM) && (data->currfid < HI_FID_TABLE_BOTTOM)) {
  271. printk(KERN_ERR PFX "ph2: illegal lo-lo transition 0x%x 0x%x\n",
  272. reqfid, data->currfid);
  273. return 1;
  274. }
  275. if (data->currfid == reqfid) {
  276. printk(KERN_ERR PFX "ph2 null fid transition 0x%x\n", data->currfid);
  277. return 0;
  278. }
  279. dprintk("ph2 (cpu%d): starting, currfid 0x%x, currvid 0x%x, reqfid 0x%x\n",
  280. smp_processor_id(),
  281. data->currfid, data->currvid, reqfid);
  282. vcoreqfid = convert_fid_to_vco_fid(reqfid);
  283. vcocurrfid = convert_fid_to_vco_fid(data->currfid);
  284. vcofiddiff = vcocurrfid > vcoreqfid ? vcocurrfid - vcoreqfid
  285. : vcoreqfid - vcocurrfid;
  286. while (vcofiddiff > 2) {
  287. if (reqfid > data->currfid) {
  288. if (data->currfid > LO_FID_TABLE_TOP) {
  289. if (write_new_fid(data, data->currfid + 2)) {
  290. return 1;
  291. }
  292. } else {
  293. if (write_new_fid
  294. (data, 2 + convert_fid_to_vco_fid(data->currfid))) {
  295. return 1;
  296. }
  297. }
  298. } else {
  299. if (write_new_fid(data, data->currfid - 2))
  300. return 1;
  301. }
  302. vcocurrfid = convert_fid_to_vco_fid(data->currfid);
  303. vcofiddiff = vcocurrfid > vcoreqfid ? vcocurrfid - vcoreqfid
  304. : vcoreqfid - vcocurrfid;
  305. }
  306. if (write_new_fid(data, reqfid))
  307. return 1;
  308. if (query_current_values_with_pending_wait(data))
  309. return 1;
  310. if (data->currfid != reqfid) {
  311. printk(KERN_ERR PFX
  312. "ph2: mismatch, failed fid transition, curr 0x%x, req 0x%x\n",
  313. data->currfid, reqfid);
  314. return 1;
  315. }
  316. if (savevid != data->currvid) {
  317. printk(KERN_ERR PFX "ph2: vid changed, save 0x%x, curr 0x%x\n",
  318. savevid, data->currvid);
  319. return 1;
  320. }
  321. dprintk("ph2 complete, currfid 0x%x, currvid 0x%x\n",
  322. data->currfid, data->currvid);
  323. return 0;
  324. }
  325. /* Phase 3 - core voltage transition flow ... jump to the final vid. */
  326. static int core_voltage_post_transition(struct powernow_k8_data *data, u32 reqvid)
  327. {
  328. u32 savefid = data->currfid;
  329. u32 savereqvid = reqvid;
  330. dprintk("ph3 (cpu%d): starting, currfid 0x%x, currvid 0x%x\n",
  331. smp_processor_id(),
  332. data->currfid, data->currvid);
  333. if (reqvid != data->currvid) {
  334. if (write_new_vid(data, reqvid))
  335. return 1;
  336. if (savefid != data->currfid) {
  337. printk(KERN_ERR PFX
  338. "ph3: bad fid change, save 0x%x, curr 0x%x\n",
  339. savefid, data->currfid);
  340. return 1;
  341. }
  342. if (data->currvid != reqvid) {
  343. printk(KERN_ERR PFX
  344. "ph3: failed vid transition\n, req 0x%x, curr 0x%x",
  345. reqvid, data->currvid);
  346. return 1;
  347. }
  348. }
  349. if (query_current_values_with_pending_wait(data))
  350. return 1;
  351. if (savereqvid != data->currvid) {
  352. dprintk("ph3 failed, currvid 0x%x\n", data->currvid);
  353. return 1;
  354. }
  355. if (savefid != data->currfid) {
  356. dprintk("ph3 failed, currfid changed 0x%x\n",
  357. data->currfid);
  358. return 1;
  359. }
  360. dprintk("ph3 complete, currfid 0x%x, currvid 0x%x\n",
  361. data->currfid, data->currvid);
  362. return 0;
  363. }
  364. static int check_supported_cpu(unsigned int cpu)
  365. {
  366. cpumask_t oldmask = CPU_MASK_ALL;
  367. u32 eax, ebx, ecx, edx;
  368. unsigned int rc = 0;
  369. oldmask = current->cpus_allowed;
  370. set_cpus_allowed(current, cpumask_of_cpu(cpu));
  371. schedule();
  372. if (smp_processor_id() != cpu) {
  373. printk(KERN_ERR "limiting to cpu %u failed\n", cpu);
  374. goto out;
  375. }
  376. if (current_cpu_data.x86_vendor != X86_VENDOR_AMD)
  377. goto out;
  378. eax = cpuid_eax(CPUID_PROCESSOR_SIGNATURE);
  379. if (((eax & CPUID_USE_XFAM_XMOD) != CPUID_USE_XFAM_XMOD) ||
  380. ((eax & CPUID_XFAM) != CPUID_XFAM_K8) ||
  381. ((eax & CPUID_XMOD) > CPUID_XMOD_REV_E)) {
  382. printk(KERN_INFO PFX "Processor cpuid %x not supported\n", eax);
  383. goto out;
  384. }
  385. eax = cpuid_eax(CPUID_GET_MAX_CAPABILITIES);
  386. if (eax < CPUID_FREQ_VOLT_CAPABILITIES) {
  387. printk(KERN_INFO PFX
  388. "No frequency change capabilities detected\n");
  389. goto out;
  390. }
  391. cpuid(CPUID_FREQ_VOLT_CAPABILITIES, &eax, &ebx, &ecx, &edx);
  392. if ((edx & P_STATE_TRANSITION_CAPABLE) != P_STATE_TRANSITION_CAPABLE) {
  393. printk(KERN_INFO PFX "Power state transitions not supported\n");
  394. goto out;
  395. }
  396. rc = 1;
  397. out:
  398. set_cpus_allowed(current, oldmask);
  399. schedule();
  400. return rc;
  401. }
  402. static int check_pst_table(struct powernow_k8_data *data, struct pst_s *pst, u8 maxvid)
  403. {
  404. unsigned int j;
  405. u8 lastfid = 0xff;
  406. for (j = 0; j < data->numps; j++) {
  407. if (pst[j].vid > LEAST_VID) {
  408. printk(KERN_ERR PFX "vid %d invalid : 0x%x\n", j, pst[j].vid);
  409. return -EINVAL;
  410. }
  411. if (pst[j].vid < data->rvo) { /* vid + rvo >= 0 */
  412. printk(KERN_ERR BFX "0 vid exceeded with pstate %d\n", j);
  413. return -ENODEV;
  414. }
  415. if (pst[j].vid < maxvid + data->rvo) { /* vid + rvo >= maxvid */
  416. printk(KERN_ERR BFX "maxvid exceeded with pstate %d\n", j);
  417. return -ENODEV;
  418. }
  419. if ((pst[j].fid > MAX_FID)
  420. || (pst[j].fid & 1)
  421. || (j && (pst[j].fid < HI_FID_TABLE_BOTTOM))) {
  422. /* Only first fid is allowed to be in "low" range */
  423. printk(KERN_ERR PFX "two low fids - %d : 0x%x\n", j, pst[j].fid);
  424. return -EINVAL;
  425. }
  426. if (pst[j].fid < lastfid)
  427. lastfid = pst[j].fid;
  428. }
  429. if (lastfid & 1) {
  430. printk(KERN_ERR PFX "lastfid invalid\n");
  431. return -EINVAL;
  432. }
  433. if (lastfid > LO_FID_TABLE_TOP)
  434. printk(KERN_INFO PFX "first fid not from lo freq table\n");
  435. return 0;
  436. }
  437. static void print_basics(struct powernow_k8_data *data)
  438. {
  439. int j;
  440. for (j = 0; j < data->numps; j++) {
  441. if (data->powernow_table[j].frequency != CPUFREQ_ENTRY_INVALID)
  442. printk(KERN_INFO PFX " %d : fid 0x%x (%d MHz), vid 0x%x (%d mV)\n", j,
  443. data->powernow_table[j].index & 0xff,
  444. data->powernow_table[j].frequency/1000,
  445. data->powernow_table[j].index >> 8,
  446. find_millivolts_from_vid(data, data->powernow_table[j].index >> 8));
  447. }
  448. if (data->batps)
  449. printk(KERN_INFO PFX "Only %d pstates on battery\n", data->batps);
  450. }
  451. static int fill_powernow_table(struct powernow_k8_data *data, struct pst_s *pst, u8 maxvid)
  452. {
  453. struct cpufreq_frequency_table *powernow_table;
  454. unsigned int j;
  455. if (data->batps) { /* use ACPI support to get full speed on mains power */
  456. printk(KERN_WARNING PFX "Only %d pstates usable (use ACPI driver for full range\n", data->batps);
  457. data->numps = data->batps;
  458. }
  459. for ( j=1; j<data->numps; j++ ) {
  460. if (pst[j-1].fid >= pst[j].fid) {
  461. printk(KERN_ERR PFX "PST out of sequence\n");
  462. return -EINVAL;
  463. }
  464. }
  465. if (data->numps < 2) {
  466. printk(KERN_ERR PFX "no p states to transition\n");
  467. return -ENODEV;
  468. }
  469. if (check_pst_table(data, pst, maxvid))
  470. return -EINVAL;
  471. powernow_table = kmalloc((sizeof(struct cpufreq_frequency_table)
  472. * (data->numps + 1)), GFP_KERNEL);
  473. if (!powernow_table) {
  474. printk(KERN_ERR PFX "powernow_table memory alloc failure\n");
  475. return -ENOMEM;
  476. }
  477. for (j = 0; j < data->numps; j++) {
  478. powernow_table[j].index = pst[j].fid; /* lower 8 bits */
  479. powernow_table[j].index |= (pst[j].vid << 8); /* upper 8 bits */
  480. powernow_table[j].frequency = find_khz_freq_from_fid(pst[j].fid);
  481. }
  482. powernow_table[data->numps].frequency = CPUFREQ_TABLE_END;
  483. powernow_table[data->numps].index = 0;
  484. if (query_current_values_with_pending_wait(data)) {
  485. kfree(powernow_table);
  486. return -EIO;
  487. }
  488. dprintk("cfid 0x%x, cvid 0x%x\n", data->currfid, data->currvid);
  489. data->powernow_table = powernow_table;
  490. print_basics(data);
  491. for (j = 0; j < data->numps; j++)
  492. if ((pst[j].fid==data->currfid) && (pst[j].vid==data->currvid))
  493. return 0;
  494. dprintk("currfid/vid do not match PST, ignoring\n");
  495. return 0;
  496. }
  497. /* Find and validate the PSB/PST table in BIOS. */
  498. static int find_psb_table(struct powernow_k8_data *data)
  499. {
  500. struct psb_s *psb;
  501. unsigned int i;
  502. u32 mvs;
  503. u8 maxvid;
  504. u32 cpst = 0;
  505. u32 thiscpuid;
  506. for (i = 0xc0000; i < 0xffff0; i += 0x10) {
  507. /* Scan BIOS looking for the signature. */
  508. /* It can not be at ffff0 - it is too big. */
  509. psb = phys_to_virt(i);
  510. if (memcmp(psb, PSB_ID_STRING, PSB_ID_STRING_LEN) != 0)
  511. continue;
  512. dprintk("found PSB header at 0x%p\n", psb);
  513. dprintk("table vers: 0x%x\n", psb->tableversion);
  514. if (psb->tableversion != PSB_VERSION_1_4) {
  515. printk(KERN_INFO BFX "PSB table is not v1.4\n");
  516. return -ENODEV;
  517. }
  518. dprintk("flags: 0x%x\n", psb->flags1);
  519. if (psb->flags1) {
  520. printk(KERN_ERR BFX "unknown flags\n");
  521. return -ENODEV;
  522. }
  523. data->vstable = psb->vstable;
  524. dprintk("voltage stabilization time: %d(*20us)\n", data->vstable);
  525. dprintk("flags2: 0x%x\n", psb->flags2);
  526. data->rvo = psb->flags2 & 3;
  527. data->irt = ((psb->flags2) >> 2) & 3;
  528. mvs = ((psb->flags2) >> 4) & 3;
  529. data->vidmvs = 1 << mvs;
  530. data->batps = ((psb->flags2) >> 6) & 3;
  531. dprintk("ramp voltage offset: %d\n", data->rvo);
  532. dprintk("isochronous relief time: %d\n", data->irt);
  533. dprintk("maximum voltage step: %d - 0x%x\n", mvs, data->vidmvs);
  534. dprintk("numpst: 0x%x\n", psb->num_tables);
  535. cpst = psb->num_tables;
  536. if ((psb->cpuid == 0x00000fc0) || (psb->cpuid == 0x00000fe0) ){
  537. thiscpuid = cpuid_eax(CPUID_PROCESSOR_SIGNATURE);
  538. if ((thiscpuid == 0x00000fc0) || (thiscpuid == 0x00000fe0) ) {
  539. cpst = 1;
  540. }
  541. }
  542. if (cpst != 1) {
  543. printk(KERN_ERR BFX "numpst must be 1\n");
  544. return -ENODEV;
  545. }
  546. data->plllock = psb->plllocktime;
  547. dprintk("plllocktime: 0x%x (units 1us)\n", psb->plllocktime);
  548. dprintk("maxfid: 0x%x\n", psb->maxfid);
  549. dprintk("maxvid: 0x%x\n", psb->maxvid);
  550. maxvid = psb->maxvid;
  551. data->numps = psb->numps;
  552. dprintk("numpstates: 0x%x\n", data->numps);
  553. return fill_powernow_table(data, (struct pst_s *)(psb+1), maxvid);
  554. }
  555. /*
  556. * If you see this message, complain to BIOS manufacturer. If
  557. * he tells you "we do not support Linux" or some similar
  558. * nonsense, remember that Windows 2000 uses the same legacy
  559. * mechanism that the old Linux PSB driver uses. Tell them it
  560. * is broken with Windows 2000.
  561. *
  562. * The reference to the AMD documentation is chapter 9 in the
  563. * BIOS and Kernel Developer's Guide, which is available on
  564. * www.amd.com
  565. */
  566. printk(KERN_INFO PFX "BIOS error - no PSB or ACPI _PSS objects\n");
  567. return -ENODEV;
  568. }
  569. #ifdef CONFIG_X86_POWERNOW_K8_ACPI
  570. static void powernow_k8_acpi_pst_values(struct powernow_k8_data *data, unsigned int index)
  571. {
  572. if (!data->acpi_data.state_count)
  573. return;
  574. data->irt = (data->acpi_data.states[index].control >> IRT_SHIFT) & IRT_MASK;
  575. data->rvo = (data->acpi_data.states[index].control >> RVO_SHIFT) & RVO_MASK;
  576. data->plllock = (data->acpi_data.states[index].control >> PLL_L_SHIFT) & PLL_L_MASK;
  577. data->vidmvs = 1 << ((data->acpi_data.states[index].control >> MVS_SHIFT) & MVS_MASK);
  578. data->vstable = (data->acpi_data.states[index].control >> VST_SHIFT) & VST_MASK;
  579. }
  580. static int powernow_k8_cpu_init_acpi(struct powernow_k8_data *data)
  581. {
  582. int i;
  583. int cntlofreq = 0;
  584. struct cpufreq_frequency_table *powernow_table;
  585. if (acpi_processor_register_performance(&data->acpi_data, data->cpu)) {
  586. dprintk("register performance failed: bad ACPI data\n");
  587. return -EIO;
  588. }
  589. /* verify the data contained in the ACPI structures */
  590. if (data->acpi_data.state_count <= 1) {
  591. dprintk("No ACPI P-States\n");
  592. goto err_out;
  593. }
  594. if ((data->acpi_data.control_register.space_id != ACPI_ADR_SPACE_FIXED_HARDWARE) ||
  595. (data->acpi_data.status_register.space_id != ACPI_ADR_SPACE_FIXED_HARDWARE)) {
  596. dprintk("Invalid control/status registers (%x - %x)\n",
  597. data->acpi_data.control_register.space_id,
  598. data->acpi_data.status_register.space_id);
  599. goto err_out;
  600. }
  601. /* fill in data->powernow_table */
  602. powernow_table = kmalloc((sizeof(struct cpufreq_frequency_table)
  603. * (data->acpi_data.state_count + 1)), GFP_KERNEL);
  604. if (!powernow_table) {
  605. dprintk("powernow_table memory alloc failure\n");
  606. goto err_out;
  607. }
  608. for (i = 0; i < data->acpi_data.state_count; i++) {
  609. u32 fid = data->acpi_data.states[i].control & FID_MASK;
  610. u32 vid = (data->acpi_data.states[i].control >> VID_SHIFT) & VID_MASK;
  611. dprintk(" %d : fid 0x%x, vid 0x%x\n", i, fid, vid);
  612. powernow_table[i].index = fid; /* lower 8 bits */
  613. powernow_table[i].index |= (vid << 8); /* upper 8 bits */
  614. powernow_table[i].frequency = find_khz_freq_from_fid(fid);
  615. /* verify frequency is OK */
  616. if ((powernow_table[i].frequency > (MAX_FREQ * 1000)) ||
  617. (powernow_table[i].frequency < (MIN_FREQ * 1000))) {
  618. dprintk("invalid freq %u kHz, ignoring\n", powernow_table[i].frequency);
  619. powernow_table[i].frequency = CPUFREQ_ENTRY_INVALID;
  620. continue;
  621. }
  622. /* verify voltage is OK - BIOSs are using "off" to indicate invalid */
  623. if (vid == 0x1f) {
  624. dprintk("invalid vid %u, ignoring\n", vid);
  625. powernow_table[i].frequency = CPUFREQ_ENTRY_INVALID;
  626. continue;
  627. }
  628. /* verify only 1 entry from the lo frequency table */
  629. if (fid < HI_FID_TABLE_BOTTOM) {
  630. if (cntlofreq) {
  631. /* if both entries are the same, ignore this
  632. * one...
  633. */
  634. if ((powernow_table[i].frequency != powernow_table[cntlofreq].frequency) ||
  635. (powernow_table[i].index != powernow_table[cntlofreq].index)) {
  636. printk(KERN_ERR PFX "Too many lo freq table entries\n");
  637. goto err_out_mem;
  638. }
  639. dprintk("double low frequency table entry, ignoring it.\n");
  640. powernow_table[i].frequency = CPUFREQ_ENTRY_INVALID;
  641. continue;
  642. } else
  643. cntlofreq = i;
  644. }
  645. if (powernow_table[i].frequency != (data->acpi_data.states[i].core_frequency * 1000)) {
  646. printk(KERN_INFO PFX "invalid freq entries %u kHz vs. %u kHz\n",
  647. powernow_table[i].frequency,
  648. (unsigned int) (data->acpi_data.states[i].core_frequency * 1000));
  649. powernow_table[i].frequency = CPUFREQ_ENTRY_INVALID;
  650. continue;
  651. }
  652. }
  653. powernow_table[data->acpi_data.state_count].frequency = CPUFREQ_TABLE_END;
  654. powernow_table[data->acpi_data.state_count].index = 0;
  655. data->powernow_table = powernow_table;
  656. /* fill in data */
  657. data->numps = data->acpi_data.state_count;
  658. print_basics(data);
  659. powernow_k8_acpi_pst_values(data, 0);
  660. /* notify BIOS that we exist */
  661. acpi_processor_notify_smm(THIS_MODULE);
  662. return 0;
  663. err_out_mem:
  664. kfree(powernow_table);
  665. err_out:
  666. acpi_processor_unregister_performance(&data->acpi_data, data->cpu);
  667. /* data->acpi_data.state_count informs us at ->exit() whether ACPI was used */
  668. data->acpi_data.state_count = 0;
  669. return -ENODEV;
  670. }
  671. static void powernow_k8_cpu_exit_acpi(struct powernow_k8_data *data)
  672. {
  673. if (data->acpi_data.state_count)
  674. acpi_processor_unregister_performance(&data->acpi_data, data->cpu);
  675. }
  676. #else
  677. static int powernow_k8_cpu_init_acpi(struct powernow_k8_data *data) { return -ENODEV; }
  678. static void powernow_k8_cpu_exit_acpi(struct powernow_k8_data *data) { return; }
  679. static void powernow_k8_acpi_pst_values(struct powernow_k8_data *data, unsigned int index) { return; }
  680. #endif /* CONFIG_X86_POWERNOW_K8_ACPI */
  681. /* Take a frequency, and issue the fid/vid transition command */
  682. static int transition_frequency(struct powernow_k8_data *data, unsigned int index)
  683. {
  684. u32 fid;
  685. u32 vid;
  686. int res, i;
  687. struct cpufreq_freqs freqs;
  688. dprintk("cpu %d transition to index %u\n", smp_processor_id(), index);
  689. /* fid are the lower 8 bits of the index we stored into
  690. * the cpufreq frequency table in find_psb_table, vid are
  691. * the upper 8 bits.
  692. */
  693. fid = data->powernow_table[index].index & 0xFF;
  694. vid = (data->powernow_table[index].index & 0xFF00) >> 8;
  695. dprintk("table matched fid 0x%x, giving vid 0x%x\n", fid, vid);
  696. if (query_current_values_with_pending_wait(data))
  697. return 1;
  698. if ((data->currvid == vid) && (data->currfid == fid)) {
  699. dprintk("target matches current values (fid 0x%x, vid 0x%x)\n",
  700. fid, vid);
  701. return 0;
  702. }
  703. if ((fid < HI_FID_TABLE_BOTTOM) && (data->currfid < HI_FID_TABLE_BOTTOM)) {
  704. printk(KERN_ERR PFX
  705. "ignoring illegal change in lo freq table-%x to 0x%x\n",
  706. data->currfid, fid);
  707. return 1;
  708. }
  709. dprintk("cpu %d, changing to fid 0x%x, vid 0x%x\n",
  710. smp_processor_id(), fid, vid);
  711. freqs.cpu = data->cpu;
  712. freqs.old = find_khz_freq_from_fid(data->currfid);
  713. freqs.new = find_khz_freq_from_fid(fid);
  714. for_each_cpu_mask(i, cpu_core_map[data->cpu]) {
  715. freqs.cpu = i;
  716. cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
  717. }
  718. res = transition_fid_vid(data, fid, vid);
  719. freqs.new = find_khz_freq_from_fid(data->currfid);
  720. for_each_cpu_mask(i, cpu_core_map[data->cpu]) {
  721. freqs.cpu = i;
  722. cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
  723. }
  724. return res;
  725. }
  726. /* Driver entry point to switch to the target frequency */
  727. static int powernowk8_target(struct cpufreq_policy *pol, unsigned targfreq, unsigned relation)
  728. {
  729. cpumask_t oldmask = CPU_MASK_ALL;
  730. struct powernow_k8_data *data = powernow_data[pol->cpu];
  731. u32 checkfid = data->currfid;
  732. u32 checkvid = data->currvid;
  733. unsigned int newstate;
  734. int ret = -EIO;
  735. int i;
  736. /* only run on specific CPU from here on */
  737. oldmask = current->cpus_allowed;
  738. set_cpus_allowed(current, cpumask_of_cpu(pol->cpu));
  739. schedule();
  740. if (smp_processor_id() != pol->cpu) {
  741. printk(KERN_ERR "limiting to cpu %u failed\n", pol->cpu);
  742. goto err_out;
  743. }
  744. if (pending_bit_stuck()) {
  745. printk(KERN_ERR PFX "failing targ, change pending bit set\n");
  746. goto err_out;
  747. }
  748. dprintk("targ: cpu %d, %d kHz, min %d, max %d, relation %d\n",
  749. pol->cpu, targfreq, pol->min, pol->max, relation);
  750. if (query_current_values_with_pending_wait(data)) {
  751. ret = -EIO;
  752. goto err_out;
  753. }
  754. dprintk("targ: curr fid 0x%x, vid 0x%x\n",
  755. data->currfid, data->currvid);
  756. if ((checkvid != data->currvid) || (checkfid != data->currfid)) {
  757. printk(KERN_INFO PFX
  758. "error - out of sync, fix 0x%x 0x%x, vid 0x%x 0x%x\n",
  759. checkfid, data->currfid, checkvid, data->currvid);
  760. }
  761. if (cpufreq_frequency_table_target(pol, data->powernow_table, targfreq, relation, &newstate))
  762. goto err_out;
  763. down(&fidvid_sem);
  764. for_each_cpu_mask(i, cpu_core_map[pol->cpu]) {
  765. /* make sure the sibling is initialized */
  766. if (!powernow_data[i]) {
  767. ret = 0;
  768. up(&fidvid_sem);
  769. goto err_out;
  770. }
  771. }
  772. powernow_k8_acpi_pst_values(data, newstate);
  773. if (transition_frequency(data, newstate)) {
  774. printk(KERN_ERR PFX "transition frequency failed\n");
  775. ret = 1;
  776. up(&fidvid_sem);
  777. goto err_out;
  778. }
  779. /* Update all the fid/vids of our siblings */
  780. for_each_cpu_mask(i, cpu_core_map[pol->cpu]) {
  781. powernow_data[i]->currvid = data->currvid;
  782. powernow_data[i]->currfid = data->currfid;
  783. }
  784. up(&fidvid_sem);
  785. pol->cur = find_khz_freq_from_fid(data->currfid);
  786. ret = 0;
  787. err_out:
  788. set_cpus_allowed(current, oldmask);
  789. schedule();
  790. return ret;
  791. }
  792. /* Driver entry point to verify the policy and range of frequencies */
  793. static int powernowk8_verify(struct cpufreq_policy *pol)
  794. {
  795. struct powernow_k8_data *data = powernow_data[pol->cpu];
  796. return cpufreq_frequency_table_verify(pol, data->powernow_table);
  797. }
  798. /* per CPU init entry point to the driver */
  799. static int __init powernowk8_cpu_init(struct cpufreq_policy *pol)
  800. {
  801. struct powernow_k8_data *data;
  802. cpumask_t oldmask = CPU_MASK_ALL;
  803. int rc;
  804. if (!check_supported_cpu(pol->cpu))
  805. return -ENODEV;
  806. data = kmalloc(sizeof(struct powernow_k8_data), GFP_KERNEL);
  807. if (!data) {
  808. printk(KERN_ERR PFX "unable to alloc powernow_k8_data");
  809. return -ENOMEM;
  810. }
  811. memset(data,0,sizeof(struct powernow_k8_data));
  812. data->cpu = pol->cpu;
  813. if (powernow_k8_cpu_init_acpi(data)) {
  814. /*
  815. * Use the PSB BIOS structure. This is only availabe on
  816. * an UP version, and is deprecated by AMD.
  817. */
  818. if ((num_online_cpus() != 1) || (num_possible_cpus() != 1)) {
  819. printk(KERN_ERR PFX "MP systems not supported by PSB BIOS structure\n");
  820. kfree(data);
  821. return -ENODEV;
  822. }
  823. if (pol->cpu != 0) {
  824. printk(KERN_ERR PFX "init not cpu 0\n");
  825. kfree(data);
  826. return -ENODEV;
  827. }
  828. rc = find_psb_table(data);
  829. if (rc) {
  830. kfree(data);
  831. return -ENODEV;
  832. }
  833. }
  834. /* only run on specific CPU from here on */
  835. oldmask = current->cpus_allowed;
  836. set_cpus_allowed(current, cpumask_of_cpu(pol->cpu));
  837. schedule();
  838. if (smp_processor_id() != pol->cpu) {
  839. printk(KERN_ERR "limiting to cpu %u failed\n", pol->cpu);
  840. goto err_out;
  841. }
  842. if (pending_bit_stuck()) {
  843. printk(KERN_ERR PFX "failing init, change pending bit set\n");
  844. goto err_out;
  845. }
  846. if (query_current_values_with_pending_wait(data))
  847. goto err_out;
  848. fidvid_msr_init();
  849. /* run on any CPU again */
  850. set_cpus_allowed(current, oldmask);
  851. schedule();
  852. pol->governor = CPUFREQ_DEFAULT_GOVERNOR;
  853. pol->cpus = cpu_core_map[pol->cpu];
  854. /* Take a crude guess here.
  855. * That guess was in microseconds, so multiply with 1000 */
  856. pol->cpuinfo.transition_latency = (((data->rvo + 8) * data->vstable * VST_UNITS_20US)
  857. + (3 * (1 << data->irt) * 10)) * 1000;
  858. pol->cur = find_khz_freq_from_fid(data->currfid);
  859. dprintk("policy current frequency %d kHz\n", pol->cur);
  860. /* min/max the cpu is capable of */
  861. if (cpufreq_frequency_table_cpuinfo(pol, data->powernow_table)) {
  862. printk(KERN_ERR PFX "invalid powernow_table\n");
  863. powernow_k8_cpu_exit_acpi(data);
  864. kfree(data->powernow_table);
  865. kfree(data);
  866. return -EINVAL;
  867. }
  868. cpufreq_frequency_table_get_attr(data->powernow_table, pol->cpu);
  869. printk("cpu_init done, current fid 0x%x, vid 0x%x\n",
  870. data->currfid, data->currvid);
  871. powernow_data[pol->cpu] = data;
  872. return 0;
  873. err_out:
  874. set_cpus_allowed(current, oldmask);
  875. schedule();
  876. powernow_k8_cpu_exit_acpi(data);
  877. kfree(data);
  878. return -ENODEV;
  879. }
  880. static int __devexit powernowk8_cpu_exit (struct cpufreq_policy *pol)
  881. {
  882. struct powernow_k8_data *data = powernow_data[pol->cpu];
  883. if (!data)
  884. return -EINVAL;
  885. powernow_k8_cpu_exit_acpi(data);
  886. cpufreq_frequency_table_put_attr(pol->cpu);
  887. kfree(data->powernow_table);
  888. kfree(data);
  889. return 0;
  890. }
  891. static unsigned int powernowk8_get (unsigned int cpu)
  892. {
  893. struct powernow_k8_data *data = powernow_data[cpu];
  894. cpumask_t oldmask = current->cpus_allowed;
  895. unsigned int khz = 0;
  896. set_cpus_allowed(current, cpumask_of_cpu(cpu));
  897. if (smp_processor_id() != cpu) {
  898. printk(KERN_ERR PFX "limiting to CPU %d failed in powernowk8_get\n", cpu);
  899. set_cpus_allowed(current, oldmask);
  900. return 0;
  901. }
  902. preempt_disable();
  903. if (query_current_values_with_pending_wait(data))
  904. goto out;
  905. khz = find_khz_freq_from_fid(data->currfid);
  906. out:
  907. preempt_enable_no_resched();
  908. set_cpus_allowed(current, oldmask);
  909. return khz;
  910. }
  911. static struct freq_attr* powernow_k8_attr[] = {
  912. &cpufreq_freq_attr_scaling_available_freqs,
  913. NULL,
  914. };
  915. static struct cpufreq_driver cpufreq_amd64_driver = {
  916. .verify = powernowk8_verify,
  917. .target = powernowk8_target,
  918. .init = powernowk8_cpu_init,
  919. .exit = __devexit_p(powernowk8_cpu_exit),
  920. .get = powernowk8_get,
  921. .name = "powernow-k8",
  922. .owner = THIS_MODULE,
  923. .attr = powernow_k8_attr,
  924. };
  925. /* driver entry point for init */
  926. static int __init powernowk8_init(void)
  927. {
  928. unsigned int i, supported_cpus = 0;
  929. for (i=0; i<NR_CPUS; i++) {
  930. if (!cpu_online(i))
  931. continue;
  932. if (check_supported_cpu(i))
  933. supported_cpus++;
  934. }
  935. if (supported_cpus == num_online_cpus()) {
  936. printk(KERN_INFO PFX "Found %d AMD Athlon 64 / Opteron processors (" VERSION ")\n",
  937. supported_cpus);
  938. return cpufreq_register_driver(&cpufreq_amd64_driver);
  939. }
  940. return -ENODEV;
  941. }
  942. /* driver entry point for term */
  943. static void __exit powernowk8_exit(void)
  944. {
  945. dprintk("exit\n");
  946. cpufreq_unregister_driver(&cpufreq_amd64_driver);
  947. }
  948. MODULE_AUTHOR("Paul Devriendt <paul.devriendt@amd.com> and Mark Langsdorf <mark.langsdorf@amd.com.");
  949. MODULE_DESCRIPTION("AMD Athlon 64 and Opteron processor frequency driver.");
  950. MODULE_LICENSE("GPL");
  951. late_initcall(powernowk8_init);
  952. module_exit(powernowk8_exit);