common.c 15 KB

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  1. /*
  2. * linux/arch/arm/mach-omap/common.c
  3. *
  4. * Code common to all OMAP machines.
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. */
  10. #include <linux/config.h>
  11. #include <linux/module.h>
  12. #include <linux/kernel.h>
  13. #include <linux/init.h>
  14. #include <linux/delay.h>
  15. #include <linux/pm.h>
  16. #include <linux/console.h>
  17. #include <linux/serial.h>
  18. #include <linux/tty.h>
  19. #include <linux/serial_8250.h>
  20. #include <linux/serial_reg.h>
  21. #include <asm/hardware.h>
  22. #include <asm/system.h>
  23. #include <asm/pgtable.h>
  24. #include <asm/mach/map.h>
  25. #include <asm/hardware/clock.h>
  26. #include <asm/io.h>
  27. #include <asm/mach-types.h>
  28. #include <asm/arch/board.h>
  29. #include <asm/arch/mux.h>
  30. #include <asm/arch/fpga.h>
  31. #include "clock.h"
  32. #define DEBUG 1
  33. struct omap_id {
  34. u16 jtag_id; /* Used to determine OMAP type */
  35. u8 die_rev; /* Processor revision */
  36. u32 omap_id; /* OMAP revision */
  37. u32 type; /* Cpu id bits [31:08], cpu class bits [07:00] */
  38. };
  39. /* Register values to detect the OMAP version */
  40. static struct omap_id omap_ids[] __initdata = {
  41. { .jtag_id = 0x355f, .die_rev = 0x0, .omap_id = 0x03320000, .type = 0x07300100},
  42. { .jtag_id = 0xb55f, .die_rev = 0x0, .omap_id = 0x03320000, .type = 0x07300300},
  43. { .jtag_id = 0xb470, .die_rev = 0x0, .omap_id = 0x03310100, .type = 0x15100000},
  44. { .jtag_id = 0xb576, .die_rev = 0x0, .omap_id = 0x03320000, .type = 0x16100000},
  45. { .jtag_id = 0xb576, .die_rev = 0x2, .omap_id = 0x03320100, .type = 0x16110000},
  46. { .jtag_id = 0xb576, .die_rev = 0x3, .omap_id = 0x03320100, .type = 0x16100c00},
  47. { .jtag_id = 0xb576, .die_rev = 0x0, .omap_id = 0x03320200, .type = 0x16100d00},
  48. { .jtag_id = 0xb613, .die_rev = 0x0, .omap_id = 0x03320300, .type = 0x1610ef00},
  49. { .jtag_id = 0xb613, .die_rev = 0x0, .omap_id = 0x03320300, .type = 0x1610ef00},
  50. { .jtag_id = 0xb576, .die_rev = 0x1, .omap_id = 0x03320100, .type = 0x16110000},
  51. { .jtag_id = 0xb58c, .die_rev = 0x2, .omap_id = 0x03320200, .type = 0x16110b00},
  52. { .jtag_id = 0xb58c, .die_rev = 0x3, .omap_id = 0x03320200, .type = 0x16110c00},
  53. { .jtag_id = 0xb65f, .die_rev = 0x0, .omap_id = 0x03320400, .type = 0x16212300},
  54. { .jtag_id = 0xb65f, .die_rev = 0x1, .omap_id = 0x03320400, .type = 0x16212300},
  55. { .jtag_id = 0xb65f, .die_rev = 0x1, .omap_id = 0x03320500, .type = 0x16212300},
  56. { .jtag_id = 0xb5f7, .die_rev = 0x0, .omap_id = 0x03330000, .type = 0x17100000},
  57. { .jtag_id = 0xb5f7, .die_rev = 0x1, .omap_id = 0x03330100, .type = 0x17100000},
  58. { .jtag_id = 0xb5f7, .die_rev = 0x2, .omap_id = 0x03330100, .type = 0x17100000},
  59. };
  60. /*
  61. * Get OMAP type from PROD_ID.
  62. * 1710 has the PROD_ID in bits 15:00, not in 16:01 as documented in TRM.
  63. * 1510 PROD_ID is empty, and 1610 PROD_ID does not make sense.
  64. * Undocumented register in TEST BLOCK is used as fallback; This seems to
  65. * work on 1510, 1610 & 1710. The official way hopefully will work in future
  66. * processors.
  67. */
  68. static u16 __init omap_get_jtag_id(void)
  69. {
  70. u32 prod_id, omap_id;
  71. prod_id = omap_readl(OMAP_PRODUCTION_ID_1);
  72. omap_id = omap_readl(OMAP32_ID_1);
  73. /* Check for unusable OMAP_PRODUCTION_ID_1 on 1611B/5912 and 730 */
  74. if (((prod_id >> 20) == 0) || (prod_id == omap_id))
  75. prod_id = 0;
  76. else
  77. prod_id &= 0xffff;
  78. if (prod_id)
  79. return prod_id;
  80. /* Use OMAP32_ID_1 as fallback */
  81. prod_id = ((omap_id >> 12) & 0xffff);
  82. return prod_id;
  83. }
  84. /*
  85. * Get OMAP revision from DIE_REV.
  86. * Early 1710 processors may have broken OMAP_DIE_ID, it contains PROD_ID.
  87. * Undocumented register in the TEST BLOCK is used as fallback.
  88. * REVISIT: This does not seem to work on 1510
  89. */
  90. static u8 __init omap_get_die_rev(void)
  91. {
  92. u32 die_rev;
  93. die_rev = omap_readl(OMAP_DIE_ID_1);
  94. /* Check for broken OMAP_DIE_ID on early 1710 */
  95. if (((die_rev >> 12) & 0xffff) == omap_get_jtag_id())
  96. die_rev = 0;
  97. die_rev = (die_rev >> 17) & 0xf;
  98. if (die_rev)
  99. return die_rev;
  100. die_rev = (omap_readl(OMAP32_ID_1) >> 28) & 0xf;
  101. return die_rev;
  102. }
  103. static void __init omap_check_revision(void)
  104. {
  105. int i;
  106. u16 jtag_id;
  107. u8 die_rev;
  108. u32 omap_id;
  109. u8 cpu_type;
  110. jtag_id = omap_get_jtag_id();
  111. die_rev = omap_get_die_rev();
  112. omap_id = omap_readl(OMAP32_ID_0);
  113. #ifdef DEBUG
  114. printk("OMAP_DIE_ID_0: 0x%08x\n", omap_readl(OMAP_DIE_ID_0));
  115. printk("OMAP_DIE_ID_1: 0x%08x DIE_REV: %i\n",
  116. omap_readl(OMAP_DIE_ID_1),
  117. (omap_readl(OMAP_DIE_ID_1) >> 17) & 0xf);
  118. printk("OMAP_PRODUCTION_ID_0: 0x%08x\n", omap_readl(OMAP_PRODUCTION_ID_0));
  119. printk("OMAP_PRODUCTION_ID_1: 0x%08x JTAG_ID: 0x%04x\n",
  120. omap_readl(OMAP_PRODUCTION_ID_1),
  121. omap_readl(OMAP_PRODUCTION_ID_1) & 0xffff);
  122. printk("OMAP32_ID_0: 0x%08x\n", omap_readl(OMAP32_ID_0));
  123. printk("OMAP32_ID_1: 0x%08x\n", omap_readl(OMAP32_ID_1));
  124. printk("JTAG_ID: 0x%04x DIE_REV: %i\n", jtag_id, die_rev);
  125. #endif
  126. system_serial_high = omap_readl(OMAP_DIE_ID_0);
  127. system_serial_low = omap_readl(OMAP_DIE_ID_1);
  128. /* First check only the major version in a safe way */
  129. for (i = 0; i < ARRAY_SIZE(omap_ids); i++) {
  130. if (jtag_id == (omap_ids[i].jtag_id)) {
  131. system_rev = omap_ids[i].type;
  132. break;
  133. }
  134. }
  135. /* Check if we can find the die revision */
  136. for (i = 0; i < ARRAY_SIZE(omap_ids); i++) {
  137. if (jtag_id == omap_ids[i].jtag_id && die_rev == omap_ids[i].die_rev) {
  138. system_rev = omap_ids[i].type;
  139. break;
  140. }
  141. }
  142. /* Finally check also the omap_id */
  143. for (i = 0; i < ARRAY_SIZE(omap_ids); i++) {
  144. if (jtag_id == omap_ids[i].jtag_id
  145. && die_rev == omap_ids[i].die_rev
  146. && omap_id == omap_ids[i].omap_id) {
  147. system_rev = omap_ids[i].type;
  148. break;
  149. }
  150. }
  151. /* Add the cpu class info (7xx, 15xx, 16xx, 24xx) */
  152. cpu_type = system_rev >> 24;
  153. switch (cpu_type) {
  154. case 0x07:
  155. system_rev |= 0x07;
  156. break;
  157. case 0x15:
  158. system_rev |= 0x15;
  159. break;
  160. case 0x16:
  161. case 0x17:
  162. system_rev |= 0x16;
  163. break;
  164. case 0x24:
  165. system_rev |= 0x24;
  166. break;
  167. default:
  168. printk("Unknown OMAP cpu type: 0x%02x\n", cpu_type);
  169. }
  170. printk("OMAP%04x", system_rev >> 16);
  171. if ((system_rev >> 8) & 0xff)
  172. printk("%x", (system_rev >> 8) & 0xff);
  173. printk(" revision %i handled as %02xxx id: %08x%08x\n",
  174. die_rev, system_rev & 0xff, system_serial_low,
  175. system_serial_high);
  176. }
  177. /*
  178. * ----------------------------------------------------------------------------
  179. * OMAP I/O mapping
  180. *
  181. * The machine specific code may provide the extra mapping besides the
  182. * default mapping provided here.
  183. * ----------------------------------------------------------------------------
  184. */
  185. static struct map_desc omap_io_desc[] __initdata = {
  186. { IO_VIRT, IO_PHYS, IO_SIZE, MT_DEVICE },
  187. };
  188. #ifdef CONFIG_ARCH_OMAP730
  189. static struct map_desc omap730_io_desc[] __initdata = {
  190. { OMAP730_DSP_BASE, OMAP730_DSP_START, OMAP730_DSP_SIZE, MT_DEVICE },
  191. { OMAP730_DSPREG_BASE, OMAP730_DSPREG_START, OMAP730_DSPREG_SIZE, MT_DEVICE },
  192. { OMAP730_SRAM_BASE, OMAP730_SRAM_START, OMAP730_SRAM_SIZE, MT_DEVICE }
  193. };
  194. #endif
  195. #ifdef CONFIG_ARCH_OMAP1510
  196. static struct map_desc omap1510_io_desc[] __initdata = {
  197. { OMAP1510_DSP_BASE, OMAP1510_DSP_START, OMAP1510_DSP_SIZE, MT_DEVICE },
  198. { OMAP1510_DSPREG_BASE, OMAP1510_DSPREG_START, OMAP1510_DSPREG_SIZE, MT_DEVICE },
  199. { OMAP1510_SRAM_BASE, OMAP1510_SRAM_START, OMAP1510_SRAM_SIZE, MT_DEVICE }
  200. };
  201. #endif
  202. #if defined(CONFIG_ARCH_OMAP16XX)
  203. static struct map_desc omap1610_io_desc[] __initdata = {
  204. { OMAP16XX_DSP_BASE, OMAP16XX_DSP_START, OMAP16XX_DSP_SIZE, MT_DEVICE },
  205. { OMAP16XX_DSPREG_BASE, OMAP16XX_DSPREG_START, OMAP16XX_DSPREG_SIZE, MT_DEVICE },
  206. { OMAP16XX_SRAM_BASE, OMAP16XX_SRAM_START, OMAP1610_SRAM_SIZE, MT_DEVICE }
  207. };
  208. static struct map_desc omap5912_io_desc[] __initdata = {
  209. { OMAP16XX_DSP_BASE, OMAP16XX_DSP_START, OMAP16XX_DSP_SIZE, MT_DEVICE },
  210. { OMAP16XX_DSPREG_BASE, OMAP16XX_DSPREG_START, OMAP16XX_DSPREG_SIZE, MT_DEVICE },
  211. /*
  212. * The OMAP5912 has 250kByte internal SRAM. Because the mapping is baseed on page
  213. * size (4kByte), it seems that the last 2kByte (=0x800) of the 250kByte are not mapped.
  214. * Add additional 2kByte (0x800) so that the last page is mapped and the last 2kByte
  215. * can be used.
  216. */
  217. { OMAP16XX_SRAM_BASE, OMAP16XX_SRAM_START, OMAP5912_SRAM_SIZE + 0x800, MT_DEVICE }
  218. };
  219. #endif
  220. static int initialized = 0;
  221. static void __init _omap_map_io(void)
  222. {
  223. initialized = 1;
  224. /* We have to initialize the IO space mapping before we can run
  225. * cpu_is_omapxxx() macros. */
  226. iotable_init(omap_io_desc, ARRAY_SIZE(omap_io_desc));
  227. omap_check_revision();
  228. #ifdef CONFIG_ARCH_OMAP730
  229. if (cpu_is_omap730()) {
  230. iotable_init(omap730_io_desc, ARRAY_SIZE(omap730_io_desc));
  231. }
  232. #endif
  233. #ifdef CONFIG_ARCH_OMAP1510
  234. if (cpu_is_omap1510()) {
  235. iotable_init(omap1510_io_desc, ARRAY_SIZE(omap1510_io_desc));
  236. }
  237. #endif
  238. #if defined(CONFIG_ARCH_OMAP16XX)
  239. if (cpu_is_omap1610() || cpu_is_omap1710()) {
  240. iotable_init(omap1610_io_desc, ARRAY_SIZE(omap1610_io_desc));
  241. }
  242. if (cpu_is_omap5912()) {
  243. iotable_init(omap5912_io_desc, ARRAY_SIZE(omap5912_io_desc));
  244. }
  245. #endif
  246. /* REVISIT: Refer to OMAP5910 Errata, Advisory SYS_1: "Timeout Abort
  247. * on a Posted Write in the TIPB Bridge".
  248. */
  249. omap_writew(0x0, MPU_PUBLIC_TIPB_CNTL);
  250. omap_writew(0x0, MPU_PRIVATE_TIPB_CNTL);
  251. /* Must init clocks early to assure that timer interrupt works
  252. */
  253. clk_init();
  254. }
  255. /*
  256. * This should only get called from board specific init
  257. */
  258. void omap_map_io(void)
  259. {
  260. if (!initialized)
  261. _omap_map_io();
  262. }
  263. static inline unsigned int omap_serial_in(struct plat_serial8250_port *up,
  264. int offset)
  265. {
  266. offset <<= up->regshift;
  267. return (unsigned int)__raw_readb(up->membase + offset);
  268. }
  269. static inline void omap_serial_outp(struct plat_serial8250_port *p, int offset,
  270. int value)
  271. {
  272. offset <<= p->regshift;
  273. __raw_writeb(value, p->membase + offset);
  274. }
  275. /*
  276. * Internal UARTs need to be initialized for the 8250 autoconfig to work
  277. * properly. Note that the TX watermark initialization may not be needed
  278. * once the 8250.c watermark handling code is merged.
  279. */
  280. static void __init omap_serial_reset(struct plat_serial8250_port *p)
  281. {
  282. omap_serial_outp(p, UART_OMAP_MDR1, 0x07); /* disable UART */
  283. omap_serial_outp(p, UART_OMAP_SCR, 0x08); /* TX watermark */
  284. omap_serial_outp(p, UART_OMAP_MDR1, 0x00); /* enable UART */
  285. if (!cpu_is_omap1510()) {
  286. omap_serial_outp(p, UART_OMAP_SYSC, 0x01);
  287. while (!(omap_serial_in(p, UART_OMAP_SYSC) & 0x01));
  288. }
  289. }
  290. static struct plat_serial8250_port serial_platform_data[] = {
  291. {
  292. .membase = (char*)IO_ADDRESS(OMAP_UART1_BASE),
  293. .mapbase = (unsigned long)OMAP_UART1_BASE,
  294. .irq = INT_UART1,
  295. .flags = UPF_BOOT_AUTOCONF,
  296. .iotype = UPIO_MEM,
  297. .regshift = 2,
  298. .uartclk = OMAP16XX_BASE_BAUD * 16,
  299. },
  300. {
  301. .membase = (char*)IO_ADDRESS(OMAP_UART2_BASE),
  302. .mapbase = (unsigned long)OMAP_UART2_BASE,
  303. .irq = INT_UART2,
  304. .flags = UPF_BOOT_AUTOCONF,
  305. .iotype = UPIO_MEM,
  306. .regshift = 2,
  307. .uartclk = OMAP16XX_BASE_BAUD * 16,
  308. },
  309. {
  310. .membase = (char*)IO_ADDRESS(OMAP_UART3_BASE),
  311. .mapbase = (unsigned long)OMAP_UART3_BASE,
  312. .irq = INT_UART3,
  313. .flags = UPF_BOOT_AUTOCONF,
  314. .iotype = UPIO_MEM,
  315. .regshift = 2,
  316. .uartclk = OMAP16XX_BASE_BAUD * 16,
  317. },
  318. { },
  319. };
  320. static struct platform_device serial_device = {
  321. .name = "serial8250",
  322. .id = 0,
  323. .dev = {
  324. .platform_data = serial_platform_data,
  325. },
  326. };
  327. /*
  328. * Note that on Innovator-1510 UART2 pins conflict with USB2.
  329. * By default UART2 does not work on Innovator-1510 if you have
  330. * USB OHCI enabled. To use UART2, you must disable USB2 first.
  331. */
  332. void __init omap_serial_init(int ports[OMAP_MAX_NR_PORTS])
  333. {
  334. int i;
  335. if (cpu_is_omap730()) {
  336. serial_platform_data[0].regshift = 0;
  337. serial_platform_data[1].regshift = 0;
  338. serial_platform_data[0].irq = INT_730_UART_MODEM_1;
  339. serial_platform_data[1].irq = INT_730_UART_MODEM_IRDA_2;
  340. }
  341. if (cpu_is_omap1510()) {
  342. serial_platform_data[0].uartclk = OMAP1510_BASE_BAUD * 16;
  343. serial_platform_data[1].uartclk = OMAP1510_BASE_BAUD * 16;
  344. serial_platform_data[2].uartclk = OMAP1510_BASE_BAUD * 16;
  345. }
  346. for (i = 0; i < OMAP_MAX_NR_PORTS; i++) {
  347. unsigned char reg;
  348. if (ports[i] == 0) {
  349. serial_platform_data[i].membase = 0;
  350. serial_platform_data[i].mapbase = 0;
  351. continue;
  352. }
  353. switch (i) {
  354. case 0:
  355. if (cpu_is_omap1510()) {
  356. omap_cfg_reg(UART1_TX);
  357. omap_cfg_reg(UART1_RTS);
  358. if (machine_is_omap_innovator()) {
  359. reg = fpga_read(OMAP1510_FPGA_POWER);
  360. reg |= OMAP1510_FPGA_PCR_COM1_EN;
  361. fpga_write(reg, OMAP1510_FPGA_POWER);
  362. udelay(10);
  363. }
  364. }
  365. break;
  366. case 1:
  367. if (cpu_is_omap1510()) {
  368. omap_cfg_reg(UART2_TX);
  369. omap_cfg_reg(UART2_RTS);
  370. if (machine_is_omap_innovator()) {
  371. reg = fpga_read(OMAP1510_FPGA_POWER);
  372. reg |= OMAP1510_FPGA_PCR_COM2_EN;
  373. fpga_write(reg, OMAP1510_FPGA_POWER);
  374. udelay(10);
  375. }
  376. }
  377. break;
  378. case 2:
  379. if (cpu_is_omap1510()) {
  380. omap_cfg_reg(UART3_TX);
  381. omap_cfg_reg(UART3_RX);
  382. }
  383. if (cpu_is_omap1710()) {
  384. clk_enable(clk_get(0, "uart3_ck"));
  385. }
  386. break;
  387. }
  388. omap_serial_reset(&serial_platform_data[i]);
  389. }
  390. }
  391. static int __init omap_init(void)
  392. {
  393. return platform_device_register(&serial_device);
  394. }
  395. arch_initcall(omap_init);
  396. #define NO_LENGTH_CHECK 0xffffffff
  397. extern int omap_bootloader_tag_len;
  398. extern u8 omap_bootloader_tag[];
  399. struct omap_board_config_kernel *omap_board_config;
  400. int omap_board_config_size = 0;
  401. static const void *get_config(u16 tag, size_t len, int skip, size_t *len_out)
  402. {
  403. struct omap_board_config_kernel *kinfo = NULL;
  404. int i;
  405. #ifdef CONFIG_OMAP_BOOT_TAG
  406. struct omap_board_config_entry *info = NULL;
  407. if (omap_bootloader_tag_len > 4)
  408. info = (struct omap_board_config_entry *) omap_bootloader_tag;
  409. while (info != NULL) {
  410. u8 *next;
  411. if (info->tag == tag) {
  412. if (skip == 0)
  413. break;
  414. skip--;
  415. }
  416. if ((info->len & 0x03) != 0) {
  417. /* We bail out to avoid an alignment fault */
  418. printk(KERN_ERR "OMAP peripheral config: Length (%d) not word-aligned (tag %04x)\n",
  419. info->len, info->tag);
  420. return NULL;
  421. }
  422. next = (u8 *) info + sizeof(*info) + info->len;
  423. if (next >= omap_bootloader_tag + omap_bootloader_tag_len)
  424. info = NULL;
  425. else
  426. info = (struct omap_board_config_entry *) next;
  427. }
  428. if (info != NULL) {
  429. /* Check the length as a lame attempt to check for
  430. * binary inconsistancy. */
  431. if (len != NO_LENGTH_CHECK) {
  432. /* Word-align len */
  433. if (len & 0x03)
  434. len = (len + 3) & ~0x03;
  435. if (info->len != len) {
  436. printk(KERN_ERR "OMAP peripheral config: Length mismatch with tag %x (want %d, got %d)\n",
  437. tag, len, info->len);
  438. return NULL;
  439. }
  440. }
  441. if (len_out != NULL)
  442. *len_out = info->len;
  443. return info->data;
  444. }
  445. #endif
  446. /* Try to find the config from the board-specific structures
  447. * in the kernel. */
  448. for (i = 0; i < omap_board_config_size; i++) {
  449. if (omap_board_config[i].tag == tag) {
  450. kinfo = &omap_board_config[i];
  451. break;
  452. }
  453. }
  454. if (kinfo == NULL)
  455. return NULL;
  456. return kinfo->data;
  457. }
  458. const void *__omap_get_config(u16 tag, size_t len, int nr)
  459. {
  460. return get_config(tag, len, nr, NULL);
  461. }
  462. EXPORT_SYMBOL(__omap_get_config);
  463. const void *omap_get_var_config(u16 tag, size_t *len)
  464. {
  465. return get_config(tag, NO_LENGTH_CHECK, 0, len);
  466. }
  467. EXPORT_SYMBOL(omap_get_var_config);
  468. static int __init omap_add_serial_console(void)
  469. {
  470. const struct omap_uart_config *info;
  471. info = omap_get_config(OMAP_TAG_UART, struct omap_uart_config);
  472. if (info != NULL && info->console_uart) {
  473. static char speed[11], *opt = NULL;
  474. if (info->console_speed) {
  475. snprintf(speed, sizeof(speed), "%u", info->console_speed);
  476. opt = speed;
  477. }
  478. return add_preferred_console("ttyS", info->console_uart - 1, opt);
  479. }
  480. return 0;
  481. }
  482. console_initcall(omap_add_serial_console);