platsmp.c 4.6 KB

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  1. /*
  2. * linux/arch/arm/mach-cintegrator/platsmp.c
  3. *
  4. * Copyright (C) 2002 ARM Ltd.
  5. * All Rights Reserved
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * published by the Free Software Foundation.
  10. */
  11. #include <linux/init.h>
  12. #include <linux/kernel.h>
  13. #include <linux/sched.h>
  14. #include <linux/errno.h>
  15. #include <linux/mm.h>
  16. #include <asm/atomic.h>
  17. #include <asm/delay.h>
  18. #include <asm/mmu_context.h>
  19. #include <asm/procinfo.h>
  20. #include <asm/ptrace.h>
  21. #include <asm/smp.h>
  22. extern void integrator_secondary_startup(void);
  23. /*
  24. * control for which core is the next to come out of the secondary
  25. * boot "holding pen"
  26. */
  27. volatile int __initdata pen_release = -1;
  28. unsigned long __initdata phys_pen_release = 0;
  29. static DEFINE_SPINLOCK(boot_lock);
  30. void __init platform_secondary_init(unsigned int cpu)
  31. {
  32. /*
  33. * the primary core may have used a "cross call" soft interrupt
  34. * to get this processor out of WFI in the BootMonitor - make
  35. * sure that we are no longer being sent this soft interrupt
  36. */
  37. smp_cross_call_done(cpumask_of_cpu(cpu));
  38. /*
  39. * if any interrupts are already enabled for the primary
  40. * core (e.g. timer irq), then they will not have been enabled
  41. * for us: do so
  42. */
  43. secondary_scan_irqs();
  44. /*
  45. * let the primary processor know we're out of the
  46. * pen, then head off into the C entry point
  47. */
  48. pen_release = -1;
  49. /*
  50. * Synchronise with the boot thread.
  51. */
  52. spin_lock(&boot_lock);
  53. spin_unlock(&boot_lock);
  54. }
  55. int __init boot_secondary(unsigned int cpu, struct task_struct *idle)
  56. {
  57. unsigned long timeout;
  58. /*
  59. * set synchronisation state between this boot processor
  60. * and the secondary one
  61. */
  62. spin_lock(&boot_lock);
  63. /*
  64. * The secondary processor is waiting to be released from
  65. * the holding pen - release it, then wait for it to flag
  66. * that it has been released by resetting pen_release.
  67. *
  68. * Note that "pen_release" is the hardware CPU ID, whereas
  69. * "cpu" is Linux's internal ID.
  70. */
  71. pen_release = cpu;
  72. /*
  73. * XXX
  74. *
  75. * This is a later addition to the booting protocol: the
  76. * bootMonitor now puts secondary cores into WFI, so
  77. * poke_milo() no longer gets the cores moving; we need
  78. * to send a soft interrupt to wake the secondary core.
  79. * Use smp_cross_call() for this, since there's little
  80. * point duplicating the code here
  81. */
  82. smp_cross_call(cpumask_of_cpu(cpu));
  83. timeout = jiffies + (1 * HZ);
  84. while (time_before(jiffies, timeout)) {
  85. if (pen_release == -1)
  86. break;
  87. udelay(10);
  88. }
  89. /*
  90. * now the secondary core is starting up let it run its
  91. * calibrations, then wait for it to finish
  92. */
  93. spin_unlock(&boot_lock);
  94. return pen_release != -1 ? -ENOSYS : 0;
  95. }
  96. static void __init poke_milo(void)
  97. {
  98. extern void secondary_startup(void);
  99. /* nobody is to be released from the pen yet */
  100. pen_release = -1;
  101. phys_pen_release = virt_to_phys(&pen_release);
  102. /*
  103. * write the address of secondary startup into the system-wide
  104. * flags register, then clear the bottom two bits, which is what
  105. * BootMonitor is waiting for
  106. */
  107. #if 1
  108. #define CINTEGRATOR_HDR_FLAGSS_OFFSET 0x30
  109. __raw_writel(virt_to_phys(integrator_secondary_startup),
  110. (IO_ADDRESS(INTEGRATOR_HDR_BASE) +
  111. CINTEGRATOR_HDR_FLAGSS_OFFSET));
  112. #define CINTEGRATOR_HDR_FLAGSC_OFFSET 0x34
  113. __raw_writel(3,
  114. (IO_ADDRESS(INTEGRATOR_HDR_BASE) +
  115. CINTEGRATOR_HDR_FLAGSC_OFFSET));
  116. #endif
  117. mb();
  118. }
  119. void __init smp_prepare_cpus(unsigned int max_cpus)
  120. {
  121. unsigned int ncores = get_core_count();
  122. unsigned int cpu = smp_processor_id();
  123. int i;
  124. /* sanity check */
  125. if (ncores == 0) {
  126. printk(KERN_ERR
  127. "Integrator/CP: strange CM count of 0? Default to 1\n");
  128. ncores = 1;
  129. }
  130. if (ncores > NR_CPUS) {
  131. printk(KERN_WARNING
  132. "Integrator/CP: no. of cores (%d) greater than configured "
  133. "maximum of %d - clipping\n",
  134. ncores, NR_CPUS);
  135. ncores = NR_CPUS;
  136. }
  137. /*
  138. * start with some more config for the Boot CPU, now that
  139. * the world is a bit more alive (which was not the case
  140. * when smp_prepare_boot_cpu() was called)
  141. */
  142. smp_store_cpu_info(cpu);
  143. /*
  144. * are we trying to boot more cores than exist?
  145. */
  146. if (max_cpus > ncores)
  147. max_cpus = ncores;
  148. /*
  149. * Initialise the present mask - this tells us which CPUs should
  150. * be present.
  151. */
  152. for (i = 0; i < max_cpus; i++) {
  153. cpu_set(i, cpu_present_mask);
  154. }
  155. /*
  156. * Do we need any more CPUs? If so, then let them know where
  157. * to start. Note that, on modern versions of MILO, the "poke"
  158. * doesn't actually do anything until each individual core is
  159. * sent a soft interrupt to get it out of WFI
  160. */
  161. if (max_cpus > 1)
  162. poke_milo();
  163. }